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[qemu.git] / hw / misc / ivshmem.c
1 /*
2  * Inter-VM Shared Memory PCI device.
3  *
4  * Author:
5  *      Cam Macdonell <[email protected]>
6  *
7  * Based On: cirrus_vga.c
8  *          Copyright (c) 2004 Fabrice Bellard
9  *          Copyright (c) 2004 Makoto Suzuki (suzu)
10  *
11  *      and rtl8139.c
12  *          Copyright (c) 2006 Igor Kovalenko
13  *
14  * This code is licensed under the GNU GPL v2.
15  *
16  * Contributions after 2012-01-13 are licensed under the terms of the
17  * GNU GPL, version 2 or (at your option) any later version.
18  */
19 #include "qemu/osdep.h"
20 #include "hw/hw.h"
21 #include "hw/i386/pc.h"
22 #include "hw/pci/pci.h"
23 #include "hw/pci/msi.h"
24 #include "hw/pci/msix.h"
25 #include "sysemu/kvm.h"
26 #include "migration/migration.h"
27 #include "qemu/error-report.h"
28 #include "qemu/event_notifier.h"
29 #include "qom/object_interfaces.h"
30 #include "sysemu/char.h"
31 #include "sysemu/hostmem.h"
32 #include "sysemu/qtest.h"
33 #include "qapi/visitor.h"
34 #include "exec/ram_addr.h"
35
36 #include "hw/misc/ivshmem.h"
37
38 #include <sys/mman.h>
39
40 #define PCI_VENDOR_ID_IVSHMEM   PCI_VENDOR_ID_REDHAT_QUMRANET
41 #define PCI_DEVICE_ID_IVSHMEM   0x1110
42
43 #define IVSHMEM_MAX_PEERS UINT16_MAX
44 #define IVSHMEM_IOEVENTFD   0
45 #define IVSHMEM_MSI     1
46
47 #define IVSHMEM_REG_BAR_SIZE 0x100
48
49 #define IVSHMEM_DEBUG 0
50 #define IVSHMEM_DPRINTF(fmt, ...)                       \
51     do {                                                \
52         if (IVSHMEM_DEBUG) {                            \
53             printf("IVSHMEM: " fmt, ## __VA_ARGS__);    \
54         }                                               \
55     } while (0)
56
57 #define TYPE_IVSHMEM_COMMON "ivshmem-common"
58 #define IVSHMEM_COMMON(obj) \
59     OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_COMMON)
60
61 #define TYPE_IVSHMEM_PLAIN "ivshmem-plain"
62 #define IVSHMEM_PLAIN(obj) \
63     OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_PLAIN)
64
65 #define TYPE_IVSHMEM_DOORBELL "ivshmem-doorbell"
66 #define IVSHMEM_DOORBELL(obj) \
67     OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_DOORBELL)
68
69 #define TYPE_IVSHMEM "ivshmem"
70 #define IVSHMEM(obj) \
71     OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
72
73 typedef struct Peer {
74     int nb_eventfds;
75     EventNotifier *eventfds;
76 } Peer;
77
78 typedef struct MSIVector {
79     PCIDevice *pdev;
80     int virq;
81 } MSIVector;
82
83 typedef struct IVShmemState {
84     /*< private >*/
85     PCIDevice parent_obj;
86     /*< public >*/
87
88     uint32_t features;
89
90     /* exactly one of these two may be set */
91     HostMemoryBackend *hostmem; /* with interrupts */
92     CharDriverState *server_chr; /* without interrupts */
93
94     /* registers */
95     uint32_t intrmask;
96     uint32_t intrstatus;
97     int vm_id;
98
99     /* BARs */
100     MemoryRegion ivshmem_mmio;  /* BAR 0 (registers) */
101     MemoryRegion *ivshmem_bar2; /* BAR 2 (shared memory) */
102     MemoryRegion server_bar2;   /* used with server_chr */
103
104     /* interrupt support */
105     Peer *peers;
106     int nb_peers;               /* space in @peers[] */
107     uint32_t vectors;
108     MSIVector *msi_vectors;
109     uint64_t msg_buf;           /* buffer for receiving server messages */
110     int msg_buffered_bytes;     /* #bytes in @msg_buf */
111
112     /* migration stuff */
113     OnOffAuto master;
114     Error *migration_blocker;
115
116     /* legacy cruft */
117     char *role;
118     char *shmobj;
119     char *sizearg;
120     size_t legacy_size;
121     uint32_t not_legacy_32bit;
122 } IVShmemState;
123
124 /* registers for the Inter-VM shared memory device */
125 enum ivshmem_registers {
126     INTRMASK = 0,
127     INTRSTATUS = 4,
128     IVPOSITION = 8,
129     DOORBELL = 12,
130 };
131
132 static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
133                                                     unsigned int feature) {
134     return (ivs->features & (1 << feature));
135 }
136
137 static inline bool ivshmem_is_master(IVShmemState *s)
138 {
139     assert(s->master != ON_OFF_AUTO_AUTO);
140     return s->master == ON_OFF_AUTO_ON;
141 }
142
143 static void ivshmem_update_irq(IVShmemState *s)
144 {
145     PCIDevice *d = PCI_DEVICE(s);
146     uint32_t isr = s->intrstatus & s->intrmask;
147
148     /*
149      * Do nothing unless the device actually uses INTx.  Here's how
150      * the device variants signal interrupts, what they put in PCI
151      * config space:
152      * Device variant    Interrupt  Interrupt Pin  MSI-X cap.
153      * ivshmem-plain         none            0         no
154      * ivshmem-doorbell     MSI-X            1        yes(1)
155      * ivshmem,msi=off       INTx            1         no
156      * ivshmem,msi=on       MSI-X            1(2)     yes(1)
157      * (1) if guest enabled MSI-X
158      * (2) the device lies
159      * Leads to the condition for doing nothing:
160      */
161     if (ivshmem_has_feature(s, IVSHMEM_MSI)
162         || !d->config[PCI_INTERRUPT_PIN]) {
163         return;
164     }
165
166     /* don't print ISR resets */
167     if (isr) {
168         IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
169                         isr ? 1 : 0, s->intrstatus, s->intrmask);
170     }
171
172     pci_set_irq(d, isr != 0);
173 }
174
175 static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
176 {
177     IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
178
179     s->intrmask = val;
180     ivshmem_update_irq(s);
181 }
182
183 static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
184 {
185     uint32_t ret = s->intrmask;
186
187     IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
188     return ret;
189 }
190
191 static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
192 {
193     IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
194
195     s->intrstatus = val;
196     ivshmem_update_irq(s);
197 }
198
199 static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
200 {
201     uint32_t ret = s->intrstatus;
202
203     /* reading ISR clears all interrupts */
204     s->intrstatus = 0;
205     ivshmem_update_irq(s);
206     return ret;
207 }
208
209 static void ivshmem_io_write(void *opaque, hwaddr addr,
210                              uint64_t val, unsigned size)
211 {
212     IVShmemState *s = opaque;
213
214     uint16_t dest = val >> 16;
215     uint16_t vector = val & 0xff;
216
217     addr &= 0xfc;
218
219     IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
220     switch (addr)
221     {
222         case INTRMASK:
223             ivshmem_IntrMask_write(s, val);
224             break;
225
226         case INTRSTATUS:
227             ivshmem_IntrStatus_write(s, val);
228             break;
229
230         case DOORBELL:
231             /* check that dest VM ID is reasonable */
232             if (dest >= s->nb_peers) {
233                 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
234                 break;
235             }
236
237             /* check doorbell range */
238             if (vector < s->peers[dest].nb_eventfds) {
239                 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector);
240                 event_notifier_set(&s->peers[dest].eventfds[vector]);
241             } else {
242                 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n",
243                                 vector, dest);
244             }
245             break;
246         default:
247             IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx "\n", addr);
248     }
249 }
250
251 static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
252                                 unsigned size)
253 {
254
255     IVShmemState *s = opaque;
256     uint32_t ret;
257
258     switch (addr)
259     {
260         case INTRMASK:
261             ret = ivshmem_IntrMask_read(s);
262             break;
263
264         case INTRSTATUS:
265             ret = ivshmem_IntrStatus_read(s);
266             break;
267
268         case IVPOSITION:
269             ret = s->vm_id;
270             break;
271
272         default:
273             IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
274             ret = 0;
275     }
276
277     return ret;
278 }
279
280 static const MemoryRegionOps ivshmem_mmio_ops = {
281     .read = ivshmem_io_read,
282     .write = ivshmem_io_write,
283     .endianness = DEVICE_NATIVE_ENDIAN,
284     .impl = {
285         .min_access_size = 4,
286         .max_access_size = 4,
287     },
288 };
289
290 static void ivshmem_vector_notify(void *opaque)
291 {
292     MSIVector *entry = opaque;
293     PCIDevice *pdev = entry->pdev;
294     IVShmemState *s = IVSHMEM_COMMON(pdev);
295     int vector = entry - s->msi_vectors;
296     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
297
298     if (!event_notifier_test_and_clear(n)) {
299         return;
300     }
301
302     IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, vector);
303     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
304         if (msix_enabled(pdev)) {
305             msix_notify(pdev, vector);
306         }
307     } else {
308         ivshmem_IntrStatus_write(s, 1);
309     }
310 }
311
312 static int ivshmem_vector_unmask(PCIDevice *dev, unsigned vector,
313                                  MSIMessage msg)
314 {
315     IVShmemState *s = IVSHMEM_COMMON(dev);
316     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
317     MSIVector *v = &s->msi_vectors[vector];
318     int ret;
319
320     IVSHMEM_DPRINTF("vector unmask %p %d\n", dev, vector);
321
322     ret = kvm_irqchip_update_msi_route(kvm_state, v->virq, msg, dev);
323     if (ret < 0) {
324         return ret;
325     }
326
327     return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, v->virq);
328 }
329
330 static void ivshmem_vector_mask(PCIDevice *dev, unsigned vector)
331 {
332     IVShmemState *s = IVSHMEM_COMMON(dev);
333     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
334     int ret;
335
336     IVSHMEM_DPRINTF("vector mask %p %d\n", dev, vector);
337
338     ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n,
339                                                 s->msi_vectors[vector].virq);
340     if (ret != 0) {
341         error_report("remove_irqfd_notifier_gsi failed");
342     }
343 }
344
345 static void ivshmem_vector_poll(PCIDevice *dev,
346                                 unsigned int vector_start,
347                                 unsigned int vector_end)
348 {
349     IVShmemState *s = IVSHMEM_COMMON(dev);
350     unsigned int vector;
351
352     IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev, vector_start, vector_end);
353
354     vector_end = MIN(vector_end, s->vectors);
355
356     for (vector = vector_start; vector < vector_end; vector++) {
357         EventNotifier *notifier = &s->peers[s->vm_id].eventfds[vector];
358
359         if (!msix_is_masked(dev, vector)) {
360             continue;
361         }
362
363         if (event_notifier_test_and_clear(notifier)) {
364             msix_set_pending(dev, vector);
365         }
366     }
367 }
368
369 static void watch_vector_notifier(IVShmemState *s, EventNotifier *n,
370                                  int vector)
371 {
372     int eventfd = event_notifier_get_fd(n);
373
374     assert(!s->msi_vectors[vector].pdev);
375     s->msi_vectors[vector].pdev = PCI_DEVICE(s);
376
377     qemu_set_fd_handler(eventfd, ivshmem_vector_notify,
378                         NULL, &s->msi_vectors[vector]);
379 }
380
381 static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i)
382 {
383     memory_region_add_eventfd(&s->ivshmem_mmio,
384                               DOORBELL,
385                               4,
386                               true,
387                               (posn << 16) | i,
388                               &s->peers[posn].eventfds[i]);
389 }
390
391 static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i)
392 {
393     memory_region_del_eventfd(&s->ivshmem_mmio,
394                               DOORBELL,
395                               4,
396                               true,
397                               (posn << 16) | i,
398                               &s->peers[posn].eventfds[i]);
399 }
400
401 static void close_peer_eventfds(IVShmemState *s, int posn)
402 {
403     int i, n;
404
405     assert(posn >= 0 && posn < s->nb_peers);
406     n = s->peers[posn].nb_eventfds;
407
408     if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
409         memory_region_transaction_begin();
410         for (i = 0; i < n; i++) {
411             ivshmem_del_eventfd(s, posn, i);
412         }
413         memory_region_transaction_commit();
414     }
415
416     for (i = 0; i < n; i++) {
417         event_notifier_cleanup(&s->peers[posn].eventfds[i]);
418     }
419
420     g_free(s->peers[posn].eventfds);
421     s->peers[posn].nb_eventfds = 0;
422 }
423
424 static void resize_peers(IVShmemState *s, int nb_peers)
425 {
426     int old_nb_peers = s->nb_peers;
427     int i;
428
429     assert(nb_peers > old_nb_peers);
430     IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers);
431
432     s->peers = g_realloc(s->peers, nb_peers * sizeof(Peer));
433     s->nb_peers = nb_peers;
434
435     for (i = old_nb_peers; i < nb_peers; i++) {
436         s->peers[i].eventfds = g_new0(EventNotifier, s->vectors);
437         s->peers[i].nb_eventfds = 0;
438     }
439 }
440
441 static void ivshmem_add_kvm_msi_virq(IVShmemState *s, int vector,
442                                      Error **errp)
443 {
444     PCIDevice *pdev = PCI_DEVICE(s);
445     MSIMessage msg = msix_get_message(pdev, vector);
446     int ret;
447
448     IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector);
449     assert(!s->msi_vectors[vector].pdev);
450
451     ret = kvm_irqchip_add_msi_route(kvm_state, msg, pdev);
452     if (ret < 0) {
453         error_setg(errp, "kvm_irqchip_add_msi_route failed");
454         return;
455     }
456
457     s->msi_vectors[vector].virq = ret;
458     s->msi_vectors[vector].pdev = pdev;
459 }
460
461 static void setup_interrupt(IVShmemState *s, int vector, Error **errp)
462 {
463     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
464     bool with_irqfd = kvm_msi_via_irqfd_enabled() &&
465         ivshmem_has_feature(s, IVSHMEM_MSI);
466     PCIDevice *pdev = PCI_DEVICE(s);
467     Error *err = NULL;
468
469     IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector);
470
471     if (!with_irqfd) {
472         IVSHMEM_DPRINTF("with eventfd\n");
473         watch_vector_notifier(s, n, vector);
474     } else if (msix_enabled(pdev)) {
475         IVSHMEM_DPRINTF("with irqfd\n");
476         ivshmem_add_kvm_msi_virq(s, vector, &err);
477         if (err) {
478             error_propagate(errp, err);
479             return;
480         }
481
482         if (!msix_is_masked(pdev, vector)) {
483             kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL,
484                                                s->msi_vectors[vector].virq);
485             /* TODO handle error */
486         }
487     } else {
488         /* it will be delayed until msix is enabled, in write_config */
489         IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled\n");
490     }
491 }
492
493 static void process_msg_shmem(IVShmemState *s, int fd, Error **errp)
494 {
495     struct stat buf;
496     size_t size;
497     void *ptr;
498
499     if (s->ivshmem_bar2) {
500         error_setg(errp, "server sent unexpected shared memory message");
501         close(fd);
502         return;
503     }
504
505     if (fstat(fd, &buf) < 0) {
506         error_setg_errno(errp, errno,
507             "can't determine size of shared memory sent by server");
508         close(fd);
509         return;
510     }
511
512     size = buf.st_size;
513
514     /* Legacy cruft */
515     if (s->legacy_size != SIZE_MAX) {
516         if (size < s->legacy_size) {
517             error_setg(errp, "server sent only %zd bytes of shared memory",
518                        (size_t)buf.st_size);
519             close(fd);
520             return;
521         }
522         size = s->legacy_size;
523     }
524
525     /* mmap the region and map into the BAR2 */
526     ptr = mmap(0, size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
527     if (ptr == MAP_FAILED) {
528         error_setg_errno(errp, errno, "Failed to mmap shared memory");
529         close(fd);
530         return;
531     }
532     memory_region_init_ram_ptr(&s->server_bar2, OBJECT(s),
533                                "ivshmem.bar2", size, ptr);
534     qemu_set_ram_fd(memory_region_get_ram_addr(&s->server_bar2), fd);
535     s->ivshmem_bar2 = &s->server_bar2;
536 }
537
538 static void process_msg_disconnect(IVShmemState *s, uint16_t posn,
539                                    Error **errp)
540 {
541     IVSHMEM_DPRINTF("posn %d has gone away\n", posn);
542     if (posn >= s->nb_peers || posn == s->vm_id) {
543         error_setg(errp, "invalid peer %d", posn);
544         return;
545     }
546     close_peer_eventfds(s, posn);
547 }
548
549 static void process_msg_connect(IVShmemState *s, uint16_t posn, int fd,
550                                 Error **errp)
551 {
552     Peer *peer = &s->peers[posn];
553     int vector;
554
555     /*
556      * The N-th connect message for this peer comes with the file
557      * descriptor for vector N-1.  Count messages to find the vector.
558      */
559     if (peer->nb_eventfds >= s->vectors) {
560         error_setg(errp, "Too many eventfd received, device has %d vectors",
561                    s->vectors);
562         close(fd);
563         return;
564     }
565     vector = peer->nb_eventfds++;
566
567     IVSHMEM_DPRINTF("eventfds[%d][%d] = %d\n", posn, vector, fd);
568     event_notifier_init_fd(&peer->eventfds[vector], fd);
569     fcntl_setfl(fd, O_NONBLOCK); /* msix/irqfd poll non block */
570
571     if (posn == s->vm_id) {
572         setup_interrupt(s, vector, errp);
573         /* TODO do we need to handle the error? */
574     }
575
576     if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
577         ivshmem_add_eventfd(s, posn, vector);
578     }
579 }
580
581 static void process_msg(IVShmemState *s, int64_t msg, int fd, Error **errp)
582 {
583     IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n", msg, fd);
584
585     if (msg < -1 || msg > IVSHMEM_MAX_PEERS) {
586         error_setg(errp, "server sent invalid message %" PRId64, msg);
587         close(fd);
588         return;
589     }
590
591     if (msg == -1) {
592         process_msg_shmem(s, fd, errp);
593         return;
594     }
595
596     if (msg >= s->nb_peers) {
597         resize_peers(s, msg + 1);
598     }
599
600     if (fd >= 0) {
601         process_msg_connect(s, msg, fd, errp);
602     } else {
603         process_msg_disconnect(s, msg, errp);
604     }
605 }
606
607 static int ivshmem_can_receive(void *opaque)
608 {
609     IVShmemState *s = opaque;
610
611     assert(s->msg_buffered_bytes < sizeof(s->msg_buf));
612     return sizeof(s->msg_buf) - s->msg_buffered_bytes;
613 }
614
615 static void ivshmem_read(void *opaque, const uint8_t *buf, int size)
616 {
617     IVShmemState *s = opaque;
618     Error *err = NULL;
619     int fd;
620     int64_t msg;
621
622     assert(size >= 0 && s->msg_buffered_bytes + size <= sizeof(s->msg_buf));
623     memcpy((unsigned char *)&s->msg_buf + s->msg_buffered_bytes, buf, size);
624     s->msg_buffered_bytes += size;
625     if (s->msg_buffered_bytes < sizeof(s->msg_buf)) {
626         return;
627     }
628     msg = le64_to_cpu(s->msg_buf);
629     s->msg_buffered_bytes = 0;
630
631     fd = qemu_chr_fe_get_msgfd(s->server_chr);
632     IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n", msg, fd);
633
634     process_msg(s, msg, fd, &err);
635     if (err) {
636         error_report_err(err);
637     }
638 }
639
640 static int64_t ivshmem_recv_msg(IVShmemState *s, int *pfd, Error **errp)
641 {
642     int64_t msg;
643     int n, ret;
644
645     n = 0;
646     do {
647         ret = qemu_chr_fe_read_all(s->server_chr, (uint8_t *)&msg + n,
648                                  sizeof(msg) - n);
649         if (ret < 0 && ret != -EINTR) {
650             error_setg_errno(errp, -ret, "read from server failed");
651             return INT64_MIN;
652         }
653         n += ret;
654     } while (n < sizeof(msg));
655
656     *pfd = qemu_chr_fe_get_msgfd(s->server_chr);
657     return msg;
658 }
659
660 static void ivshmem_recv_setup(IVShmemState *s, Error **errp)
661 {
662     Error *err = NULL;
663     int64_t msg;
664     int fd;
665
666     msg = ivshmem_recv_msg(s, &fd, &err);
667     if (err) {
668         error_propagate(errp, err);
669         return;
670     }
671     if (msg != IVSHMEM_PROTOCOL_VERSION) {
672         error_setg(errp, "server sent version %" PRId64 ", expecting %d",
673                    msg, IVSHMEM_PROTOCOL_VERSION);
674         return;
675     }
676     if (fd != -1) {
677         error_setg(errp, "server sent invalid version message");
678         return;
679     }
680
681     /*
682      * ivshmem-server sends the remaining initial messages in a fixed
683      * order, but the device has always accepted them in any order.
684      * Stay as compatible as practical, just in case people use
685      * servers that behave differently.
686      */
687
688     /*
689      * ivshmem_device_spec.txt has always required the ID message
690      * right here, and ivshmem-server has always complied.  However,
691      * older versions of the device accepted it out of order, but
692      * broke when an interrupt setup message arrived before it.
693      */
694     msg = ivshmem_recv_msg(s, &fd, &err);
695     if (err) {
696         error_propagate(errp, err);
697         return;
698     }
699     if (fd != -1 || msg < 0 || msg > IVSHMEM_MAX_PEERS) {
700         error_setg(errp, "server sent invalid ID message");
701         return;
702     }
703     s->vm_id = msg;
704
705     /*
706      * Receive more messages until we got shared memory.
707      */
708     do {
709         msg = ivshmem_recv_msg(s, &fd, &err);
710         if (err) {
711             error_propagate(errp, err);
712             return;
713         }
714         process_msg(s, msg, fd, &err);
715         if (err) {
716             error_propagate(errp, err);
717             return;
718         }
719     } while (msg != -1);
720
721     /*
722      * This function must either map the shared memory or fail.  The
723      * loop above ensures that: it terminates normally only after it
724      * successfully processed the server's shared memory message.
725      * Assert that actually mapped the shared memory:
726      */
727     assert(s->ivshmem_bar2);
728 }
729
730 /* Select the MSI-X vectors used by device.
731  * ivshmem maps events to vectors statically, so
732  * we just enable all vectors on init and after reset. */
733 static void ivshmem_msix_vector_use(IVShmemState *s)
734 {
735     PCIDevice *d = PCI_DEVICE(s);
736     int i;
737
738     for (i = 0; i < s->vectors; i++) {
739         msix_vector_use(d, i);
740     }
741 }
742
743 static void ivshmem_reset(DeviceState *d)
744 {
745     IVShmemState *s = IVSHMEM_COMMON(d);
746
747     s->intrstatus = 0;
748     s->intrmask = 0;
749     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
750         ivshmem_msix_vector_use(s);
751     }
752 }
753
754 static int ivshmem_setup_interrupts(IVShmemState *s)
755 {
756     /* allocate QEMU callback data for receiving interrupts */
757     s->msi_vectors = g_malloc0(s->vectors * sizeof(MSIVector));
758
759     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
760         if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1)) {
761             return -1;
762         }
763
764         IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
765         ivshmem_msix_vector_use(s);
766     }
767
768     return 0;
769 }
770
771 static void ivshmem_enable_irqfd(IVShmemState *s)
772 {
773     PCIDevice *pdev = PCI_DEVICE(s);
774     int i;
775
776     for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
777         Error *err = NULL;
778
779         ivshmem_add_kvm_msi_virq(s, i, &err);
780         if (err) {
781             error_report_err(err);
782             /* TODO do we need to handle the error? */
783         }
784     }
785
786     if (msix_set_vector_notifiers(pdev,
787                                   ivshmem_vector_unmask,
788                                   ivshmem_vector_mask,
789                                   ivshmem_vector_poll)) {
790         error_report("ivshmem: msix_set_vector_notifiers failed");
791     }
792 }
793
794 static void ivshmem_remove_kvm_msi_virq(IVShmemState *s, int vector)
795 {
796     IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector);
797
798     if (s->msi_vectors[vector].pdev == NULL) {
799         return;
800     }
801
802     /* it was cleaned when masked in the frontend. */
803     kvm_irqchip_release_virq(kvm_state, s->msi_vectors[vector].virq);
804
805     s->msi_vectors[vector].pdev = NULL;
806 }
807
808 static void ivshmem_disable_irqfd(IVShmemState *s)
809 {
810     PCIDevice *pdev = PCI_DEVICE(s);
811     int i;
812
813     for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
814         ivshmem_remove_kvm_msi_virq(s, i);
815     }
816
817     msix_unset_vector_notifiers(pdev);
818 }
819
820 static void ivshmem_write_config(PCIDevice *pdev, uint32_t address,
821                                  uint32_t val, int len)
822 {
823     IVShmemState *s = IVSHMEM_COMMON(pdev);
824     int is_enabled, was_enabled = msix_enabled(pdev);
825
826     pci_default_write_config(pdev, address, val, len);
827     is_enabled = msix_enabled(pdev);
828
829     if (kvm_msi_via_irqfd_enabled()) {
830         if (!was_enabled && is_enabled) {
831             ivshmem_enable_irqfd(s);
832         } else if (was_enabled && !is_enabled) {
833             ivshmem_disable_irqfd(s);
834         }
835     }
836 }
837
838 static void ivshmem_common_realize(PCIDevice *dev, Error **errp)
839 {
840     IVShmemState *s = IVSHMEM_COMMON(dev);
841     Error *err = NULL;
842     uint8_t *pci_conf;
843     uint8_t attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
844         PCI_BASE_ADDRESS_MEM_PREFETCH;
845
846     /* IRQFD requires MSI */
847     if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
848         !ivshmem_has_feature(s, IVSHMEM_MSI)) {
849         error_setg(errp, "ioeventfd/irqfd requires MSI");
850         return;
851     }
852
853     pci_conf = dev->config;
854     pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
855
856     memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,
857                           "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
858
859     /* region for registers*/
860     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
861                      &s->ivshmem_mmio);
862
863     if (!s->not_legacy_32bit) {
864         attr |= PCI_BASE_ADDRESS_MEM_TYPE_64;
865     }
866
867     if (s->hostmem != NULL) {
868         IVSHMEM_DPRINTF("using hostmem\n");
869
870         s->ivshmem_bar2 = host_memory_backend_get_memory(s->hostmem,
871                                                          &error_abort);
872     } else {
873         IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
874                         s->server_chr->filename);
875
876         /* we allocate enough space for 16 peers and grow as needed */
877         resize_peers(s, 16);
878
879         /*
880          * Receive setup messages from server synchronously.
881          * Older versions did it asynchronously, but that creates a
882          * number of entertaining race conditions.
883          */
884         ivshmem_recv_setup(s, &err);
885         if (err) {
886             error_propagate(errp, err);
887             return;
888         }
889
890         if (s->master == ON_OFF_AUTO_ON && s->vm_id != 0) {
891             error_setg(errp,
892                        "master must connect to the server before any peers");
893             return;
894         }
895
896         qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive,
897                               ivshmem_read, NULL, s);
898
899         if (ivshmem_setup_interrupts(s) < 0) {
900             error_setg(errp, "failed to initialize interrupts");
901             return;
902         }
903     }
904
905     vmstate_register_ram(s->ivshmem_bar2, DEVICE(s));
906     pci_register_bar(PCI_DEVICE(s), 2, attr, s->ivshmem_bar2);
907
908     if (s->master == ON_OFF_AUTO_AUTO) {
909         s->master = s->vm_id == 0 ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
910     }
911
912     if (!ivshmem_is_master(s)) {
913         error_setg(&s->migration_blocker,
914                    "Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
915         migrate_add_blocker(s->migration_blocker);
916     }
917 }
918
919 static void ivshmem_exit(PCIDevice *dev)
920 {
921     IVShmemState *s = IVSHMEM_COMMON(dev);
922     int i;
923
924     if (s->migration_blocker) {
925         migrate_del_blocker(s->migration_blocker);
926         error_free(s->migration_blocker);
927     }
928
929     if (memory_region_is_mapped(s->ivshmem_bar2)) {
930         if (!s->hostmem) {
931             void *addr = memory_region_get_ram_ptr(s->ivshmem_bar2);
932             int fd;
933
934             if (munmap(addr, memory_region_size(s->ivshmem_bar2) == -1)) {
935                 error_report("Failed to munmap shared memory %s",
936                              strerror(errno));
937             }
938
939             fd = qemu_get_ram_fd(memory_region_get_ram_addr(s->ivshmem_bar2));
940             close(fd);
941         }
942
943         vmstate_unregister_ram(s->ivshmem_bar2, DEVICE(dev));
944     }
945
946     if (s->peers) {
947         for (i = 0; i < s->nb_peers; i++) {
948             close_peer_eventfds(s, i);
949         }
950         g_free(s->peers);
951     }
952
953     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
954         msix_uninit_exclusive_bar(dev);
955     }
956
957     g_free(s->msi_vectors);
958 }
959
960 static int ivshmem_pre_load(void *opaque)
961 {
962     IVShmemState *s = opaque;
963
964     if (!ivshmem_is_master(s)) {
965         error_report("'peer' devices are not migratable");
966         return -EINVAL;
967     }
968
969     return 0;
970 }
971
972 static int ivshmem_post_load(void *opaque, int version_id)
973 {
974     IVShmemState *s = opaque;
975
976     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
977         ivshmem_msix_vector_use(s);
978     }
979     return 0;
980 }
981
982 static void ivshmem_common_class_init(ObjectClass *klass, void *data)
983 {
984     DeviceClass *dc = DEVICE_CLASS(klass);
985     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
986
987     k->realize = ivshmem_common_realize;
988     k->exit = ivshmem_exit;
989     k->config_write = ivshmem_write_config;
990     k->vendor_id = PCI_VENDOR_ID_IVSHMEM;
991     k->device_id = PCI_DEVICE_ID_IVSHMEM;
992     k->class_id = PCI_CLASS_MEMORY_RAM;
993     k->revision = 1;
994     dc->reset = ivshmem_reset;
995     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
996     dc->desc = "Inter-VM shared memory";
997 }
998
999 static const TypeInfo ivshmem_common_info = {
1000     .name          = TYPE_IVSHMEM_COMMON,
1001     .parent        = TYPE_PCI_DEVICE,
1002     .instance_size = sizeof(IVShmemState),
1003     .abstract      = true,
1004     .class_init    = ivshmem_common_class_init,
1005 };
1006
1007 static void ivshmem_check_memdev_is_busy(Object *obj, const char *name,
1008                                          Object *val, Error **errp)
1009 {
1010     MemoryRegion *mr;
1011
1012     mr = host_memory_backend_get_memory(MEMORY_BACKEND(val), &error_abort);
1013     if (memory_region_is_mapped(mr)) {
1014         char *path = object_get_canonical_path_component(val);
1015         error_setg(errp, "can't use already busy memdev: %s", path);
1016         g_free(path);
1017     } else {
1018         qdev_prop_allow_set_link_before_realize(obj, name, val, errp);
1019     }
1020 }
1021
1022 static const VMStateDescription ivshmem_plain_vmsd = {
1023     .name = TYPE_IVSHMEM_PLAIN,
1024     .version_id = 0,
1025     .minimum_version_id = 0,
1026     .pre_load = ivshmem_pre_load,
1027     .post_load = ivshmem_post_load,
1028     .fields = (VMStateField[]) {
1029         VMSTATE_PCI_DEVICE(parent_obj, IVShmemState),
1030         VMSTATE_UINT32(intrstatus, IVShmemState),
1031         VMSTATE_UINT32(intrmask, IVShmemState),
1032         VMSTATE_END_OF_LIST()
1033     },
1034 };
1035
1036 static Property ivshmem_plain_properties[] = {
1037     DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF),
1038     DEFINE_PROP_END_OF_LIST(),
1039 };
1040
1041 static void ivshmem_plain_init(Object *obj)
1042 {
1043     IVShmemState *s = IVSHMEM_PLAIN(obj);
1044
1045     object_property_add_link(obj, "memdev", TYPE_MEMORY_BACKEND,
1046                              (Object **)&s->hostmem,
1047                              ivshmem_check_memdev_is_busy,
1048                              OBJ_PROP_LINK_UNREF_ON_RELEASE,
1049                              &error_abort);
1050 }
1051
1052 static void ivshmem_plain_class_init(ObjectClass *klass, void *data)
1053 {
1054     DeviceClass *dc = DEVICE_CLASS(klass);
1055
1056     dc->props = ivshmem_plain_properties;
1057     dc->vmsd = &ivshmem_plain_vmsd;
1058 }
1059
1060 static const TypeInfo ivshmem_plain_info = {
1061     .name          = TYPE_IVSHMEM_PLAIN,
1062     .parent        = TYPE_IVSHMEM_COMMON,
1063     .instance_size = sizeof(IVShmemState),
1064     .instance_init = ivshmem_plain_init,
1065     .class_init    = ivshmem_plain_class_init,
1066 };
1067
1068 static const VMStateDescription ivshmem_doorbell_vmsd = {
1069     .name = TYPE_IVSHMEM_DOORBELL,
1070     .version_id = 0,
1071     .minimum_version_id = 0,
1072     .pre_load = ivshmem_pre_load,
1073     .post_load = ivshmem_post_load,
1074     .fields = (VMStateField[]) {
1075         VMSTATE_PCI_DEVICE(parent_obj, IVShmemState),
1076         VMSTATE_MSIX(parent_obj, IVShmemState),
1077         VMSTATE_UINT32(intrstatus, IVShmemState),
1078         VMSTATE_UINT32(intrmask, IVShmemState),
1079         VMSTATE_END_OF_LIST()
1080     },
1081 };
1082
1083 static Property ivshmem_doorbell_properties[] = {
1084     DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
1085     DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
1086     DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD,
1087                     true),
1088     DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF),
1089     DEFINE_PROP_END_OF_LIST(),
1090 };
1091
1092 static void ivshmem_doorbell_init(Object *obj)
1093 {
1094     IVShmemState *s = IVSHMEM_DOORBELL(obj);
1095
1096     s->features |= (1 << IVSHMEM_MSI);
1097     s->legacy_size = SIZE_MAX;  /* whatever the server sends */
1098 }
1099
1100 static void ivshmem_doorbell_class_init(ObjectClass *klass, void *data)
1101 {
1102     DeviceClass *dc = DEVICE_CLASS(klass);
1103
1104     dc->props = ivshmem_doorbell_properties;
1105     dc->vmsd = &ivshmem_doorbell_vmsd;
1106 }
1107
1108 static const TypeInfo ivshmem_doorbell_info = {
1109     .name          = TYPE_IVSHMEM_DOORBELL,
1110     .parent        = TYPE_IVSHMEM_COMMON,
1111     .instance_size = sizeof(IVShmemState),
1112     .instance_init = ivshmem_doorbell_init,
1113     .class_init    = ivshmem_doorbell_class_init,
1114 };
1115
1116 static int ivshmem_load_old(QEMUFile *f, void *opaque, int version_id)
1117 {
1118     IVShmemState *s = opaque;
1119     PCIDevice *pdev = PCI_DEVICE(s);
1120     int ret;
1121
1122     IVSHMEM_DPRINTF("ivshmem_load_old\n");
1123
1124     if (version_id != 0) {
1125         return -EINVAL;
1126     }
1127
1128     ret = ivshmem_pre_load(s);
1129     if (ret) {
1130         return ret;
1131     }
1132
1133     ret = pci_device_load(pdev, f);
1134     if (ret) {
1135         return ret;
1136     }
1137
1138     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
1139         msix_load(pdev, f);
1140         ivshmem_msix_vector_use(s);
1141     } else {
1142         s->intrstatus = qemu_get_be32(f);
1143         s->intrmask = qemu_get_be32(f);
1144     }
1145
1146     return 0;
1147 }
1148
1149 static bool test_msix(void *opaque, int version_id)
1150 {
1151     IVShmemState *s = opaque;
1152
1153     return ivshmem_has_feature(s, IVSHMEM_MSI);
1154 }
1155
1156 static bool test_no_msix(void *opaque, int version_id)
1157 {
1158     return !test_msix(opaque, version_id);
1159 }
1160
1161 static const VMStateDescription ivshmem_vmsd = {
1162     .name = "ivshmem",
1163     .version_id = 1,
1164     .minimum_version_id = 1,
1165     .pre_load = ivshmem_pre_load,
1166     .post_load = ivshmem_post_load,
1167     .fields = (VMStateField[]) {
1168         VMSTATE_PCI_DEVICE(parent_obj, IVShmemState),
1169
1170         VMSTATE_MSIX_TEST(parent_obj, IVShmemState, test_msix),
1171         VMSTATE_UINT32_TEST(intrstatus, IVShmemState, test_no_msix),
1172         VMSTATE_UINT32_TEST(intrmask, IVShmemState, test_no_msix),
1173
1174         VMSTATE_END_OF_LIST()
1175     },
1176     .load_state_old = ivshmem_load_old,
1177     .minimum_version_id_old = 0
1178 };
1179
1180 static Property ivshmem_properties[] = {
1181     DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
1182     DEFINE_PROP_STRING("size", IVShmemState, sizearg),
1183     DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
1184     DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD,
1185                     false),
1186     DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
1187     DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
1188     DEFINE_PROP_STRING("role", IVShmemState, role),
1189     DEFINE_PROP_UINT32("use64", IVShmemState, not_legacy_32bit, 1),
1190     DEFINE_PROP_END_OF_LIST(),
1191 };
1192
1193 static void desugar_shm(IVShmemState *s)
1194 {
1195     Object *obj;
1196     char *path;
1197
1198     obj = object_new("memory-backend-file");
1199     path = g_strdup_printf("/dev/shm/%s", s->shmobj);
1200     object_property_set_str(obj, path, "mem-path", &error_abort);
1201     g_free(path);
1202     object_property_set_int(obj, s->legacy_size, "size", &error_abort);
1203     object_property_set_bool(obj, true, "share", &error_abort);
1204     object_property_add_child(OBJECT(s), "internal-shm-backend", obj,
1205                               &error_abort);
1206     user_creatable_complete(obj, &error_abort);
1207     s->hostmem = MEMORY_BACKEND(obj);
1208 }
1209
1210 static void ivshmem_realize(PCIDevice *dev, Error **errp)
1211 {
1212     IVShmemState *s = IVSHMEM_COMMON(dev);
1213
1214     if (!qtest_enabled()) {
1215         error_report("ivshmem is deprecated, please use ivshmem-plain"
1216                      " or ivshmem-doorbell instead");
1217     }
1218
1219     if (!!s->server_chr + !!s->shmobj != 1) {
1220         error_setg(errp, "You must specify either 'shm' or 'chardev'");
1221         return;
1222     }
1223
1224     if (s->sizearg == NULL) {
1225         s->legacy_size = 4 << 20; /* 4 MB default */
1226     } else {
1227         char *end;
1228         int64_t size = qemu_strtosz(s->sizearg, &end);
1229         if (size < 0 || (size_t)size != size || *end != '\0'
1230             || !is_power_of_2(size)) {
1231             error_setg(errp, "Invalid size %s", s->sizearg);
1232             return;
1233         }
1234         s->legacy_size = size;
1235     }
1236
1237     /* check that role is reasonable */
1238     if (s->role) {
1239         if (strncmp(s->role, "peer", 5) == 0) {
1240             s->master = ON_OFF_AUTO_OFF;
1241         } else if (strncmp(s->role, "master", 7) == 0) {
1242             s->master = ON_OFF_AUTO_ON;
1243         } else {
1244             error_setg(errp, "'role' must be 'peer' or 'master'");
1245             return;
1246         }
1247     } else {
1248         s->master = ON_OFF_AUTO_AUTO;
1249     }
1250
1251     if (s->shmobj) {
1252         desugar_shm(s);
1253     }
1254
1255     /*
1256      * Note: we don't use INTx with IVSHMEM_MSI at all, so this is a
1257      * bald-faced lie then.  But it's a backwards compatible lie.
1258      */
1259     pci_config_set_interrupt_pin(dev->config, 1);
1260
1261     ivshmem_common_realize(dev, errp);
1262 }
1263
1264 static void ivshmem_class_init(ObjectClass *klass, void *data)
1265 {
1266     DeviceClass *dc = DEVICE_CLASS(klass);
1267     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1268
1269     k->realize = ivshmem_realize;
1270     k->revision = 0;
1271     dc->desc = "Inter-VM shared memory (legacy)";
1272     dc->props = ivshmem_properties;
1273     dc->vmsd = &ivshmem_vmsd;
1274 }
1275
1276 static const TypeInfo ivshmem_info = {
1277     .name          = TYPE_IVSHMEM,
1278     .parent        = TYPE_IVSHMEM_COMMON,
1279     .instance_size = sizeof(IVShmemState),
1280     .class_init    = ivshmem_class_init,
1281 };
1282
1283 static void ivshmem_register_types(void)
1284 {
1285     type_register_static(&ivshmem_common_info);
1286     type_register_static(&ivshmem_plain_info);
1287     type_register_static(&ivshmem_doorbell_info);
1288     type_register_static(&ivshmem_info);
1289 }
1290
1291 type_init(ivshmem_register_types)
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