4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
22 #include "exec/exec-all.h"
23 #include "qemu/host-utils.h"
24 #include "exec/helper-proto.h"
26 void cpu_raise_exception_ra(CPUSPARCState *env, int tt, uintptr_t ra)
28 CPUState *cs = env_cpu(env);
30 cs->exception_index = tt;
31 cpu_loop_exit_restore(cs, ra);
34 void helper_raise_exception(CPUSPARCState *env, int tt)
36 CPUState *cs = env_cpu(env);
38 cs->exception_index = tt;
42 void helper_debug(CPUSPARCState *env)
44 CPUState *cs = env_cpu(env);
46 cs->exception_index = EXCP_DEBUG;
51 void helper_tick_set_count(void *opaque, uint64_t count)
53 #if !defined(CONFIG_USER_ONLY)
54 cpu_tick_set_count(opaque, count);
58 uint64_t helper_tick_get_count(CPUSPARCState *env, void *opaque, int mem_idx)
60 #if !defined(CONFIG_USER_ONLY)
61 CPUTimer *timer = opaque;
63 if (timer->npt && mem_idx < MMU_KERNEL_IDX) {
64 cpu_raise_exception_ra(env, TT_PRIV_INSN, GETPC());
67 return cpu_tick_get_count(timer);
69 /* In user-mode, QEMU_CLOCK_VIRTUAL doesn't exist.
70 Just pass through the host cpu clock ticks. */
71 return cpu_get_host_ticks();
75 void helper_tick_set_limit(void *opaque, uint64_t limit)
77 #if !defined(CONFIG_USER_ONLY)
78 cpu_tick_set_limit(opaque, limit);
83 static target_ulong do_udiv(CPUSPARCState *env, target_ulong a,
84 target_ulong b, int cc, uintptr_t ra)
90 x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32);
91 x1 = (b & 0xffffffff);
94 cpu_raise_exception_ra(env, TT_DIV_ZERO, ra);
98 if (x0 > UINT32_MAX) {
105 env->cc_src2 = overflow;
106 env->cc_op = CC_OP_DIV;
111 target_ulong helper_udiv(CPUSPARCState *env, target_ulong a, target_ulong b)
113 return do_udiv(env, a, b, 0, GETPC());
116 target_ulong helper_udiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
118 return do_udiv(env, a, b, 1, GETPC());
121 static target_ulong do_sdiv(CPUSPARCState *env, target_ulong a,
122 target_ulong b, int cc, uintptr_t ra)
128 x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32);
129 x1 = (b & 0xffffffff);
132 cpu_raise_exception_ra(env, TT_DIV_ZERO, ra);
133 } else if (x1 == -1 && x0 == INT64_MIN) {
138 if ((int32_t) x0 != x0) {
139 x0 = x0 < 0 ? INT32_MIN : INT32_MAX;
146 env->cc_src2 = overflow;
147 env->cc_op = CC_OP_DIV;
152 target_ulong helper_sdiv(CPUSPARCState *env, target_ulong a, target_ulong b)
154 return do_sdiv(env, a, b, 0, GETPC());
157 target_ulong helper_sdiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
159 return do_sdiv(env, a, b, 1, GETPC());
162 #ifdef TARGET_SPARC64
163 int64_t helper_sdivx(CPUSPARCState *env, int64_t a, int64_t b)
166 /* Raise divide by zero trap. */
167 cpu_raise_exception_ra(env, TT_DIV_ZERO, GETPC());
168 } else if (b == -1) {
169 /* Avoid overflow trap with i386 divide insn. */
176 uint64_t helper_udivx(CPUSPARCState *env, uint64_t a, uint64_t b)
179 /* Raise divide by zero trap. */
180 cpu_raise_exception_ra(env, TT_DIV_ZERO, GETPC());
186 target_ulong helper_taddcctv(CPUSPARCState *env, target_ulong src1,
191 /* Tag overflow occurs if either input has bits 0 or 1 set. */
192 if ((src1 | src2) & 3) {
198 /* Tag overflow occurs if the addition overflows. */
199 if (~(src1 ^ src2) & (src1 ^ dst) & (1u << 31)) {
203 /* Only modify the CC after any exceptions have been generated. */
204 env->cc_op = CC_OP_TADDTV;
211 cpu_raise_exception_ra(env, TT_TOVF, GETPC());
214 target_ulong helper_tsubcctv(CPUSPARCState *env, target_ulong src1,
219 /* Tag overflow occurs if either input has bits 0 or 1 set. */
220 if ((src1 | src2) & 3) {
226 /* Tag overflow occurs if the subtraction overflows. */
227 if ((src1 ^ src2) & (src1 ^ dst) & (1u << 31)) {
231 /* Only modify the CC after any exceptions have been generated. */
232 env->cc_op = CC_OP_TSUBTV;
239 cpu_raise_exception_ra(env, TT_TOVF, GETPC());
242 #ifndef TARGET_SPARC64
243 void helper_power_down(CPUSPARCState *env)
245 CPUState *cs = env_cpu(env);
248 cs->exception_index = EXCP_HLT;
250 env->npc = env->pc + 4;