target-i386/machine.c

   1 #include "hw/hw.h"
   2 #include "hw/boards.h"
   3 #include "hw/pc.h"
   4 #include "hw/isa.h"
   5
   6 #include "exec-all.h"
   7 #include "kvm.h"
   8
   9 static const VMStateDescription vmstate_segment = {
  10     .name = "segment",
  11     .version_id = 1,
  12     .minimum_version_id = 1,
  13     .minimum_version_id_old = 1,
  14     .fields      = (VMStateField []) {
  15         VMSTATE_UINT32(selector, SegmentCache),
  16         VMSTATE_UINTTL(base, SegmentCache),
  17         VMSTATE_UINT32(limit, SegmentCache),
  18         VMSTATE_UINT32(flags, SegmentCache),
  19         VMSTATE_END_OF_LIST()
  20     }
  21 };
  22
  23 #define VMSTATE_SEGMENT(_field, _state) {                            \
  24     .name       = (stringify(_field)),                               \
  25     .size       = sizeof(SegmentCache),                              \
  26     .vmsd       = &vmstate_segment,                                  \
  27     .flags      = VMS_STRUCT,                                        \
  28     .offset     = offsetof(_state, _field)                           \
  29             + type_check(SegmentCache,typeof_field(_state, _field))  \
  30 }
  31
  32 #define VMSTATE_SEGMENT_ARRAY(_field, _state, _n)                    \
  33     VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)
  34
  35 static const VMStateDescription vmstate_xmm_reg = {
  36     .name = "xmm_reg",
  37     .version_id = 1,
  38     .minimum_version_id = 1,
  39     .minimum_version_id_old = 1,
  40     .fields      = (VMStateField []) {
  41         VMSTATE_UINT64(XMM_Q(0), XMMReg),
  42         VMSTATE_UINT64(XMM_Q(1), XMMReg),
  43         VMSTATE_END_OF_LIST()
  44     }
  45 };
  46
  47 #define VMSTATE_XMM_REGS(_field, _state, _n)                         \
  48     VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
  49
  50 static const VMStateDescription vmstate_mtrr_var = {
  51     .name = "mtrr_var",
  52     .version_id = 1,
  53     .minimum_version_id = 1,
  54     .minimum_version_id_old = 1,
  55     .fields      = (VMStateField []) {
  56         VMSTATE_UINT64(base, MTRRVar),
  57         VMSTATE_UINT64(mask, MTRRVar),
  58         VMSTATE_END_OF_LIST()
  59     }
  60 };
  61
  62 #define VMSTATE_MTRR_VARS(_field, _state, _n, _v)                    \
  63     VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar)
  64
  65 static void put_fpreg_error(QEMUFile *f, void *opaque, size_t size)
  66 {
  67     fprintf(stderr, "call put_fpreg() with invalid arguments\n");
  68     exit(0);
  69 }
  70
  71 #ifdef USE_X86LDOUBLE
  72 /* XXX: add that in a FPU generic layer */
  73 union x86_longdouble {
  74     uint64_t mant;
  75     uint16_t exp;
  76 };
  77
  78 #define MANTD1(fp)      (fp & ((1LL << 52) - 1))
  79 #define EXPBIAS1 1023
  80 #define EXPD1(fp)       ((fp >> 52) & 0x7FF)
  81 #define SIGND1(fp)      ((fp >> 32) & 0x80000000)
  82
  83 static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
  84 {
  85     int e;
  86     /* mantissa */
  87     p->mant = (MANTD1(temp) << 11) | (1LL << 63);
  88     /* exponent + sign */
  89     e = EXPD1(temp) - EXPBIAS1 + 16383;
  90     e |= SIGND1(temp) >> 16;
  91     p->exp = e;
  92 }
  93
  94 static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
  95 {
  96     FPReg *fp_reg = opaque;
  97     uint64_t mant;
  98     uint16_t exp;
  99
 100     qemu_get_be64s(f, &mant);
 101     qemu_get_be16s(f, &exp);
 102     fp_reg->d = cpu_set_fp80(mant, exp);
 103     return 0;
 104 }
 105
 106 static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
 107 {
 108     FPReg *fp_reg = opaque;
 109     uint64_t mant;
 110     uint16_t exp;
 111     /* we save the real CPU data (in case of MMX usage only 'mant'
 112        contains the MMX register */
 113     cpu_get_fp80(&mant, &exp, fp_reg->d);
 114     qemu_put_be64s(f, &mant);
 115     qemu_put_be16s(f, &exp);
 116 }
 117
 118 static const VMStateInfo vmstate_fpreg = {
 119     .name = "fpreg",
 120     .get  = get_fpreg,
 121     .put  = put_fpreg,
 122 };
 123
 124 static int get_fpreg_1_mmx(QEMUFile *f, void *opaque, size_t size)
 125 {
 126     union x86_longdouble *p = opaque;
 127     uint64_t mant;
 128
 129     qemu_get_be64s(f, &mant);
 130     p->mant = mant;
 131     p->exp = 0xffff;
 132     return 0;
 133 }
 134
 135 static const VMStateInfo vmstate_fpreg_1_mmx = {
 136     .name = "fpreg_1_mmx",
 137     .get  = get_fpreg_1_mmx,
 138     .put  = put_fpreg_error,
 139 };
 140
 141 static int get_fpreg_1_no_mmx(QEMUFile *f, void *opaque, size_t size)
 142 {
 143     union x86_longdouble *p = opaque;
 144     uint64_t mant;
 145
 146     qemu_get_be64s(f, &mant);
 147     fp64_to_fp80(p, mant);
 148     return 0;
 149 }
 150
 151 static const VMStateInfo vmstate_fpreg_1_no_mmx = {
 152     .name = "fpreg_1_no_mmx",
 153     .get  = get_fpreg_1_no_mmx,
 154     .put  = put_fpreg_error,
 155 };
 156
 157 static bool fpregs_is_0(void *opaque, int version_id)
 158 {
 159     CPUState *env = opaque;
 160
 161     return (env->fpregs_format_vmstate == 0);
 162 }
 163
 164 static bool fpregs_is_1_mmx(void *opaque, int version_id)
 165 {
 166     CPUState *env = opaque;
 167     int guess_mmx;
 168
 169     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 170                  (env->fpus_vmstate & 0x3800) == 0);
 171     return (guess_mmx && (env->fpregs_format_vmstate == 1));
 172 }
 173
 174 static bool fpregs_is_1_no_mmx(void *opaque, int version_id)
 175 {
 176     CPUState *env = opaque;
 177     int guess_mmx;
 178
 179     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 180                  (env->fpus_vmstate & 0x3800) == 0);
 181     return (!guess_mmx && (env->fpregs_format_vmstate == 1));
 182 }
 183
 184 #define VMSTATE_FP_REGS(_field, _state, _n)                               \
 185     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \
 186     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \
 187     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)
 188
 189 #else
 190 static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
 191 {
 192     FPReg *fp_reg = opaque;
 193
 194     qemu_get_be64s(f, &fp_reg->mmx.MMX_Q(0));
 195     return 0;
 196 }
 197
 198 static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
 199 {
 200     FPReg *fp_reg = opaque;
 201     /* if we use doubles for float emulation, we save the doubles to
 202        avoid losing information in case of MMX usage. It can give
 203        problems if the image is restored on a CPU where long
 204        doubles are used instead. */
 205     qemu_put_be64s(f, &fp_reg->mmx.MMX_Q(0));
 206 }
 207
 208 const VMStateInfo vmstate_fpreg = {
 209     .name = "fpreg",
 210     .get  = get_fpreg,
 211     .put  = put_fpreg,
 212 };
 213
 214 static int get_fpreg_0_mmx(QEMUFile *f, void *opaque, size_t size)
 215 {
 216     FPReg *fp_reg = opaque;
 217     uint64_t mant;
 218     uint16_t exp;
 219
 220     qemu_get_be64s(f, &mant);
 221     qemu_get_be16s(f, &exp);
 222     fp_reg->mmx.MMX_Q(0) = mant;
 223     return 0;
 224 }
 225
 226 const VMStateInfo vmstate_fpreg_0_mmx = {
 227     .name = "fpreg_0_mmx",
 228     .get  = get_fpreg_0_mmx,
 229     .put  = put_fpreg_error,
 230 };
 231
 232 static int get_fpreg_0_no_mmx(QEMUFile *f, void *opaque, size_t size)
 233 {
 234     FPReg *fp_reg = opaque;
 235     uint64_t mant;
 236     uint16_t exp;
 237
 238     qemu_get_be64s(f, &mant);
 239     qemu_get_be16s(f, &exp);
 240
 241     fp_reg->d = cpu_set_fp80(mant, exp);
 242     return 0;
 243 }
 244
 245 const VMStateInfo vmstate_fpreg_0_no_mmx = {
 246     .name = "fpreg_0_no_mmx",
 247     .get  = get_fpreg_0_no_mmx,
 248     .put  = put_fpreg_error,
 249 };
 250
 251 static bool fpregs_is_1(void *opaque, int version_id)
 252 {
 253     CPUState *env = opaque;
 254
 255     return env->fpregs_format_vmstate == 1;
 256 }
 257
 258 static bool fpregs_is_0_mmx(void *opaque, int version_id)
 259 {
 260     CPUState *env = opaque;
 261     int guess_mmx;
 262
 263     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 264                  (env->fpus_vmstate & 0x3800) == 0);
 265     return guess_mmx && env->fpregs_format_vmstate == 0;
 266 }
 267
 268 static bool fpregs_is_0_no_mmx(void *opaque, int version_id)
 269 {
 270     CPUState *env = opaque;
 271     int guess_mmx;
 272
 273     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 274                  (env->fpus_vmstate & 0x3800) == 0);
 275     return !guess_mmx && env->fpregs_format_vmstate == 0;
 276 }
 277
 278 #define VMSTATE_FP_REGS(_field, _state, _n)                               \
 279     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1, vmstate_fpreg, FPReg), \
 280     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_mmx, vmstate_fpreg_0_mmx, FPReg), \
 281     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_no_mmx, vmstate_fpreg_0_no_mmx, FPReg)
 282
 283 #endif /* USE_X86LDOUBLE */
 284
 285 static bool version_is_5(void *opaque, int version_id)
 286 {
 287     return version_id == 5;
 288 }
 289
 290 #ifdef TARGET_X86_64
 291 static bool less_than_7(void *opaque, int version_id)
 292 {
 293     return version_id < 7;
 294 }
 295
 296 static int get_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
 297 {
 298     uint64_t *v = pv;
 299     *v = qemu_get_be32(f);
 300     return 0;
 301 }
 302
 303 static void put_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
 304 {
 305     uint64_t *v = pv;
 306     qemu_put_be32(f, *v);
 307 }
 308
 309 static const VMStateInfo vmstate_hack_uint64_as_uint32 = {
 310     .name = "uint64_as_uint32",
 311     .get  = get_uint64_as_uint32,
 312     .put  = put_uint64_as_uint32,
 313 };
 314
 315 #define VMSTATE_HACK_UINT32(_f, _s, _t)                                  \
 316     VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
 317 #endif
 318
 319 static void cpu_pre_save(void *opaque)
 320 {
 321     CPUState *env = opaque;
 322     int i;
 323
 324     cpu_synchronize_state(env);
 325
 326     /* FPU */
 327     env->fpus_vmstate = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 328     env->fptag_vmstate = 0;
 329     for(i = 0; i < 8; i++) {
 330         env->fptag_vmstate |= ((!env->fptags[i]) << i);
 331     }
 332
 333 #ifdef USE_X86LDOUBLE
 334     env->fpregs_format_vmstate = 0;
 335 #else
 336     env->fpregs_format_vmstate = 1;
 337 #endif
 338 }
 339
 340 static int cpu_pre_load(void *opaque)
 341 {
 342     CPUState *env = opaque;
 343
 344     cpu_synchronize_state(env);
 345     return 0;
 346 }
 347
 348 static int cpu_post_load(void *opaque, int version_id)
 349 {
 350     CPUState *env = opaque;
 351     int i;
 352
 353     /* XXX: restore FPU round state */
 354     env->fpstt = (env->fpus_vmstate >> 11) & 7;
 355     env->fpus = env->fpus_vmstate & ~0x3800;
 356     env->fptag_vmstate ^= 0xff;
 357     for(i = 0; i < 8; i++) {
 358         env->fptags[i] = (env->fptag_vmstate >> i) & 1;
 359     }
 360
 361     cpu_breakpoint_remove_all(env, BP_CPU);
 362     cpu_watchpoint_remove_all(env, BP_CPU);
 363     for (i = 0; i < 4; i++)
 364         hw_breakpoint_insert(env, i);
 365
 366     tlb_flush(env, 1);
 367     return 0;
 368 }
 369
 370 static const VMStateDescription vmstate_cpu = {
 371     .name = "cpu",
 372     .version_id = CPU_SAVE_VERSION,
 373     .minimum_version_id = 3,
 374     .minimum_version_id_old = 3,
 375     .pre_save = cpu_pre_save,
 376     .pre_load = cpu_pre_load,
 377     .post_load = cpu_post_load,
 378     .fields      = (VMStateField []) {
 379         VMSTATE_UINTTL_ARRAY(regs, CPUState, CPU_NB_REGS),
 380         VMSTATE_UINTTL(eip, CPUState),
 381         VMSTATE_UINTTL(eflags, CPUState),
 382         VMSTATE_UINT32(hflags, CPUState),
 383         /* FPU */
 384         VMSTATE_UINT16(fpuc, CPUState),
 385         VMSTATE_UINT16(fpus_vmstate, CPUState),
 386         VMSTATE_UINT16(fptag_vmstate, CPUState),
 387         VMSTATE_UINT16(fpregs_format_vmstate, CPUState),
 388         VMSTATE_FP_REGS(fpregs, CPUState, 8),
 389
 390         VMSTATE_SEGMENT_ARRAY(segs, CPUState, 6),
 391         VMSTATE_SEGMENT(ldt, CPUState),
 392         VMSTATE_SEGMENT(tr, CPUState),
 393         VMSTATE_SEGMENT(gdt, CPUState),
 394         VMSTATE_SEGMENT(idt, CPUState),
 395
 396         VMSTATE_UINT32(sysenter_cs, CPUState),
 397 #ifdef TARGET_X86_64
 398         /* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
 399         VMSTATE_HACK_UINT32(sysenter_esp, CPUState, less_than_7),
 400         VMSTATE_HACK_UINT32(sysenter_eip, CPUState, less_than_7),
 401         VMSTATE_UINTTL_V(sysenter_esp, CPUState, 7),
 402         VMSTATE_UINTTL_V(sysenter_eip, CPUState, 7),
 403 #else
 404         VMSTATE_UINTTL(sysenter_esp, CPUState),
 405         VMSTATE_UINTTL(sysenter_eip, CPUState),
 406 #endif
 407
 408         VMSTATE_UINTTL(cr[0], CPUState),
 409         VMSTATE_UINTTL(cr[2], CPUState),
 410         VMSTATE_UINTTL(cr[3], CPUState),
 411         VMSTATE_UINTTL(cr[4], CPUState),
 412         VMSTATE_UINTTL_ARRAY(dr, CPUState, 8),
 413         /* MMU */
 414         VMSTATE_INT32(a20_mask, CPUState),
 415         /* XMM */
 416         VMSTATE_UINT32(mxcsr, CPUState),
 417         VMSTATE_XMM_REGS(xmm_regs, CPUState, CPU_NB_REGS),
 418
 419 #ifdef TARGET_X86_64
 420         VMSTATE_UINT64(efer, CPUState),
 421         VMSTATE_UINT64(star, CPUState),
 422         VMSTATE_UINT64(lstar, CPUState),
 423         VMSTATE_UINT64(cstar, CPUState),
 424         VMSTATE_UINT64(fmask, CPUState),
 425         VMSTATE_UINT64(kernelgsbase, CPUState),
 426 #endif
 427         VMSTATE_UINT32_V(smbase, CPUState, 4),
 428
 429         VMSTATE_UINT64_V(pat, CPUState, 5),
 430         VMSTATE_UINT32_V(hflags2, CPUState, 5),
 431
 432         VMSTATE_UINT32_TEST(halted, CPUState, version_is_5),
 433         VMSTATE_UINT64_V(vm_hsave, CPUState, 5),
 434         VMSTATE_UINT64_V(vm_vmcb, CPUState, 5),
 435         VMSTATE_UINT64_V(tsc_offset, CPUState, 5),
 436         VMSTATE_UINT64_V(intercept, CPUState, 5),
 437         VMSTATE_UINT16_V(intercept_cr_read, CPUState, 5),
 438         VMSTATE_UINT16_V(intercept_cr_write, CPUState, 5),
 439         VMSTATE_UINT16_V(intercept_dr_read, CPUState, 5),
 440         VMSTATE_UINT16_V(intercept_dr_write, CPUState, 5),
 441         VMSTATE_UINT32_V(intercept_exceptions, CPUState, 5),
 442         VMSTATE_UINT8_V(v_tpr, CPUState, 5),
 443         /* MTRRs */
 444         VMSTATE_UINT64_ARRAY_V(mtrr_fixed, CPUState, 11, 8),
 445         VMSTATE_UINT64_V(mtrr_deftype, CPUState, 8),
 446         VMSTATE_MTRR_VARS(mtrr_var, CPUState, 8, 8),
 447         /* KVM-related states */
 448         VMSTATE_INT32_V(interrupt_injected, CPUState, 9),
 449         VMSTATE_UINT32_V(mp_state, CPUState, 9),
 450         VMSTATE_UINT64_V(tsc, CPUState, 9),
 451         VMSTATE_INT32_V(exception_injected, CPUState, 11),
 452         VMSTATE_UINT8_V(soft_interrupt, CPUState, 11),
 453         VMSTATE_UINT8_V(nmi_injected, CPUState, 11),
 454         VMSTATE_UINT8_V(nmi_pending, CPUState, 11),
 455         VMSTATE_UINT8_V(has_error_code, CPUState, 11),
 456         VMSTATE_UINT32_V(sipi_vector, CPUState, 11),
 457         VMSTATE_INT32_V(exception_index, CPUState, 11),
 458         /* MCE */
 459         VMSTATE_UINT64_V(mcg_cap, CPUState, 10),
 460         VMSTATE_UINT64_V(mcg_status, CPUState, 10),
 461         VMSTATE_UINT64_V(mcg_ctl, CPUState, 10),
 462         VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10),
 463         /* rdtscp */
 464         VMSTATE_UINT64_V(tsc_aux, CPUState, 11),
 465         /* KVM pvclock msr */
 466         VMSTATE_UINT64_V(system_time_msr, CPUState, 11),
 467         VMSTATE_UINT64_V(wall_clock_msr, CPUState, 11),
 468         VMSTATE_END_OF_LIST()
 469         /* The above list is not sorted /wrt version numbers, watch out! */
 470     }
 471 };
 472
 473 void cpu_save(QEMUFile *f, void *opaque)
 474 {
 475     vmstate_save_state(f, &vmstate_cpu, opaque);
 476 }
 477
 478 int cpu_load(QEMUFile *f, void *opaque, int version_id)
 479 {
 480     return vmstate_load_state(f, &vmstate_cpu, opaque, version_id);
 481 }