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1 | /* | |
2 | * emulator main execution loop | |
3 | * | |
4 | * Copyright (c) 2003-2005 Fabrice Bellard | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | #include "config.h" | |
20 | #include "cpu.h" | |
21 | #include "trace.h" | |
22 | #include "disas/disas.h" | |
23 | #include "tcg.h" | |
24 | #include "qemu/atomic.h" | |
25 | #include "sysemu/qtest.h" | |
26 | #include "qemu/timer.h" | |
27 | ||
28 | /* -icount align implementation. */ | |
29 | ||
30 | typedef struct SyncClocks { | |
31 | int64_t diff_clk; | |
32 | int64_t last_cpu_icount; | |
33 | int64_t realtime_clock; | |
34 | } SyncClocks; | |
35 | ||
36 | #if !defined(CONFIG_USER_ONLY) | |
37 | /* Allow the guest to have a max 3ms advance. | |
38 | * The difference between the 2 clocks could therefore | |
39 | * oscillate around 0. | |
40 | */ | |
41 | #define VM_CLOCK_ADVANCE 3000000 | |
42 | #define THRESHOLD_REDUCE 1.5 | |
43 | #define MAX_DELAY_PRINT_RATE 2000000000LL | |
44 | #define MAX_NB_PRINTS 100 | |
45 | ||
46 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
47 | { | |
48 | int64_t cpu_icount; | |
49 | ||
50 | if (!icount_align_option) { | |
51 | return; | |
52 | } | |
53 | ||
54 | cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; | |
55 | sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount); | |
56 | sc->last_cpu_icount = cpu_icount; | |
57 | ||
58 | if (sc->diff_clk > VM_CLOCK_ADVANCE) { | |
59 | #ifndef _WIN32 | |
60 | struct timespec sleep_delay, rem_delay; | |
61 | sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; | |
62 | sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; | |
63 | if (nanosleep(&sleep_delay, &rem_delay) < 0) { | |
64 | sc->diff_clk -= (sleep_delay.tv_sec - rem_delay.tv_sec) * 1000000000LL; | |
65 | sc->diff_clk -= sleep_delay.tv_nsec - rem_delay.tv_nsec; | |
66 | } else { | |
67 | sc->diff_clk = 0; | |
68 | } | |
69 | #else | |
70 | Sleep(sc->diff_clk / SCALE_MS); | |
71 | sc->diff_clk = 0; | |
72 | #endif | |
73 | } | |
74 | } | |
75 | ||
76 | static void print_delay(const SyncClocks *sc) | |
77 | { | |
78 | static float threshold_delay; | |
79 | static int64_t last_realtime_clock; | |
80 | static int nb_prints; | |
81 | ||
82 | if (icount_align_option && | |
83 | sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && | |
84 | nb_prints < MAX_NB_PRINTS) { | |
85 | if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || | |
86 | (-sc->diff_clk / (float)1000000000LL < | |
87 | (threshold_delay - THRESHOLD_REDUCE))) { | |
88 | threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; | |
89 | printf("Warning: The guest is now late by %.1f to %.1f seconds\n", | |
90 | threshold_delay - 1, | |
91 | threshold_delay); | |
92 | nb_prints++; | |
93 | last_realtime_clock = sc->realtime_clock; | |
94 | } | |
95 | } | |
96 | } | |
97 | ||
98 | static void init_delay_params(SyncClocks *sc, | |
99 | const CPUState *cpu) | |
100 | { | |
101 | if (!icount_align_option) { | |
102 | return; | |
103 | } | |
104 | sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); | |
105 | sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - | |
106 | sc->realtime_clock + | |
107 | cpu_get_clock_offset(); | |
108 | sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; | |
109 | if (sc->diff_clk < max_delay) { | |
110 | max_delay = sc->diff_clk; | |
111 | } | |
112 | if (sc->diff_clk > max_advance) { | |
113 | max_advance = sc->diff_clk; | |
114 | } | |
115 | ||
116 | /* Print every 2s max if the guest is late. We limit the number | |
117 | of printed messages to NB_PRINT_MAX(currently 100) */ | |
118 | print_delay(sc); | |
119 | } | |
120 | #else | |
121 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
122 | { | |
123 | } | |
124 | ||
125 | static void init_delay_params(SyncClocks *sc, const CPUState *cpu) | |
126 | { | |
127 | } | |
128 | #endif /* CONFIG USER ONLY */ | |
129 | ||
130 | void cpu_loop_exit(CPUState *cpu) | |
131 | { | |
132 | cpu->current_tb = NULL; | |
133 | siglongjmp(cpu->jmp_env, 1); | |
134 | } | |
135 | ||
136 | /* exit the current TB from a signal handler. The host registers are | |
137 | restored in a state compatible with the CPU emulator | |
138 | */ | |
139 | #if defined(CONFIG_SOFTMMU) | |
140 | void cpu_resume_from_signal(CPUState *cpu, void *puc) | |
141 | { | |
142 | /* XXX: restore cpu registers saved in host registers */ | |
143 | ||
144 | cpu->exception_index = -1; | |
145 | siglongjmp(cpu->jmp_env, 1); | |
146 | } | |
147 | #endif | |
148 | ||
149 | /* Execute a TB, and fix up the CPU state afterwards if necessary */ | |
150 | static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr) | |
151 | { | |
152 | CPUArchState *env = cpu->env_ptr; | |
153 | uintptr_t next_tb; | |
154 | ||
155 | #if defined(DEBUG_DISAS) | |
156 | if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) { | |
157 | #if defined(TARGET_I386) | |
158 | log_cpu_state(cpu, CPU_DUMP_CCOP); | |
159 | #elif defined(TARGET_M68K) | |
160 | /* ??? Should not modify env state for dumping. */ | |
161 | cpu_m68k_flush_flags(env, env->cc_op); | |
162 | env->cc_op = CC_OP_FLAGS; | |
163 | env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4); | |
164 | log_cpu_state(cpu, 0); | |
165 | #else | |
166 | log_cpu_state(cpu, 0); | |
167 | #endif | |
168 | } | |
169 | #endif /* DEBUG_DISAS */ | |
170 | ||
171 | cpu->can_do_io = 0; | |
172 | next_tb = tcg_qemu_tb_exec(env, tb_ptr); | |
173 | cpu->can_do_io = 1; | |
174 | trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK), | |
175 | next_tb & TB_EXIT_MASK); | |
176 | ||
177 | if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) { | |
178 | /* We didn't start executing this TB (eg because the instruction | |
179 | * counter hit zero); we must restore the guest PC to the address | |
180 | * of the start of the TB. | |
181 | */ | |
182 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
183 | TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); | |
184 | if (cc->synchronize_from_tb) { | |
185 | cc->synchronize_from_tb(cpu, tb); | |
186 | } else { | |
187 | assert(cc->set_pc); | |
188 | cc->set_pc(cpu, tb->pc); | |
189 | } | |
190 | } | |
191 | if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) { | |
192 | /* We were asked to stop executing TBs (probably a pending | |
193 | * interrupt. We've now stopped, so clear the flag. | |
194 | */ | |
195 | cpu->tcg_exit_req = 0; | |
196 | } | |
197 | return next_tb; | |
198 | } | |
199 | ||
200 | /* Execute the code without caching the generated code. An interpreter | |
201 | could be used if available. */ | |
202 | static void cpu_exec_nocache(CPUArchState *env, int max_cycles, | |
203 | TranslationBlock *orig_tb) | |
204 | { | |
205 | CPUState *cpu = ENV_GET_CPU(env); | |
206 | TranslationBlock *tb; | |
207 | target_ulong pc = orig_tb->pc; | |
208 | target_ulong cs_base = orig_tb->cs_base; | |
209 | uint64_t flags = orig_tb->flags; | |
210 | ||
211 | /* Should never happen. | |
212 | We only end up here when an existing TB is too long. */ | |
213 | if (max_cycles > CF_COUNT_MASK) | |
214 | max_cycles = CF_COUNT_MASK; | |
215 | ||
216 | /* tb_gen_code can flush our orig_tb, invalidate it now */ | |
217 | tb_phys_invalidate(orig_tb, -1); | |
218 | tb = tb_gen_code(cpu, pc, cs_base, flags, | |
219 | max_cycles | CF_NOCACHE); | |
220 | cpu->current_tb = tb; | |
221 | /* execute the generated code */ | |
222 | trace_exec_tb_nocache(tb, tb->pc); | |
223 | cpu_tb_exec(cpu, tb->tc_ptr); | |
224 | cpu->current_tb = NULL; | |
225 | tb_phys_invalidate(tb, -1); | |
226 | tb_free(tb); | |
227 | } | |
228 | ||
229 | static TranslationBlock *tb_find_slow(CPUArchState *env, | |
230 | target_ulong pc, | |
231 | target_ulong cs_base, | |
232 | uint64_t flags) | |
233 | { | |
234 | CPUState *cpu = ENV_GET_CPU(env); | |
235 | TranslationBlock *tb, **ptb1; | |
236 | unsigned int h; | |
237 | tb_page_addr_t phys_pc, phys_page1; | |
238 | target_ulong virt_page2; | |
239 | ||
240 | tcg_ctx.tb_ctx.tb_invalidated_flag = 0; | |
241 | ||
242 | /* find translated block using physical mappings */ | |
243 | phys_pc = get_page_addr_code(env, pc); | |
244 | phys_page1 = phys_pc & TARGET_PAGE_MASK; | |
245 | h = tb_phys_hash_func(phys_pc); | |
246 | ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h]; | |
247 | for(;;) { | |
248 | tb = *ptb1; | |
249 | if (!tb) | |
250 | goto not_found; | |
251 | if (tb->pc == pc && | |
252 | tb->page_addr[0] == phys_page1 && | |
253 | tb->cs_base == cs_base && | |
254 | tb->flags == flags) { | |
255 | /* check next page if needed */ | |
256 | if (tb->page_addr[1] != -1) { | |
257 | tb_page_addr_t phys_page2; | |
258 | ||
259 | virt_page2 = (pc & TARGET_PAGE_MASK) + | |
260 | TARGET_PAGE_SIZE; | |
261 | phys_page2 = get_page_addr_code(env, virt_page2); | |
262 | if (tb->page_addr[1] == phys_page2) | |
263 | goto found; | |
264 | } else { | |
265 | goto found; | |
266 | } | |
267 | } | |
268 | ptb1 = &tb->phys_hash_next; | |
269 | } | |
270 | not_found: | |
271 | /* if no translated code available, then translate it now */ | |
272 | tb = tb_gen_code(cpu, pc, cs_base, flags, 0); | |
273 | ||
274 | found: | |
275 | /* Move the last found TB to the head of the list */ | |
276 | if (likely(*ptb1)) { | |
277 | *ptb1 = tb->phys_hash_next; | |
278 | tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h]; | |
279 | tcg_ctx.tb_ctx.tb_phys_hash[h] = tb; | |
280 | } | |
281 | /* we add the TB in the virtual pc hash table */ | |
282 | cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb; | |
283 | return tb; | |
284 | } | |
285 | ||
286 | static inline TranslationBlock *tb_find_fast(CPUArchState *env) | |
287 | { | |
288 | CPUState *cpu = ENV_GET_CPU(env); | |
289 | TranslationBlock *tb; | |
290 | target_ulong cs_base, pc; | |
291 | int flags; | |
292 | ||
293 | /* we record a subset of the CPU state. It will | |
294 | always be the same before a given translated block | |
295 | is executed. */ | |
296 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); | |
297 | tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]; | |
298 | if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || | |
299 | tb->flags != flags)) { | |
300 | tb = tb_find_slow(env, pc, cs_base, flags); | |
301 | } | |
302 | return tb; | |
303 | } | |
304 | ||
305 | static void cpu_handle_debug_exception(CPUArchState *env) | |
306 | { | |
307 | CPUState *cpu = ENV_GET_CPU(env); | |
308 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
309 | CPUWatchpoint *wp; | |
310 | ||
311 | if (!cpu->watchpoint_hit) { | |
312 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { | |
313 | wp->flags &= ~BP_WATCHPOINT_HIT; | |
314 | } | |
315 | } | |
316 | ||
317 | cc->debug_excp_handler(cpu); | |
318 | } | |
319 | ||
320 | /* main execution loop */ | |
321 | ||
322 | volatile sig_atomic_t exit_request; | |
323 | ||
324 | int cpu_exec(CPUArchState *env) | |
325 | { | |
326 | CPUState *cpu = ENV_GET_CPU(env); | |
327 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
328 | #ifdef TARGET_I386 | |
329 | X86CPU *x86_cpu = X86_CPU(cpu); | |
330 | #endif | |
331 | int ret, interrupt_request; | |
332 | TranslationBlock *tb; | |
333 | uint8_t *tc_ptr; | |
334 | uintptr_t next_tb; | |
335 | SyncClocks sc; | |
336 | ||
337 | /* This must be volatile so it is not trashed by longjmp() */ | |
338 | volatile bool have_tb_lock = false; | |
339 | ||
340 | if (cpu->halted) { | |
341 | if (!cpu_has_work(cpu)) { | |
342 | return EXCP_HALTED; | |
343 | } | |
344 | ||
345 | cpu->halted = 0; | |
346 | } | |
347 | ||
348 | current_cpu = cpu; | |
349 | ||
350 | /* As long as current_cpu is null, up to the assignment just above, | |
351 | * requests by other threads to exit the execution loop are expected to | |
352 | * be issued using the exit_request global. We must make sure that our | |
353 | * evaluation of the global value is performed past the current_cpu | |
354 | * value transition point, which requires a memory barrier as well as | |
355 | * an instruction scheduling constraint on modern architectures. */ | |
356 | smp_mb(); | |
357 | ||
358 | if (unlikely(exit_request)) { | |
359 | cpu->exit_request = 1; | |
360 | } | |
361 | ||
362 | cc->cpu_exec_enter(cpu); | |
363 | ||
364 | /* Calculate difference between guest clock and host clock. | |
365 | * This delay includes the delay of the last cycle, so | |
366 | * what we have to do is sleep until it is 0. As for the | |
367 | * advance/delay we gain here, we try to fix it next time. | |
368 | */ | |
369 | init_delay_params(&sc, cpu); | |
370 | ||
371 | /* prepare setjmp context for exception handling */ | |
372 | for(;;) { | |
373 | if (sigsetjmp(cpu->jmp_env, 0) == 0) { | |
374 | /* if an exception is pending, we execute it here */ | |
375 | if (cpu->exception_index >= 0) { | |
376 | if (cpu->exception_index >= EXCP_INTERRUPT) { | |
377 | /* exit request from the cpu execution loop */ | |
378 | ret = cpu->exception_index; | |
379 | if (ret == EXCP_DEBUG) { | |
380 | cpu_handle_debug_exception(env); | |
381 | } | |
382 | cpu->exception_index = -1; | |
383 | break; | |
384 | } else { | |
385 | #if defined(CONFIG_USER_ONLY) | |
386 | /* if user mode only, we simulate a fake exception | |
387 | which will be handled outside the cpu execution | |
388 | loop */ | |
389 | #if defined(TARGET_I386) | |
390 | cc->do_interrupt(cpu); | |
391 | #endif | |
392 | ret = cpu->exception_index; | |
393 | cpu->exception_index = -1; | |
394 | break; | |
395 | #else | |
396 | cc->do_interrupt(cpu); | |
397 | cpu->exception_index = -1; | |
398 | #endif | |
399 | } | |
400 | } | |
401 | ||
402 | next_tb = 0; /* force lookup of first TB */ | |
403 | for(;;) { | |
404 | interrupt_request = cpu->interrupt_request; | |
405 | if (unlikely(interrupt_request)) { | |
406 | if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { | |
407 | /* Mask out external interrupts for this step. */ | |
408 | interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; | |
409 | } | |
410 | if (interrupt_request & CPU_INTERRUPT_DEBUG) { | |
411 | cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; | |
412 | cpu->exception_index = EXCP_DEBUG; | |
413 | cpu_loop_exit(cpu); | |
414 | } | |
415 | if (interrupt_request & CPU_INTERRUPT_HALT) { | |
416 | cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; | |
417 | cpu->halted = 1; | |
418 | cpu->exception_index = EXCP_HLT; | |
419 | cpu_loop_exit(cpu); | |
420 | } | |
421 | #if defined(TARGET_I386) | |
422 | if (interrupt_request & CPU_INTERRUPT_INIT) { | |
423 | cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0); | |
424 | do_cpu_init(x86_cpu); | |
425 | cpu->exception_index = EXCP_HALTED; | |
426 | cpu_loop_exit(cpu); | |
427 | } | |
428 | #else | |
429 | if (interrupt_request & CPU_INTERRUPT_RESET) { | |
430 | cpu_reset(cpu); | |
431 | } | |
432 | #endif | |
433 | /* The target hook has 3 exit conditions: | |
434 | False when the interrupt isn't processed, | |
435 | True when it is, and we should restart on a new TB, | |
436 | and via longjmp via cpu_loop_exit. */ | |
437 | if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { | |
438 | next_tb = 0; | |
439 | } | |
440 | /* Don't use the cached interrupt_request value, | |
441 | do_interrupt may have updated the EXITTB flag. */ | |
442 | if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) { | |
443 | cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; | |
444 | /* ensure that no TB jump will be modified as | |
445 | the program flow was changed */ | |
446 | next_tb = 0; | |
447 | } | |
448 | } | |
449 | if (unlikely(cpu->exit_request)) { | |
450 | cpu->exit_request = 0; | |
451 | cpu->exception_index = EXCP_INTERRUPT; | |
452 | cpu_loop_exit(cpu); | |
453 | } | |
454 | spin_lock(&tcg_ctx.tb_ctx.tb_lock); | |
455 | have_tb_lock = true; | |
456 | tb = tb_find_fast(env); | |
457 | /* Note: we do it here to avoid a gcc bug on Mac OS X when | |
458 | doing it in tb_find_slow */ | |
459 | if (tcg_ctx.tb_ctx.tb_invalidated_flag) { | |
460 | /* as some TB could have been invalidated because | |
461 | of memory exceptions while generating the code, we | |
462 | must recompute the hash index here */ | |
463 | next_tb = 0; | |
464 | tcg_ctx.tb_ctx.tb_invalidated_flag = 0; | |
465 | } | |
466 | if (qemu_loglevel_mask(CPU_LOG_EXEC)) { | |
467 | qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n", | |
468 | tb->tc_ptr, tb->pc, lookup_symbol(tb->pc)); | |
469 | } | |
470 | /* see if we can patch the calling TB. When the TB | |
471 | spans two pages, we cannot safely do a direct | |
472 | jump. */ | |
473 | if (next_tb != 0 && tb->page_addr[1] == -1) { | |
474 | tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK), | |
475 | next_tb & TB_EXIT_MASK, tb); | |
476 | } | |
477 | have_tb_lock = false; | |
478 | spin_unlock(&tcg_ctx.tb_ctx.tb_lock); | |
479 | ||
480 | /* cpu_interrupt might be called while translating the | |
481 | TB, but before it is linked into a potentially | |
482 | infinite loop and becomes env->current_tb. Avoid | |
483 | starting execution if there is a pending interrupt. */ | |
484 | cpu->current_tb = tb; | |
485 | barrier(); | |
486 | if (likely(!cpu->exit_request)) { | |
487 | trace_exec_tb(tb, tb->pc); | |
488 | tc_ptr = tb->tc_ptr; | |
489 | /* execute the generated code */ | |
490 | next_tb = cpu_tb_exec(cpu, tc_ptr); | |
491 | switch (next_tb & TB_EXIT_MASK) { | |
492 | case TB_EXIT_REQUESTED: | |
493 | /* Something asked us to stop executing | |
494 | * chained TBs; just continue round the main | |
495 | * loop. Whatever requested the exit will also | |
496 | * have set something else (eg exit_request or | |
497 | * interrupt_request) which we will handle | |
498 | * next time around the loop. | |
499 | */ | |
500 | tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); | |
501 | next_tb = 0; | |
502 | break; | |
503 | case TB_EXIT_ICOUNT_EXPIRED: | |
504 | { | |
505 | /* Instruction counter expired. */ | |
506 | int insns_left; | |
507 | tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); | |
508 | insns_left = cpu->icount_decr.u32; | |
509 | if (cpu->icount_extra && insns_left >= 0) { | |
510 | /* Refill decrementer and continue execution. */ | |
511 | cpu->icount_extra += insns_left; | |
512 | if (cpu->icount_extra > 0xffff) { | |
513 | insns_left = 0xffff; | |
514 | } else { | |
515 | insns_left = cpu->icount_extra; | |
516 | } | |
517 | cpu->icount_extra -= insns_left; | |
518 | cpu->icount_decr.u16.low = insns_left; | |
519 | } else { | |
520 | if (insns_left > 0) { | |
521 | /* Execute remaining instructions. */ | |
522 | cpu_exec_nocache(env, insns_left, tb); | |
523 | align_clocks(&sc, cpu); | |
524 | } | |
525 | cpu->exception_index = EXCP_INTERRUPT; | |
526 | next_tb = 0; | |
527 | cpu_loop_exit(cpu); | |
528 | } | |
529 | break; | |
530 | } | |
531 | default: | |
532 | break; | |
533 | } | |
534 | } | |
535 | cpu->current_tb = NULL; | |
536 | /* Try to align the host and virtual clocks | |
537 | if the guest is in advance */ | |
538 | align_clocks(&sc, cpu); | |
539 | /* reset soft MMU for next block (it can currently | |
540 | only be set by a memory fault) */ | |
541 | } /* for(;;) */ | |
542 | } else { | |
543 | /* Reload env after longjmp - the compiler may have smashed all | |
544 | * local variables as longjmp is marked 'noreturn'. */ | |
545 | cpu = current_cpu; | |
546 | env = cpu->env_ptr; | |
547 | cc = CPU_GET_CLASS(cpu); | |
548 | cpu->can_do_io = 1; | |
549 | #ifdef TARGET_I386 | |
550 | x86_cpu = X86_CPU(cpu); | |
551 | #endif | |
552 | if (have_tb_lock) { | |
553 | spin_unlock(&tcg_ctx.tb_ctx.tb_lock); | |
554 | have_tb_lock = false; | |
555 | } | |
556 | } | |
557 | } /* for(;;) */ | |
558 | ||
559 | cc->cpu_exec_exit(cpu); | |
560 | ||
561 | /* fail safe : never use current_cpu outside cpu_exec() */ | |
562 | current_cpu = NULL; | |
563 | return ret; | |
564 | } |