[qemu.git] / hw / watchdog / wdt_i6300esb.c

/*
 * Virtual hardware watchdog.
 *
 * Copyright (C) 2009 Red Hat Inc.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see <http://www.gnu.org/licenses/>.
 *
 * By Richard W.M. Jones ([email protected]).
 */

#include "qemu/osdep.h"

#include "qemu-common.h"
#include "qemu/timer.h"
#include "sysemu/watchdog.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"

/*#define I6300ESB_DEBUG 1*/

#ifdef I6300ESB_DEBUG
#define i6300esb_debug(fs,...) \
    fprintf(stderr,"i6300esb: %s: "fs,__func__,##__VA_ARGS__)
#else
#define i6300esb_debug(fs,...)
#endif

/* PCI configuration registers */
#define ESB_CONFIG_REG  0x60            /* Config register                   */
#define ESB_LOCK_REG    0x68            /* WDT lock register                 */

/* Memory mapped registers (offset from base address) */
#define ESB_TIMER1_REG  0x00            /* Timer1 value after each reset     */
#define ESB_TIMER2_REG  0x04            /* Timer2 value after each reset     */
#define ESB_GINTSR_REG  0x08            /* General Interrupt Status Register */
#define ESB_RELOAD_REG  0x0c            /* Reload register                   */

/* Lock register bits */
#define ESB_WDT_FUNC    (0x01 << 2)   /* Watchdog functionality            */
#define ESB_WDT_ENABLE  (0x01 << 1)   /* Enable WDT                        */
#define ESB_WDT_LOCK    (0x01 << 0)   /* Lock (nowayout)                   */

/* Config register bits */
#define ESB_WDT_REBOOT  (0x01 << 5)   /* Enable reboot on timeout          */
#define ESB_WDT_FREQ    (0x01 << 2)   /* Decrement frequency               */
#define ESB_WDT_INTTYPE (0x11 << 0)   /* Interrupt type on timer1 timeout  */

/* Reload register bits */
#define ESB_WDT_RELOAD  (0x01 << 8)    /* prevent timeout                   */

/* Magic constants */
#define ESB_UNLOCK1     0x80            /* Step 1 to unlock reset registers  */
#define ESB_UNLOCK2     0x86            /* Step 2 to unlock reset registers  */

/* Device state. */
struct I6300State {
    PCIDevice dev;
    MemoryRegion io_mem;

    int reboot_enabled;         /* "Reboot" on timer expiry.  The real action
                                 * performed depends on the -watchdog-action
                                 * param passed on QEMU command line.
                                 */
    int clock_scale;            /* Clock scale. */
#define CLOCK_SCALE_1KHZ 0
#define CLOCK_SCALE_1MHZ 1

    int int_type;               /* Interrupt type generated. */
#define INT_TYPE_IRQ 0          /* APIC 1, INT 10 */
#define INT_TYPE_SMI 2
#define INT_TYPE_DISABLED 3

    int free_run;               /* If true, reload timer on expiry. */
    int locked;                 /* If true, enabled field cannot be changed. */
    int enabled;                /* If true, watchdog is enabled. */

    QEMUTimer *timer;           /* The actual watchdog timer. */

    uint32_t timer1_preload;    /* Values preloaded into timer1, timer2. */
    uint32_t timer2_preload;
    int stage;                  /* Stage (1 or 2). */

    int unlock_state;           /* Guest writes 0x80, 0x86 to unlock the
                                 * registers, and we transition through
                                 * states 0 -> 1 -> 2 when this happens.
                                 */

    int previous_reboot_flag;   /* If the watchdog caused the previous
                                 * reboot, this flag will be set.
                                 */
};

typedef struct I6300State I6300State;

#define TYPE_WATCHDOG_I6300ESB_DEVICE "i6300esb"
#define WATCHDOG_I6300ESB_DEVICE(obj) \
    OBJECT_CHECK(I6300State, (obj), TYPE_WATCHDOG_I6300ESB_DEVICE)

/* This function is called when the watchdog has either been enabled
 * (hence it starts counting down) or has been keep-alived.
 */
static void i6300esb_restart_timer(I6300State *d, int stage)
{
    int64_t timeout;

    if (!d->enabled)
        return;

    d->stage = stage;

    if (d->stage <= 1)
        timeout = d->timer1_preload;
    else
        timeout = d->timer2_preload;

    if (d->clock_scale == CLOCK_SCALE_1KHZ)
        timeout <<= 15;
    else
        timeout <<= 5;

    /* Get the timeout in nanoseconds. */

    timeout = timeout * 30; /* on a PCI bus, 1 tick is 30 ns*/

    i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout);

    timer_mod(d->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout);
}

/* This is called when the guest disables the watchdog. */
static void i6300esb_disable_timer(I6300State *d)
{
    i6300esb_debug("timer disabled\n");

    timer_del(d->timer);
}

static void i6300esb_reset(DeviceState *dev)
{
    PCIDevice *pdev = PCI_DEVICE(dev);
    I6300State *d = WATCHDOG_I6300ESB_DEVICE(pdev);

    i6300esb_debug("I6300State = %p\n", d);

    i6300esb_disable_timer(d);

    /* NB: Don't change d->previous_reboot_flag in this function. */

    d->reboot_enabled = 1;
    d->clock_scale = CLOCK_SCALE_1KHZ;
    d->int_type = INT_TYPE_IRQ;
    d->free_run = 0;
    d->locked = 0;
    d->enabled = 0;
    d->timer1_preload = 0xfffff;
    d->timer2_preload = 0xfffff;
    d->stage = 1;
    d->unlock_state = 0;
}

/* This function is called when the watchdog expires.  Note that
 * the hardware has two timers, and so expiry happens in two stages.
 * If d->stage == 1 then we perform the first stage action (usually,
 * sending an interrupt) and then restart the timer again for the
 * second stage.  If the second stage expires then the watchdog
 * really has run out.
 */
static void i6300esb_timer_expired(void *vp)
{
    I6300State *d = vp;

    i6300esb_debug("stage %d\n", d->stage);

    if (d->stage == 1) {
        /* What to do at the end of stage 1? */
        switch (d->int_type) {
        case INT_TYPE_IRQ:
            fprintf(stderr, "i6300esb_timer_expired: I would send APIC 1 INT 10 here if I knew how (XXX)\n");
            break;
        case INT_TYPE_SMI:
            fprintf(stderr, "i6300esb_timer_expired: I would send SMI here if I knew how (XXX)\n");
            break;
        }

        /* Start the second stage. */
        i6300esb_restart_timer(d, 2);
    } else {
        /* Second stage expired, reboot for real. */
        if (d->reboot_enabled) {
            d->previous_reboot_flag = 1;
            watchdog_perform_action(); /* This reboots, exits, etc */
            i6300esb_reset(&d->dev.qdev);
        }

        /* In "free running mode" we start stage 1 again. */
        if (d->free_run)
            i6300esb_restart_timer(d, 1);
    }
}

static void i6300esb_config_write(PCIDevice *dev, uint32_t addr,
                                  uint32_t data, int len)
{
    I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);
    int old;

    i6300esb_debug("addr = %x, data = %x, len = %d\n", addr, data, len);

    if (addr == ESB_CONFIG_REG && len == 2) {
        d->reboot_enabled = (data & ESB_WDT_REBOOT) == 0;
        d->clock_scale =
            (data & ESB_WDT_FREQ) != 0 ? CLOCK_SCALE_1MHZ : CLOCK_SCALE_1KHZ;
        d->int_type = (data & ESB_WDT_INTTYPE);
    } else if (addr == ESB_LOCK_REG && len == 1) {
        if (!d->locked) {
            d->locked = (data & ESB_WDT_LOCK) != 0;
            d->free_run = (data & ESB_WDT_FUNC) != 0;
            old = d->enabled;
            d->enabled = (data & ESB_WDT_ENABLE) != 0;
            if (!old && d->enabled) /* Enabled transitioned from 0 -> 1 */
                i6300esb_restart_timer(d, 1);
            else if (!d->enabled)
                i6300esb_disable_timer(d);
        }
    } else {
        pci_default_write_config(dev, addr, data, len);
    }
}

static uint32_t i6300esb_config_read(PCIDevice *dev, uint32_t addr, int len)
{
    I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);
    uint32_t data;

    i6300esb_debug ("addr = %x, len = %d\n", addr, len);

    if (addr == ESB_CONFIG_REG && len == 2) {
        data =
            (d->reboot_enabled ? 0 : ESB_WDT_REBOOT) |
            (d->clock_scale == CLOCK_SCALE_1MHZ ? ESB_WDT_FREQ : 0) |
            d->int_type;
        return data;
    } else if (addr == ESB_LOCK_REG && len == 1) {
        data =
            (d->free_run ? ESB_WDT_FUNC : 0) |
            (d->locked ? ESB_WDT_LOCK : 0) |
            (d->enabled ? ESB_WDT_ENABLE : 0);
        return data;
    } else {
        return pci_default_read_config(dev, addr, len);
    }
}

static uint32_t i6300esb_mem_readb(void *vp, hwaddr addr)
{
    i6300esb_debug ("addr = %x\n", (int) addr);

    return 0;
}

static uint32_t i6300esb_mem_readw(void *vp, hwaddr addr)
{
    uint32_t data = 0;
    I6300State *d = vp;

    i6300esb_debug("addr = %x\n", (int) addr);

    if (addr == 0xc) {
        /* The previous reboot flag is really bit 9, but there is
         * a bug in the Linux driver where it thinks it's bit 12.
         * Set both.
         */
        data = d->previous_reboot_flag ? 0x1200 : 0;
    }

    return data;
}

static uint32_t i6300esb_mem_readl(void *vp, hwaddr addr)
{
    i6300esb_debug("addr = %x\n", (int) addr);

    return 0;
}

static void i6300esb_mem_writeb(void *vp, hwaddr addr, uint32_t val)
{
    I6300State *d = vp;

    i6300esb_debug("addr = %x, val = %x\n", (int) addr, val);

    if (addr == 0xc && val == 0x80)
        d->unlock_state = 1;
    else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
        d->unlock_state = 2;
}

static void i6300esb_mem_writew(void *vp, hwaddr addr, uint32_t val)
{
    I6300State *d = vp;

    i6300esb_debug("addr = %x, val = %x\n", (int) addr, val);

    if (addr == 0xc && val == 0x80)
        d->unlock_state = 1;
    else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
        d->unlock_state = 2;
    else {
        if (d->unlock_state == 2) {
            if (addr == 0xc) {
                if ((val & 0x100) != 0)
                    /* This is the "ping" from the userspace watchdog in
                     * the guest ...
                     */
                    i6300esb_restart_timer(d, 1);

                /* Setting bit 9 resets the previous reboot flag.
                 * There's a bug in the Linux driver where it sets
                 * bit 12 instead.
                 */
                if ((val & 0x200) != 0 || (val & 0x1000) != 0) {
                    d->previous_reboot_flag = 0;
                }
            }

            d->unlock_state = 0;
        }
    }
}

static void i6300esb_mem_writel(void *vp, hwaddr addr, uint32_t val)
{
    I6300State *d = vp;

    i6300esb_debug ("addr = %x, val = %x\n", (int) addr, val);

    if (addr == 0xc && val == 0x80)
        d->unlock_state = 1;
    else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
        d->unlock_state = 2;
    else {
        if (d->unlock_state == 2) {
            if (addr == 0)
                d->timer1_preload = val & 0xfffff;
            else if (addr == 4)
                d->timer2_preload = val & 0xfffff;

            d->unlock_state = 0;
        }
    }
}

static const MemoryRegionOps i6300esb_ops = {
    .old_mmio = {
        .read = {
            i6300esb_mem_readb,
            i6300esb_mem_readw,
            i6300esb_mem_readl,
        },
        .write = {
            i6300esb_mem_writeb,
            i6300esb_mem_writew,
            i6300esb_mem_writel,
        },
    },
    .endianness = DEVICE_LITTLE_ENDIAN,
};

static const VMStateDescription vmstate_i6300esb = {
    .name = "i6300esb_wdt",
    /* With this VMSD's introduction, version_id/minimum_version_id were
     * erroneously set to sizeof(I6300State), causing a somewhat random
     * version_id to be set for every build. This eventually broke
     * migration.
     *
     * To correct this without breaking old->new migration for older
     * versions of QEMU, we've set version_id to a value high enough
     * to exceed all past values of sizeof(I6300State) across various
     * build environments, and have reset minimum_version_id to 1,
     * since this VMSD has never changed and thus can accept all past
     * versions.
     *
     * For future changes we can treat these values as we normally would.
     */
    .version_id = 10000,
    .minimum_version_id = 1,
    .fields = (VMStateField[]) {
        VMSTATE_PCI_DEVICE(dev, I6300State),
        VMSTATE_INT32(reboot_enabled, I6300State),
        VMSTATE_INT32(clock_scale, I6300State),
        VMSTATE_INT32(int_type, I6300State),
        VMSTATE_INT32(free_run, I6300State),
        VMSTATE_INT32(locked, I6300State),
        VMSTATE_INT32(enabled, I6300State),
        VMSTATE_TIMER_PTR(timer, I6300State),
        VMSTATE_UINT32(timer1_preload, I6300State),
        VMSTATE_UINT32(timer2_preload, I6300State),
        VMSTATE_INT32(stage, I6300State),
        VMSTATE_INT32(unlock_state, I6300State),
        VMSTATE_INT32(previous_reboot_flag, I6300State),
        VMSTATE_END_OF_LIST()
    }
};

static void i6300esb_realize(PCIDevice *dev, Error **errp)
{
    I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);

    i6300esb_debug("I6300State = %p\n", d);

    d->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, i6300esb_timer_expired, d);
    d->previous_reboot_flag = 0;

    memory_region_init_io(&d->io_mem, OBJECT(d), &i6300esb_ops, d,
                          "i6300esb", 0x10);
    pci_register_bar(&d->dev, 0, 0, &d->io_mem);
    /* qemu_register_coalesced_mmio (addr, 0x10); ? */
}

static void i6300esb_exit(PCIDevice *dev)
{
    I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);

    timer_del(d->timer);
    timer_free(d->timer);
}

static WatchdogTimerModel model = {
    .wdt_name = "i6300esb",
    .wdt_description = "Intel 6300ESB",
};

static void i6300esb_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);

    k->config_read = i6300esb_config_read;
    k->config_write = i6300esb_config_write;
    k->realize = i6300esb_realize;
    k->exit = i6300esb_exit;
    k->vendor_id = PCI_VENDOR_ID_INTEL;
    k->device_id = PCI_DEVICE_ID_INTEL_ESB_9;
    k->class_id = PCI_CLASS_SYSTEM_OTHER;
    dc->reset = i6300esb_reset;
    dc->vmsd = &vmstate_i6300esb;
    set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}

static const TypeInfo i6300esb_info = {
    .name          = TYPE_WATCHDOG_I6300ESB_DEVICE,
    .parent        = TYPE_PCI_DEVICE,
    .instance_size = sizeof(I6300State),
    .class_init    = i6300esb_class_init,
    .interfaces = (InterfaceInfo[]) {
        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
        { },
    },
};

static void i6300esb_register_types(void)
{
    watchdog_add_model(&model);
    type_register_static(&i6300esb_info);
}

type_init(i6300esb_register_types)
Commit	Line	Data
9dd986cc RJ	1	/*
	2	* Virtual hardware watchdog.
	3	*
	4	* Copyright (C) 2009 Red Hat Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version 2
	9	* of the License, or (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
8167ee88	17	* along with this program; if not, see <http://www.gnu.org/licenses/>.
9dd986cc RJ	18	*
	19	* By Richard W.M. Jones ([email protected]).
	20	*/
	21
0430891c	22	#include "qemu/osdep.h"
9dd986cc RJ	23
9dd986cc RJ	24	#include "qemu-common.h"
1de7afc9	25	#include "qemu/timer.h"
0d09e41a	26	#include "sysemu/watchdog.h"
83c9f4ca PB	27	#include "hw/hw.h"
83c9f4ca PB	28	#include "hw/pci/pci.h"
9dd986cc RJ	29
	30	/#define I6300ESB_DEBUG 1/
	31
	32	#ifdef I6300ESB_DEBUG
	33	#define i6300esb_debug(fs,...) \
	34	fprintf(stderr,"i6300esb: %s: "fs,__func__,##__VA_ARGS__)
	35	#else
	36	#define i6300esb_debug(fs,...)
	37	#endif
	38
9dd986cc RJ	39	/* PCI configuration registers */
	40	#define ESB_CONFIG_REG 0x60 /* Config register */
	41	#define ESB_LOCK_REG 0x68 /* WDT lock register */
	42
	43	/* Memory mapped registers (offset from base address) */
	44	#define ESB_TIMER1_REG 0x00 /* Timer1 value after each reset */
	45	#define ESB_TIMER2_REG 0x04 /* Timer2 value after each reset */
	46	#define ESB_GINTSR_REG 0x08 /* General Interrupt Status Register */
	47	#define ESB_RELOAD_REG 0x0c /* Reload register */
	48
	49	/* Lock register bits */
	50	#define ESB_WDT_FUNC (0x01 << 2) /* Watchdog functionality */
	51	#define ESB_WDT_ENABLE (0x01 << 1) /* Enable WDT */
	52	#define ESB_WDT_LOCK (0x01 << 0) /* Lock (nowayout) */
	53
	54	/* Config register bits */
	55	#define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */
	56	#define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */
	57	#define ESB_WDT_INTTYPE (0x11 << 0) /* Interrupt type on timer1 timeout */
	58
	59	/* Reload register bits */
	60	#define ESB_WDT_RELOAD (0x01 << 8) /* prevent timeout */
	61
	62	/* Magic constants */
	63	#define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
	64	#define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */
	65
	66	/* Device state. */
	67	struct I6300State {
9d472d51	68	PCIDevice dev;
d9c6ebd1	69	MemoryRegion io_mem;
9dd986cc RJ	70
	71	int reboot_enabled; /* "Reboot" on timer expiry. The real action
	72	* performed depends on the -watchdog-action
	73	* param passed on QEMU command line.
	74	*/
	75	int clock_scale; /* Clock scale. */
	76	#define CLOCK_SCALE_1KHZ 0
	77	#define CLOCK_SCALE_1MHZ 1
	78
	79	int int_type; /* Interrupt type generated. */
	80	#define INT_TYPE_IRQ 0 /* APIC 1, INT 10 */
	81	#define INT_TYPE_SMI 2
	82	#define INT_TYPE_DISABLED 3
	83
	84	int free_run; /* If true, reload timer on expiry. */
	85	int locked; /* If true, enabled field cannot be changed. */
	86	int enabled; /* If true, watchdog is enabled. */
	87
	88	QEMUTimer timer; / The actual watchdog timer. */
	89
	90	uint32_t timer1_preload; /* Values preloaded into timer1, timer2. */
	91	uint32_t timer2_preload;
	92	int stage; /* Stage (1 or 2). */
	93
	94	int unlock_state; /* Guest writes 0x80, 0x86 to unlock the
	95	* registers, and we transition through
	96	* states 0 -> 1 -> 2 when this happens.
	97	*/
	98
	99	int previous_reboot_flag; /* If the watchdog caused the previous
	100	* reboot, this flag will be set.
	101	*/
	102	};
	103
	104	typedef struct I6300State I6300State;
	105
41fc9050 GA	106	#define TYPE_WATCHDOG_I6300ESB_DEVICE "i6300esb"
	107	#define WATCHDOG_I6300ESB_DEVICE(obj) \
	108	OBJECT_CHECK(I6300State, (obj), TYPE_WATCHDOG_I6300ESB_DEVICE)
	109
9dd986cc RJ	110	/* This function is called when the watchdog has either been enabled
	111	* (hence it starts counting down) or has been keep-alived.
	112	*/
	113	static void i6300esb_restart_timer(I6300State *d, int stage)
	114	{
	115	int64_t timeout;
	116
	117	if (!d->enabled)
	118	return;
	119
	120	d->stage = stage;
	121
	122	if (d->stage <= 1)
	123	timeout = d->timer1_preload;
	124	else
	125	timeout = d->timer2_preload;
	126
	127	if (d->clock_scale == CLOCK_SCALE_1KHZ)
	128	timeout <<= 15;
	129	else
	130	timeout <<= 5;
	131
9491e9bc LV	132	/* Get the timeout in nanoseconds. */
	133
	134	timeout = timeout * 30; /* on a PCI bus, 1 tick is 30 ns*/
9dd986cc RJ	135
	136	i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout);
	137
bc72ad67	138	timer_mod(d->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout);
9dd986cc RJ	139	}
	140
	141	/* This is called when the guest disables the watchdog. */
	142	static void i6300esb_disable_timer(I6300State *d)
	143	{
	144	i6300esb_debug("timer disabled\n");
	145
bc72ad67	146	timer_del(d->timer);
9dd986cc RJ	147	}
9dd986cc RJ	148
fa82e9c3	149	static void i6300esb_reset(DeviceState *dev)
9dd986cc	150	{
40021f08	151	PCIDevice *pdev = PCI_DEVICE(dev);
41fc9050	152	I6300State *d = WATCHDOG_I6300ESB_DEVICE(pdev);
fa82e9c3 BK	153
	154	i6300esb_debug("I6300State = %p\n", d);
	155
9dd986cc	156	i6300esb_disable_timer(d);
fa82e9c3	157
36888c63 RJ	158	/* NB: Don't change d->previous_reboot_flag in this function. */
36888c63 RJ	159
fa82e9c3 BK	160	d->reboot_enabled = 1;
	161	d->clock_scale = CLOCK_SCALE_1KHZ;
	162	d->int_type = INT_TYPE_IRQ;
	163	d->free_run = 0;
	164	d->locked = 0;
	165	d->enabled = 0;
	166	d->timer1_preload = 0xfffff;
	167	d->timer2_preload = 0xfffff;
	168	d->stage = 1;
	169	d->unlock_state = 0;
9dd986cc RJ	170	}
	171
	172	/* This function is called when the watchdog expires. Note that
	173	* the hardware has two timers, and so expiry happens in two stages.
	174	* If d->stage == 1 then we perform the first stage action (usually,
	175	* sending an interrupt) and then restart the timer again for the
	176	* second stage. If the second stage expires then the watchdog
	177	* really has run out.
	178	*/
	179	static void i6300esb_timer_expired(void *vp)
	180	{
4f423e81	181	I6300State *d = vp;
9dd986cc RJ	182
	183	i6300esb_debug("stage %d\n", d->stage);
	184
	185	if (d->stage == 1) {
	186	/* What to do at the end of stage 1? */
	187	switch (d->int_type) {
	188	case INT_TYPE_IRQ:
	189	fprintf(stderr, "i6300esb_timer_expired: I would send APIC 1 INT 10 here if I knew how (XXX)\n");
	190	break;
	191	case INT_TYPE_SMI:
	192	fprintf(stderr, "i6300esb_timer_expired: I would send SMI here if I knew how (XXX)\n");
	193	break;
	194	}
	195
	196	/* Start the second stage. */
	197	i6300esb_restart_timer(d, 2);
	198	} else {
	199	/* Second stage expired, reboot for real. */
	200	if (d->reboot_enabled) {
	201	d->previous_reboot_flag = 1;
	202	watchdog_perform_action(); /* This reboots, exits, etc */
36888c63	203	i6300esb_reset(&d->dev.qdev);
9dd986cc RJ	204	}
	205
	206	/* In "free running mode" we start stage 1 again. */
	207	if (d->free_run)
	208	i6300esb_restart_timer(d, 1);
	209	}
	210	}
	211
	212	static void i6300esb_config_write(PCIDevice *dev, uint32_t addr,
	213	uint32_t data, int len)
	214	{
41fc9050	215	I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);
9dd986cc RJ	216	int old;
	217
	218	i6300esb_debug("addr = %x, data = %x, len = %d\n", addr, data, len);
	219
	220	if (addr == ESB_CONFIG_REG && len == 2) {
	221	d->reboot_enabled = (data & ESB_WDT_REBOOT) == 0;
	222	d->clock_scale =
	223	(data & ESB_WDT_FREQ) != 0 ? CLOCK_SCALE_1MHZ : CLOCK_SCALE_1KHZ;
	224	d->int_type = (data & ESB_WDT_INTTYPE);
	225	} else if (addr == ESB_LOCK_REG && len == 1) {
	226	if (!d->locked) {
	227	d->locked = (data & ESB_WDT_LOCK) != 0;
	228	d->free_run = (data & ESB_WDT_FUNC) != 0;
	229	old = d->enabled;
	230	d->enabled = (data & ESB_WDT_ENABLE) != 0;
	231	if (!old && d->enabled) /* Enabled transitioned from 0 -> 1 */
	232	i6300esb_restart_timer(d, 1);
	233	else if (!d->enabled)
	234	i6300esb_disable_timer(d);
	235	}
	236	} else {
	237	pci_default_write_config(dev, addr, data, len);
	238	}
	239	}
	240
	241	static uint32_t i6300esb_config_read(PCIDevice *dev, uint32_t addr, int len)
	242	{
41fc9050	243	I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);
9dd986cc RJ	244	uint32_t data;
	245
	246	i6300esb_debug ("addr = %x, len = %d\n", addr, len);
	247
	248	if (addr == ESB_CONFIG_REG && len == 2) {
	249	data =
	250	(d->reboot_enabled ? 0 : ESB_WDT_REBOOT) \|
	251	(d->clock_scale == CLOCK_SCALE_1MHZ ? ESB_WDT_FREQ : 0) \|
	252	d->int_type;
	253	return data;
	254	} else if (addr == ESB_LOCK_REG && len == 1) {
	255	data =
	256	(d->free_run ? ESB_WDT_FUNC : 0) \|
	257	(d->locked ? ESB_WDT_LOCK : 0) \|
	258	(d->enabled ? ESB_WDT_ENABLE : 0);
	259	return data;
	260	} else {
	261	return pci_default_read_config(dev, addr, len);
	262	}
	263	}
	264
a8170e5e	265	static uint32_t i6300esb_mem_readb(void *vp, hwaddr addr)
9dd986cc RJ	266	{
	267	i6300esb_debug ("addr = %x\n", (int) addr);
	268
	269	return 0;
	270	}
	271
a8170e5e	272	static uint32_t i6300esb_mem_readw(void *vp, hwaddr addr)
9dd986cc RJ	273	{
9dd986cc RJ	274	uint32_t data = 0;
4f423e81	275	I6300State *d = vp;
9dd986cc RJ	276
	277	i6300esb_debug("addr = %x\n", (int) addr);
	278
	279	if (addr == 0xc) {
	280	/* The previous reboot flag is really bit 9, but there is
	281	* a bug in the Linux driver where it thinks it's bit 12.
	282	* Set both.
	283	*/
	284	data = d->previous_reboot_flag ? 0x1200 : 0;
	285	}
	286
	287	return data;
	288	}
	289
a8170e5e	290	static uint32_t i6300esb_mem_readl(void *vp, hwaddr addr)
9dd986cc RJ	291	{
	292	i6300esb_debug("addr = %x\n", (int) addr);
	293
	294	return 0;
	295	}
	296
a8170e5e	297	static void i6300esb_mem_writeb(void *vp, hwaddr addr, uint32_t val)
9dd986cc	298	{
4f423e81	299	I6300State *d = vp;
9dd986cc RJ	300
	301	i6300esb_debug("addr = %x, val = %x\n", (int) addr, val);
	302
	303	if (addr == 0xc && val == 0x80)
	304	d->unlock_state = 1;
	305	else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
	306	d->unlock_state = 2;
	307	}
	308
a8170e5e	309	static void i6300esb_mem_writew(void *vp, hwaddr addr, uint32_t val)
9dd986cc	310	{
4f423e81	311	I6300State *d = vp;
9dd986cc RJ	312
	313	i6300esb_debug("addr = %x, val = %x\n", (int) addr, val);
	314
	315	if (addr == 0xc && val == 0x80)
	316	d->unlock_state = 1;
	317	else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
	318	d->unlock_state = 2;
	319	else {
	320	if (d->unlock_state == 2) {
	321	if (addr == 0xc) {
	322	if ((val & 0x100) != 0)
	323	/* This is the "ping" from the userspace watchdog in
	324	* the guest ...
	325	*/
	326	i6300esb_restart_timer(d, 1);
	327
	328	/* Setting bit 9 resets the previous reboot flag.
	329	* There's a bug in the Linux driver where it sets
	330	* bit 12 instead.
	331	*/
	332	if ((val & 0x200) != 0 \|\| (val & 0x1000) != 0) {
	333	d->previous_reboot_flag = 0;
	334	}
	335	}
	336
	337	d->unlock_state = 0;
	338	}
	339	}
	340	}
	341
a8170e5e	342	static void i6300esb_mem_writel(void *vp, hwaddr addr, uint32_t val)
9dd986cc	343	{
4f423e81	344	I6300State *d = vp;
9dd986cc RJ	345
	346	i6300esb_debug ("addr = %x, val = %x\n", (int) addr, val);
	347
	348	if (addr == 0xc && val == 0x80)
	349	d->unlock_state = 1;
	350	else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
	351	d->unlock_state = 2;
	352	else {
	353	if (d->unlock_state == 2) {
	354	if (addr == 0)
	355	d->timer1_preload = val & 0xfffff;
	356	else if (addr == 4)
	357	d->timer2_preload = val & 0xfffff;
	358
	359	d->unlock_state = 0;
	360	}
	361	}
	362	}
	363
d9c6ebd1 AK	364	static const MemoryRegionOps i6300esb_ops = {
	365	.old_mmio = {
	366	.read = {
	367	i6300esb_mem_readb,
	368	i6300esb_mem_readw,
	369	i6300esb_mem_readl,
	370	},
	371	.write = {
	372	i6300esb_mem_writeb,
	373	i6300esb_mem_writew,
	374	i6300esb_mem_writel,
	375	},
	376	},
06b82e2d	377	.endianness = DEVICE_LITTLE_ENDIAN,
d9c6ebd1 AK	378	};
d9c6ebd1 AK	379
95c90a0e JQ	380	static const VMStateDescription vmstate_i6300esb = {
95c90a0e JQ	381	.name = "i6300esb_wdt",
c1990468 MR	382	/* With this VMSD's introduction, version_id/minimum_version_id were
	383	* erroneously set to sizeof(I6300State), causing a somewhat random
	384	* version_id to be set for every build. This eventually broke
	385	* migration.
	386	*
d49805ae JQ	387	* To correct this without breaking old->new migration for older
	388	* versions of QEMU, we've set version_id to a value high enough
	389	* to exceed all past values of sizeof(I6300State) across various
	390	* build environments, and have reset minimum_version_id to 1,
	391	* since this VMSD has never changed and thus can accept all past
	392	* versions.
c1990468 MR	393	*
	394	* For future changes we can treat these values as we normally would.
	395	*/
	396	.version_id = 10000,
	397	.minimum_version_id = 1,
d49805ae	398	.fields = (VMStateField[]) {
95c90a0e JQ	399	VMSTATE_PCI_DEVICE(dev, I6300State),
	400	VMSTATE_INT32(reboot_enabled, I6300State),
	401	VMSTATE_INT32(clock_scale, I6300State),
	402	VMSTATE_INT32(int_type, I6300State),
	403	VMSTATE_INT32(free_run, I6300State),
	404	VMSTATE_INT32(locked, I6300State),
	405	VMSTATE_INT32(enabled, I6300State),
e720677e	406	VMSTATE_TIMER_PTR(timer, I6300State),
95c90a0e JQ	407	VMSTATE_UINT32(timer1_preload, I6300State),
	408	VMSTATE_UINT32(timer2_preload, I6300State),
	409	VMSTATE_INT32(stage, I6300State),
	410	VMSTATE_INT32(unlock_state, I6300State),
	411	VMSTATE_INT32(previous_reboot_flag, I6300State),
	412	VMSTATE_END_OF_LIST()
	413	}
	414	};
9dd986cc	415
9af21dbe	416	static void i6300esb_realize(PCIDevice dev, Error *errp)
9dd986cc	417	{
41fc9050	418	I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);
9dd986cc	419
fa82e9c3 BK	420	i6300esb_debug("I6300State = %p\n", d);
fa82e9c3 BK	421
bc72ad67	422	d->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, i6300esb_timer_expired, d);
36888c63	423	d->previous_reboot_flag = 0;
9dd986cc	424
22fc860b PB	425	memory_region_init_io(&d->io_mem, OBJECT(d), &i6300esb_ops, d,
22fc860b PB	426	"i6300esb", 0x10);
e824b2cc	427	pci_register_bar(&d->dev, 0, 0, &d->io_mem);
22f3647b	428	/* qemu_register_coalesced_mmio (addr, 0x10); ? */
9dd986cc RJ	429	}
9dd986cc RJ	430
eb7a20a3 LQ	431	static void i6300esb_exit(PCIDevice *dev)
	432	{
	433	I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);
	434
	435	timer_del(d->timer);
	436	timer_free(d->timer);
	437	}
	438
9dd986cc RJ	439	static WatchdogTimerModel model = {
	440	.wdt_name = "i6300esb",
	441	.wdt_description = "Intel 6300ESB",
9dd986cc RJ	442	};
9dd986cc RJ	443
40021f08 AL	444	static void i6300esb_class_init(ObjectClass klass, void data)
40021f08 AL	445	{
39bffca2	446	DeviceClass *dc = DEVICE_CLASS(klass);
40021f08 AL	447	PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
	448
	449	k->config_read = i6300esb_config_read;
	450	k->config_write = i6300esb_config_write;
9af21dbe	451	k->realize = i6300esb_realize;
eb7a20a3	452	k->exit = i6300esb_exit;
40021f08 AL	453	k->vendor_id = PCI_VENDOR_ID_INTEL;
	454	k->device_id = PCI_DEVICE_ID_INTEL_ESB_9;
	455	k->class_id = PCI_CLASS_SYSTEM_OTHER;
39bffca2 AL	456	dc->reset = i6300esb_reset;
39bffca2 AL	457	dc->vmsd = &vmstate_i6300esb;
125ee0ed	458	set_bit(DEVICE_CATEGORY_MISC, dc->categories);
40021f08 AL	459	}
40021f08 AL	460
8c43a6f0	461	static const TypeInfo i6300esb_info = {
41fc9050	462	.name = TYPE_WATCHDOG_I6300ESB_DEVICE,
39bffca2 AL	463	.parent = TYPE_PCI_DEVICE,
	464	.instance_size = sizeof(I6300State),
	465	.class_init = i6300esb_class_init,
fd3b02c8 EH	466	.interfaces = (InterfaceInfo[]) {
	467	{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
	468	{ },
	469	},
09aaa160 MA	470	};
09aaa160 MA	471
83f7d43a	472	static void i6300esb_register_types(void)
9dd986cc RJ	473	{
9dd986cc RJ	474	watchdog_add_model(&model);
39bffca2	475	type_register_static(&i6300esb_info);
9dd986cc	476	}
09aaa160	477
83f7d43a	478	type_init(i6300esb_register_types)