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Commit | Line | Data |
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fc01f7e7 FB |
1 | /* |
2 | * QEMU System Emulator header | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #ifndef VL_H | |
25 | #define VL_H | |
26 | ||
67b915a5 FB |
27 | /* we put basic includes here to avoid repeating them in device drivers */ |
28 | #include <stdlib.h> | |
29 | #include <stdio.h> | |
30 | #include <stdarg.h> | |
31 | #include <string.h> | |
32 | #include <inttypes.h> | |
85571bc7 | 33 | #include <limits.h> |
8a7ddc38 | 34 | #include <time.h> |
67b915a5 FB |
35 | #include <ctype.h> |
36 | #include <errno.h> | |
37 | #include <unistd.h> | |
38 | #include <fcntl.h> | |
7d3505c5 | 39 | #include <sys/stat.h> |
fb065187 | 40 | #include "audio/audio.h" |
67b915a5 FB |
41 | |
42 | #ifndef O_LARGEFILE | |
43 | #define O_LARGEFILE 0 | |
44 | #endif | |
40c3bac3 FB |
45 | #ifndef O_BINARY |
46 | #define O_BINARY 0 | |
47 | #endif | |
67b915a5 FB |
48 | |
49 | #ifdef _WIN32 | |
ac62f715 | 50 | #define fsync _commit |
57d1a2b6 FB |
51 | #define lseek _lseeki64 |
52 | #define ENOTSUP 4096 | |
53 | /* XXX: find 64 bit version */ | |
54 | #define ftruncate chsize | |
55 | ||
56 | static inline char *realpath(const char *path, char *resolved_path) | |
57 | { | |
58 | _fullpath(resolved_path, path, _MAX_PATH); | |
59 | return resolved_path; | |
60 | } | |
ec3757de FB |
61 | |
62 | #define PRId64 "I64d" | |
67b915a5 | 63 | #endif |
8a7ddc38 | 64 | |
ea2384d3 FB |
65 | #ifdef QEMU_TOOL |
66 | ||
67 | /* we use QEMU_TOOL in the command line tools which do not depend on | |
68 | the target CPU type */ | |
69 | #include "config-host.h" | |
70 | #include <setjmp.h> | |
71 | #include "osdep.h" | |
72 | #include "bswap.h" | |
73 | ||
74 | #else | |
75 | ||
16f62432 | 76 | #include "cpu.h" |
1fddef4b | 77 | #include "gdbstub.h" |
16f62432 | 78 | |
ea2384d3 FB |
79 | #endif /* !defined(QEMU_TOOL) */ |
80 | ||
67b915a5 FB |
81 | #ifndef glue |
82 | #define xglue(x, y) x ## y | |
83 | #define glue(x, y) xglue(x, y) | |
84 | #define stringify(s) tostring(s) | |
85 | #define tostring(s) #s | |
86 | #endif | |
87 | ||
24236869 FB |
88 | #ifndef MIN |
89 | #define MIN(a, b) (((a) < (b)) ? (a) : (b)) | |
90 | #endif | |
91 | #ifndef MAX | |
92 | #define MAX(a, b) (((a) > (b)) ? (a) : (b)) | |
93 | #endif | |
94 | ||
33e3963e | 95 | /* vl.c */ |
80cabfad | 96 | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
313aa567 | 97 | |
80cabfad FB |
98 | void hw_error(const char *fmt, ...); |
99 | ||
80cabfad FB |
100 | extern const char *bios_dir; |
101 | ||
102 | void pstrcpy(char *buf, int buf_size, const char *str); | |
103 | char *pstrcat(char *buf, int buf_size, const char *s); | |
82c643ff | 104 | int strstart(const char *str, const char *val, const char **ptr); |
c4b1fcc0 | 105 | |
8a7ddc38 FB |
106 | extern int vm_running; |
107 | ||
0bd48850 FB |
108 | typedef struct vm_change_state_entry VMChangeStateEntry; |
109 | typedef void VMChangeStateHandler(void *opaque, int running); | |
8a7ddc38 FB |
110 | typedef void VMStopHandler(void *opaque, int reason); |
111 | ||
0bd48850 FB |
112 | VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, |
113 | void *opaque); | |
114 | void qemu_del_vm_change_state_handler(VMChangeStateEntry *e); | |
115 | ||
8a7ddc38 FB |
116 | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
117 | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); | |
118 | ||
119 | void vm_start(void); | |
120 | void vm_stop(int reason); | |
121 | ||
bb0c6722 FB |
122 | typedef void QEMUResetHandler(void *opaque); |
123 | ||
124 | void qemu_register_reset(QEMUResetHandler *func, void *opaque); | |
125 | void qemu_system_reset_request(void); | |
126 | void qemu_system_shutdown_request(void); | |
3475187d FB |
127 | void qemu_system_powerdown_request(void); |
128 | #if !defined(TARGET_SPARC) | |
129 | // Please implement a power failure function to signal the OS | |
130 | #define qemu_system_powerdown() do{}while(0) | |
131 | #else | |
132 | void qemu_system_powerdown(void); | |
133 | #endif | |
bb0c6722 | 134 | |
ea2384d3 FB |
135 | void main_loop_wait(int timeout); |
136 | ||
0ced6589 FB |
137 | extern int ram_size; |
138 | extern int bios_size; | |
ee22c2f7 | 139 | extern int rtc_utc; |
1f04275e | 140 | extern int cirrus_vga_enabled; |
28b9b5af FB |
141 | extern int graphic_width; |
142 | extern int graphic_height; | |
143 | extern int graphic_depth; | |
3d11d0eb | 144 | extern const char *keyboard_layout; |
d993e026 | 145 | extern int kqemu_allowed; |
a09db21f | 146 | extern int win2k_install_hack; |
bb36d470 | 147 | extern int usb_enabled; |
6a00d601 | 148 | extern int smp_cpus; |
0ced6589 FB |
149 | |
150 | /* XXX: make it dynamic */ | |
151 | #if defined (TARGET_PPC) | |
d5295253 | 152 | #define BIOS_SIZE ((512 + 32) * 1024) |
6af0bf9c FB |
153 | #elif defined(TARGET_MIPS) |
154 | #define BIOS_SIZE (128 * 1024) | |
0ced6589 | 155 | #else |
7587cf44 | 156 | #define BIOS_SIZE ((256 + 64) * 1024) |
0ced6589 | 157 | #endif |
aaaa7df6 | 158 | |
63066f4f FB |
159 | /* keyboard/mouse support */ |
160 | ||
161 | #define MOUSE_EVENT_LBUTTON 0x01 | |
162 | #define MOUSE_EVENT_RBUTTON 0x02 | |
163 | #define MOUSE_EVENT_MBUTTON 0x04 | |
164 | ||
165 | typedef void QEMUPutKBDEvent(void *opaque, int keycode); | |
166 | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); | |
167 | ||
168 | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); | |
09b26c5e | 169 | void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute); |
63066f4f FB |
170 | |
171 | void kbd_put_keycode(int keycode); | |
172 | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); | |
09b26c5e | 173 | int kbd_mouse_is_absolute(void); |
63066f4f | 174 | |
82c643ff FB |
175 | /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx |
176 | constants) */ | |
177 | #define QEMU_KEY_ESC1(c) ((c) | 0xe100) | |
178 | #define QEMU_KEY_BACKSPACE 0x007f | |
179 | #define QEMU_KEY_UP QEMU_KEY_ESC1('A') | |
180 | #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') | |
181 | #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') | |
182 | #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') | |
183 | #define QEMU_KEY_HOME QEMU_KEY_ESC1(1) | |
184 | #define QEMU_KEY_END QEMU_KEY_ESC1(4) | |
185 | #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) | |
186 | #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) | |
187 | #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) | |
188 | ||
189 | #define QEMU_KEY_CTRL_UP 0xe400 | |
190 | #define QEMU_KEY_CTRL_DOWN 0xe401 | |
191 | #define QEMU_KEY_CTRL_LEFT 0xe402 | |
192 | #define QEMU_KEY_CTRL_RIGHT 0xe403 | |
193 | #define QEMU_KEY_CTRL_HOME 0xe404 | |
194 | #define QEMU_KEY_CTRL_END 0xe405 | |
195 | #define QEMU_KEY_CTRL_PAGEUP 0xe406 | |
196 | #define QEMU_KEY_CTRL_PAGEDOWN 0xe407 | |
197 | ||
198 | void kbd_put_keysym(int keysym); | |
199 | ||
c20709aa FB |
200 | /* async I/O support */ |
201 | ||
202 | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); | |
203 | typedef int IOCanRWHandler(void *opaque); | |
7c9d8e07 | 204 | typedef void IOHandler(void *opaque); |
c20709aa | 205 | |
7c9d8e07 FB |
206 | int qemu_set_fd_handler2(int fd, |
207 | IOCanRWHandler *fd_read_poll, | |
208 | IOHandler *fd_read, | |
209 | IOHandler *fd_write, | |
210 | void *opaque); | |
211 | int qemu_set_fd_handler(int fd, | |
212 | IOHandler *fd_read, | |
213 | IOHandler *fd_write, | |
214 | void *opaque); | |
c20709aa | 215 | |
f331110f FB |
216 | /* Polling handling */ |
217 | ||
218 | /* return TRUE if no sleep should be done afterwards */ | |
219 | typedef int PollingFunc(void *opaque); | |
220 | ||
221 | int qemu_add_polling_cb(PollingFunc *func, void *opaque); | |
222 | void qemu_del_polling_cb(PollingFunc *func, void *opaque); | |
223 | ||
82c643ff FB |
224 | /* character device */ |
225 | ||
226 | #define CHR_EVENT_BREAK 0 /* serial break char */ | |
ea2384d3 | 227 | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
82c643ff | 228 | |
2122c51a FB |
229 | |
230 | ||
231 | #define CHR_IOCTL_SERIAL_SET_PARAMS 1 | |
232 | typedef struct { | |
233 | int speed; | |
234 | int parity; | |
235 | int data_bits; | |
236 | int stop_bits; | |
237 | } QEMUSerialSetParams; | |
238 | ||
239 | #define CHR_IOCTL_SERIAL_SET_BREAK 2 | |
240 | ||
241 | #define CHR_IOCTL_PP_READ_DATA 3 | |
242 | #define CHR_IOCTL_PP_WRITE_DATA 4 | |
243 | #define CHR_IOCTL_PP_READ_CONTROL 5 | |
244 | #define CHR_IOCTL_PP_WRITE_CONTROL 6 | |
245 | #define CHR_IOCTL_PP_READ_STATUS 7 | |
246 | ||
82c643ff FB |
247 | typedef void IOEventHandler(void *opaque, int event); |
248 | ||
249 | typedef struct CharDriverState { | |
250 | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); | |
251 | void (*chr_add_read_handler)(struct CharDriverState *s, | |
252 | IOCanRWHandler *fd_can_read, | |
253 | IOReadHandler *fd_read, void *opaque); | |
2122c51a | 254 | int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); |
82c643ff | 255 | IOEventHandler *chr_event; |
eb45f5fe | 256 | void (*chr_send_event)(struct CharDriverState *chr, int event); |
f331110f | 257 | void (*chr_close)(struct CharDriverState *chr); |
82c643ff FB |
258 | void *opaque; |
259 | } CharDriverState; | |
260 | ||
261 | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); | |
262 | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); | |
ea2384d3 | 263 | void qemu_chr_send_event(CharDriverState *s, int event); |
82c643ff FB |
264 | void qemu_chr_add_read_handler(CharDriverState *s, |
265 | IOCanRWHandler *fd_can_read, | |
266 | IOReadHandler *fd_read, void *opaque); | |
267 | void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event); | |
2122c51a | 268 | int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); |
f8d179e3 | 269 | |
82c643ff FB |
270 | /* consoles */ |
271 | ||
272 | typedef struct DisplayState DisplayState; | |
273 | typedef struct TextConsole TextConsole; | |
274 | ||
95219897 PB |
275 | typedef void (*vga_hw_update_ptr)(void *); |
276 | typedef void (*vga_hw_invalidate_ptr)(void *); | |
277 | typedef void (*vga_hw_screen_dump_ptr)(void *, const char *); | |
278 | ||
279 | TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update, | |
280 | vga_hw_invalidate_ptr invalidate, | |
281 | vga_hw_screen_dump_ptr screen_dump, | |
282 | void *opaque); | |
283 | void vga_hw_update(void); | |
284 | void vga_hw_invalidate(void); | |
285 | void vga_hw_screen_dump(const char *filename); | |
286 | ||
287 | int is_graphic_console(void); | |
82c643ff FB |
288 | CharDriverState *text_console_init(DisplayState *ds); |
289 | void console_select(unsigned int index); | |
290 | ||
8d11df9e FB |
291 | /* serial ports */ |
292 | ||
293 | #define MAX_SERIAL_PORTS 4 | |
294 | ||
295 | extern CharDriverState *serial_hds[MAX_SERIAL_PORTS]; | |
296 | ||
6508fe59 FB |
297 | /* parallel ports */ |
298 | ||
299 | #define MAX_PARALLEL_PORTS 3 | |
300 | ||
301 | extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS]; | |
302 | ||
7c9d8e07 FB |
303 | /* VLANs support */ |
304 | ||
305 | typedef struct VLANClientState VLANClientState; | |
306 | ||
307 | struct VLANClientState { | |
308 | IOReadHandler *fd_read; | |
d861b05e PB |
309 | /* Packets may still be sent if this returns zero. It's used to |
310 | rate-limit the slirp code. */ | |
311 | IOCanRWHandler *fd_can_read; | |
7c9d8e07 FB |
312 | void *opaque; |
313 | struct VLANClientState *next; | |
314 | struct VLANState *vlan; | |
315 | char info_str[256]; | |
316 | }; | |
317 | ||
318 | typedef struct VLANState { | |
319 | int id; | |
320 | VLANClientState *first_client; | |
321 | struct VLANState *next; | |
322 | } VLANState; | |
323 | ||
324 | VLANState *qemu_find_vlan(int id); | |
325 | VLANClientState *qemu_new_vlan_client(VLANState *vlan, | |
d861b05e PB |
326 | IOReadHandler *fd_read, |
327 | IOCanRWHandler *fd_can_read, | |
328 | void *opaque); | |
329 | int qemu_can_send_packet(VLANClientState *vc); | |
7c9d8e07 | 330 | void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size); |
d861b05e | 331 | void qemu_handler_true(void *opaque); |
7c9d8e07 FB |
332 | |
333 | void do_info_network(void); | |
334 | ||
7fb843f8 FB |
335 | /* TAP win32 */ |
336 | int tap_win32_init(VLANState *vlan, const char *ifname); | |
337 | void tap_win32_poll(void); | |
338 | ||
7c9d8e07 | 339 | /* NIC info */ |
c4b1fcc0 FB |
340 | |
341 | #define MAX_NICS 8 | |
342 | ||
7c9d8e07 | 343 | typedef struct NICInfo { |
c4b1fcc0 | 344 | uint8_t macaddr[6]; |
a41b2ff2 | 345 | const char *model; |
7c9d8e07 FB |
346 | VLANState *vlan; |
347 | } NICInfo; | |
c4b1fcc0 FB |
348 | |
349 | extern int nb_nics; | |
7c9d8e07 | 350 | extern NICInfo nd_table[MAX_NICS]; |
8a7ddc38 FB |
351 | |
352 | /* timers */ | |
353 | ||
354 | typedef struct QEMUClock QEMUClock; | |
355 | typedef struct QEMUTimer QEMUTimer; | |
356 | typedef void QEMUTimerCB(void *opaque); | |
357 | ||
358 | /* The real time clock should be used only for stuff which does not | |
359 | change the virtual machine state, as it is run even if the virtual | |
69b91039 | 360 | machine is stopped. The real time clock has a frequency of 1000 |
8a7ddc38 FB |
361 | Hz. */ |
362 | extern QEMUClock *rt_clock; | |
363 | ||
e80cfcfc | 364 | /* The virtual clock is only run during the emulation. It is stopped |
8a7ddc38 FB |
365 | when the virtual machine is stopped. Virtual timers use a high |
366 | precision clock, usually cpu cycles (use ticks_per_sec). */ | |
367 | extern QEMUClock *vm_clock; | |
368 | ||
369 | int64_t qemu_get_clock(QEMUClock *clock); | |
370 | ||
371 | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque); | |
372 | void qemu_free_timer(QEMUTimer *ts); | |
373 | void qemu_del_timer(QEMUTimer *ts); | |
374 | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time); | |
375 | int qemu_timer_pending(QEMUTimer *ts); | |
376 | ||
377 | extern int64_t ticks_per_sec; | |
378 | extern int pit_min_timer_count; | |
379 | ||
380 | void cpu_enable_ticks(void); | |
381 | void cpu_disable_ticks(void); | |
382 | ||
383 | /* VM Load/Save */ | |
384 | ||
385 | typedef FILE QEMUFile; | |
386 | ||
387 | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); | |
388 | void qemu_put_byte(QEMUFile *f, int v); | |
389 | void qemu_put_be16(QEMUFile *f, unsigned int v); | |
390 | void qemu_put_be32(QEMUFile *f, unsigned int v); | |
391 | void qemu_put_be64(QEMUFile *f, uint64_t v); | |
392 | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); | |
393 | int qemu_get_byte(QEMUFile *f); | |
394 | unsigned int qemu_get_be16(QEMUFile *f); | |
395 | unsigned int qemu_get_be32(QEMUFile *f); | |
396 | uint64_t qemu_get_be64(QEMUFile *f); | |
397 | ||
398 | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) | |
399 | { | |
400 | qemu_put_be64(f, *pv); | |
401 | } | |
402 | ||
403 | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) | |
404 | { | |
405 | qemu_put_be32(f, *pv); | |
406 | } | |
407 | ||
408 | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) | |
409 | { | |
410 | qemu_put_be16(f, *pv); | |
411 | } | |
412 | ||
413 | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) | |
414 | { | |
415 | qemu_put_byte(f, *pv); | |
416 | } | |
417 | ||
418 | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) | |
419 | { | |
420 | *pv = qemu_get_be64(f); | |
421 | } | |
422 | ||
423 | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) | |
424 | { | |
425 | *pv = qemu_get_be32(f); | |
426 | } | |
427 | ||
428 | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) | |
429 | { | |
430 | *pv = qemu_get_be16(f); | |
431 | } | |
432 | ||
433 | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) | |
434 | { | |
435 | *pv = qemu_get_byte(f); | |
436 | } | |
437 | ||
c27004ec FB |
438 | #if TARGET_LONG_BITS == 64 |
439 | #define qemu_put_betl qemu_put_be64 | |
440 | #define qemu_get_betl qemu_get_be64 | |
441 | #define qemu_put_betls qemu_put_be64s | |
442 | #define qemu_get_betls qemu_get_be64s | |
443 | #else | |
444 | #define qemu_put_betl qemu_put_be32 | |
445 | #define qemu_get_betl qemu_get_be32 | |
446 | #define qemu_put_betls qemu_put_be32s | |
447 | #define qemu_get_betls qemu_get_be32s | |
448 | #endif | |
449 | ||
8a7ddc38 FB |
450 | int64_t qemu_ftell(QEMUFile *f); |
451 | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence); | |
452 | ||
453 | typedef void SaveStateHandler(QEMUFile *f, void *opaque); | |
454 | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); | |
455 | ||
456 | int qemu_loadvm(const char *filename); | |
457 | int qemu_savevm(const char *filename); | |
458 | int register_savevm(const char *idstr, | |
459 | int instance_id, | |
460 | int version_id, | |
461 | SaveStateHandler *save_state, | |
462 | LoadStateHandler *load_state, | |
463 | void *opaque); | |
464 | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts); | |
465 | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts); | |
c4b1fcc0 | 466 | |
6a00d601 FB |
467 | void cpu_save(QEMUFile *f, void *opaque); |
468 | int cpu_load(QEMUFile *f, void *opaque, int version_id); | |
469 | ||
fc01f7e7 FB |
470 | /* block.c */ |
471 | typedef struct BlockDriverState BlockDriverState; | |
ea2384d3 FB |
472 | typedef struct BlockDriver BlockDriver; |
473 | ||
474 | extern BlockDriver bdrv_raw; | |
475 | extern BlockDriver bdrv_cow; | |
476 | extern BlockDriver bdrv_qcow; | |
477 | extern BlockDriver bdrv_vmdk; | |
3c56521b | 478 | extern BlockDriver bdrv_cloop; |
585d0ed9 | 479 | extern BlockDriver bdrv_dmg; |
a8753c34 | 480 | extern BlockDriver bdrv_bochs; |
6a0f9e82 | 481 | extern BlockDriver bdrv_vpc; |
de167e41 | 482 | extern BlockDriver bdrv_vvfat; |
ea2384d3 FB |
483 | |
484 | void bdrv_init(void); | |
485 | BlockDriver *bdrv_find_format(const char *format_name); | |
486 | int bdrv_create(BlockDriver *drv, | |
487 | const char *filename, int64_t size_in_sectors, | |
488 | const char *backing_file, int flags); | |
c4b1fcc0 FB |
489 | BlockDriverState *bdrv_new(const char *device_name); |
490 | void bdrv_delete(BlockDriverState *bs); | |
491 | int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot); | |
ea2384d3 FB |
492 | int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot, |
493 | BlockDriver *drv); | |
fc01f7e7 FB |
494 | void bdrv_close(BlockDriverState *bs); |
495 | int bdrv_read(BlockDriverState *bs, int64_t sector_num, | |
496 | uint8_t *buf, int nb_sectors); | |
497 | int bdrv_write(BlockDriverState *bs, int64_t sector_num, | |
498 | const uint8_t *buf, int nb_sectors); | |
499 | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr); | |
33e3963e | 500 | int bdrv_commit(BlockDriverState *bs); |
77fef8c1 | 501 | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
7a6cba61 PB |
502 | /* Ensure contents are flushed to disk. */ |
503 | void bdrv_flush(BlockDriverState *bs); | |
33e3963e | 504 | |
c4b1fcc0 FB |
505 | #define BDRV_TYPE_HD 0 |
506 | #define BDRV_TYPE_CDROM 1 | |
507 | #define BDRV_TYPE_FLOPPY 2 | |
46d4767d FB |
508 | #define BIOS_ATA_TRANSLATION_AUTO 0 |
509 | #define BIOS_ATA_TRANSLATION_NONE 1 | |
510 | #define BIOS_ATA_TRANSLATION_LBA 2 | |
c4b1fcc0 FB |
511 | |
512 | void bdrv_set_geometry_hint(BlockDriverState *bs, | |
513 | int cyls, int heads, int secs); | |
514 | void bdrv_set_type_hint(BlockDriverState *bs, int type); | |
46d4767d | 515 | void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
c4b1fcc0 FB |
516 | void bdrv_get_geometry_hint(BlockDriverState *bs, |
517 | int *pcyls, int *pheads, int *psecs); | |
518 | int bdrv_get_type_hint(BlockDriverState *bs); | |
46d4767d | 519 | int bdrv_get_translation_hint(BlockDriverState *bs); |
c4b1fcc0 FB |
520 | int bdrv_is_removable(BlockDriverState *bs); |
521 | int bdrv_is_read_only(BlockDriverState *bs); | |
522 | int bdrv_is_inserted(BlockDriverState *bs); | |
523 | int bdrv_is_locked(BlockDriverState *bs); | |
524 | void bdrv_set_locked(BlockDriverState *bs, int locked); | |
525 | void bdrv_set_change_cb(BlockDriverState *bs, | |
526 | void (*change_cb)(void *opaque), void *opaque); | |
ea2384d3 | 527 | void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
c4b1fcc0 FB |
528 | void bdrv_info(void); |
529 | BlockDriverState *bdrv_find(const char *name); | |
82c643ff | 530 | void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
ea2384d3 FB |
531 | int bdrv_is_encrypted(BlockDriverState *bs); |
532 | int bdrv_set_key(BlockDriverState *bs, const char *key); | |
533 | void bdrv_iterate_format(void (*it)(void *opaque, const char *name), | |
534 | void *opaque); | |
535 | const char *bdrv_get_device_name(BlockDriverState *bs); | |
c4b1fcc0 | 536 | |
ea2384d3 FB |
537 | int qcow_get_cluster_size(BlockDriverState *bs); |
538 | int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num, | |
539 | const uint8_t *buf); | |
540 | ||
541 | #ifndef QEMU_TOOL | |
54fa5af5 FB |
542 | |
543 | typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, | |
544 | int boot_device, | |
545 | DisplayState *ds, const char **fd_filename, int snapshot, | |
546 | const char *kernel_filename, const char *kernel_cmdline, | |
547 | const char *initrd_filename); | |
548 | ||
549 | typedef struct QEMUMachine { | |
550 | const char *name; | |
551 | const char *desc; | |
552 | QEMUMachineInitFunc *init; | |
553 | struct QEMUMachine *next; | |
554 | } QEMUMachine; | |
555 | ||
556 | int qemu_register_machine(QEMUMachine *m); | |
557 | ||
558 | typedef void SetIRQFunc(void *opaque, int irq_num, int level); | |
3de388f6 | 559 | typedef void IRQRequestFunc(void *opaque, int level); |
54fa5af5 | 560 | |
26aa7d72 FB |
561 | /* ISA bus */ |
562 | ||
563 | extern target_phys_addr_t isa_mem_base; | |
564 | ||
565 | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | |
566 | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); | |
567 | ||
568 | int register_ioport_read(int start, int length, int size, | |
569 | IOPortReadFunc *func, void *opaque); | |
570 | int register_ioport_write(int start, int length, int size, | |
571 | IOPortWriteFunc *func, void *opaque); | |
69b91039 FB |
572 | void isa_unassign_ioport(int start, int length); |
573 | ||
574 | /* PCI bus */ | |
575 | ||
69b91039 FB |
576 | extern target_phys_addr_t pci_mem_base; |
577 | ||
46e50e9d | 578 | typedef struct PCIBus PCIBus; |
69b91039 FB |
579 | typedef struct PCIDevice PCIDevice; |
580 | ||
581 | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, | |
582 | uint32_t address, uint32_t data, int len); | |
583 | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, | |
584 | uint32_t address, int len); | |
585 | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, | |
586 | uint32_t addr, uint32_t size, int type); | |
587 | ||
588 | #define PCI_ADDRESS_SPACE_MEM 0x00 | |
589 | #define PCI_ADDRESS_SPACE_IO 0x01 | |
590 | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 | |
591 | ||
592 | typedef struct PCIIORegion { | |
5768f5ac | 593 | uint32_t addr; /* current PCI mapping address. -1 means not mapped */ |
69b91039 FB |
594 | uint32_t size; |
595 | uint8_t type; | |
596 | PCIMapIORegionFunc *map_func; | |
597 | } PCIIORegion; | |
598 | ||
8a8696a3 FB |
599 | #define PCI_ROM_SLOT 6 |
600 | #define PCI_NUM_REGIONS 7 | |
502a5395 PB |
601 | |
602 | #define PCI_DEVICES_MAX 64 | |
603 | ||
604 | #define PCI_VENDOR_ID 0x00 /* 16 bits */ | |
605 | #define PCI_DEVICE_ID 0x02 /* 16 bits */ | |
606 | #define PCI_COMMAND 0x04 /* 16 bits */ | |
607 | #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ | |
608 | #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ | |
609 | #define PCI_CLASS_DEVICE 0x0a /* Device class */ | |
610 | #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ | |
611 | #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ | |
612 | #define PCI_MIN_GNT 0x3e /* 8 bits */ | |
613 | #define PCI_MAX_LAT 0x3f /* 8 bits */ | |
614 | ||
69b91039 FB |
615 | struct PCIDevice { |
616 | /* PCI config space */ | |
617 | uint8_t config[256]; | |
618 | ||
619 | /* the following fields are read only */ | |
46e50e9d | 620 | PCIBus *bus; |
69b91039 FB |
621 | int devfn; |
622 | char name[64]; | |
8a8696a3 | 623 | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
69b91039 FB |
624 | |
625 | /* do not access the following fields */ | |
626 | PCIConfigReadFunc *config_read; | |
627 | PCIConfigWriteFunc *config_write; | |
502a5395 | 628 | /* ??? This is a PC-specific hack, and should be removed. */ |
5768f5ac | 629 | int irq_index; |
69b91039 FB |
630 | }; |
631 | ||
46e50e9d FB |
632 | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
633 | int instance_size, int devfn, | |
69b91039 FB |
634 | PCIConfigReadFunc *config_read, |
635 | PCIConfigWriteFunc *config_write); | |
636 | ||
637 | void pci_register_io_region(PCIDevice *pci_dev, int region_num, | |
638 | uint32_t size, int type, | |
639 | PCIMapIORegionFunc *map_func); | |
640 | ||
5768f5ac FB |
641 | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
642 | ||
643 | uint32_t pci_default_read_config(PCIDevice *d, | |
644 | uint32_t address, int len); | |
645 | void pci_default_write_config(PCIDevice *d, | |
646 | uint32_t address, uint32_t val, int len); | |
30ca2aab FB |
647 | void generic_pci_save(QEMUFile* f, void *opaque); |
648 | int generic_pci_load(QEMUFile* f, void *opaque, int version_id); | |
5768f5ac | 649 | |
502a5395 PB |
650 | typedef void (*pci_set_irq_fn)(PCIDevice *pci_dev, void *pic, |
651 | int irq_num, int level); | |
652 | PCIBus *pci_register_bus(pci_set_irq_fn set_irq, void *pic, int devfn_min); | |
653 | ||
654 | void pci_nic_init(PCIBus *bus, NICInfo *nd); | |
655 | void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); | |
656 | uint32_t pci_data_read(void *opaque, uint32_t addr, int len); | |
657 | int pci_bus_num(PCIBus *s); | |
658 | void pci_for_each_device(void (*fn)(PCIDevice *d)); | |
9995c51f | 659 | |
5768f5ac | 660 | void pci_info(void); |
26aa7d72 | 661 | |
502a5395 | 662 | /* prep_pci.c */ |
46e50e9d | 663 | PCIBus *pci_prep_init(void); |
77d4bc34 | 664 | |
502a5395 PB |
665 | /* grackle_pci.c */ |
666 | PCIBus *pci_grackle_init(uint32_t base, void *pic); | |
667 | ||
668 | /* unin_pci.c */ | |
669 | PCIBus *pci_pmac_init(void *pic); | |
670 | ||
671 | /* apb_pci.c */ | |
672 | PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base, | |
673 | void *pic); | |
674 | ||
675 | PCIBus *pci_vpb_init(void *pic); | |
676 | ||
677 | /* piix_pci.c */ | |
678 | PCIBus *i440fx_init(void); | |
679 | int piix3_init(PCIBus *bus); | |
680 | void pci_bios_init(void); | |
a41b2ff2 | 681 | |
28b9b5af FB |
682 | /* openpic.c */ |
683 | typedef struct openpic_t openpic_t; | |
54fa5af5 | 684 | void openpic_set_irq(void *opaque, int n_IRQ, int level); |
7668a27f FB |
685 | openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, |
686 | CPUState **envp); | |
28b9b5af | 687 | |
54fa5af5 FB |
688 | /* heathrow_pic.c */ |
689 | typedef struct HeathrowPICS HeathrowPICS; | |
690 | void heathrow_pic_set_irq(void *opaque, int num, int level); | |
691 | HeathrowPICS *heathrow_pic_init(int *pmem_index); | |
692 | ||
6a36d84e FB |
693 | #ifdef HAS_AUDIO |
694 | struct soundhw { | |
695 | const char *name; | |
696 | const char *descr; | |
697 | int enabled; | |
698 | int isa; | |
699 | union { | |
700 | int (*init_isa) (AudioState *s); | |
701 | int (*init_pci) (PCIBus *bus, AudioState *s); | |
702 | } init; | |
703 | }; | |
704 | ||
705 | extern struct soundhw soundhw[]; | |
706 | #endif | |
707 | ||
313aa567 FB |
708 | /* vga.c */ |
709 | ||
74a14f22 | 710 | #define VGA_RAM_SIZE (8192 * 1024) |
313aa567 | 711 | |
82c643ff | 712 | struct DisplayState { |
313aa567 FB |
713 | uint8_t *data; |
714 | int linesize; | |
715 | int depth; | |
d3079cd2 | 716 | int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */ |
82c643ff FB |
717 | int width; |
718 | int height; | |
24236869 FB |
719 | void *opaque; |
720 | ||
313aa567 FB |
721 | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
722 | void (*dpy_resize)(struct DisplayState *s, int w, int h); | |
723 | void (*dpy_refresh)(struct DisplayState *s); | |
24236869 | 724 | void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h); |
82c643ff | 725 | }; |
313aa567 FB |
726 | |
727 | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) | |
728 | { | |
729 | s->dpy_update(s, x, y, w, h); | |
730 | } | |
731 | ||
732 | static inline void dpy_resize(DisplayState *s, int w, int h) | |
733 | { | |
734 | s->dpy_resize(s, w, h); | |
735 | } | |
736 | ||
46e50e9d | 737 | int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
d5295253 FB |
738 | unsigned long vga_ram_offset, int vga_ram_size, |
739 | unsigned long vga_bios_offset, int vga_bios_size); | |
313aa567 | 740 | |
d6bfa22f | 741 | /* cirrus_vga.c */ |
46e50e9d | 742 | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
d6bfa22f | 743 | unsigned long vga_ram_offset, int vga_ram_size); |
d6bfa22f FB |
744 | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, |
745 | unsigned long vga_ram_offset, int vga_ram_size); | |
746 | ||
313aa567 | 747 | /* sdl.c */ |
d63d307f | 748 | void sdl_display_init(DisplayState *ds, int full_screen); |
313aa567 | 749 | |
da4dbf74 FB |
750 | /* cocoa.m */ |
751 | void cocoa_display_init(DisplayState *ds, int full_screen); | |
752 | ||
24236869 FB |
753 | /* vnc.c */ |
754 | void vnc_display_init(DisplayState *ds, int display); | |
755 | ||
5391d806 FB |
756 | /* ide.c */ |
757 | #define MAX_DISKS 4 | |
758 | ||
759 | extern BlockDriverState *bs_table[MAX_DISKS]; | |
760 | ||
69b91039 FB |
761 | void isa_ide_init(int iobase, int iobase2, int irq, |
762 | BlockDriverState *hd0, BlockDriverState *hd1); | |
54fa5af5 FB |
763 | void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, |
764 | int secondary_ide_enabled); | |
502a5395 | 765 | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn); |
28b9b5af | 766 | int pmac_ide_init (BlockDriverState **hd_table, |
54fa5af5 | 767 | SetIRQFunc *set_irq, void *irq_opaque, int irq); |
5391d806 | 768 | |
2e5d83bb PB |
769 | /* cdrom.c */ |
770 | int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track); | |
771 | int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num); | |
772 | ||
1d14ffa9 | 773 | /* es1370.c */ |
c0fe3827 | 774 | int es1370_init (PCIBus *bus, AudioState *s); |
1d14ffa9 | 775 | |
fb065187 | 776 | /* sb16.c */ |
c0fe3827 | 777 | int SB16_init (AudioState *s); |
fb065187 FB |
778 | |
779 | /* adlib.c */ | |
c0fe3827 | 780 | int Adlib_init (AudioState *s); |
fb065187 FB |
781 | |
782 | /* gus.c */ | |
c0fe3827 | 783 | int GUS_init (AudioState *s); |
27503323 FB |
784 | |
785 | /* dma.c */ | |
85571bc7 | 786 | typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
27503323 | 787 | int DMA_get_channel_mode (int nchan); |
85571bc7 FB |
788 | int DMA_read_memory (int nchan, void *buf, int pos, int size); |
789 | int DMA_write_memory (int nchan, void *buf, int pos, int size); | |
27503323 FB |
790 | void DMA_hold_DREQ (int nchan); |
791 | void DMA_release_DREQ (int nchan); | |
16f62432 | 792 | void DMA_schedule(int nchan); |
27503323 | 793 | void DMA_run (void); |
28b9b5af | 794 | void DMA_init (int high_page_enable); |
27503323 | 795 | void DMA_register_channel (int nchan, |
85571bc7 FB |
796 | DMA_transfer_handler transfer_handler, |
797 | void *opaque); | |
7138fcfb FB |
798 | /* fdc.c */ |
799 | #define MAX_FD 2 | |
800 | extern BlockDriverState *fd_table[MAX_FD]; | |
801 | ||
baca51fa FB |
802 | typedef struct fdctrl_t fdctrl_t; |
803 | ||
804 | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, | |
805 | uint32_t io_base, | |
806 | BlockDriverState **fds); | |
807 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); | |
7138fcfb | 808 | |
80cabfad FB |
809 | /* ne2000.c */ |
810 | ||
7c9d8e07 FB |
811 | void isa_ne2000_init(int base, int irq, NICInfo *nd); |
812 | void pci_ne2000_init(PCIBus *bus, NICInfo *nd); | |
80cabfad | 813 | |
a41b2ff2 PB |
814 | /* rtl8139.c */ |
815 | ||
816 | void pci_rtl8139_init(PCIBus *bus, NICInfo *nd); | |
817 | ||
80cabfad FB |
818 | /* pckbd.c */ |
819 | ||
80cabfad FB |
820 | void kbd_init(void); |
821 | ||
822 | /* mc146818rtc.c */ | |
823 | ||
8a7ddc38 | 824 | typedef struct RTCState RTCState; |
80cabfad | 825 | |
8a7ddc38 FB |
826 | RTCState *rtc_init(int base, int irq); |
827 | void rtc_set_memory(RTCState *s, int addr, int val); | |
828 | void rtc_set_date(RTCState *s, const struct tm *tm); | |
80cabfad FB |
829 | |
830 | /* serial.c */ | |
831 | ||
c4b1fcc0 | 832 | typedef struct SerialState SerialState; |
e5d13e2f FB |
833 | SerialState *serial_init(SetIRQFunc *set_irq, void *opaque, |
834 | int base, int irq, CharDriverState *chr); | |
835 | SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque, | |
836 | target_ulong base, int it_shift, | |
837 | int irq, CharDriverState *chr); | |
80cabfad | 838 | |
6508fe59 FB |
839 | /* parallel.c */ |
840 | ||
841 | typedef struct ParallelState ParallelState; | |
842 | ParallelState *parallel_init(int base, int irq, CharDriverState *chr); | |
843 | ||
80cabfad FB |
844 | /* i8259.c */ |
845 | ||
3de388f6 FB |
846 | typedef struct PicState2 PicState2; |
847 | extern PicState2 *isa_pic; | |
80cabfad | 848 | void pic_set_irq(int irq, int level); |
54fa5af5 | 849 | void pic_set_irq_new(void *opaque, int irq, int level); |
3de388f6 | 850 | PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque); |
d592d303 FB |
851 | void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func, |
852 | void *alt_irq_opaque); | |
3de388f6 FB |
853 | int pic_read_irq(PicState2 *s); |
854 | void pic_update_irq(PicState2 *s); | |
855 | uint32_t pic_intack_read(PicState2 *s); | |
c20709aa | 856 | void pic_info(void); |
4a0fb71e | 857 | void irq_info(void); |
80cabfad | 858 | |
c27004ec | 859 | /* APIC */ |
d592d303 FB |
860 | typedef struct IOAPICState IOAPICState; |
861 | ||
c27004ec FB |
862 | int apic_init(CPUState *env); |
863 | int apic_get_interrupt(CPUState *env); | |
d592d303 FB |
864 | IOAPICState *ioapic_init(void); |
865 | void ioapic_set_irq(void *opaque, int vector, int level); | |
c27004ec | 866 | |
80cabfad FB |
867 | /* i8254.c */ |
868 | ||
869 | #define PIT_FREQ 1193182 | |
870 | ||
ec844b96 FB |
871 | typedef struct PITState PITState; |
872 | ||
873 | PITState *pit_init(int base, int irq); | |
874 | void pit_set_gate(PITState *pit, int channel, int val); | |
875 | int pit_get_gate(PITState *pit, int channel); | |
fd06c375 FB |
876 | int pit_get_initial_count(PITState *pit, int channel); |
877 | int pit_get_mode(PITState *pit, int channel); | |
ec844b96 | 878 | int pit_get_out(PITState *pit, int channel, int64_t current_time); |
80cabfad | 879 | |
fd06c375 FB |
880 | /* pcspk.c */ |
881 | void pcspk_init(PITState *); | |
882 | int pcspk_audio_init(AudioState *); | |
883 | ||
6515b203 FB |
884 | /* acpi.c */ |
885 | extern int acpi_enabled; | |
502a5395 | 886 | void piix4_pm_init(PCIBus *bus, int devfn); |
6515b203 FB |
887 | void acpi_bios_init(void); |
888 | ||
80cabfad | 889 | /* pc.c */ |
54fa5af5 | 890 | extern QEMUMachine pc_machine; |
3dbbdc25 | 891 | extern QEMUMachine isapc_machine; |
80cabfad | 892 | |
6a00d601 FB |
893 | void ioport_set_a20(int enable); |
894 | int ioport_get_a20(void); | |
895 | ||
26aa7d72 | 896 | /* ppc.c */ |
54fa5af5 FB |
897 | extern QEMUMachine prep_machine; |
898 | extern QEMUMachine core99_machine; | |
899 | extern QEMUMachine heathrow_machine; | |
900 | ||
6af0bf9c FB |
901 | /* mips_r4k.c */ |
902 | extern QEMUMachine mips_machine; | |
903 | ||
27c7ca7e FB |
904 | /* shix.c */ |
905 | extern QEMUMachine shix_machine; | |
906 | ||
8cc43fef FB |
907 | #ifdef TARGET_PPC |
908 | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); | |
909 | #endif | |
64201201 | 910 | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
77d4bc34 FB |
911 | |
912 | extern CPUWriteMemoryFunc *PPC_io_write[]; | |
913 | extern CPUReadMemoryFunc *PPC_io_read[]; | |
54fa5af5 | 914 | void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
26aa7d72 | 915 | |
e95c8d51 | 916 | /* sun4m.c */ |
54fa5af5 | 917 | extern QEMUMachine sun4m_machine; |
e80cfcfc | 918 | uint32_t iommu_translate(uint32_t addr); |
ba3c64fb | 919 | void pic_set_irq_cpu(int irq, int level, unsigned int cpu); |
e95c8d51 FB |
920 | |
921 | /* iommu.c */ | |
e80cfcfc FB |
922 | void *iommu_init(uint32_t addr); |
923 | uint32_t iommu_translate_local(void *opaque, uint32_t addr); | |
e95c8d51 FB |
924 | |
925 | /* lance.c */ | |
7c9d8e07 | 926 | void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr); |
e95c8d51 FB |
927 | |
928 | /* tcx.c */ | |
95219897 | 929 | void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base, |
6f7e9aec | 930 | unsigned long vram_offset, int vram_size, int width, int height); |
e80cfcfc FB |
931 | |
932 | /* slavio_intctl.c */ | |
933 | void *slavio_intctl_init(); | |
ba3c64fb | 934 | void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env); |
e80cfcfc FB |
935 | void slavio_pic_info(void *opaque); |
936 | void slavio_irq_info(void *opaque); | |
937 | void slavio_pic_set_irq(void *opaque, int irq, int level); | |
ba3c64fb | 938 | void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); |
e95c8d51 | 939 | |
5fe141fd FB |
940 | /* loader.c */ |
941 | int get_image_size(const char *filename); | |
942 | int load_image(const char *filename, uint8_t *addr); | |
9ee3c029 | 943 | int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry); |
e80cfcfc FB |
944 | int load_aout(const char *filename, uint8_t *addr); |
945 | ||
946 | /* slavio_timer.c */ | |
ba3c64fb | 947 | void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu); |
8d5f07fa | 948 | |
e80cfcfc FB |
949 | /* slavio_serial.c */ |
950 | SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); | |
951 | void slavio_serial_ms_kbd_init(int base, int irq); | |
e95c8d51 | 952 | |
3475187d FB |
953 | /* slavio_misc.c */ |
954 | void *slavio_misc_init(uint32_t base, int irq); | |
955 | void slavio_set_power_fail(void *opaque, int power_failing); | |
956 | ||
6f7e9aec FB |
957 | /* esp.c */ |
958 | void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr); | |
959 | ||
3475187d FB |
960 | /* sun4u.c */ |
961 | extern QEMUMachine sun4u_machine; | |
962 | ||
64201201 FB |
963 | /* NVRAM helpers */ |
964 | #include "hw/m48t59.h" | |
965 | ||
966 | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value); | |
967 | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); | |
968 | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value); | |
969 | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); | |
970 | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value); | |
971 | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); | |
972 | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, | |
973 | const unsigned char *str, uint32_t max); | |
974 | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); | |
975 | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr, | |
976 | uint32_t start, uint32_t count); | |
977 | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, | |
978 | const unsigned char *arch, | |
979 | uint32_t RAM_size, int boot_device, | |
980 | uint32_t kernel_image, uint32_t kernel_size, | |
28b9b5af | 981 | const char *cmdline, |
64201201 | 982 | uint32_t initrd_image, uint32_t initrd_size, |
28b9b5af FB |
983 | uint32_t NVRAM_image, |
984 | int width, int height, int depth); | |
64201201 | 985 | |
63066f4f FB |
986 | /* adb.c */ |
987 | ||
988 | #define MAX_ADB_DEVICES 16 | |
989 | ||
e2733d20 | 990 | #define ADB_MAX_OUT_LEN 16 |
63066f4f | 991 | |
e2733d20 | 992 | typedef struct ADBDevice ADBDevice; |
63066f4f | 993 | |
e2733d20 FB |
994 | /* buf = NULL means polling */ |
995 | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, | |
996 | const uint8_t *buf, int len); | |
12c28fed FB |
997 | typedef int ADBDeviceReset(ADBDevice *d); |
998 | ||
63066f4f FB |
999 | struct ADBDevice { |
1000 | struct ADBBusState *bus; | |
1001 | int devaddr; | |
1002 | int handler; | |
e2733d20 | 1003 | ADBDeviceRequest *devreq; |
12c28fed | 1004 | ADBDeviceReset *devreset; |
63066f4f FB |
1005 | void *opaque; |
1006 | }; | |
1007 | ||
1008 | typedef struct ADBBusState { | |
1009 | ADBDevice devices[MAX_ADB_DEVICES]; | |
1010 | int nb_devices; | |
e2733d20 | 1011 | int poll_index; |
63066f4f FB |
1012 | } ADBBusState; |
1013 | ||
e2733d20 FB |
1014 | int adb_request(ADBBusState *s, uint8_t *buf_out, |
1015 | const uint8_t *buf, int len); | |
1016 | int adb_poll(ADBBusState *s, uint8_t *buf_out); | |
63066f4f FB |
1017 | |
1018 | ADBDevice *adb_register_device(ADBBusState *s, int devaddr, | |
e2733d20 | 1019 | ADBDeviceRequest *devreq, |
12c28fed | 1020 | ADBDeviceReset *devreset, |
63066f4f FB |
1021 | void *opaque); |
1022 | void adb_kbd_init(ADBBusState *bus); | |
1023 | void adb_mouse_init(ADBBusState *bus); | |
1024 | ||
1025 | /* cuda.c */ | |
1026 | ||
1027 | extern ADBBusState adb_bus; | |
54fa5af5 | 1028 | int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); |
63066f4f | 1029 | |
bb36d470 FB |
1030 | #include "hw/usb.h" |
1031 | ||
a594cfbf FB |
1032 | /* usb ports of the VM */ |
1033 | ||
0d92ed30 PB |
1034 | void qemu_register_usb_port(USBPort *port, void *opaque, int index, |
1035 | usb_attachfn attach); | |
a594cfbf | 1036 | |
0d92ed30 | 1037 | #define VM_USB_HUB_SIZE 8 |
a594cfbf FB |
1038 | |
1039 | void do_usb_add(const char *devname); | |
1040 | void do_usb_del(const char *devname); | |
1041 | void usb_info(void); | |
1042 | ||
2e5d83bb PB |
1043 | /* scsi-disk.c */ |
1044 | typedef struct SCSIDevice SCSIDevice; | |
1045 | typedef void (*scsi_completionfn)(void *, uint32_t, int); | |
1046 | ||
1047 | SCSIDevice *scsi_disk_init(BlockDriverState *bdrv, | |
1048 | scsi_completionfn completion, | |
1049 | void *opaque); | |
1050 | void scsi_disk_destroy(SCSIDevice *s); | |
1051 | ||
0fc5c15a | 1052 | int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun); |
2e5d83bb PB |
1053 | int scsi_read_data(SCSIDevice *s, uint8_t *data, uint32_t len); |
1054 | int scsi_write_data(SCSIDevice *s, uint8_t *data, uint32_t len); | |
1055 | ||
7d8406be PB |
1056 | /* lsi53c895a.c */ |
1057 | void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id); | |
1058 | void *lsi_scsi_init(PCIBus *bus, int devfn); | |
1059 | ||
b5ff1b31 | 1060 | /* integratorcp.c */ |
40f137e1 PB |
1061 | extern QEMUMachine integratorcp926_machine; |
1062 | extern QEMUMachine integratorcp1026_machine; | |
b5ff1b31 | 1063 | |
cdbdb648 PB |
1064 | /* versatilepb.c */ |
1065 | extern QEMUMachine versatilepb_machine; | |
16406950 | 1066 | extern QEMUMachine versatileab_machine; |
cdbdb648 | 1067 | |
daa57963 FB |
1068 | /* ps2.c */ |
1069 | void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); | |
1070 | void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); | |
1071 | void ps2_write_mouse(void *, int val); | |
1072 | void ps2_write_keyboard(void *, int val); | |
1073 | uint32_t ps2_read_data(void *); | |
1074 | void ps2_queue(void *, int b); | |
f94f5d71 | 1075 | void ps2_keyboard_set_translation(void *opaque, int mode); |
daa57963 | 1076 | |
80337b66 FB |
1077 | /* smc91c111.c */ |
1078 | void smc91c111_init(NICInfo *, uint32_t, void *, int); | |
1079 | ||
bdd5003a | 1080 | /* pl110.c */ |
95219897 | 1081 | void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int); |
bdd5003a | 1082 | |
cdbdb648 PB |
1083 | /* pl011.c */ |
1084 | void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr); | |
1085 | ||
1086 | /* pl050.c */ | |
1087 | void pl050_init(uint32_t base, void *pic, int irq, int is_mouse); | |
1088 | ||
1089 | /* pl080.c */ | |
1090 | void *pl080_init(uint32_t base, void *pic, int irq); | |
1091 | ||
1092 | /* pl190.c */ | |
1093 | void *pl190_init(uint32_t base, void *parent, int irq, int fiq); | |
1094 | ||
1095 | /* arm-timer.c */ | |
1096 | void sp804_init(uint32_t base, void *pic, int irq); | |
1097 | void icp_pit_init(uint32_t base, void *pic, int irq); | |
1098 | ||
16406950 PB |
1099 | /* arm_boot.c */ |
1100 | ||
1101 | void arm_load_kernel(int ram_size, const char *kernel_filename, | |
1102 | const char *kernel_cmdline, const char *initrd_filename, | |
1103 | int board_id); | |
1104 | ||
27c7ca7e FB |
1105 | /* sh7750.c */ |
1106 | struct SH7750State; | |
1107 | ||
008a8818 | 1108 | struct SH7750State *sh7750_init(CPUState * cpu); |
27c7ca7e FB |
1109 | |
1110 | typedef struct { | |
1111 | /* The callback will be triggered if any of the designated lines change */ | |
1112 | uint16_t portamask_trigger; | |
1113 | uint16_t portbmask_trigger; | |
1114 | /* Return 0 if no action was taken */ | |
1115 | int (*port_change_cb) (uint16_t porta, uint16_t portb, | |
1116 | uint16_t * periph_pdtra, | |
1117 | uint16_t * periph_portdira, | |
1118 | uint16_t * periph_pdtrb, | |
1119 | uint16_t * periph_portdirb); | |
1120 | } sh7750_io_device; | |
1121 | ||
1122 | int sh7750_register_io_device(struct SH7750State *s, | |
1123 | sh7750_io_device * device); | |
1124 | /* tc58128.c */ | |
1125 | int tc58128_init(struct SH7750State *s, char *zone1, char *zone2); | |
1126 | ||
ea2384d3 FB |
1127 | #endif /* defined(QEMU_TOOL) */ |
1128 | ||
c4b1fcc0 | 1129 | /* monitor.c */ |
82c643ff | 1130 | void monitor_init(CharDriverState *hd, int show_banner); |
ea2384d3 FB |
1131 | void term_puts(const char *str); |
1132 | void term_vprintf(const char *fmt, va_list ap); | |
40c3bac3 | 1133 | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
c4b1fcc0 FB |
1134 | void term_flush(void); |
1135 | void term_print_help(void); | |
ea2384d3 FB |
1136 | void monitor_readline(const char *prompt, int is_password, |
1137 | char *buf, int buf_size); | |
1138 | ||
1139 | /* readline.c */ | |
1140 | typedef void ReadLineFunc(void *opaque, const char *str); | |
1141 | ||
1142 | extern int completion_index; | |
1143 | void add_completion(const char *str); | |
1144 | void readline_handle_byte(int ch); | |
1145 | void readline_find_completion(const char *cmdline); | |
1146 | const char *readline_get_history(unsigned int index); | |
1147 | void readline_start(const char *prompt, int is_password, | |
1148 | ReadLineFunc *readline_func, void *opaque); | |
c4b1fcc0 | 1149 | |
5e6ad6f9 FB |
1150 | void kqemu_record_dump(void); |
1151 | ||
fc01f7e7 | 1152 | #endif /* VL_H */ |