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47d05a86 MF |
1 | /* |
2 | * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. | |
3 | * All rights reserved. | |
4 | * | |
5 | * Redistribution and use in source and binary forms, with or without | |
6 | * modification, are permitted provided that the following conditions are met: | |
7 | * * Redistributions of source code must retain the above copyright | |
8 | * notice, this list of conditions and the following disclaimer. | |
9 | * * Redistributions in binary form must reproduce the above copyright | |
10 | * notice, this list of conditions and the following disclaimer in the | |
11 | * documentation and/or other materials provided with the distribution. | |
12 | * * Neither the name of the Open Source and Linux Lab nor the | |
13 | * names of its contributors may be used to endorse or promote products | |
14 | * derived from this software without specific prior written permission. | |
15 | * | |
16 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
17 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY | |
20 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | |
21 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | |
23 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
24 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | |
25 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
26 | */ | |
27 | ||
9c17d615 | 28 | #include "sysemu/sysemu.h" |
83c9f4ca PB |
29 | #include "hw/boards.h" |
30 | #include "hw/loader.h" | |
47d05a86 | 31 | #include "elf.h" |
022c62cb PB |
32 | #include "exec/memory.h" |
33 | #include "exec/address-spaces.h" | |
8488ab02 | 34 | #include "qemu/error-report.h" |
47d05a86 | 35 | |
00b941e5 | 36 | static uint64_t translate_phys_addr(void *opaque, uint64_t addr) |
47d05a86 | 37 | { |
00b941e5 AF |
38 | XtensaCPU *cpu = opaque; |
39 | ||
40 | return cpu_get_phys_page_debug(CPU(cpu), addr); | |
47d05a86 MF |
41 | } |
42 | ||
11e7bfd7 | 43 | static void sim_reset(void *opaque) |
47d05a86 | 44 | { |
11e7bfd7 AF |
45 | XtensaCPU *cpu = opaque; |
46 | ||
47 | cpu_reset(CPU(cpu)); | |
47d05a86 MF |
48 | } |
49 | ||
3ef96221 | 50 | static void xtensa_sim_init(MachineState *machine) |
47d05a86 | 51 | { |
06d26274 | 52 | XtensaCPU *cpu = NULL; |
5bfcb36e | 53 | CPUXtensaState *env = NULL; |
47d05a86 | 54 | MemoryRegion *ram, *rom; |
3ef96221 MA |
55 | ram_addr_t ram_size = machine->ram_size; |
56 | const char *cpu_model = machine->cpu_model; | |
57 | const char *kernel_filename = machine->kernel_filename; | |
47d05a86 MF |
58 | int n; |
59 | ||
50cd7214 MF |
60 | if (!cpu_model) { |
61 | cpu_model = XTENSA_DEFAULT_CPU_MODEL; | |
62 | } | |
63 | ||
47d05a86 | 64 | for (n = 0; n < smp_cpus; n++) { |
06d26274 AF |
65 | cpu = cpu_xtensa_init(cpu_model); |
66 | if (cpu == NULL) { | |
ebbb419a | 67 | error_report("unable to find CPU definition '%s'", |
8488ab02 MF |
68 | cpu_model); |
69 | exit(EXIT_FAILURE); | |
47d05a86 | 70 | } |
06d26274 AF |
71 | env = &cpu->env; |
72 | ||
47d05a86 | 73 | env->sregs[PRID] = n; |
11e7bfd7 | 74 | qemu_register_reset(sim_reset, cpu); |
47d05a86 MF |
75 | /* Need MMU initialized prior to ELF loading, |
76 | * so that ELF gets loaded into virtual addresses | |
77 | */ | |
11e7bfd7 | 78 | sim_reset(cpu); |
47d05a86 MF |
79 | } |
80 | ||
81 | ram = g_malloc(sizeof(*ram)); | |
49946538 | 82 | memory_region_init_ram(ram, NULL, "xtensa.sram", ram_size, &error_abort); |
c5705a77 | 83 | vmstate_register_ram_global(ram); |
47d05a86 MF |
84 | memory_region_add_subregion(get_system_memory(), 0, ram); |
85 | ||
86 | rom = g_malloc(sizeof(*rom)); | |
49946538 | 87 | memory_region_init_ram(rom, NULL, "xtensa.rom", 0x1000, &error_abort); |
c5705a77 | 88 | vmstate_register_ram_global(rom); |
47d05a86 MF |
89 | memory_region_add_subregion(get_system_memory(), 0xfe000000, rom); |
90 | ||
91 | if (kernel_filename) { | |
92 | uint64_t elf_entry; | |
93 | uint64_t elf_lowaddr; | |
94 | #ifdef TARGET_WORDS_BIGENDIAN | |
00b941e5 | 95 | int success = load_elf(kernel_filename, translate_phys_addr, cpu, |
47d05a86 MF |
96 | &elf_entry, &elf_lowaddr, NULL, 1, ELF_MACHINE, 0); |
97 | #else | |
00b941e5 | 98 | int success = load_elf(kernel_filename, translate_phys_addr, cpu, |
47d05a86 MF |
99 | &elf_entry, &elf_lowaddr, NULL, 0, ELF_MACHINE, 0); |
100 | #endif | |
101 | if (success > 0) { | |
102 | env->pc = elf_entry; | |
103 | } | |
104 | } | |
105 | } | |
106 | ||
5e408573 MF |
107 | static QEMUMachine xtensa_sim_machine = { |
108 | .name = "sim", | |
e38077ff | 109 | .desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")", |
82e5d464 | 110 | .is_default = true, |
5e408573 | 111 | .init = xtensa_sim_init, |
47d05a86 MF |
112 | .max_cpus = 4, |
113 | }; | |
114 | ||
5e408573 | 115 | static void xtensa_sim_machine_init(void) |
47d05a86 | 116 | { |
5e408573 | 117 | qemu_register_machine(&xtensa_sim_machine); |
47d05a86 MF |
118 | } |
119 | ||
5e408573 | 120 | machine_init(xtensa_sim_machine_init); |