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20599463 MT |
1 | #ifndef QEMU_PCI_BUS_H |
2 | #define QEMU_PCI_BUS_H | |
cfb0a50a IY |
3 | |
4 | /* | |
952deab6 | 5 | * PCI Bus and Bridge datastructures. |
68f79994 | 6 | * |
952deab6 MT |
7 | * Do not access the following members directly; |
8 | * use accessor functions in pci.h, pci_bridge.h | |
cfb0a50a IY |
9 | */ |
10 | ||
0d936928 AL |
11 | #define TYPE_PCI_BUS "PCI" |
12 | #define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS) | |
cfb0a50a IY |
13 | |
14 | struct PCIBus { | |
15 | BusState qbus; | |
5fa45de5 DG |
16 | PCIDMAContextFunc dma_context_fn; |
17 | void *dma_context_opaque; | |
6f3279b5 | 18 | uint8_t devfn_min; |
cfb0a50a IY |
19 | pci_set_irq_fn set_irq; |
20 | pci_map_irq_fn map_irq; | |
3afa9bb4 | 21 | pci_route_irq_fn route_intx_to_irq; |
cfb0a50a IY |
22 | pci_hotplug_fn hotplug; |
23 | DeviceState *hotplug_qdev; | |
24 | void *irq_opaque; | |
90a20dbb | 25 | PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX]; |
cfb0a50a | 26 | PCIDevice *parent_dev; |
5968eca3 AK |
27 | MemoryRegion *address_space_mem; |
28 | MemoryRegion *address_space_io; | |
cfb0a50a IY |
29 | |
30 | QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */ | |
31 | QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */ | |
32 | ||
33 | /* The bus IRQ state is the logical OR of the connected devices. | |
34 | Keep a count of the number of devices with raised IRQs. */ | |
35 | int nirq; | |
36 | int *irq_count; | |
37 | }; | |
38 | ||
b308c82c AK |
39 | typedef struct PCIBridgeWindows PCIBridgeWindows; |
40 | ||
41 | /* | |
42 | * Aliases for each of the address space windows that the bridge | |
43 | * can forward. Mapped into the bridge's parent's address space, | |
44 | * as subregions. | |
45 | */ | |
46 | struct PCIBridgeWindows { | |
47 | MemoryRegion alias_pref_mem; | |
48 | MemoryRegion alias_mem; | |
49 | MemoryRegion alias_io; | |
50 | }; | |
51 | ||
68f79994 | 52 | struct PCIBridge { |
cfb0a50a | 53 | PCIDevice dev; |
68f79994 IY |
54 | |
55 | /* private member */ | |
7e98e3af | 56 | PCIBus sec_bus; |
336411ca MT |
57 | /* |
58 | * Memory regions for the bridge's address spaces. These regions are not | |
59 | * directly added to system_memory/system_io or its descendants. | |
60 | * Bridge's secondary bus points to these, so that devices | |
61 | * under the bridge see these regions as its address spaces. | |
62 | * The regions are as large as the entire address space - | |
63 | * they don't take into account any windows. | |
64 | */ | |
65 | MemoryRegion address_space_mem; | |
66 | MemoryRegion address_space_io; | |
b308c82c AK |
67 | |
68 | PCIBridgeWindows *windows; | |
69 | ||
68f79994 IY |
70 | pci_map_irq_fn map_irq; |
71 | const char *bus_name; | |
72 | }; | |
cfb0a50a | 73 | |
20599463 | 74 | #endif /* QEMU_PCI_BUS_H */ |