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3cbee15b 1/*
4d7ca41e 2 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
3cbee15b
JM
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
87ecb68b
PB
25#include "hw.h"
26#include "ppc.h"
3cbee15b 27#include "ppc_mac.h"
28ce5ce6 28#include "mac_dbdma.h"
87ecb68b
PB
29#include "nvram.h"
30#include "pc.h"
31#include "sysemu.h"
32#include "net.h"
33#include "isa.h"
34#include "pci.h"
18e08a55 35#include "usb-ohci.h"
87ecb68b 36#include "boards.h"
271dd5e0 37#include "fw_cfg.h"
7fa9ae1a 38#include "escc.h"
977e1244 39#include "ide.h"
ca20cf32
BS
40#include "loader.h"
41#include "elf.h"
dc702288 42#include "kvm.h"
dc333cd6 43#include "kvm_ppc.h"
3cbee15b 44
e4bcb14c 45#define MAX_IDE_BUS 2
a748ab6d 46#define VGA_BIOS_SIZE 65536
271dd5e0
BS
47#define CFG_ADDR 0xf0000510
48
3cbee15b
JM
49/* temporary frame buffer OSI calls for the video.x driver. The right
50 solution is to modify the driver to use VGA PCI I/Os */
51/* XXX: to be removed. This is no way related to emulation */
52static int vga_osi_call (CPUState *env)
53{
54 static int vga_vbl_enabled;
55 int linesize;
56
b11ebf64
BS
57#if 0
58 printf("osi_call R5=%016" PRIx64 "\n", ppc_dump_gpr(env, 5));
59#endif
3cbee15b
JM
60
61 /* same handler as PearPC, coming from the original MOL video
62 driver. */
63 switch(env->gpr[5]) {
64 case 4:
65 break;
66 case 28: /* set_vmode */
67 if (env->gpr[6] != 1 || env->gpr[7] != 0)
68 env->gpr[3] = 1;
69 else
70 env->gpr[3] = 0;
71 break;
72 case 29: /* get_vmode_info */
73 if (env->gpr[6] != 0) {
74 if (env->gpr[6] != 1 || env->gpr[7] != 0) {
75 env->gpr[3] = 1;
76 break;
77 }
78 }
79 env->gpr[3] = 0;
80 env->gpr[4] = (1 << 16) | 1; /* num_vmodes, cur_vmode */
81 env->gpr[5] = (1 << 16) | 0; /* num_depths, cur_depth_mode */
82 env->gpr[6] = (graphic_width << 16) | graphic_height; /* w, h */
83 env->gpr[7] = 85 << 16; /* refresh rate */
84 env->gpr[8] = (graphic_depth + 7) & ~7; /* depth (round to byte) */
85 linesize = ((graphic_depth + 7) >> 3) * graphic_width;
86 linesize = (linesize + 3) & ~3;
87 env->gpr[9] = (linesize << 16) | 0; /* row_bytes, offset */
88 break;
89 case 31: /* set_video power */
90 env->gpr[3] = 0;
91 break;
92 case 39: /* video_ctrl */
93 if (env->gpr[6] == 0 || env->gpr[6] == 1)
94 vga_vbl_enabled = env->gpr[6];
95 env->gpr[3] = 0;
96 break;
97 case 47:
98 break;
99 case 59: /* set_color */
100 /* R6 = index, R7 = RGB */
101 env->gpr[3] = 0;
102 break;
103 case 64: /* get color */
104 /* R6 = index */
105 env->gpr[3] = 0;
106 break;
107 case 116: /* set hwcursor */
108 /* R6 = x, R7 = y, R8 = visible, R9 = data */
109 break;
110 default:
b11ebf64 111 fprintf(stderr, "unsupported OSI call R5=%016" PRIx64 "\n",
aae9366a 112 ppc_dump_gpr(env, 5));
3cbee15b
JM
113 break;
114 }
115
116 return 1; /* osi_call handled */
117}
118
513f789f
BS
119static int fw_cfg_boot_set(void *opaque, const char *boot_device)
120{
121 fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
122 return 0;
123}
124
c227f099 125static void ppc_heathrow_init (ram_addr_t ram_size,
3023f332 126 const char *boot_device,
3cbee15b
JM
127 const char *kernel_filename,
128 const char *kernel_cmdline,
129 const char *initrd_filename,
130 const char *cpu_model)
131{
aaed909a 132 CPUState *env = NULL, *envs[MAX_CPUS];
5cea8590 133 char *filename;
3cbee15b 134 qemu_irq *pic, **heathrow_irqs;
3cbee15b 135 int linux_boot, i;
c227f099 136 ram_addr_t ram_offset, bios_offset, vga_bios_offset;
7373048c
BS
137 uint32_t kernel_base, initrd_base;
138 int32_t kernel_size, initrd_size;
3cbee15b
JM
139 PCIBus *pci_bus;
140 MacIONVRAMState *nvr;
141 int vga_bios_size, bios_size;
3cbee15b 142 int pic_mem_index, nvram_mem_index, dbdma_mem_index, cuda_mem_index;
7fa9ae1a 143 int escc_mem_index, ide_mem_index[2];
513f789f 144 uint16_t ppc_boot_device;
f455e98c 145 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
271dd5e0 146 void *fw_cfg;
28ce5ce6 147 void *dbdma;
44654490 148 uint8_t *vga_bios_ptr;
3cbee15b
JM
149
150 linux_boot = (kernel_filename != NULL);
151
152 /* init CPUs */
3cbee15b 153 if (cpu_model == NULL)
f2fde45a 154 cpu_model = "G3";
3cbee15b 155 for (i = 0; i < smp_cpus; i++) {
aaed909a
FB
156 env = cpu_init(cpu_model);
157 if (!env) {
158 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
159 exit(1);
160 }
b0fb43d8
AJ
161 /* Set time-base frequency to 16.6 Mhz */
162 cpu_ppc_tb_init(env, 16600000UL);
3cbee15b 163 env->osi_call = vga_osi_call;
d84bda46 164 qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
3cbee15b
JM
165 envs[i] = env;
166 }
167
168 /* allocate RAM */
6b4079f8
AJ
169 if (ram_size > (2047 << 20)) {
170 fprintf(stderr,
171 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
172 ((unsigned int)ram_size / (1 << 20)));
173 exit(1);
174 }
175
a748ab6d
AJ
176 ram_offset = qemu_ram_alloc(ram_size);
177 cpu_register_physical_memory(0, ram_size, ram_offset);
178
3cbee15b 179 /* allocate and load BIOS */
a748ab6d 180 bios_offset = qemu_ram_alloc(BIOS_SIZE);
3cbee15b 181 if (bios_name == NULL)
992e5acd 182 bios_name = PROM_FILENAME;
5cea8590 183 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
992e5acd
BS
184 cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
185
186 /* Load OpenBIOS (ELF) */
5cea8590 187 if (filename) {
ca20cf32
BS
188 bios_size = load_elf(filename, 0, NULL, NULL, NULL,
189 1, ELF_MACHINE, 0);
5cea8590
PB
190 qemu_free(filename);
191 } else {
192 bios_size = -1;
193 }
3cbee15b 194 if (bios_size < 0 || bios_size > BIOS_SIZE) {
5cea8590 195 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
3cbee15b
JM
196 exit(1);
197 }
3cbee15b
JM
198
199 /* allocate and load VGA BIOS */
a748ab6d 200 vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
44654490 201 vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
5cea8590
PB
202 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
203 if (filename) {
204 vga_bios_size = load_image(filename, vga_bios_ptr + 8);
205 qemu_free(filename);
206 } else {
207 vga_bios_size = -1;
208 }
3cbee15b
JM
209 if (vga_bios_size < 0) {
210 /* if no bios is present, we can still work */
5cea8590
PB
211 fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
212 VGABIOS_FILENAME);
3cbee15b
JM
213 vga_bios_size = 0;
214 } else {
215 /* set a specific header (XXX: find real Apple format for NDRV
216 drivers) */
44654490
PB
217 vga_bios_ptr[0] = 'N';
218 vga_bios_ptr[1] = 'D';
219 vga_bios_ptr[2] = 'R';
220 vga_bios_ptr[3] = 'V';
221 cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
3cbee15b 222 vga_bios_size += 8;
a7b022e0
AG
223
224 /* Round to page boundary */
225 vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) &
226 TARGET_PAGE_MASK;
3cbee15b 227 }
3cbee15b
JM
228
229 if (linux_boot) {
36bee1e3 230 uint64_t lowaddr = 0;
ca20cf32
BS
231 int bswap_needed;
232
233#ifdef BSWAP_NEEDED
234 bswap_needed = 1;
235#else
236 bswap_needed = 0;
237#endif
3cbee15b 238 kernel_base = KERNEL_LOAD_ADDR;
36bee1e3
AJ
239 /* Now we can load the kernel. The first step tries to load the kernel
240 supposing PhysAddr = 0x00000000. If that was wrong the kernel is
241 loaded again, the new PhysAddr being computed from lowaddr. */
ca20cf32
BS
242 kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL,
243 1, ELF_MACHINE, 0);
36bee1e3
AJ
244 if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
245 kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
ca20cf32 246 NULL, NULL, NULL, 1, ELF_MACHINE, 0);
36bee1e3 247 }
52f163b7
BS
248 if (kernel_size < 0)
249 kernel_size = load_aout(kernel_filename, kernel_base,
ca20cf32
BS
250 ram_size - kernel_base, bswap_needed,
251 TARGET_PAGE_SIZE);
52f163b7
BS
252 if (kernel_size < 0)
253 kernel_size = load_image_targphys(kernel_filename,
254 kernel_base,
255 ram_size - kernel_base);
3cbee15b 256 if (kernel_size < 0) {
2ac71179 257 hw_error("qemu: could not load kernel '%s'\n",
3cbee15b
JM
258 kernel_filename);
259 exit(1);
260 }
261 /* load initrd */
262 if (initrd_filename) {
263 initrd_base = INITRD_LOAD_ADDR;
dcac9679
PB
264 initrd_size = load_image_targphys(initrd_filename, initrd_base,
265 ram_size - initrd_base);
3cbee15b 266 if (initrd_size < 0) {
2ac71179
PB
267 hw_error("qemu: could not load initial ram disk '%s'\n",
268 initrd_filename);
3cbee15b
JM
269 exit(1);
270 }
271 } else {
272 initrd_base = 0;
273 initrd_size = 0;
274 }
6ac0e82d 275 ppc_boot_device = 'm';
3cbee15b
JM
276 } else {
277 kernel_base = 0;
278 kernel_size = 0;
279 initrd_base = 0;
280 initrd_size = 0;
28c5af54 281 ppc_boot_device = '\0';
0d913fdb 282 for (i = 0; boot_device[i] != '\0'; i++) {
28c5af54 283 /* TOFIX: for now, the second IDE channel is not properly
0d913fdb 284 * used by OHW. The Mac floppy disk are not emulated.
28c5af54
JM
285 * For now, OHW cannot boot from the network.
286 */
287#if 0
0d913fdb
JM
288 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
289 ppc_boot_device = boot_device[i];
28c5af54 290 break;
0d913fdb 291 }
28c5af54 292#else
0d913fdb
JM
293 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
294 ppc_boot_device = boot_device[i];
28c5af54 295 break;
0d913fdb 296 }
28c5af54
JM
297#endif
298 }
299 if (ppc_boot_device == '\0') {
8a901def 300 fprintf(stderr, "No valid boot device for G3 Beige machine\n");
28c5af54
JM
301 exit(1);
302 }
3cbee15b
JM
303 }
304
305 isa_mem_base = 0x80000000;
aae9366a 306
3cbee15b
JM
307 /* Register 2 MB of ISA IO space */
308 isa_mmio_init(0xfe000000, 0x00200000);
309
310 /* XXX: we register only 1 output pin for heathrow PIC */
311 heathrow_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
312 heathrow_irqs[0] =
313 qemu_mallocz(smp_cpus * sizeof(qemu_irq) * 1);
314 /* Connect the heathrow PIC outputs to the 6xx bus */
315 for (i = 0; i < smp_cpus; i++) {
316 switch (PPC_INPUT(env)) {
317 case PPC_FLAGS_INPUT_6xx:
318 heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
319 heathrow_irqs[i][0] =
320 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
321 break;
322 default:
2ac71179 323 hw_error("Bus model not supported on OldWorld Mac machine\n");
3cbee15b
JM
324 }
325 }
326
327 /* init basic PC hardware */
328 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
2ac71179 329 hw_error("Only 6xx bus is supported on heathrow machine\n");
3cbee15b
JM
330 }
331 pic = heathrow_pic_init(&pic_mem_index, 1, heathrow_irqs);
332 pci_bus = pci_grackle_init(0xfec00000, pic);
fbe1b595 333 pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
aae9366a 334
aeeb69c7 335 escc_mem_index = escc_init(0x80013000, pic[0x0f], pic[0x10], serial_hds[0],
7fa9ae1a 336 serial_hds[1], ESCC_CLOCK, 4);
aae9366a 337
cb457d76 338 for(i = 0; i < nb_nics; i++)
07caea31 339 pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
0d913fdb 340
e4bcb14c
TS
341
342 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
343 fprintf(stderr, "qemu: too many IDE bus\n");
344 exit(1);
345 }
bd4524ed
AJ
346
347 /* First IDE channel is a MAC IDE on the MacIO bus */
f455e98c
GH
348 hd[0] = drive_get(IF_IDE, 0, 0);
349 hd[1] = drive_get(IF_IDE, 0, 1);
bd4524ed
AJ
350 dbdma = DBDMA_init(&dbdma_mem_index);
351 ide_mem_index[0] = -1;
352 ide_mem_index[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);
e4bcb14c 353
bd4524ed 354 /* Second IDE channel is a CMD646 on the PCI bus */
f455e98c
GH
355 hd[0] = drive_get(IF_IDE, 1, 0);
356 hd[1] = drive_get(IF_IDE, 1, 1);
bd4524ed
AJ
357 hd[3] = hd[2] = NULL;
358 pci_cmd646_ide_init(pci_bus, hd, 0);
3cbee15b
JM
359
360 /* cuda also initialize ADB */
361 cuda_init(&cuda_mem_index, pic[0x12]);
362
363 adb_kbd_init(&adb_bus);
364 adb_mouse_init(&adb_bus);
aae9366a 365
68af3f24 366 nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 4);
3cbee15b
JM
367 pmac_format_nvram_partition(nvr, 0x2000);
368
4ebcf884
BS
369 macio_init(pci_bus, PCI_DEVICE_ID_APPLE_343S1201, 1, pic_mem_index,
370 dbdma_mem_index, cuda_mem_index, nvr, 2, ide_mem_index,
371 escc_mem_index);
3cbee15b
JM
372
373 if (usb_enabled) {
5b19d9a2 374 usb_ohci_init_pci(pci_bus, -1);
3cbee15b
JM
375 }
376
377 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
378 graphic_depth = 15;
379
3cbee15b
JM
380 /* No PCI init: the BIOS will do it */
381
271dd5e0
BS
382 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
383 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
384 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
385 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
513f789f
BS
386 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
387 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
388 if (kernel_cmdline) {
389 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
3c178e72 390 pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
513f789f
BS
391 } else {
392 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
393 }
394 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
395 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
396 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
7f1aec5f
LV
397
398 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
399 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
400 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
401
dc333cd6
AG
402 if (kvm_enabled()) {
403#ifdef CONFIG_KVM
404 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
405#endif
406 } else {
407 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
408 }
409
513f789f 410 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
3cbee15b
JM
411}
412
f80f9ec9 413static QEMUMachine heathrow_machine = {
4d7ca41e 414 .name = "g3beige",
4b32e168
AL
415 .desc = "Heathrow based PowerMAC",
416 .init = ppc_heathrow_init,
3d878caa 417 .max_cpus = MAX_CPUS,
46214a27 418#ifndef TARGET_PPC64
0c257437 419 .is_default = 1,
46214a27 420#endif
3cbee15b 421};
f80f9ec9
AL
422
423static void heathrow_machine_init(void)
424{
425 qemu_register_machine(&heathrow_machine);
426}
427
428machine_init(heathrow_machine_init);
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