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Commit | Line | Data |
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87ecb68b PB |
1 | #ifndef HW_PC_H |
2 | #define HW_PC_H | |
376253ec AL |
3 | |
4 | #include "qemu-common.h" | |
022c62cb PB |
5 | #include "exec/memory.h" |
6 | #include "exec/ioport.h" | |
845773ab IY |
7 | #include "isa.h" |
8 | #include "fdc.h" | |
1422e32d | 9 | #include "net/net.h" |
022c62cb | 10 | #include "exec/memory.h" |
b881fbe9 | 11 | #include "ioapic.h" |
376253ec | 12 | |
87ecb68b PB |
13 | /* PC-style peripherals (also used by other machines). */ |
14 | ||
87ecb68b | 15 | /* parallel.c */ |
48a18b3c | 16 | static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr) |
defdb20e BS |
17 | { |
18 | ISADevice *dev; | |
19 | ||
48a18b3c | 20 | dev = isa_try_create(bus, "isa-parallel"); |
73531538 BS |
21 | if (!dev) { |
22 | return false; | |
23 | } | |
defdb20e BS |
24 | qdev_prop_set_uint32(&dev->qdev, "index", index); |
25 | qdev_prop_set_chr(&dev->qdev, "chardev", chr); | |
26 | if (qdev_init(&dev->qdev) < 0) { | |
27 | return false; | |
28 | } | |
29 | return true; | |
30 | } | |
31 | ||
63858cd9 | 32 | bool parallel_mm_init(MemoryRegion *address_space, |
a8170e5e | 33 | hwaddr base, int it_shift, qemu_irq irq, |
defdb20e | 34 | CharDriverState *chr); |
87ecb68b PB |
35 | |
36 | /* i8259.c */ | |
37 | ||
9aa78c42 | 38 | extern DeviceState *isa_pic; |
48a18b3c | 39 | qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); |
10b61882 | 40 | qemu_irq *kvm_i8259_init(ISABus *bus); |
9aa78c42 JK |
41 | int pic_read_irq(DeviceState *d); |
42 | int pic_get_output(DeviceState *d); | |
84f2d0ea WX |
43 | void pic_info(Monitor *mon, const QDict *qdict); |
44 | void irq_info(Monitor *mon, const QDict *qdict); | |
87ecb68b | 45 | |
b881fbe9 | 46 | /* Global System Interrupts */ |
96051119 | 47 | |
b881fbe9 | 48 | #define GSI_NUM_PINS IOAPIC_NUM_PINS |
845773ab | 49 | |
b881fbe9 | 50 | typedef struct GSIState { |
43a0db35 | 51 | qemu_irq i8259_irq[ISA_NUM_IRQS]; |
b881fbe9 JK |
52 | qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; |
53 | } GSIState; | |
54 | ||
55 | void gsi_handler(void *opaque, int n, int level); | |
845773ab | 56 | |
87ecb68b | 57 | /* vmport.c */ |
48a18b3c | 58 | static inline void vmport_init(ISABus *bus) |
6872ef61 | 59 | { |
48a18b3c | 60 | isa_create_simple(bus, "vmport"); |
6872ef61 | 61 | } |
87ecb68b | 62 | void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque); |
86d86414 BS |
63 | void vmmouse_get_data(uint32_t *data); |
64 | void vmmouse_set_data(const uint32_t *data); | |
87ecb68b | 65 | |
87ecb68b PB |
66 | /* pckbd.c */ |
67 | ||
68 | void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); | |
69 | void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, | |
dbff76ac | 70 | MemoryRegion *region, ram_addr_t size, |
a8170e5e | 71 | hwaddr mask); |
956a3e6b BS |
72 | void i8042_isa_mouse_fake_event(void *opaque); |
73 | void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); | |
87ecb68b | 74 | |
87ecb68b PB |
75 | /* pc.c */ |
76 | extern int fd_bootchk; | |
77 | ||
8e78eb28 | 78 | void pc_register_ferr_irq(qemu_irq irq); |
845773ab IY |
79 | void pc_acpi_smi_interrupt(void *opaque, int irq, int level); |
80 | ||
81 | void pc_cpus_init(const char *cpu_model); | |
f7e4dd6c | 82 | void pc_acpi_init(const char *default_dsdt); |
459ae5ea | 83 | void *pc_memory_init(MemoryRegion *system_memory, |
4aa63af1 | 84 | const char *kernel_filename, |
845773ab IY |
85 | const char *kernel_cmdline, |
86 | const char *initrd_filename, | |
e0e7e67b | 87 | ram_addr_t below_4g_mem_size, |
ae0a5466 | 88 | ram_addr_t above_4g_mem_size, |
4463aee6 | 89 | MemoryRegion *rom_memory, |
ae0a5466 | 90 | MemoryRegion **ram_memory); |
845773ab | 91 | qemu_irq *pc_allocate_cpu_irq(void); |
48a18b3c HP |
92 | DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); |
93 | void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, | |
1611977c | 94 | ISADevice **rtc_state, |
34d4260e | 95 | ISADevice **floppy, |
1611977c | 96 | bool no_vmport); |
48a18b3c | 97 | void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); |
845773ab | 98 | void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, |
c0897e0c | 99 | const char *boot_device, |
34d4260e | 100 | ISADevice *floppy, BusState *ide0, BusState *ide1, |
63ffb564 | 101 | ISADevice *s); |
9011a1a7 | 102 | void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); |
845773ab | 103 | void pc_pci_device_init(PCIBus *pci_bus); |
8e78eb28 | 104 | |
f885f1ea IY |
105 | typedef void (*cpu_set_smm_t)(int smm, void *arg); |
106 | void cpu_smm_register(cpu_set_smm_t callback, void *arg); | |
107 | ||
a39e3564 JB |
108 | void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); |
109 | ||
87ecb68b PB |
110 | /* acpi.c */ |
111 | extern int acpi_enabled; | |
80deece2 BS |
112 | extern char *acpi_tables; |
113 | extern size_t acpi_tables_len; | |
114 | ||
9d5e77a2 IY |
115 | void acpi_bios_init(void); |
116 | int acpi_table_add(const char *table_desc); | |
117 | ||
118 | /* acpi_piix.c */ | |
53b67b30 | 119 | |
cf7a2fe2 | 120 | i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, |
da98c8eb | 121 | qemu_irq sci_irq, qemu_irq smi_irq, |
459ae5ea | 122 | int kvm_enabled, void *fw_cfg); |
87ecb68b | 123 | void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); |
87ecb68b | 124 | |
16b29ae1 AL |
125 | /* hpet.c */ |
126 | extern int no_hpet; | |
127 | ||
87ecb68b | 128 | /* piix_pci.c */ |
0a3bacf3 JQ |
129 | struct PCII440FXState; |
130 | typedef struct PCII440FXState PCII440FXState; | |
131 | ||
1e39101c | 132 | PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, |
60573079 | 133 | ISABus **isa_bus, qemu_irq *pic, |
aee97b84 AK |
134 | MemoryRegion *address_space_mem, |
135 | MemoryRegion *address_space_io, | |
ae0a5466 | 136 | ram_addr_t ram_size, |
a8170e5e AK |
137 | hwaddr pci_hole_start, |
138 | hwaddr pci_hole_size, | |
139 | hwaddr pci_hole64_start, | |
140 | hwaddr pci_hole64_size, | |
ae0a5466 AK |
141 | MemoryRegion *pci_memory, |
142 | MemoryRegion *ram_memory); | |
87ecb68b | 143 | |
823e675a | 144 | /* piix4.c */ |
b1d8e52e | 145 | extern PCIDevice *piix4_dev; |
142e9787 | 146 | int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); |
87ecb68b PB |
147 | |
148 | /* vga.c */ | |
cb5a7aa8 | 149 | enum vga_retrace_method { |
150 | VGA_RETRACE_DUMB, | |
151 | VGA_RETRACE_PRECISE | |
152 | }; | |
153 | ||
154 | extern enum vga_retrace_method vga_retrace_method; | |
87ecb68b | 155 | |
a8170e5e AK |
156 | int isa_vga_mm_init(hwaddr vram_base, |
157 | hwaddr ctrl_base, int it_shift, | |
be20f9e9 | 158 | MemoryRegion *address_space); |
87ecb68b | 159 | |
87ecb68b | 160 | /* ne2000.c */ |
48a18b3c | 161 | static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) |
60a14ad3 BS |
162 | { |
163 | ISADevice *dev; | |
87ecb68b | 164 | |
60a14ad3 BS |
165 | qemu_check_nic_model(nd, "ne2k_isa"); |
166 | ||
48a18b3c | 167 | dev = isa_try_create(bus, "ne2k_isa"); |
cd1b8a8b BS |
168 | if (!dev) { |
169 | return false; | |
170 | } | |
60a14ad3 BS |
171 | qdev_prop_set_uint32(&dev->qdev, "iobase", base); |
172 | qdev_prop_set_uint32(&dev->qdev, "irq", irq); | |
173 | qdev_set_nic_properties(&dev->qdev, nd); | |
174 | qdev_init_nofail(&dev->qdev); | |
cd1b8a8b | 175 | return true; |
60a14ad3 | 176 | } |
87ecb68b | 177 | |
cbc5b5f3 JJ |
178 | /* pc_sysfw.c */ |
179 | void pc_system_firmware_init(MemoryRegion *rom_memory); | |
180 | ||
4c5b10b7 JS |
181 | /* e820 types */ |
182 | #define E820_RAM 1 | |
183 | #define E820_RESERVED 2 | |
184 | #define E820_ACPI 3 | |
185 | #define E820_NVS 4 | |
186 | #define E820_UNUSABLE 5 | |
187 | ||
188 | int e820_add_entry(uint64_t, uint64_t, uint32_t); | |
189 | ||
87ecb68b | 190 | #endif |