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x86: cpuhp: prevent guest crash on CPU hotplug when broadcast SMI is in use
[qemu.git] / hw / acpi / ich9.c
CommitLineData
e516572f
JB
1/*
2 * ACPI implementation
3 *
4 * Copyright (c) 2006 Fabrice Bellard
6f918e40
JB
5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
6 * VA Linux Systems Japan K.K.
7 * Copyright (C) 2012 Jason Baron <[email protected]>
8 *
9 * This is based on acpi.c.
e516572f
JB
10 *
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2 as published by the Free Software Foundation.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
19 *
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
e516572f 22 *
6f918e40
JB
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
e516572f 25 */
71e8a915 26
b6a0aa05 27#include "qemu/osdep.h"
da34e65c 28#include "qapi/error.h"
6f1426ab 29#include "qapi/visitor.h"
83c9f4ca 30#include "hw/pci/pci.h"
d6454270 31#include "migration/vmstate.h"
1de7afc9 32#include "qemu/timer.h"
2e5b09fd 33#include "hw/core/cpu.h"
71e8a915 34#include "sysemu/reset.h"
54d31236 35#include "sysemu/runstate.h"
0d09e41a 36#include "hw/acpi/acpi.h"
92055797 37#include "hw/acpi/tco.h"
022c62cb 38#include "exec/address-spaces.h"
e516572f 39
0d09e41a 40#include "hw/i386/ich9.h"
1f862184 41#include "hw/mem/pc-dimm.h"
132a908b 42#include "hw/mem/nvdimm.h"
e516572f
JB
43
44//#define DEBUG
45
46#ifdef DEBUG
47#define ICH9_DEBUG(fmt, ...) \
48do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
49#else
50#define ICH9_DEBUG(fmt, ...) do { } while (0)
51#endif
52
e516572f
JB
53static void ich9_pm_update_sci_fn(ACPIREGS *regs)
54{
55 ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
06313503 56 acpi_update_sci(&pm->acpi_regs, pm->irq);
e516572f
JB
57}
58
76a7daf9
GH
59static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width)
60{
61 ICH9LPCPMRegs *pm = opaque;
62 return acpi_gpe_ioport_readb(&pm->acpi_regs, addr);
63}
64
65static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
66 unsigned width)
67{
68 ICH9LPCPMRegs *pm = opaque;
69 acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val);
2c047956 70 acpi_update_sci(&pm->acpi_regs, pm->irq);
76a7daf9
GH
71}
72
73static const MemoryRegionOps ich9_gpe_ops = {
74 .read = ich9_gpe_readb,
75 .write = ich9_gpe_writeb,
76 .valid.min_access_size = 1,
77 .valid.max_access_size = 4,
78 .impl.min_access_size = 1,
79 .impl.max_access_size = 1,
80 .endianness = DEVICE_LITTLE_ENDIAN,
81};
82
10cc69b0
GH
83static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width)
84{
85 ICH9LPCPMRegs *pm = opaque;
86 switch (addr) {
87 case 0:
88 return pm->smi_en;
89 case 4:
90 return pm->smi_sts;
91 default:
92 return 0;
93 }
94}
95
96static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val,
97 unsigned width)
98{
99 ICH9LPCPMRegs *pm = opaque;
92055797
PA
100 TCOIORegs *tr = &pm->tco_regs;
101 uint64_t tco_en;
102
10cc69b0
GH
103 switch (addr) {
104 case 0:
92055797
PA
105 tco_en = pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN;
106 /* once TCO_LOCK bit is set, TCO_EN bit cannot be overwritten */
107 if (tr->tco.cnt1 & TCO_LOCK) {
108 val = (val & ~ICH9_PMIO_SMI_EN_TCO_EN) | tco_en;
109 }
11e66a15
GH
110 pm->smi_en &= ~pm->smi_en_wmask;
111 pm->smi_en |= (val & pm->smi_en_wmask);
10cc69b0
GH
112 break;
113 }
114}
115
116static const MemoryRegionOps ich9_smi_ops = {
117 .read = ich9_smi_readl,
118 .write = ich9_smi_writel,
119 .valid.min_access_size = 4,
120 .valid.max_access_size = 4,
121 .endianness = DEVICE_LITTLE_ENDIAN,
122};
123
e516572f
JB
124void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base)
125{
126 ICH9_DEBUG("to 0x%x\n", pm_io_base);
127
128 assert((pm_io_base & ICH9_PMIO_MASK) == 0);
129
e516572f 130 pm->pm_io_base = pm_io_base;
cacaab8b
GH
131 memory_region_transaction_begin();
132 memory_region_set_enabled(&pm->io, pm->pm_io_base != 0);
133 memory_region_set_address(&pm->io, pm->pm_io_base);
134 memory_region_transaction_commit();
e516572f
JB
135}
136
137static int ich9_pm_post_load(void *opaque, int version_id)
138{
139 ICH9LPCPMRegs *pm = opaque;
140 uint32_t pm_io_base = pm->pm_io_base;
141 pm->pm_io_base = 0;
142 ich9_pm_iospace_update(pm, pm_io_base);
143 return 0;
144}
145
146#define VMSTATE_GPE_ARRAY(_field, _state) \
147 { \
148 .name = (stringify(_field)), \
149 .version_id = 0, \
150 .num = ICH9_PMIO_GPE0_LEN, \
151 .info = &vmstate_info_uint8, \
152 .size = sizeof(uint8_t), \
153 .flags = VMS_ARRAY | VMS_POINTER, \
154 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \
155 }
156
f816a62d
IM
157static bool vmstate_test_use_memhp(void *opaque)
158{
159 ICH9LPCPMRegs *s = opaque;
160 return s->acpi_memory_hotplug.is_enabled;
161}
162
163static const VMStateDescription vmstate_memhp_state = {
164 .name = "ich9_pm/memhp",
165 .version_id = 1,
166 .minimum_version_id = 1,
167 .minimum_version_id_old = 1,
5cd8cada 168 .needed = vmstate_test_use_memhp,
f816a62d
IM
169 .fields = (VMStateField[]) {
170 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs),
171 VMSTATE_END_OF_LIST()
172 }
173};
174
92055797
PA
175static bool vmstate_test_use_tco(void *opaque)
176{
177 ICH9LPCPMRegs *s = opaque;
178 return s->enable_tco;
179}
180
181static const VMStateDescription vmstate_tco_io_state = {
182 .name = "ich9_pm/tco",
183 .version_id = 1,
184 .minimum_version_id = 1,
185 .minimum_version_id_old = 1,
186 .needed = vmstate_test_use_tco,
187 .fields = (VMStateField[]) {
188 VMSTATE_STRUCT(tco_regs, ICH9LPCPMRegs, 1, vmstate_tco_io_sts,
189 TCOIORegs),
190 VMSTATE_END_OF_LIST()
191 }
192};
193
679dd1a9
IM
194static bool vmstate_test_use_cpuhp(void *opaque)
195{
196 ICH9LPCPMRegs *s = opaque;
197 return !s->cpu_hotplug_legacy;
198}
199
200static int vmstate_cpuhp_pre_load(void *opaque)
201{
202 ICH9LPCPMRegs *s = opaque;
203 Object *obj = OBJECT(s->gpe_cpu.device);
5325cc34 204 object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abort);
679dd1a9
IM
205 return 0;
206}
207
208static const VMStateDescription vmstate_cpuhp_state = {
209 .name = "ich9_pm/cpuhp",
210 .version_id = 1,
211 .minimum_version_id = 1,
212 .minimum_version_id_old = 1,
213 .needed = vmstate_test_use_cpuhp,
214 .pre_load = vmstate_cpuhp_pre_load,
215 .fields = (VMStateField[]) {
216 VMSTATE_CPU_HOTPLUG(cpuhp_state, ICH9LPCPMRegs),
217 VMSTATE_END_OF_LIST()
218 }
219};
220
e516572f
JB
221const VMStateDescription vmstate_ich9_pm = {
222 .name = "ich9_pm",
223 .version_id = 1,
224 .minimum_version_id = 1,
e516572f
JB
225 .post_load = ich9_pm_post_load,
226 .fields = (VMStateField[]) {
227 VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs),
228 VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs),
229 VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs),
e720677e 230 VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs),
e516572f
JB
231 VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs),
232 VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs),
233 VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs),
234 VMSTATE_UINT32(smi_en, ICH9LPCPMRegs),
235 VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs),
236 VMSTATE_END_OF_LIST()
f816a62d 237 },
5cd8cada
JQ
238 .subsections = (const VMStateDescription*[]) {
239 &vmstate_memhp_state,
92055797 240 &vmstate_tco_io_state,
679dd1a9 241 &vmstate_cpuhp_state,
92055797 242 NULL
e516572f
JB
243 }
244};
245
246static void pm_reset(void *opaque)
247{
248 ICH9LPCPMRegs *pm = opaque;
249 ich9_pm_iospace_update(pm, 0);
250
251 acpi_pm1_evt_reset(&pm->acpi_regs);
252 acpi_pm1_cnt_reset(&pm->acpi_regs);
253 acpi_pm_tmr_reset(&pm->acpi_regs);
254 acpi_gpe_reset(&pm->acpi_regs);
255
be66680e 256 pm->smi_en = 0;
fba72476 257 if (!pm->smm_enabled) {
f3c30aea 258 /* Mark SMM as already inited to prevent SMM from running. */
21bcfdd9
JK
259 pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN;
260 }
11e66a15 261 pm->smi_en_wmask = ~0;
21bcfdd9 262
06313503 263 acpi_update_sci(&pm->acpi_regs, pm->irq);
e516572f
JB
264}
265
266static void pm_powerdown_req(Notifier *n, void *opaque)
267{
268 ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier);
269
270 acpi_pm1_evt_power_down(&pm->acpi_regs);
271}
272
92055797 273void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
18d6abae 274 bool smm_enabled,
a3ac6b53 275 qemu_irq sci_irq)
e516572f 276{
64bde0f3 277 memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
cacaab8b 278 memory_region_set_enabled(&pm->io, false);
503b19fc
GH
279 memory_region_add_subregion(pci_address_space_io(lpc_pci),
280 0, &pm->io);
cacaab8b 281
77d58b1e 282 acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
b5a7c024 283 acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
9a10bbb4
LE
284 acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable_s4,
285 pm->s4_val);
76a7daf9 286
e516572f 287 acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
64bde0f3 288 memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm,
75902802 289 "acpi-gpe0", ICH9_PMIO_GPE0_LEN);
76a7daf9 290 memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);
e516572f 291
64bde0f3 292 memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm,
75902802 293 "acpi-smi", 8);
10cc69b0
GH
294 memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
295
fba72476 296 pm->smm_enabled = smm_enabled;
92055797 297
18d6abae
EH
298 pm->enable_tco = true;
299 acpi_pm_tco_init(&pm->tco_regs, &pm->io);
92055797 300
e516572f
JB
301 pm->irq = sci_irq;
302 qemu_register_reset(pm_reset, pm);
303 pm->powerdown_notifier.notify = pm_powerdown_req;
304 qemu_register_powerdown_notifier(&pm->powerdown_notifier);
d6610bc2 305
96e3e12b
IM
306 legacy_acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci),
307 OBJECT(lpc_pci), &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE);
1f862184
IM
308
309 if (pm->acpi_memory_hotplug.is_enabled) {
310 acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci),
80db0e78
IM
311 &pm->acpi_memory_hotplug,
312 ACPI_MEMORY_HOTPLUG_BASE);
1f862184 313 }
e516572f 314}
6f1426ab 315
d7bce999
EB
316static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name,
317 void *opaque, Error **errp)
6f1426ab
MT
318{
319 ICH9LPCPMRegs *pm = opaque;
320 uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS;
321
51e72bc1 322 visit_type_uint32(v, name, &value, errp);
6f1426ab
MT
323}
324
1f862184
IM
325static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp)
326{
327 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
328
329 return s->pm.acpi_memory_hotplug.is_enabled;
330}
331
332static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value,
333 Error **errp)
334{
335 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
336
337 s->pm.acpi_memory_hotplug.is_enabled = value;
338}
339
16bcab97
IM
340static bool ich9_pm_get_cpu_hotplug_legacy(Object *obj, Error **errp)
341{
342 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
343
344 return s->pm.cpu_hotplug_legacy;
345}
346
347static void ich9_pm_set_cpu_hotplug_legacy(Object *obj, bool value,
348 Error **errp)
349{
350 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
351
679dd1a9
IM
352 assert(!value);
353 if (s->pm.cpu_hotplug_legacy && value == false) {
354 acpi_switch_to_modern_cphp(&s->pm.gpe_cpu, &s->pm.cpuhp_state,
355 ICH9_CPU_HOTPLUG_IO_BASE);
356 }
16bcab97
IM
357 s->pm.cpu_hotplug_legacy = value;
358}
359
92055797
PA
360static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
361{
362 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
363 return s->pm.enable_tco;
364}
365
366static void ich9_pm_set_enable_tco(Object *obj, bool value, Error **errp)
367{
368 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
369 s->pm.enable_tco = value;
370}
371
40c2281c 372void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
6f1426ab
MT
373{
374 static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
1f862184 375 pm->acpi_memory_hotplug.is_enabled = true;
16bcab97 376 pm->cpu_hotplug_legacy = true;
6ac0d8d4
AS
377 pm->disable_s3 = 0;
378 pm->disable_s4 = 0;
379 pm->s4_val = 2;
6f1426ab
MT
380
381 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
d2623129 382 &pm->pm_io_base, OBJ_PROP_FLAG_READ);
6f1426ab
MT
383 object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
384 ich9_pm_get_gpe0_blk,
d2623129 385 NULL, NULL, pm);
6f1426ab 386 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
d2623129 387 &gpe0_len, OBJ_PROP_FLAG_READ);
1f862184
IM
388 object_property_add_bool(obj, "memory-hotplug-support",
389 ich9_pm_get_memory_hotplug_support,
d2623129 390 ich9_pm_set_memory_hotplug_support);
16bcab97
IM
391 object_property_add_bool(obj, "cpu-hotplug-legacy",
392 ich9_pm_get_cpu_hotplug_legacy,
d2623129 393 ich9_pm_set_cpu_hotplug_legacy);
64a7b8de 394 object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S3_DISABLED,
d2623129 395 &pm->disable_s3, OBJ_PROP_FLAG_READWRITE);
64a7b8de 396 object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_DISABLED,
d2623129 397 &pm->disable_s4, OBJ_PROP_FLAG_READWRITE);
64a7b8de 398 object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_VAL,
d2623129 399 &pm->s4_val, OBJ_PROP_FLAG_READWRITE);
92055797
PA
400 object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
401 ich9_pm_get_enable_tco,
d2623129 402 ich9_pm_set_enable_tco);
1f862184
IM
403}
404
9040e6df
WY
405void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
406 Error **errp)
407{
408 ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
409
410 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) &&
c5be7517 411 !lpc->pm.acpi_memory_hotplug.is_enabled) {
9040e6df
WY
412 error_setg(errp,
413 "memory hotplug is not enabled: %s.memory-hotplug-support "
414 "is not set", object_get_typename(OBJECT(lpc)));
c5be7517
IM
415 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
416 uint64_t negotiated = lpc->smi_negotiated_features;
417
418 if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) &&
419 !(negotiated & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT))) {
420 error_setg(errp, "cpu hotplug with SMI wasn't enabled by firmware");
421 error_append_hint(errp, "update machine type to newer than 5.1 "
422 "and firmware that suppors CPU hotplug with SMM");
423 }
424 }
9040e6df
WY
425}
426
0058c082
IM
427void ich9_pm_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
428 Error **errp)
1f862184 429{
0058c082
IM
430 ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
431
9040e6df 432 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
75f27498
XG
433 if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) {
434 nvdimm_acpi_plug_cb(hotplug_dev, dev);
435 } else {
436 acpi_memory_plug_cb(hotplug_dev, &lpc->pm.acpi_memory_hotplug,
437 dev, errp);
438 }
5e1b5d93
IM
439 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
440 if (lpc->pm.cpu_hotplug_legacy) {
441 legacy_acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.gpe_cpu, dev, errp);
442 } else {
443 acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.cpuhp_state, dev, errp);
444 }
1f862184
IM
445 } else {
446 error_setg(errp, "acpi: device plug request for not supported device"
447 " type: %s", object_get_typename(OBJECT(dev)));
448 }
6f1426ab 449}
43f50410 450
0058c082
IM
451void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
452 DeviceState *dev, Error **errp)
469b8ad2 453{
0058c082
IM
454 ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
455
456 if (lpc->pm.acpi_memory_hotplug.is_enabled &&
64fec58e 457 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
0058c082
IM
458 acpi_memory_unplug_request_cb(hotplug_dev,
459 &lpc->pm.acpi_memory_hotplug, dev,
460 errp);
8872c25a
IM
461 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
462 !lpc->pm.cpu_hotplug_legacy) {
463 acpi_cpu_unplug_request_cb(hotplug_dev, &lpc->pm.cpuhp_state,
464 dev, errp);
64fec58e
TC
465 } else {
466 error_setg(errp, "acpi: device unplug request for not supported device"
467 " type: %s", object_get_typename(OBJECT(dev)));
468 }
469b8ad2
TC
469}
470
0058c082 471void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
91a734a6
TC
472 Error **errp)
473{
0058c082
IM
474 ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
475
476 if (lpc->pm.acpi_memory_hotplug.is_enabled &&
f7d3e29d 477 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
0058c082 478 acpi_memory_unplug_cb(&lpc->pm.acpi_memory_hotplug, dev, errp);
8872c25a
IM
479 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
480 !lpc->pm.cpu_hotplug_legacy) {
481 acpi_cpu_unplug_cb(&lpc->pm.cpuhp_state, dev, errp);
f7d3e29d
TC
482 } else {
483 error_setg(errp, "acpi: device unplug for not supported device"
484 " type: %s", object_get_typename(OBJECT(dev)));
485 }
91a734a6
TC
486}
487
43f50410
IM
488void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
489{
490 ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
491
492 acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list);
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IM
493 if (!s->pm.cpu_hotplug_legacy) {
494 acpi_cpu_ospm_status(&s->pm.cpuhp_state, list);
495 }
43f50410 496}
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