]> Git Repo - qemu.git/blame - hw/acpi/core.c
usb: implement XHCI underrun/overrun events
[qemu.git] / hw / acpi / core.c
CommitLineData
6515b203
FB
1/*
2 * ACPI implementation
5fafdf24 3 *
6515b203 4 * Copyright (c) 2006 Fabrice Bellard
5fafdf24 5 *
6515b203
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License version 2 as published by the Free Software Foundation.
9 *
10 * This library is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * Lesser General Public License for more details.
14 *
15 * You should have received a copy of the GNU Lesser General Public
8167ee88 16 * License along with this library; if not, see <http://www.gnu.org/licenses/>
6b620ca3
PB
17 *
18 * Contributions after 2012-01-13 are licensed under the terms of the
19 * GNU GPL, version 2 or (at your option) any later version.
6515b203 20 */
e688df6b 21
b6a0aa05 22#include "qemu/osdep.h"
9c17d615 23#include "sysemu/sysemu.h"
83c9f4ca 24#include "hw/hw.h"
0d09e41a 25#include "hw/acpi/acpi.h"
e3845e7c 26#include "hw/nvram/fw_cfg.h"
0c764a9d 27#include "qemu/config-file.h"
e688df6b 28#include "qapi/error.h"
0c764a9d 29#include "qapi/opts-visitor.h"
9af23989 30#include "qapi/qapi-events-run-state.h"
112ed241 31#include "qapi/qapi-visit-misc.h"
2ab4b135 32#include "qemu/error-report.h"
922a01a0 33#include "qemu/option.h"
6515b203 34
104bf02e
MT
35struct acpi_table_header {
36 uint16_t _length; /* our length, not actual part of the hdr */
e980f2bf 37 /* allows easier parsing for fw_cfg clients */
9cbb8eca
PMD
38 char sig[4]
39 QEMU_NONSTRING; /* ACPI signature (4 ASCII characters) */
8a92ea2f
AL
40 uint32_t length; /* Length of table, in bytes, including header */
41 uint8_t revision; /* ACPI Specification minor version # */
42 uint8_t checksum; /* To make sum of entire table == 0 */
9cbb8eca
PMD
43 char oem_id[6]
44 QEMU_NONSTRING; /* OEM identification */
45 char oem_table_id[8]
46 QEMU_NONSTRING; /* OEM table identification */
8a92ea2f 47 uint32_t oem_revision; /* OEM revision number */
9cbb8eca
PMD
48 char asl_compiler_id[4]
49 QEMU_NONSTRING; /* ASL compiler vendor ID */
8a92ea2f 50 uint32_t asl_compiler_revision; /* ASL compiler revision number */
541dc0d4 51} QEMU_PACKED;
8a92ea2f 52
104bf02e
MT
53#define ACPI_TABLE_HDR_SIZE sizeof(struct acpi_table_header)
54#define ACPI_TABLE_PFX_SIZE sizeof(uint16_t) /* size of the extra prefix */
55
e980f2bf 56static const char unsigned dfl_hdr[ACPI_TABLE_HDR_SIZE - ACPI_TABLE_PFX_SIZE] =
104bf02e
MT
57 "QEMU\0\0\0\0\1\0" /* sig (4), len(4), revno (1), csum (1) */
58 "QEMUQEQEMUQEMU\1\0\0\0" /* OEM id (6), table (8), revno (4) */
59 "QEMU\1\0\0\0" /* ASL compiler ID (4), version (4) */
60 ;
61
cb88a4ea 62char unsigned *acpi_tables;
8a92ea2f
AL
63size_t acpi_tables_len;
64
0c764a9d
LE
65static QemuOptsList qemu_acpi_opts = {
66 .name = "acpi",
67 .implied_opt_name = "data",
68 .head = QTAILQ_HEAD_INITIALIZER(qemu_acpi_opts.head),
69 .desc = { { 0 } } /* validated with OptsVisitor */
70};
71
72static void acpi_register_config(void)
73{
74 qemu_add_opts(&qemu_acpi_opts);
75}
76
34294e2f 77opts_init(acpi_register_config);
0c764a9d 78
8a92ea2f
AL
79static int acpi_checksum(const uint8_t *data, int len)
80{
81 int sum, i;
82 sum = 0;
104bf02e 83 for (i = 0; i < len; i++) {
8a92ea2f 84 sum += data[i];
104bf02e 85 }
8a92ea2f
AL
86 return (-sum) & 0xff;
87}
88
e980f2bf
LE
89
90/* Install a copy of the ACPI table specified in @blob.
91 *
92 * If @has_header is set, @blob starts with the System Description Table Header
93 * structure. Otherwise, "dfl_hdr" is prepended. In any case, each header field
94 * is optionally overwritten from @hdrs.
95 *
96 * It is valid to call this function with
97 * (@blob == NULL && bloblen == 0 && !has_header).
98 *
99 * @hdrs->file and @hdrs->data are ignored.
100 *
101 * SIZE_MAX is considered "infinity" in this function.
102 *
103 * The number of tables that can be installed is not limited, but the 16-bit
104 * counter at the beginning of "acpi_tables" wraps around after UINT16_MAX.
105 */
106static void acpi_table_install(const char unsigned *blob, size_t bloblen,
107 bool has_header,
108 const struct AcpiTableOptions *hdrs,
109 Error **errp)
110{
111 size_t body_start;
112 const char unsigned *hdr_src;
113 size_t body_size, acpi_payload_size;
114 struct acpi_table_header *ext_hdr;
115 unsigned changed_fields;
116
117 /* Calculate where the ACPI table body starts within the blob, plus where
118 * to copy the ACPI table header from.
119 */
120 if (has_header) {
121 /* _length | ACPI header in blob | blob body
122 * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^
123 * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size
124 * == body_start
125 *
126 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
127 * acpi_payload_size == bloblen
128 */
129 body_start = sizeof dfl_hdr;
130
131 if (bloblen < body_start) {
132 error_setg(errp, "ACPI table claiming to have header is too "
133 "short, available: %zu, expected: %zu", bloblen,
134 body_start);
135 return;
136 }
137 hdr_src = blob;
138 } else {
139 /* _length | ACPI header in template | blob body
140 * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^
141 * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size
142 * == bloblen
143 *
144 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
145 * acpi_payload_size
146 */
147 body_start = 0;
148 hdr_src = dfl_hdr;
149 }
150 body_size = bloblen - body_start;
151 acpi_payload_size = sizeof dfl_hdr + body_size;
152
153 if (acpi_payload_size > UINT16_MAX) {
154 error_setg(errp, "ACPI table too big, requested: %zu, max: %u",
155 acpi_payload_size, (unsigned)UINT16_MAX);
156 return;
157 }
158
159 /* We won't fail from here on. Initialize / extend the globals. */
160 if (acpi_tables == NULL) {
161 acpi_tables_len = sizeof(uint16_t);
162 acpi_tables = g_malloc0(acpi_tables_len);
163 }
164
165 acpi_tables = g_realloc(acpi_tables, acpi_tables_len +
166 ACPI_TABLE_PFX_SIZE +
167 sizeof dfl_hdr + body_size);
168
169 ext_hdr = (struct acpi_table_header *)(acpi_tables + acpi_tables_len);
170 acpi_tables_len += ACPI_TABLE_PFX_SIZE;
171
172 memcpy(acpi_tables + acpi_tables_len, hdr_src, sizeof dfl_hdr);
173 acpi_tables_len += sizeof dfl_hdr;
174
175 if (blob != NULL) {
176 memcpy(acpi_tables + acpi_tables_len, blob + body_start, body_size);
177 acpi_tables_len += body_size;
178 }
179
180 /* increase number of tables */
c65e5de9 181 stw_le_p(acpi_tables, lduw_le_p(acpi_tables) + 1u);
e980f2bf
LE
182
183 /* Update the header fields. The strings need not be NUL-terminated. */
184 changed_fields = 0;
185 ext_hdr->_length = cpu_to_le16(acpi_payload_size);
186
187 if (hdrs->has_sig) {
188 strncpy(ext_hdr->sig, hdrs->sig, sizeof ext_hdr->sig);
189 ++changed_fields;
190 }
191
192 if (has_header && le32_to_cpu(ext_hdr->length) != acpi_payload_size) {
8297be80
AF
193 warn_report("ACPI table has wrong length, header says "
194 "%" PRIu32 ", actual size %zu bytes",
195 le32_to_cpu(ext_hdr->length), acpi_payload_size);
e980f2bf
LE
196 }
197 ext_hdr->length = cpu_to_le32(acpi_payload_size);
198
199 if (hdrs->has_rev) {
200 ext_hdr->revision = hdrs->rev;
201 ++changed_fields;
202 }
203
204 ext_hdr->checksum = 0;
205
206 if (hdrs->has_oem_id) {
207 strncpy(ext_hdr->oem_id, hdrs->oem_id, sizeof ext_hdr->oem_id);
208 ++changed_fields;
209 }
210 if (hdrs->has_oem_table_id) {
211 strncpy(ext_hdr->oem_table_id, hdrs->oem_table_id,
212 sizeof ext_hdr->oem_table_id);
213 ++changed_fields;
214 }
215 if (hdrs->has_oem_rev) {
216 ext_hdr->oem_revision = cpu_to_le32(hdrs->oem_rev);
217 ++changed_fields;
218 }
219 if (hdrs->has_asl_compiler_id) {
220 strncpy(ext_hdr->asl_compiler_id, hdrs->asl_compiler_id,
221 sizeof ext_hdr->asl_compiler_id);
222 ++changed_fields;
223 }
224 if (hdrs->has_asl_compiler_rev) {
225 ext_hdr->asl_compiler_revision = cpu_to_le32(hdrs->asl_compiler_rev);
226 ++changed_fields;
227 }
228
229 if (!has_header && changed_fields == 0) {
2ab4b135 230 warn_report("ACPI table: no headers are specified");
e980f2bf
LE
231 }
232
233 /* recalculate checksum */
234 ext_hdr->checksum = acpi_checksum((const char unsigned *)ext_hdr +
235 ACPI_TABLE_PFX_SIZE, acpi_payload_size);
236}
237
23084327 238void acpi_table_add(const QemuOpts *opts, Error **errp)
8a92ea2f 239{
0c764a9d 240 AcpiTableOptions *hdrs = NULL;
445d9cae 241 Error *err = NULL;
0c764a9d
LE
242 char **pathnames = NULL;
243 char **cur;
e980f2bf
LE
244 size_t bloblen = 0;
245 char unsigned *blob = NULL;
8a92ea2f 246
0c764a9d 247 {
09204eac 248 Visitor *v;
0c764a9d 249
09204eac
EB
250 v = opts_visitor_new(opts);
251 visit_type_AcpiTableOptions(v, NULL, &hdrs, &err);
252 visit_free(v);
0c764a9d
LE
253 }
254
255 if (err) {
256 goto out;
257 }
258 if (hdrs->has_file == hdrs->has_data) {
259 error_setg(&err, "'-acpitable' requires one of 'data' or 'file'");
260 goto out;
261 }
0c764a9d
LE
262
263 pathnames = g_strsplit(hdrs->has_file ? hdrs->file : hdrs->data, ":", 0);
264 if (pathnames == NULL || pathnames[0] == NULL) {
265 error_setg(&err, "'-acpitable' requires at least one pathname");
445d9cae 266 goto out;
104bf02e
MT
267 }
268
104bf02e 269 /* now read in the data files, reallocating buffer as needed */
0c764a9d
LE
270 for (cur = pathnames; *cur; ++cur) {
271 int fd = open(*cur, O_RDONLY | O_BINARY);
104bf02e
MT
272
273 if (fd < 0) {
0c764a9d 274 error_setg(&err, "can't open file %s: %s", *cur, strerror(errno));
445d9cae 275 goto out;
104bf02e
MT
276 }
277
278 for (;;) {
cb88a4ea 279 char unsigned data[8192];
e980f2bf
LE
280 ssize_t r;
281
282 r = read(fd, data, sizeof data);
104bf02e
MT
283 if (r == 0) {
284 break;
285 } else if (r > 0) {
e980f2bf
LE
286 blob = g_realloc(blob, bloblen + r);
287 memcpy(blob + bloblen, data, r);
288 bloblen += r;
104bf02e 289 } else if (errno != EINTR) {
445d9cae 290 error_setg(&err, "can't read file %s: %s",
0c764a9d 291 *cur, strerror(errno));
104bf02e 292 close(fd);
445d9cae 293 goto out;
104bf02e
MT
294 }
295 }
296
297 close(fd);
298 }
299
e980f2bf 300 acpi_table_install(blob, bloblen, hdrs->has_file, hdrs, &err);
104bf02e 301
445d9cae 302out:
e980f2bf 303 g_free(blob);
0c764a9d 304 g_strfreev(pathnames);
96a1616c 305 qapi_free_AcpiTableOptions(hdrs);
0c764a9d 306
23084327 307 error_propagate(errp, err);
8a92ea2f 308}
a54d41a8 309
60de1163
MT
310static bool acpi_table_builtin = false;
311
312void acpi_table_add_builtin(const QemuOpts *opts, Error **errp)
313{
314 acpi_table_builtin = true;
315 acpi_table_add(opts, errp);
316}
317
318unsigned acpi_table_len(void *current)
319{
320 struct acpi_table_header *hdr = current - sizeof(hdr->_length);
321 return hdr->_length;
322}
323
324static
325void *acpi_table_hdr(void *h)
326{
327 struct acpi_table_header *hdr = h;
328 return &hdr->sig;
329}
330
331uint8_t *acpi_table_first(void)
332{
333 if (acpi_table_builtin || !acpi_tables) {
334 return NULL;
335 }
336 return acpi_table_hdr(acpi_tables + ACPI_TABLE_PFX_SIZE);
337}
338
339uint8_t *acpi_table_next(uint8_t *current)
340{
341 uint8_t *next = current + acpi_table_len(current);
342
343 if (next - acpi_tables >= acpi_tables_len) {
344 return NULL;
345 } else {
346 return acpi_table_hdr(next);
347 }
348}
349
88594e4f
LE
350int acpi_get_slic_oem(AcpiSlicOem *oem)
351{
352 uint8_t *u;
353
354 for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
355 struct acpi_table_header *hdr = (void *)(u - sizeof(hdr->_length));
356
357 if (memcmp(hdr->sig, "SLIC", 4) == 0) {
358 oem->id = hdr->oem_id;
359 oem->table_id = hdr->oem_table_id;
360 return 0;
361 }
362 }
363 return -1;
364}
365
da98c8eb
GH
366static void acpi_notify_wakeup(Notifier *notifier, void *data)
367{
368 ACPIREGS *ar = container_of(notifier, ACPIREGS, wakeup);
369 WakeupReason *reason = data;
370
371 switch (*reason) {
62aeb0f7
GH
372 case QEMU_WAKEUP_REASON_RTC:
373 ar->pm1.evt.sts |=
374 (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_RT_CLOCK_STATUS);
375 break;
6595abc0
GH
376 case QEMU_WAKEUP_REASON_PMTIMER:
377 ar->pm1.evt.sts |=
378 (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_TIMER_STATUS);
379 break;
da98c8eb 380 case QEMU_WAKEUP_REASON_OTHER:
da98c8eb
GH
381 /* ACPI_BITMASK_WAKE_STATUS should be set on resume.
382 Pretend that resume was caused by power button */
383 ar->pm1.evt.sts |=
384 (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_POWER_BUTTON_STATUS);
385 break;
4bc78a87
LJ
386 default:
387 break;
da98c8eb
GH
388 }
389}
390
04dc308f 391/* ACPI PM1a EVT */
2886be1b 392uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar)
04dc308f 393{
3ef0eab1
PD
394 /* Compare ns-clock, not PM timer ticks, because
395 acpi_pm_tmr_update function uses ns for setting the timer. */
396 int64_t d = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
397 if (d >= muldiv64(ar->tmr.overflow_time,
73bcb24d 398 NANOSECONDS_PER_SECOND, PM_TIMER_FREQUENCY)) {
355bf2e5 399 ar->pm1.evt.sts |= ACPI_BITMASK_TIMER_STATUS;
04dc308f 400 }
355bf2e5 401 return ar->pm1.evt.sts;
04dc308f
IY
402}
403
b5a7c024 404static void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val)
04dc308f 405{
2886be1b 406 uint16_t pm1_sts = acpi_pm1_evt_get_sts(ar);
04dc308f
IY
407 if (pm1_sts & val & ACPI_BITMASK_TIMER_STATUS) {
408 /* if TMRSTS is reset, then compute the new overflow time */
355bf2e5 409 acpi_pm_tmr_calc_overflow_time(ar);
04dc308f 410 }
355bf2e5 411 ar->pm1.evt.sts &= ~val;
04dc308f
IY
412}
413
b5a7c024 414static void acpi_pm1_evt_write_en(ACPIREGS *ar, uint16_t val)
8283c4f5
GH
415{
416 ar->pm1.evt.en = val;
62aeb0f7
GH
417 qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC,
418 val & ACPI_BITMASK_RT_CLOCK_ENABLE);
6595abc0
GH
419 qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER,
420 val & ACPI_BITMASK_TIMER_ENABLE);
8283c4f5
GH
421}
422
355bf2e5 423void acpi_pm1_evt_power_down(ACPIREGS *ar)
04dc308f 424{
355bf2e5
GH
425 if (ar->pm1.evt.en & ACPI_BITMASK_POWER_BUTTON_ENABLE) {
426 ar->pm1.evt.sts |= ACPI_BITMASK_POWER_BUTTON_STATUS;
427 ar->tmr.update_sci(ar);
04dc308f
IY
428 }
429}
430
355bf2e5 431void acpi_pm1_evt_reset(ACPIREGS *ar)
04dc308f 432{
355bf2e5
GH
433 ar->pm1.evt.sts = 0;
434 ar->pm1.evt.en = 0;
62aeb0f7 435 qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC, 0);
6595abc0 436 qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER, 0);
04dc308f
IY
437}
438
b5a7c024
GH
439static uint64_t acpi_pm_evt_read(void *opaque, hwaddr addr, unsigned width)
440{
441 ACPIREGS *ar = opaque;
442 switch (addr) {
443 case 0:
444 return acpi_pm1_evt_get_sts(ar);
445 case 2:
446 return ar->pm1.evt.en;
447 default:
448 return 0;
449 }
450}
451
452static void acpi_pm_evt_write(void *opaque, hwaddr addr, uint64_t val,
453 unsigned width)
454{
455 ACPIREGS *ar = opaque;
456 switch (addr) {
457 case 0:
458 acpi_pm1_evt_write_sts(ar, val);
459 ar->pm1.evt.update_sci(ar);
460 break;
461 case 2:
462 acpi_pm1_evt_write_en(ar, val);
463 ar->pm1.evt.update_sci(ar);
464 break;
465 }
466}
467
468static const MemoryRegionOps acpi_pm_evt_ops = {
469 .read = acpi_pm_evt_read,
470 .write = acpi_pm_evt_write,
471 .valid.min_access_size = 2,
472 .valid.max_access_size = 2,
473 .endianness = DEVICE_LITTLE_ENDIAN,
474};
475
476void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
477 MemoryRegion *parent)
478{
479 ar->pm1.evt.update_sci = update_sci;
64bde0f3
PB
480 memory_region_init_io(&ar->pm1.evt.io, memory_region_owner(parent),
481 &acpi_pm_evt_ops, ar, "acpi-evt", 4);
b5a7c024
GH
482 memory_region_add_subregion(parent, 0, &ar->pm1.evt.io);
483}
484
a54d41a8 485/* ACPI PM_TMR */
355bf2e5 486void acpi_pm_tmr_update(ACPIREGS *ar, bool enable)
a54d41a8
IY
487{
488 int64_t expire_time;
489
490 /* schedule a timer interruption if needed */
491 if (enable) {
73bcb24d 492 expire_time = muldiv64(ar->tmr.overflow_time, NANOSECONDS_PER_SECOND,
a54d41a8 493 PM_TIMER_FREQUENCY);
bc72ad67 494 timer_mod(ar->tmr.timer, expire_time);
a54d41a8 495 } else {
bc72ad67 496 timer_del(ar->tmr.timer);
a54d41a8
IY
497 }
498}
499
87776ab7
PB
500static inline int64_t acpi_pm_tmr_get_clock(void)
501{
502 return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY,
503 NANOSECONDS_PER_SECOND);
504}
505
355bf2e5 506void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar)
a54d41a8
IY
507{
508 int64_t d = acpi_pm_tmr_get_clock();
355bf2e5 509 ar->tmr.overflow_time = (d + 0x800000LL) & ~0x7fffffLL;
a54d41a8
IY
510}
511
77d58b1e 512static uint32_t acpi_pm_tmr_get(ACPIREGS *ar)
a54d41a8 513{
3a93113a 514 uint32_t d = acpi_pm_tmr_get_clock();
a54d41a8
IY
515 return d & 0xffffff;
516}
517
518static void acpi_pm_tmr_timer(void *opaque)
519{
355bf2e5 520 ACPIREGS *ar = opaque;
fb064112
DHB
521
522 qemu_system_wakeup_request(QEMU_WAKEUP_REASON_PMTIMER, NULL);
355bf2e5 523 ar->tmr.update_sci(ar);
a54d41a8
IY
524}
525
77d58b1e
GH
526static uint64_t acpi_pm_tmr_read(void *opaque, hwaddr addr, unsigned width)
527{
528 return acpi_pm_tmr_get(opaque);
529}
530
2d3b9895
GH
531static void acpi_pm_tmr_write(void *opaque, hwaddr addr, uint64_t val,
532 unsigned width)
533{
534 /* nothing */
535}
536
77d58b1e
GH
537static const MemoryRegionOps acpi_pm_tmr_ops = {
538 .read = acpi_pm_tmr_read,
2d3b9895 539 .write = acpi_pm_tmr_write,
77d58b1e
GH
540 .valid.min_access_size = 4,
541 .valid.max_access_size = 4,
542 .endianness = DEVICE_LITTLE_ENDIAN,
543};
544
545void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
546 MemoryRegion *parent)
a54d41a8 547{
355bf2e5 548 ar->tmr.update_sci = update_sci;
bc72ad67 549 ar->tmr.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, acpi_pm_tmr_timer, ar);
64bde0f3
PB
550 memory_region_init_io(&ar->tmr.io, memory_region_owner(parent),
551 &acpi_pm_tmr_ops, ar, "acpi-tmr", 4);
77d58b1e 552 memory_region_add_subregion(parent, 8, &ar->tmr.io);
a54d41a8
IY
553}
554
355bf2e5 555void acpi_pm_tmr_reset(ACPIREGS *ar)
a54d41a8 556{
355bf2e5 557 ar->tmr.overflow_time = 0;
bc72ad67 558 timer_del(ar->tmr.timer);
a54d41a8 559}
eaba51c5
IY
560
561/* ACPI PM1aCNT */
afafe4bb 562static void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val)
eaba51c5 563{
355bf2e5 564 ar->pm1.cnt.cnt = val & ~(ACPI_BITMASK_SLEEP_ENABLE);
eaba51c5
IY
565
566 if (val & ACPI_BITMASK_SLEEP_ENABLE) {
567 /* change suspend type */
568 uint16_t sus_typ = (val >> 10) & 7;
569 switch(sus_typ) {
570 case 0: /* soft power off */
cf83f140 571 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
eaba51c5
IY
572 break;
573 case 1:
da98c8eb
GH
574 qemu_system_suspend_request();
575 break;
eaba51c5 576 default:
afafe4bb 577 if (sus_typ == ar->pm1.cnt.s4_val) { /* S4 request */
3ab72385 578 qapi_event_send_suspend_disk();
cf83f140 579 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
459ae5ea 580 }
eaba51c5
IY
581 break;
582 }
583 }
584}
585
355bf2e5 586void acpi_pm1_cnt_update(ACPIREGS *ar,
eaba51c5
IY
587 bool sci_enable, bool sci_disable)
588{
589 /* ACPI specs 3.0, 4.7.2.5 */
590 if (sci_enable) {
355bf2e5 591 ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE;
eaba51c5 592 } else if (sci_disable) {
355bf2e5 593 ar->pm1.cnt.cnt &= ~ACPI_BITMASK_SCI_ENABLE;
eaba51c5
IY
594 }
595}
596
afafe4bb
GH
597static uint64_t acpi_pm_cnt_read(void *opaque, hwaddr addr, unsigned width)
598{
599 ACPIREGS *ar = opaque;
600 return ar->pm1.cnt.cnt;
601}
602
603static void acpi_pm_cnt_write(void *opaque, hwaddr addr, uint64_t val,
604 unsigned width)
605{
606 acpi_pm1_cnt_write(opaque, val);
607}
608
609static const MemoryRegionOps acpi_pm_cnt_ops = {
610 .read = acpi_pm_cnt_read,
611 .write = acpi_pm_cnt_write,
612 .valid.min_access_size = 2,
613 .valid.max_access_size = 2,
614 .endianness = DEVICE_LITTLE_ENDIAN,
615};
616
9a10bbb4
LE
617void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent,
618 bool disable_s3, bool disable_s4, uint8_t s4_val)
afafe4bb 619{
e3845e7c
LE
620 FWCfgState *fw_cfg;
621
560e6396 622 ar->pm1.cnt.s4_val = s4_val;
afafe4bb
GH
623 ar->wakeup.notify = acpi_notify_wakeup;
624 qemu_register_wakeup_notifier(&ar->wakeup);
46ea94ca
DHB
625
626 /*
627 * Register wake-up support in QMP query-current-machine API
628 */
629 qemu_register_wakeup_support();
630
64bde0f3
PB
631 memory_region_init_io(&ar->pm1.cnt.io, memory_region_owner(parent),
632 &acpi_pm_cnt_ops, ar, "acpi-cnt", 2);
afafe4bb 633 memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io);
e3845e7c
LE
634
635 fw_cfg = fw_cfg_find();
636 if (fw_cfg) {
637 uint8_t suspend[6] = {128, 0, 0, 129, 128, 128};
638 suspend[3] = 1 | ((!disable_s3) << 7);
639 suspend[4] = s4_val | ((!disable_s4) << 7);
640
641 fw_cfg_add_file(fw_cfg, "etc/system-states", g_memdup(suspend, 6), 6);
642 }
afafe4bb
GH
643}
644
355bf2e5 645void acpi_pm1_cnt_reset(ACPIREGS *ar)
eaba51c5 646{
355bf2e5 647 ar->pm1.cnt.cnt = 0;
eaba51c5 648}
23910d3f
IY
649
650/* ACPI GPE */
355bf2e5 651void acpi_gpe_init(ACPIREGS *ar, uint8_t len)
23910d3f 652{
355bf2e5 653 ar->gpe.len = len;
d9a3b33d
MT
654 /* Only first len / 2 bytes are ever used,
655 * but the caller in ich9.c migrates full len bytes.
656 * TODO: fix ich9.c and drop the extra allocation.
657 */
658 ar->gpe.sts = g_malloc0(len);
659 ar->gpe.en = g_malloc0(len);
23910d3f
IY
660}
661
355bf2e5 662void acpi_gpe_reset(ACPIREGS *ar)
23910d3f 663{
355bf2e5
GH
664 memset(ar->gpe.sts, 0, ar->gpe.len / 2);
665 memset(ar->gpe.en, 0, ar->gpe.len / 2);
23910d3f
IY
666}
667
355bf2e5 668static uint8_t *acpi_gpe_ioport_get_ptr(ACPIREGS *ar, uint32_t addr)
23910d3f
IY
669{
670 uint8_t *cur = NULL;
671
355bf2e5
GH
672 if (addr < ar->gpe.len / 2) {
673 cur = ar->gpe.sts + addr;
674 } else if (addr < ar->gpe.len) {
675 cur = ar->gpe.en + addr - ar->gpe.len / 2;
23910d3f
IY
676 } else {
677 abort();
678 }
679
680 return cur;
681}
682
355bf2e5 683void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val)
23910d3f
IY
684{
685 uint8_t *cur;
686
355bf2e5
GH
687 cur = acpi_gpe_ioport_get_ptr(ar, addr);
688 if (addr < ar->gpe.len / 2) {
23910d3f
IY
689 /* GPE_STS */
690 *cur = (*cur) & ~val;
355bf2e5 691 } else if (addr < ar->gpe.len) {
23910d3f
IY
692 /* GPE_EN */
693 *cur = val;
694 } else {
695 abort();
696 }
697}
698
355bf2e5 699uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr)
23910d3f
IY
700{
701 uint8_t *cur;
702 uint32_t val;
703
355bf2e5 704 cur = acpi_gpe_ioport_get_ptr(ar, addr);
23910d3f
IY
705 val = 0;
706 if (cur != NULL) {
707 val = *cur;
708 }
709
710 return val;
711}
06313503 712
ca9b46bc 713void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq,
eaf23bf7 714 AcpiEventStatusBits status)
ca9b46bc
ZG
715{
716 ar->gpe.sts[0] |= status;
717 acpi_update_sci(ar, irq);
718}
719
06313503
IM
720void acpi_update_sci(ACPIREGS *regs, qemu_irq irq)
721{
722 int sci_level, pm1a_sts;
723
724 pm1a_sts = acpi_pm1_evt_get_sts(regs);
725
726 sci_level = ((pm1a_sts &
727 regs->pm1.evt.en & ACPI_BITMASK_PM1_COMMON_ENABLED) != 0) ||
728 ((regs->gpe.sts[0] & regs->gpe.en[0]) != 0);
729
730 qemu_set_irq(irq, sci_level);
731
732 /* schedule a timer interruption if needed */
733 acpi_pm_tmr_update(regs,
734 (regs->pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&
735 !(pm1a_sts & ACPI_BITMASK_TIMER_STATUS));
736}
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