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6515b203 FB |
1 | /* |
2 | * ACPI implementation | |
5fafdf24 | 3 | * |
6515b203 | 4 | * Copyright (c) 2006 Fabrice Bellard |
5fafdf24 | 5 | * |
6515b203 FB |
6 | * This library is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License version 2 as published by the Free Software Foundation. | |
9 | * | |
10 | * This library is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * Lesser General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU Lesser General Public | |
8167ee88 | 16 | * License along with this library; if not, see <http://www.gnu.org/licenses/> |
6b620ca3 PB |
17 | * |
18 | * Contributions after 2012-01-13 are licensed under the terms of the | |
19 | * GNU GPL, version 2 or (at your option) any later version. | |
6515b203 | 20 | */ |
e688df6b | 21 | |
b6a0aa05 | 22 | #include "qemu/osdep.h" |
9c17d615 | 23 | #include "sysemu/sysemu.h" |
83c9f4ca | 24 | #include "hw/hw.h" |
0d09e41a | 25 | #include "hw/acpi/acpi.h" |
e3845e7c | 26 | #include "hw/nvram/fw_cfg.h" |
0c764a9d | 27 | #include "qemu/config-file.h" |
e688df6b | 28 | #include "qapi/error.h" |
0c764a9d | 29 | #include "qapi/opts-visitor.h" |
9af23989 | 30 | #include "qapi/qapi-events-run-state.h" |
0c764a9d | 31 | #include "qapi-visit.h" |
2ab4b135 | 32 | #include "qemu/error-report.h" |
922a01a0 | 33 | #include "qemu/option.h" |
6515b203 | 34 | |
104bf02e MT |
35 | struct acpi_table_header { |
36 | uint16_t _length; /* our length, not actual part of the hdr */ | |
e980f2bf | 37 | /* allows easier parsing for fw_cfg clients */ |
104bf02e | 38 | char sig[4]; /* ACPI signature (4 ASCII characters) */ |
8a92ea2f AL |
39 | uint32_t length; /* Length of table, in bytes, including header */ |
40 | uint8_t revision; /* ACPI Specification minor version # */ | |
41 | uint8_t checksum; /* To make sum of entire table == 0 */ | |
104bf02e MT |
42 | char oem_id[6]; /* OEM identification */ |
43 | char oem_table_id[8]; /* OEM table identification */ | |
8a92ea2f | 44 | uint32_t oem_revision; /* OEM revision number */ |
104bf02e | 45 | char asl_compiler_id[4]; /* ASL compiler vendor ID */ |
8a92ea2f | 46 | uint32_t asl_compiler_revision; /* ASL compiler revision number */ |
541dc0d4 | 47 | } QEMU_PACKED; |
8a92ea2f | 48 | |
104bf02e MT |
49 | #define ACPI_TABLE_HDR_SIZE sizeof(struct acpi_table_header) |
50 | #define ACPI_TABLE_PFX_SIZE sizeof(uint16_t) /* size of the extra prefix */ | |
51 | ||
e980f2bf | 52 | static const char unsigned dfl_hdr[ACPI_TABLE_HDR_SIZE - ACPI_TABLE_PFX_SIZE] = |
104bf02e MT |
53 | "QEMU\0\0\0\0\1\0" /* sig (4), len(4), revno (1), csum (1) */ |
54 | "QEMUQEQEMUQEMU\1\0\0\0" /* OEM id (6), table (8), revno (4) */ | |
55 | "QEMU\1\0\0\0" /* ASL compiler ID (4), version (4) */ | |
56 | ; | |
57 | ||
cb88a4ea | 58 | char unsigned *acpi_tables; |
8a92ea2f AL |
59 | size_t acpi_tables_len; |
60 | ||
0c764a9d LE |
61 | static QemuOptsList qemu_acpi_opts = { |
62 | .name = "acpi", | |
63 | .implied_opt_name = "data", | |
64 | .head = QTAILQ_HEAD_INITIALIZER(qemu_acpi_opts.head), | |
65 | .desc = { { 0 } } /* validated with OptsVisitor */ | |
66 | }; | |
67 | ||
68 | static void acpi_register_config(void) | |
69 | { | |
70 | qemu_add_opts(&qemu_acpi_opts); | |
71 | } | |
72 | ||
34294e2f | 73 | opts_init(acpi_register_config); |
0c764a9d | 74 | |
8a92ea2f AL |
75 | static int acpi_checksum(const uint8_t *data, int len) |
76 | { | |
77 | int sum, i; | |
78 | sum = 0; | |
104bf02e | 79 | for (i = 0; i < len; i++) { |
8a92ea2f | 80 | sum += data[i]; |
104bf02e | 81 | } |
8a92ea2f AL |
82 | return (-sum) & 0xff; |
83 | } | |
84 | ||
e980f2bf LE |
85 | |
86 | /* Install a copy of the ACPI table specified in @blob. | |
87 | * | |
88 | * If @has_header is set, @blob starts with the System Description Table Header | |
89 | * structure. Otherwise, "dfl_hdr" is prepended. In any case, each header field | |
90 | * is optionally overwritten from @hdrs. | |
91 | * | |
92 | * It is valid to call this function with | |
93 | * (@blob == NULL && bloblen == 0 && !has_header). | |
94 | * | |
95 | * @hdrs->file and @hdrs->data are ignored. | |
96 | * | |
97 | * SIZE_MAX is considered "infinity" in this function. | |
98 | * | |
99 | * The number of tables that can be installed is not limited, but the 16-bit | |
100 | * counter at the beginning of "acpi_tables" wraps around after UINT16_MAX. | |
101 | */ | |
102 | static void acpi_table_install(const char unsigned *blob, size_t bloblen, | |
103 | bool has_header, | |
104 | const struct AcpiTableOptions *hdrs, | |
105 | Error **errp) | |
106 | { | |
107 | size_t body_start; | |
108 | const char unsigned *hdr_src; | |
109 | size_t body_size, acpi_payload_size; | |
110 | struct acpi_table_header *ext_hdr; | |
111 | unsigned changed_fields; | |
112 | ||
113 | /* Calculate where the ACPI table body starts within the blob, plus where | |
114 | * to copy the ACPI table header from. | |
115 | */ | |
116 | if (has_header) { | |
117 | /* _length | ACPI header in blob | blob body | |
118 | * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^ | |
119 | * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size | |
120 | * == body_start | |
121 | * | |
122 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
123 | * acpi_payload_size == bloblen | |
124 | */ | |
125 | body_start = sizeof dfl_hdr; | |
126 | ||
127 | if (bloblen < body_start) { | |
128 | error_setg(errp, "ACPI table claiming to have header is too " | |
129 | "short, available: %zu, expected: %zu", bloblen, | |
130 | body_start); | |
131 | return; | |
132 | } | |
133 | hdr_src = blob; | |
134 | } else { | |
135 | /* _length | ACPI header in template | blob body | |
136 | * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^ | |
137 | * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size | |
138 | * == bloblen | |
139 | * | |
140 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
141 | * acpi_payload_size | |
142 | */ | |
143 | body_start = 0; | |
144 | hdr_src = dfl_hdr; | |
145 | } | |
146 | body_size = bloblen - body_start; | |
147 | acpi_payload_size = sizeof dfl_hdr + body_size; | |
148 | ||
149 | if (acpi_payload_size > UINT16_MAX) { | |
150 | error_setg(errp, "ACPI table too big, requested: %zu, max: %u", | |
151 | acpi_payload_size, (unsigned)UINT16_MAX); | |
152 | return; | |
153 | } | |
154 | ||
155 | /* We won't fail from here on. Initialize / extend the globals. */ | |
156 | if (acpi_tables == NULL) { | |
157 | acpi_tables_len = sizeof(uint16_t); | |
158 | acpi_tables = g_malloc0(acpi_tables_len); | |
159 | } | |
160 | ||
161 | acpi_tables = g_realloc(acpi_tables, acpi_tables_len + | |
162 | ACPI_TABLE_PFX_SIZE + | |
163 | sizeof dfl_hdr + body_size); | |
164 | ||
165 | ext_hdr = (struct acpi_table_header *)(acpi_tables + acpi_tables_len); | |
166 | acpi_tables_len += ACPI_TABLE_PFX_SIZE; | |
167 | ||
168 | memcpy(acpi_tables + acpi_tables_len, hdr_src, sizeof dfl_hdr); | |
169 | acpi_tables_len += sizeof dfl_hdr; | |
170 | ||
171 | if (blob != NULL) { | |
172 | memcpy(acpi_tables + acpi_tables_len, blob + body_start, body_size); | |
173 | acpi_tables_len += body_size; | |
174 | } | |
175 | ||
176 | /* increase number of tables */ | |
c65e5de9 | 177 | stw_le_p(acpi_tables, lduw_le_p(acpi_tables) + 1u); |
e980f2bf LE |
178 | |
179 | /* Update the header fields. The strings need not be NUL-terminated. */ | |
180 | changed_fields = 0; | |
181 | ext_hdr->_length = cpu_to_le16(acpi_payload_size); | |
182 | ||
183 | if (hdrs->has_sig) { | |
184 | strncpy(ext_hdr->sig, hdrs->sig, sizeof ext_hdr->sig); | |
185 | ++changed_fields; | |
186 | } | |
187 | ||
188 | if (has_header && le32_to_cpu(ext_hdr->length) != acpi_payload_size) { | |
8297be80 AF |
189 | warn_report("ACPI table has wrong length, header says " |
190 | "%" PRIu32 ", actual size %zu bytes", | |
191 | le32_to_cpu(ext_hdr->length), acpi_payload_size); | |
e980f2bf LE |
192 | } |
193 | ext_hdr->length = cpu_to_le32(acpi_payload_size); | |
194 | ||
195 | if (hdrs->has_rev) { | |
196 | ext_hdr->revision = hdrs->rev; | |
197 | ++changed_fields; | |
198 | } | |
199 | ||
200 | ext_hdr->checksum = 0; | |
201 | ||
202 | if (hdrs->has_oem_id) { | |
203 | strncpy(ext_hdr->oem_id, hdrs->oem_id, sizeof ext_hdr->oem_id); | |
204 | ++changed_fields; | |
205 | } | |
206 | if (hdrs->has_oem_table_id) { | |
207 | strncpy(ext_hdr->oem_table_id, hdrs->oem_table_id, | |
208 | sizeof ext_hdr->oem_table_id); | |
209 | ++changed_fields; | |
210 | } | |
211 | if (hdrs->has_oem_rev) { | |
212 | ext_hdr->oem_revision = cpu_to_le32(hdrs->oem_rev); | |
213 | ++changed_fields; | |
214 | } | |
215 | if (hdrs->has_asl_compiler_id) { | |
216 | strncpy(ext_hdr->asl_compiler_id, hdrs->asl_compiler_id, | |
217 | sizeof ext_hdr->asl_compiler_id); | |
218 | ++changed_fields; | |
219 | } | |
220 | if (hdrs->has_asl_compiler_rev) { | |
221 | ext_hdr->asl_compiler_revision = cpu_to_le32(hdrs->asl_compiler_rev); | |
222 | ++changed_fields; | |
223 | } | |
224 | ||
225 | if (!has_header && changed_fields == 0) { | |
2ab4b135 | 226 | warn_report("ACPI table: no headers are specified"); |
e980f2bf LE |
227 | } |
228 | ||
229 | /* recalculate checksum */ | |
230 | ext_hdr->checksum = acpi_checksum((const char unsigned *)ext_hdr + | |
231 | ACPI_TABLE_PFX_SIZE, acpi_payload_size); | |
232 | } | |
233 | ||
23084327 | 234 | void acpi_table_add(const QemuOpts *opts, Error **errp) |
8a92ea2f | 235 | { |
0c764a9d | 236 | AcpiTableOptions *hdrs = NULL; |
445d9cae | 237 | Error *err = NULL; |
0c764a9d LE |
238 | char **pathnames = NULL; |
239 | char **cur; | |
e980f2bf LE |
240 | size_t bloblen = 0; |
241 | char unsigned *blob = NULL; | |
8a92ea2f | 242 | |
0c764a9d | 243 | { |
09204eac | 244 | Visitor *v; |
0c764a9d | 245 | |
09204eac EB |
246 | v = opts_visitor_new(opts); |
247 | visit_type_AcpiTableOptions(v, NULL, &hdrs, &err); | |
248 | visit_free(v); | |
0c764a9d LE |
249 | } |
250 | ||
251 | if (err) { | |
252 | goto out; | |
253 | } | |
254 | if (hdrs->has_file == hdrs->has_data) { | |
255 | error_setg(&err, "'-acpitable' requires one of 'data' or 'file'"); | |
256 | goto out; | |
257 | } | |
0c764a9d LE |
258 | |
259 | pathnames = g_strsplit(hdrs->has_file ? hdrs->file : hdrs->data, ":", 0); | |
260 | if (pathnames == NULL || pathnames[0] == NULL) { | |
261 | error_setg(&err, "'-acpitable' requires at least one pathname"); | |
445d9cae | 262 | goto out; |
104bf02e MT |
263 | } |
264 | ||
104bf02e | 265 | /* now read in the data files, reallocating buffer as needed */ |
0c764a9d LE |
266 | for (cur = pathnames; *cur; ++cur) { |
267 | int fd = open(*cur, O_RDONLY | O_BINARY); | |
104bf02e MT |
268 | |
269 | if (fd < 0) { | |
0c764a9d | 270 | error_setg(&err, "can't open file %s: %s", *cur, strerror(errno)); |
445d9cae | 271 | goto out; |
104bf02e MT |
272 | } |
273 | ||
274 | for (;;) { | |
cb88a4ea | 275 | char unsigned data[8192]; |
e980f2bf LE |
276 | ssize_t r; |
277 | ||
278 | r = read(fd, data, sizeof data); | |
104bf02e MT |
279 | if (r == 0) { |
280 | break; | |
281 | } else if (r > 0) { | |
e980f2bf LE |
282 | blob = g_realloc(blob, bloblen + r); |
283 | memcpy(blob + bloblen, data, r); | |
284 | bloblen += r; | |
104bf02e | 285 | } else if (errno != EINTR) { |
445d9cae | 286 | error_setg(&err, "can't read file %s: %s", |
0c764a9d | 287 | *cur, strerror(errno)); |
104bf02e | 288 | close(fd); |
445d9cae | 289 | goto out; |
104bf02e MT |
290 | } |
291 | } | |
292 | ||
293 | close(fd); | |
294 | } | |
295 | ||
e980f2bf | 296 | acpi_table_install(blob, bloblen, hdrs->has_file, hdrs, &err); |
104bf02e | 297 | |
445d9cae | 298 | out: |
e980f2bf | 299 | g_free(blob); |
0c764a9d | 300 | g_strfreev(pathnames); |
96a1616c | 301 | qapi_free_AcpiTableOptions(hdrs); |
0c764a9d | 302 | |
23084327 | 303 | error_propagate(errp, err); |
8a92ea2f | 304 | } |
a54d41a8 | 305 | |
60de1163 MT |
306 | static bool acpi_table_builtin = false; |
307 | ||
308 | void acpi_table_add_builtin(const QemuOpts *opts, Error **errp) | |
309 | { | |
310 | acpi_table_builtin = true; | |
311 | acpi_table_add(opts, errp); | |
312 | } | |
313 | ||
314 | unsigned acpi_table_len(void *current) | |
315 | { | |
316 | struct acpi_table_header *hdr = current - sizeof(hdr->_length); | |
317 | return hdr->_length; | |
318 | } | |
319 | ||
320 | static | |
321 | void *acpi_table_hdr(void *h) | |
322 | { | |
323 | struct acpi_table_header *hdr = h; | |
324 | return &hdr->sig; | |
325 | } | |
326 | ||
327 | uint8_t *acpi_table_first(void) | |
328 | { | |
329 | if (acpi_table_builtin || !acpi_tables) { | |
330 | return NULL; | |
331 | } | |
332 | return acpi_table_hdr(acpi_tables + ACPI_TABLE_PFX_SIZE); | |
333 | } | |
334 | ||
335 | uint8_t *acpi_table_next(uint8_t *current) | |
336 | { | |
337 | uint8_t *next = current + acpi_table_len(current); | |
338 | ||
339 | if (next - acpi_tables >= acpi_tables_len) { | |
340 | return NULL; | |
341 | } else { | |
342 | return acpi_table_hdr(next); | |
343 | } | |
344 | } | |
345 | ||
88594e4f LE |
346 | int acpi_get_slic_oem(AcpiSlicOem *oem) |
347 | { | |
348 | uint8_t *u; | |
349 | ||
350 | for (u = acpi_table_first(); u; u = acpi_table_next(u)) { | |
351 | struct acpi_table_header *hdr = (void *)(u - sizeof(hdr->_length)); | |
352 | ||
353 | if (memcmp(hdr->sig, "SLIC", 4) == 0) { | |
354 | oem->id = hdr->oem_id; | |
355 | oem->table_id = hdr->oem_table_id; | |
356 | return 0; | |
357 | } | |
358 | } | |
359 | return -1; | |
360 | } | |
361 | ||
da98c8eb GH |
362 | static void acpi_notify_wakeup(Notifier *notifier, void *data) |
363 | { | |
364 | ACPIREGS *ar = container_of(notifier, ACPIREGS, wakeup); | |
365 | WakeupReason *reason = data; | |
366 | ||
367 | switch (*reason) { | |
62aeb0f7 GH |
368 | case QEMU_WAKEUP_REASON_RTC: |
369 | ar->pm1.evt.sts |= | |
370 | (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_RT_CLOCK_STATUS); | |
371 | break; | |
6595abc0 GH |
372 | case QEMU_WAKEUP_REASON_PMTIMER: |
373 | ar->pm1.evt.sts |= | |
374 | (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_TIMER_STATUS); | |
375 | break; | |
da98c8eb | 376 | case QEMU_WAKEUP_REASON_OTHER: |
da98c8eb GH |
377 | /* ACPI_BITMASK_WAKE_STATUS should be set on resume. |
378 | Pretend that resume was caused by power button */ | |
379 | ar->pm1.evt.sts |= | |
380 | (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_POWER_BUTTON_STATUS); | |
381 | break; | |
4bc78a87 LJ |
382 | default: |
383 | break; | |
da98c8eb GH |
384 | } |
385 | } | |
386 | ||
04dc308f | 387 | /* ACPI PM1a EVT */ |
2886be1b | 388 | uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar) |
04dc308f | 389 | { |
3ef0eab1 PD |
390 | /* Compare ns-clock, not PM timer ticks, because |
391 | acpi_pm_tmr_update function uses ns for setting the timer. */ | |
392 | int64_t d = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); | |
393 | if (d >= muldiv64(ar->tmr.overflow_time, | |
73bcb24d | 394 | NANOSECONDS_PER_SECOND, PM_TIMER_FREQUENCY)) { |
355bf2e5 | 395 | ar->pm1.evt.sts |= ACPI_BITMASK_TIMER_STATUS; |
04dc308f | 396 | } |
355bf2e5 | 397 | return ar->pm1.evt.sts; |
04dc308f IY |
398 | } |
399 | ||
b5a7c024 | 400 | static void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val) |
04dc308f | 401 | { |
2886be1b | 402 | uint16_t pm1_sts = acpi_pm1_evt_get_sts(ar); |
04dc308f IY |
403 | if (pm1_sts & val & ACPI_BITMASK_TIMER_STATUS) { |
404 | /* if TMRSTS is reset, then compute the new overflow time */ | |
355bf2e5 | 405 | acpi_pm_tmr_calc_overflow_time(ar); |
04dc308f | 406 | } |
355bf2e5 | 407 | ar->pm1.evt.sts &= ~val; |
04dc308f IY |
408 | } |
409 | ||
b5a7c024 | 410 | static void acpi_pm1_evt_write_en(ACPIREGS *ar, uint16_t val) |
8283c4f5 GH |
411 | { |
412 | ar->pm1.evt.en = val; | |
62aeb0f7 GH |
413 | qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC, |
414 | val & ACPI_BITMASK_RT_CLOCK_ENABLE); | |
6595abc0 GH |
415 | qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER, |
416 | val & ACPI_BITMASK_TIMER_ENABLE); | |
8283c4f5 GH |
417 | } |
418 | ||
355bf2e5 | 419 | void acpi_pm1_evt_power_down(ACPIREGS *ar) |
04dc308f | 420 | { |
355bf2e5 GH |
421 | if (ar->pm1.evt.en & ACPI_BITMASK_POWER_BUTTON_ENABLE) { |
422 | ar->pm1.evt.sts |= ACPI_BITMASK_POWER_BUTTON_STATUS; | |
423 | ar->tmr.update_sci(ar); | |
04dc308f IY |
424 | } |
425 | } | |
426 | ||
355bf2e5 | 427 | void acpi_pm1_evt_reset(ACPIREGS *ar) |
04dc308f | 428 | { |
355bf2e5 GH |
429 | ar->pm1.evt.sts = 0; |
430 | ar->pm1.evt.en = 0; | |
62aeb0f7 | 431 | qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC, 0); |
6595abc0 | 432 | qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER, 0); |
04dc308f IY |
433 | } |
434 | ||
b5a7c024 GH |
435 | static uint64_t acpi_pm_evt_read(void *opaque, hwaddr addr, unsigned width) |
436 | { | |
437 | ACPIREGS *ar = opaque; | |
438 | switch (addr) { | |
439 | case 0: | |
440 | return acpi_pm1_evt_get_sts(ar); | |
441 | case 2: | |
442 | return ar->pm1.evt.en; | |
443 | default: | |
444 | return 0; | |
445 | } | |
446 | } | |
447 | ||
448 | static void acpi_pm_evt_write(void *opaque, hwaddr addr, uint64_t val, | |
449 | unsigned width) | |
450 | { | |
451 | ACPIREGS *ar = opaque; | |
452 | switch (addr) { | |
453 | case 0: | |
454 | acpi_pm1_evt_write_sts(ar, val); | |
455 | ar->pm1.evt.update_sci(ar); | |
456 | break; | |
457 | case 2: | |
458 | acpi_pm1_evt_write_en(ar, val); | |
459 | ar->pm1.evt.update_sci(ar); | |
460 | break; | |
461 | } | |
462 | } | |
463 | ||
464 | static const MemoryRegionOps acpi_pm_evt_ops = { | |
465 | .read = acpi_pm_evt_read, | |
466 | .write = acpi_pm_evt_write, | |
467 | .valid.min_access_size = 2, | |
468 | .valid.max_access_size = 2, | |
469 | .endianness = DEVICE_LITTLE_ENDIAN, | |
470 | }; | |
471 | ||
472 | void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, | |
473 | MemoryRegion *parent) | |
474 | { | |
475 | ar->pm1.evt.update_sci = update_sci; | |
64bde0f3 PB |
476 | memory_region_init_io(&ar->pm1.evt.io, memory_region_owner(parent), |
477 | &acpi_pm_evt_ops, ar, "acpi-evt", 4); | |
b5a7c024 GH |
478 | memory_region_add_subregion(parent, 0, &ar->pm1.evt.io); |
479 | } | |
480 | ||
a54d41a8 | 481 | /* ACPI PM_TMR */ |
355bf2e5 | 482 | void acpi_pm_tmr_update(ACPIREGS *ar, bool enable) |
a54d41a8 IY |
483 | { |
484 | int64_t expire_time; | |
485 | ||
486 | /* schedule a timer interruption if needed */ | |
487 | if (enable) { | |
73bcb24d | 488 | expire_time = muldiv64(ar->tmr.overflow_time, NANOSECONDS_PER_SECOND, |
a54d41a8 | 489 | PM_TIMER_FREQUENCY); |
bc72ad67 | 490 | timer_mod(ar->tmr.timer, expire_time); |
a54d41a8 | 491 | } else { |
bc72ad67 | 492 | timer_del(ar->tmr.timer); |
a54d41a8 IY |
493 | } |
494 | } | |
495 | ||
87776ab7 PB |
496 | static inline int64_t acpi_pm_tmr_get_clock(void) |
497 | { | |
498 | return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY, | |
499 | NANOSECONDS_PER_SECOND); | |
500 | } | |
501 | ||
355bf2e5 | 502 | void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar) |
a54d41a8 IY |
503 | { |
504 | int64_t d = acpi_pm_tmr_get_clock(); | |
355bf2e5 | 505 | ar->tmr.overflow_time = (d + 0x800000LL) & ~0x7fffffLL; |
a54d41a8 IY |
506 | } |
507 | ||
77d58b1e | 508 | static uint32_t acpi_pm_tmr_get(ACPIREGS *ar) |
a54d41a8 | 509 | { |
3a93113a | 510 | uint32_t d = acpi_pm_tmr_get_clock(); |
a54d41a8 IY |
511 | return d & 0xffffff; |
512 | } | |
513 | ||
514 | static void acpi_pm_tmr_timer(void *opaque) | |
515 | { | |
355bf2e5 | 516 | ACPIREGS *ar = opaque; |
6595abc0 | 517 | qemu_system_wakeup_request(QEMU_WAKEUP_REASON_PMTIMER); |
355bf2e5 | 518 | ar->tmr.update_sci(ar); |
a54d41a8 IY |
519 | } |
520 | ||
77d58b1e GH |
521 | static uint64_t acpi_pm_tmr_read(void *opaque, hwaddr addr, unsigned width) |
522 | { | |
523 | return acpi_pm_tmr_get(opaque); | |
524 | } | |
525 | ||
2d3b9895 GH |
526 | static void acpi_pm_tmr_write(void *opaque, hwaddr addr, uint64_t val, |
527 | unsigned width) | |
528 | { | |
529 | /* nothing */ | |
530 | } | |
531 | ||
77d58b1e GH |
532 | static const MemoryRegionOps acpi_pm_tmr_ops = { |
533 | .read = acpi_pm_tmr_read, | |
2d3b9895 | 534 | .write = acpi_pm_tmr_write, |
77d58b1e GH |
535 | .valid.min_access_size = 4, |
536 | .valid.max_access_size = 4, | |
537 | .endianness = DEVICE_LITTLE_ENDIAN, | |
538 | }; | |
539 | ||
540 | void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, | |
541 | MemoryRegion *parent) | |
a54d41a8 | 542 | { |
355bf2e5 | 543 | ar->tmr.update_sci = update_sci; |
bc72ad67 | 544 | ar->tmr.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, acpi_pm_tmr_timer, ar); |
64bde0f3 PB |
545 | memory_region_init_io(&ar->tmr.io, memory_region_owner(parent), |
546 | &acpi_pm_tmr_ops, ar, "acpi-tmr", 4); | |
77d58b1e | 547 | memory_region_add_subregion(parent, 8, &ar->tmr.io); |
a54d41a8 IY |
548 | } |
549 | ||
355bf2e5 | 550 | void acpi_pm_tmr_reset(ACPIREGS *ar) |
a54d41a8 | 551 | { |
355bf2e5 | 552 | ar->tmr.overflow_time = 0; |
bc72ad67 | 553 | timer_del(ar->tmr.timer); |
a54d41a8 | 554 | } |
eaba51c5 IY |
555 | |
556 | /* ACPI PM1aCNT */ | |
afafe4bb | 557 | static void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val) |
eaba51c5 | 558 | { |
355bf2e5 | 559 | ar->pm1.cnt.cnt = val & ~(ACPI_BITMASK_SLEEP_ENABLE); |
eaba51c5 IY |
560 | |
561 | if (val & ACPI_BITMASK_SLEEP_ENABLE) { | |
562 | /* change suspend type */ | |
563 | uint16_t sus_typ = (val >> 10) & 7; | |
564 | switch(sus_typ) { | |
565 | case 0: /* soft power off */ | |
cf83f140 | 566 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
eaba51c5 IY |
567 | break; |
568 | case 1: | |
da98c8eb GH |
569 | qemu_system_suspend_request(); |
570 | break; | |
eaba51c5 | 571 | default: |
afafe4bb | 572 | if (sus_typ == ar->pm1.cnt.s4_val) { /* S4 request */ |
2ea4100f | 573 | qapi_event_send_suspend_disk(&error_abort); |
cf83f140 | 574 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
459ae5ea | 575 | } |
eaba51c5 IY |
576 | break; |
577 | } | |
578 | } | |
579 | } | |
580 | ||
355bf2e5 | 581 | void acpi_pm1_cnt_update(ACPIREGS *ar, |
eaba51c5 IY |
582 | bool sci_enable, bool sci_disable) |
583 | { | |
584 | /* ACPI specs 3.0, 4.7.2.5 */ | |
585 | if (sci_enable) { | |
355bf2e5 | 586 | ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE; |
eaba51c5 | 587 | } else if (sci_disable) { |
355bf2e5 | 588 | ar->pm1.cnt.cnt &= ~ACPI_BITMASK_SCI_ENABLE; |
eaba51c5 IY |
589 | } |
590 | } | |
591 | ||
afafe4bb GH |
592 | static uint64_t acpi_pm_cnt_read(void *opaque, hwaddr addr, unsigned width) |
593 | { | |
594 | ACPIREGS *ar = opaque; | |
595 | return ar->pm1.cnt.cnt; | |
596 | } | |
597 | ||
598 | static void acpi_pm_cnt_write(void *opaque, hwaddr addr, uint64_t val, | |
599 | unsigned width) | |
600 | { | |
601 | acpi_pm1_cnt_write(opaque, val); | |
602 | } | |
603 | ||
604 | static const MemoryRegionOps acpi_pm_cnt_ops = { | |
605 | .read = acpi_pm_cnt_read, | |
606 | .write = acpi_pm_cnt_write, | |
607 | .valid.min_access_size = 2, | |
608 | .valid.max_access_size = 2, | |
609 | .endianness = DEVICE_LITTLE_ENDIAN, | |
610 | }; | |
611 | ||
9a10bbb4 LE |
612 | void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, |
613 | bool disable_s3, bool disable_s4, uint8_t s4_val) | |
afafe4bb | 614 | { |
e3845e7c LE |
615 | FWCfgState *fw_cfg; |
616 | ||
560e6396 | 617 | ar->pm1.cnt.s4_val = s4_val; |
afafe4bb GH |
618 | ar->wakeup.notify = acpi_notify_wakeup; |
619 | qemu_register_wakeup_notifier(&ar->wakeup); | |
64bde0f3 PB |
620 | memory_region_init_io(&ar->pm1.cnt.io, memory_region_owner(parent), |
621 | &acpi_pm_cnt_ops, ar, "acpi-cnt", 2); | |
afafe4bb | 622 | memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io); |
e3845e7c LE |
623 | |
624 | fw_cfg = fw_cfg_find(); | |
625 | if (fw_cfg) { | |
626 | uint8_t suspend[6] = {128, 0, 0, 129, 128, 128}; | |
627 | suspend[3] = 1 | ((!disable_s3) << 7); | |
628 | suspend[4] = s4_val | ((!disable_s4) << 7); | |
629 | ||
630 | fw_cfg_add_file(fw_cfg, "etc/system-states", g_memdup(suspend, 6), 6); | |
631 | } | |
afafe4bb GH |
632 | } |
633 | ||
355bf2e5 | 634 | void acpi_pm1_cnt_reset(ACPIREGS *ar) |
eaba51c5 | 635 | { |
355bf2e5 | 636 | ar->pm1.cnt.cnt = 0; |
eaba51c5 | 637 | } |
23910d3f IY |
638 | |
639 | /* ACPI GPE */ | |
355bf2e5 | 640 | void acpi_gpe_init(ACPIREGS *ar, uint8_t len) |
23910d3f | 641 | { |
355bf2e5 | 642 | ar->gpe.len = len; |
d9a3b33d MT |
643 | /* Only first len / 2 bytes are ever used, |
644 | * but the caller in ich9.c migrates full len bytes. | |
645 | * TODO: fix ich9.c and drop the extra allocation. | |
646 | */ | |
647 | ar->gpe.sts = g_malloc0(len); | |
648 | ar->gpe.en = g_malloc0(len); | |
23910d3f IY |
649 | } |
650 | ||
355bf2e5 | 651 | void acpi_gpe_reset(ACPIREGS *ar) |
23910d3f | 652 | { |
355bf2e5 GH |
653 | memset(ar->gpe.sts, 0, ar->gpe.len / 2); |
654 | memset(ar->gpe.en, 0, ar->gpe.len / 2); | |
23910d3f IY |
655 | } |
656 | ||
355bf2e5 | 657 | static uint8_t *acpi_gpe_ioport_get_ptr(ACPIREGS *ar, uint32_t addr) |
23910d3f IY |
658 | { |
659 | uint8_t *cur = NULL; | |
660 | ||
355bf2e5 GH |
661 | if (addr < ar->gpe.len / 2) { |
662 | cur = ar->gpe.sts + addr; | |
663 | } else if (addr < ar->gpe.len) { | |
664 | cur = ar->gpe.en + addr - ar->gpe.len / 2; | |
23910d3f IY |
665 | } else { |
666 | abort(); | |
667 | } | |
668 | ||
669 | return cur; | |
670 | } | |
671 | ||
355bf2e5 | 672 | void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val) |
23910d3f IY |
673 | { |
674 | uint8_t *cur; | |
675 | ||
355bf2e5 GH |
676 | cur = acpi_gpe_ioport_get_ptr(ar, addr); |
677 | if (addr < ar->gpe.len / 2) { | |
23910d3f IY |
678 | /* GPE_STS */ |
679 | *cur = (*cur) & ~val; | |
355bf2e5 | 680 | } else if (addr < ar->gpe.len) { |
23910d3f IY |
681 | /* GPE_EN */ |
682 | *cur = val; | |
683 | } else { | |
684 | abort(); | |
685 | } | |
686 | } | |
687 | ||
355bf2e5 | 688 | uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr) |
23910d3f IY |
689 | { |
690 | uint8_t *cur; | |
691 | uint32_t val; | |
692 | ||
355bf2e5 | 693 | cur = acpi_gpe_ioport_get_ptr(ar, addr); |
23910d3f IY |
694 | val = 0; |
695 | if (cur != NULL) { | |
696 | val = *cur; | |
697 | } | |
698 | ||
699 | return val; | |
700 | } | |
06313503 | 701 | |
ca9b46bc | 702 | void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq, |
eaf23bf7 | 703 | AcpiEventStatusBits status) |
ca9b46bc ZG |
704 | { |
705 | ar->gpe.sts[0] |= status; | |
706 | acpi_update_sci(ar, irq); | |
707 | } | |
708 | ||
06313503 IM |
709 | void acpi_update_sci(ACPIREGS *regs, qemu_irq irq) |
710 | { | |
711 | int sci_level, pm1a_sts; | |
712 | ||
713 | pm1a_sts = acpi_pm1_evt_get_sts(regs); | |
714 | ||
715 | sci_level = ((pm1a_sts & | |
716 | regs->pm1.evt.en & ACPI_BITMASK_PM1_COMMON_ENABLED) != 0) || | |
717 | ((regs->gpe.sts[0] & regs->gpe.en[0]) != 0); | |
718 | ||
719 | qemu_set_irq(irq, sci_level); | |
720 | ||
721 | /* schedule a timer interruption if needed */ | |
722 | acpi_pm_tmr_update(regs, | |
723 | (regs->pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && | |
724 | !(pm1a_sts & ACPI_BITMASK_TIMER_STATUS)); | |
725 | } |