[qemu.git] / hw / ppc_newworld.c

/*
 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "hw.h"
#include "ppc.h"
#include "ppc_mac.h"
#include "mac_dbdma.h"
#include "nvram.h"
#include "pc.h"
#include "pci.h"
#include "net.h"
#include "sysemu.h"
#include "boards.h"
#include "fw_cfg.h"
#include "escc.h"
#include "openpic.h"

#define MAX_IDE_BUS 2
#define VGA_BIOS_SIZE 65536
#define CFG_ADDR 0xf0000510

/* debug UniNorth */
//#define DEBUG_UNIN

#ifdef DEBUG_UNIN
#define UNIN_DPRINTF(fmt, ...)                                  \
    do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
#else
#define UNIN_DPRINTF(fmt, ...)
#endif

/* UniN device */
static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
{
    UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
}

static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
{
    uint32_t value;

    value = 0;
    UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);

    return value;
}

static CPUWriteMemoryFunc *unin_write[] = {
    &unin_writel,
    &unin_writel,
    &unin_writel,
};

static CPUReadMemoryFunc *unin_read[] = {
    &unin_readl,
    &unin_readl,
    &unin_readl,
};

static int fw_cfg_boot_set(void *opaque, const char *boot_device)
{
    fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
    return 0;
}

/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size,
                             const char *boot_device,
                             const char *kernel_filename,
                             const char *kernel_cmdline,
                             const char *initrd_filename,
                             const char *cpu_model)
{
    CPUState *env = NULL, *envs[MAX_CPUS];
    char *filename;
    qemu_irq *pic, **openpic_irqs;
    int unin_memory;
    int linux_boot, i;
    ram_addr_t ram_offset, bios_offset, vga_bios_offset;
    uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
    PCIBus *pci_bus;
    MacIONVRAMState *nvr;
    int nvram_mem_index;
    int vga_bios_size, bios_size;
    qemu_irq *dummy_irq;
    int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
    int ppc_boot_device;
    int index;
    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
    void *fw_cfg;
    void *dbdma;
    uint8_t *vga_bios_ptr;

    linux_boot = (kernel_filename != NULL);

    /* init CPUs */
    if (cpu_model == NULL)
        cpu_model = "G4";
    for (i = 0; i < smp_cpus; i++) {
        env = cpu_init(cpu_model);
        if (!env) {
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
            exit(1);
        }
        /* Set time-base frequency to 100 Mhz */
        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
#if 0
        env->osi_call = vga_osi_call;
#endif
        qemu_register_reset(&cpu_ppc_reset, env);
        envs[i] = env;
    }

    /* allocate RAM */
    ram_offset = qemu_ram_alloc(ram_size);
    cpu_register_physical_memory(0, ram_size, ram_offset);

    /* allocate and load BIOS */
    bios_offset = qemu_ram_alloc(BIOS_SIZE);
    if (bios_name == NULL)
        bios_name = PROM_FILENAME;
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
    cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);

    /* Load OpenBIOS (ELF) */
    if (filename) {
        bios_size = load_elf(filename, 0, NULL, NULL, NULL);
        qemu_free(filename);
    } else {
        bios_size = -1;
    }
    if (bios_size < 0 || bios_size > BIOS_SIZE) {
        hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
        exit(1);
    }

    /* allocate and load VGA BIOS */
    vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
    vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
    if (filename) {
        vga_bios_size = load_image(filename, vga_bios_ptr + 8);
        qemu_free(filename);
    } else {
        vga_bios_size = -1;
    }
    if (vga_bios_size < 0) {
        /* if no bios is present, we can still work */
        fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
                VGABIOS_FILENAME);
        vga_bios_size = 0;
    } else {
        /* set a specific header (XXX: find real Apple format for NDRV
           drivers) */
        vga_bios_ptr[0] = 'N';
        vga_bios_ptr[1] = 'D';
        vga_bios_ptr[2] = 'R';
        vga_bios_ptr[3] = 'V';
        cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
        vga_bios_size += 8;
    }

    if (linux_boot) {
        uint64_t lowaddr = 0;
        kernel_base = KERNEL_LOAD_ADDR;

        /* Now we can load the kernel. The first step tries to load the kernel
           supposing PhysAddr = 0x00000000. If that was wrong the kernel is
           loaded again, the new PhysAddr being computed from lowaddr. */
        kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL);
        if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
            kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
                                   NULL, 0, NULL);
        }
        if (kernel_size < 0)
            kernel_size = load_aout(kernel_filename, kernel_base,
                                    ram_size - kernel_base);
        if (kernel_size < 0)
            kernel_size = load_image_targphys(kernel_filename,
                                              kernel_base,
                                              ram_size - kernel_base);
        if (kernel_size < 0) {
            hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
            exit(1);
        }
        /* load initrd */
        if (initrd_filename) {
            initrd_base = INITRD_LOAD_ADDR;
            initrd_size = load_image_targphys(initrd_filename, initrd_base,
                                              ram_size - initrd_base);
            if (initrd_size < 0) {
                hw_error("qemu: could not load initial ram disk '%s'\n",
                         initrd_filename);
                exit(1);
            }
        } else {
            initrd_base = 0;
            initrd_size = 0;
        }
        ppc_boot_device = 'm';
    } else {
        kernel_base = 0;
        kernel_size = 0;
        initrd_base = 0;
        initrd_size = 0;
        ppc_boot_device = '\0';
        /* We consider that NewWorld PowerMac never have any floppy drive
         * For now, OHW cannot boot from the network.
         */
        for (i = 0; boot_device[i] != '\0'; i++) {
            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
                ppc_boot_device = boot_device[i];
                break;
            }
        }
        if (ppc_boot_device == '\0') {
            fprintf(stderr, "No valid boot device for Mac99 machine\n");
            exit(1);
        }
    }

    isa_mem_base = 0x80000000;

    /* Register 8 MB of ISA IO space */
    isa_mmio_init(0xf2000000, 0x00800000);

    /* UniN init */
    unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
    cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);

    openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
    openpic_irqs[0] =
        qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
    for (i = 0; i < smp_cpus; i++) {
        /* Mac99 IRQ connection between OpenPIC outputs pins
         * and PowerPC input pins
         */
        switch (PPC_INPUT(env)) {
        case PPC_FLAGS_INPUT_6xx:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
            break;
#if defined(TARGET_PPC64)
        case PPC_FLAGS_INPUT_970:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
            break;
#endif /* defined(TARGET_PPC64) */
        default:
            hw_error("Bus model not supported on mac99 machine\n");
            exit(1);
        }
    }
    pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
    pci_bus = pci_pmac_init(pic);
    /* init basic PC hardware */
    pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);

    /* XXX: suppress that */
    dummy_irq = i8259_init(NULL);

    escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
                               serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);

    for(i = 0; i < nb_nics; i++)
        pci_nic_init(&nd_table[i], "ne2k_pci", NULL);

    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
        fprintf(stderr, "qemu: too many IDE bus\n");
        exit(1);
    }
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
        if (index != -1)
            hd[i] = drives_table[index].bdrv;
        else
            hd[i] = NULL;
    }
    dbdma = DBDMA_init(&dbdma_mem_index);
    pci_cmd646_ide_init(pci_bus, hd, 0);

    /* cuda also initialize ADB */
    cuda_init(&cuda_mem_index, pic[0x19]);

    adb_kbd_init(&adb_bus);
    adb_mouse_init(&adb_bus);


    macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
               dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
               escc_mem_index);

    if (usb_enabled) {
        usb_ohci_init_pci(pci_bus, 3, -1);
    }

    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
        graphic_depth = 15;

    /* The NewWorld NVRAM is not located in the MacIO device */
    nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
    pmac_format_nvram_partition(nvr, 0x2000);
    macio_nvram_map(nvr, 0xFFF04000);
    /* No PCI init: the BIOS will do it */

    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
    if (kernel_cmdline) {
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
        pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
    } else {
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
    }
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}

static QEMUMachine core99_machine = {
    .name = "mac99",
    .desc = "Mac99 based PowerMAC",
    .init = ppc_core99_init,
    .max_cpus = MAX_CPUS,
};

static void core99_machine_init(void)
{
    qemu_register_machine(&core99_machine);
}

machine_init(core99_machine_init);
Commit	Line	Data
64201201	1	/*
3cbee15b	2	* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
5fafdf24	3	*
47103572	4	* Copyright (c) 2004-2007 Fabrice Bellard
3cbee15b	5	* Copyright (c) 2007 Jocelyn Mayer
5fafdf24	6	*
64201201 FB	7	* Permission is hereby granted, free of charge, to any person obtaining a copy
	8	* of this software and associated documentation files (the "Software"), to deal
	9	* in the Software without restriction, including without limitation the rights
	10	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	11	* copies of the Software, and to permit persons to whom the Software is
	12	* furnished to do so, subject to the following conditions:
	13	*
	14	* The above copyright notice and this permission notice shall be included in
	15	* all copies or substantial portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	22	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	23	* THE SOFTWARE.
	24	*/
87ecb68b PB	25	#include "hw.h"
87ecb68b PB	26	#include "ppc.h"
3cbee15b	27	#include "ppc_mac.h"
28ce5ce6	28	#include "mac_dbdma.h"
87ecb68b PB	29	#include "nvram.h"
	30	#include "pc.h"
	31	#include "pci.h"
	32	#include "net.h"
	33	#include "sysemu.h"
	34	#include "boards.h"
006f3a48	35	#include "fw_cfg.h"
7fa9ae1a	36	#include "escc.h"
b7169916	37	#include "openpic.h"
267002cd	38
e4bcb14c	39	#define MAX_IDE_BUS 2
864c136a	40	#define VGA_BIOS_SIZE 65536
006f3a48	41	#define CFG_ADDR 0xf0000510
e4bcb14c	42
f3902383 BS	43	/* debug UniNorth */
	44	//#define DEBUG_UNIN
	45
	46	#ifdef DEBUG_UNIN
001faf32 BS	47	#define UNIN_DPRINTF(fmt, ...) \
001faf32 BS	48	do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
f3902383	49	#else
001faf32	50	#define UNIN_DPRINTF(fmt, ...)
f3902383 BS	51	#endif
f3902383 BS	52
0aa6a4a2 FB	53	/* UniN device */
	54	static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
	55	{
f3902383	56	UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
0aa6a4a2 FB	57	}
	58
	59	static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
	60	{
f3902383 BS	61	uint32_t value;
	62
	63	value = 0;
	64	UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
	65
	66	return value;
0aa6a4a2 FB	67	}
	68
	69	static CPUWriteMemoryFunc *unin_write[] = {
	70	&unin_writel,
	71	&unin_writel,
	72	&unin_writel,
	73	};
	74
	75	static CPUReadMemoryFunc *unin_read[] = {
	76	&unin_readl,
	77	&unin_readl,
	78	&unin_readl,
	79	};
	80
513f789f BS	81	static int fw_cfg_boot_set(void opaque, const char boot_device)
	82	{
	83	fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
	84	return 0;
	85	}
	86
3cbee15b	87	/* PowerPC Mac99 hardware initialisation */
fbe1b595	88	static void ppc_core99_init (ram_addr_t ram_size,
3023f332	89	const char *boot_device,
3cbee15b JM	90	const char *kernel_filename,
	91	const char *kernel_cmdline,
	92	const char *initrd_filename,
	93	const char *cpu_model)
64201201	94	{
aaed909a	95	CPUState env = NULL, envs[MAX_CPUS];
5cea8590	96	char *filename;
e9df014c	97	qemu_irq pic, *openpic_irqs;
aef445bd	98	int unin_memory;
d5295253	99	int linux_boot, i;
b584726d	100	ram_addr_t ram_offset, bios_offset, vga_bios_offset;
b6b8bd18	101	uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
46e50e9d	102	PCIBus *pci_bus;
3cbee15b JM	103	MacIONVRAMState *nvr;
3cbee15b JM	104	int nvram_mem_index;
d5295253	105	int vga_bios_size, bios_size;
d537cf6c	106	qemu_irq *dummy_irq;
7fa9ae1a	107	int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
28c5af54	108	int ppc_boot_device;
e4bcb14c TS	109	int index;
e4bcb14c TS	110	BlockDriverState hd[MAX_IDE_BUS MAX_IDE_DEVS];
006f3a48	111	void *fw_cfg;
28ce5ce6	112	void *dbdma;
44654490	113	uint8_t *vga_bios_ptr;
46e50e9d	114
64201201 FB	115	linux_boot = (kernel_filename != NULL);
64201201 FB	116
c68ea704	117	/* init CPUs */
94fc95cd	118	if (cpu_model == NULL)
e6bd862b	119	cpu_model = "G4";
e9df014c	120	for (i = 0; i < smp_cpus; i++) {
aaed909a FB	121	env = cpu_init(cpu_model);
	122	if (!env) {
	123	fprintf(stderr, "Unable to find PowerPC CPU definition\n");
	124	exit(1);
	125	}
e9df014c JM	126	/* Set time-base frequency to 100 Mhz */
e9df014c JM	127	cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
3cbee15b	128	#if 0
e9df014c	129	env->osi_call = vga_osi_call;
3cbee15b	130	#endif
a08d4367	131	qemu_register_reset(&cpu_ppc_reset, env);
e9df014c JM	132	envs[i] = env;
e9df014c JM	133	}
c68ea704	134
64201201	135	/* allocate RAM */
864c136a BS	136	ram_offset = qemu_ram_alloc(ram_size);
	137	cpu_register_physical_memory(0, ram_size, ram_offset);
	138
64201201	139	/* allocate and load BIOS */
864c136a	140	bios_offset = qemu_ram_alloc(BIOS_SIZE);
1192dad8	141	if (bios_name == NULL)
006f3a48	142	bios_name = PROM_FILENAME;
5cea8590	143	filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
006f3a48 BS	144	cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset \| IO_MEM_ROM);
	145
	146	/* Load OpenBIOS (ELF) */
5cea8590 PB	147	if (filename) {
	148	bios_size = load_elf(filename, 0, NULL, NULL, NULL);
	149	qemu_free(filename);
	150	} else {
	151	bios_size = -1;
	152	}
d5295253	153	if (bios_size < 0 \|\| bios_size > BIOS_SIZE) {
5cea8590	154	hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
64201201 FB	155	exit(1);
64201201 FB	156	}
3b46e624	157
d5295253	158	/* allocate and load VGA BIOS */
864c136a	159	vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
44654490	160	vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
5cea8590 PB	161	filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
	162	if (filename) {
	163	vga_bios_size = load_image(filename, vga_bios_ptr + 8);
	164	qemu_free(filename);
	165	} else {
	166	vga_bios_size = -1;
	167	}
d5295253 FB	168	if (vga_bios_size < 0) {
d5295253 FB	169	/* if no bios is present, we can still work */
5cea8590 PB	170	fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
5cea8590 PB	171	VGABIOS_FILENAME);
d5295253 FB	172	vga_bios_size = 0;
	173	} else {
	174	/* set a specific header (XXX: find real Apple format for NDRV
	175	drivers) */
44654490 PB	176	vga_bios_ptr[0] = 'N';
	177	vga_bios_ptr[1] = 'D';
	178	vga_bios_ptr[2] = 'R';
	179	vga_bios_ptr[3] = 'V';
	180	cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
d5295253 FB	181	vga_bios_size += 8;
d5295253 FB	182	}
3b46e624	183
b6b8bd18	184	if (linux_boot) {
513f789f	185	uint64_t lowaddr = 0;
b6b8bd18	186	kernel_base = KERNEL_LOAD_ADDR;
513f789f BS	187
	188	/* Now we can load the kernel. The first step tries to load the kernel
	189	supposing PhysAddr = 0x00000000. If that was wrong the kernel is
	190	loaded again, the new PhysAddr being computed from lowaddr. */
	191	kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL);
	192	if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
	193	kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
	194	NULL, 0, NULL);
	195	}
	196	if (kernel_size < 0)
	197	kernel_size = load_aout(kernel_filename, kernel_base,
	198	ram_size - kernel_base);
	199	if (kernel_size < 0)
	200	kernel_size = load_image_targphys(kernel_filename,
	201	kernel_base,
	202	ram_size - kernel_base);
b6b8bd18	203	if (kernel_size < 0) {
2ac71179	204	hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
b6b8bd18 FB	205	exit(1);
	206	}
	207	/* load initrd */
	208	if (initrd_filename) {
	209	initrd_base = INITRD_LOAD_ADDR;
44654490 PB	210	initrd_size = load_image_targphys(initrd_filename, initrd_base,
44654490 PB	211	ram_size - initrd_base);
b6b8bd18	212	if (initrd_size < 0) {
2ac71179 PB	213	hw_error("qemu: could not load initial ram disk '%s'\n",
2ac71179 PB	214	initrd_filename);
b6b8bd18 FB	215	exit(1);
	216	}
	217	} else {
	218	initrd_base = 0;
	219	initrd_size = 0;
	220	}
6ac0e82d	221	ppc_boot_device = 'm';
b6b8bd18 FB	222	} else {
	223	kernel_base = 0;
	224	kernel_size = 0;
	225	initrd_base = 0;
	226	initrd_size = 0;
28c5af54 JM	227	ppc_boot_device = '\0';
	228	/* We consider that NewWorld PowerMac never have any floppy drive
	229	* For now, OHW cannot boot from the network.
	230	*/
0d913fdb JM	231	for (i = 0; boot_device[i] != '\0'; i++) {
	232	if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
	233	ppc_boot_device = boot_device[i];
28c5af54	234	break;
0d913fdb	235	}
28c5af54 JM	236	}
	237	if (ppc_boot_device == '\0') {
	238	fprintf(stderr, "No valid boot device for Mac99 machine\n");
	239	exit(1);
	240	}
b6b8bd18	241	}
0aa6a4a2	242
3cbee15b	243	isa_mem_base = 0x80000000;
aef445bd	244
3cbee15b JM	245	/* Register 8 MB of ISA IO space */
3cbee15b JM	246	isa_mmio_init(0xf2000000, 0x00800000);
3b46e624	247
3cbee15b	248	/* UniN init */
1eed09cb	249	unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
3cbee15b	250	cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
47103572	251
3cbee15b JM	252	openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
	253	openpic_irqs[0] =
	254	qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
	255	for (i = 0; i < smp_cpus; i++) {
	256	/* Mac99 IRQ connection between OpenPIC outputs pins
	257	* and PowerPC input pins
	258	*/
	259	switch (PPC_INPUT(env)) {
	260	case PPC_FLAGS_INPUT_6xx:
	261	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	262	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	263	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	264	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	265	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	266	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	267	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
	268	/* Not connected ? */
	269	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	270	/* Check this */
	271	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	272	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
	273	break;
00af685f	274	#if defined(TARGET_PPC64)
3cbee15b JM	275	case PPC_FLAGS_INPUT_970:
	276	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	277	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	278	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	279	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	280	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	281	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	282	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
	283	/* Not connected ? */
	284	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	285	/* Check this */
	286	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	287	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
	288	break;
00af685f	289	#endif /* defined(TARGET_PPC64) */
3cbee15b	290	default:
2ac71179	291	hw_error("Bus model not supported on mac99 machine\n");
3cbee15b	292	exit(1);
0aa6a4a2	293	}
3cbee15b JM	294	}
	295	pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
	296	pci_bus = pci_pmac_init(pic);
	297	/* init basic PC hardware */
fbe1b595	298	pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
aae9366a	299
3cbee15b JM	300	/* XXX: suppress that */
	301	dummy_irq = i8259_init(NULL);
	302
aeeb69c7 AJ	303	escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
aeeb69c7 AJ	304	serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
cb457d76 AL	305
cb457d76 AL	306	for(i = 0; i < nb_nics; i++)
5607c388	307	pci_nic_init(&nd_table[i], "ne2k_pci", NULL);
cb457d76	308
e4bcb14c TS	309	if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
	310	fprintf(stderr, "qemu: too many IDE bus\n");
	311	exit(1);
	312	}
	313	for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
	314	index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
	315	if (index != -1)
	316	hd[i] = drives_table[index].bdrv;
	317	else
	318	hd[i] = NULL;
	319	}
28ce5ce6	320	dbdma = DBDMA_init(&dbdma_mem_index);
77f0435e BS	321	pci_cmd646_ide_init(pci_bus, hd, 0);
77f0435e BS	322
3cbee15b JM	323	/* cuda also initialize ADB */
3cbee15b JM	324	cuda_init(&cuda_mem_index, pic[0x19]);
aae9366a	325
3cbee15b JM	326	adb_kbd_init(&adb_bus);
3cbee15b JM	327	adb_mouse_init(&adb_bus);
3b46e624	328
3b46e624	329
4ebcf884	330	macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
77f0435e	331	dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
4ebcf884	332	escc_mem_index);
0d92ed30 PB	333
0d92ed30 PB	334	if (usb_enabled) {
e24ad6f1	335	usb_ohci_init_pci(pci_bus, 3, -1);
0d92ed30 PB	336	}
0d92ed30 PB	337
b6b8bd18 FB	338	if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
b6b8bd18 FB	339	graphic_depth = 15;
4f3f238b	340
3cbee15b	341	/* The NewWorld NVRAM is not located in the MacIO device */
68af3f24	342	nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
3cbee15b	343	pmac_format_nvram_partition(nvr, 0x2000);
74e91155	344	macio_nvram_map(nvr, 0xFFF04000);
b6b8bd18	345	/* No PCI init: the BIOS will do it */
0aa6a4a2	346
006f3a48 BS	347	fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
	348	fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
	349	fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
	350	fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
513f789f BS	351	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
	352	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
	353	if (kernel_cmdline) {
	354	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
	355	pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
	356	} else {
	357	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
	358	}
	359	fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
	360	fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
	361	fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
	362	qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
aae9366a	363	}
0aa6a4a2	364
f80f9ec9	365	static QEMUMachine core99_machine = {
4b32e168 AL	366	.name = "mac99",
	367	.desc = "Mac99 based PowerMAC",
	368	.init = ppc_core99_init,
3d878caa	369	.max_cpus = MAX_CPUS,
0aa6a4a2	370	};
f80f9ec9 AL	371
	372	static void core99_machine_init(void)
	373	{
	374	qemu_register_machine(&core99_machine);
	375	}
	376
	377	machine_init(core99_machine_init);