[qemu.git] / hw / ppc_chrp.c

/*
 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "hw.h"
#include "ppc.h"
#include "ppc_mac.h"
#include "mac_dbdma.h"
#include "nvram.h"
#include "pc.h"
#include "pci.h"
#include "net.h"
#include "sysemu.h"
#include "boards.h"
#include "escc.h"

#define MAX_IDE_BUS 2

/* UniN device */
static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
{
}

static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
{
    return 0;
}

static CPUWriteMemoryFunc *unin_write[] = {
    &unin_writel,
    &unin_writel,
    &unin_writel,
};

static CPUReadMemoryFunc *unin_read[] = {
    &unin_readl,
    &unin_readl,
    &unin_readl,
};

/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
                             const char *boot_device,
                             const char *kernel_filename,
                             const char *kernel_cmdline,
                             const char *initrd_filename,
                             const char *cpu_model)
{
    CPUState *env = NULL, *envs[MAX_CPUS];
    char buf[1024];
    qemu_irq *pic, **openpic_irqs;
    int unin_memory;
    int linux_boot, i;
    unsigned long bios_offset, vga_bios_offset;
    uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
    PCIBus *pci_bus;
    nvram_t nvram;
#if 0
    MacIONVRAMState *nvr;
    int nvram_mem_index;
#endif
    m48t59_t *m48t59;
    int vga_bios_size, bios_size;
    qemu_irq *dummy_irq;
    int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
    int ide_mem_index[2];
    int ppc_boot_device;
    int index;
    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
    void *dbdma;

    linux_boot = (kernel_filename != NULL);

    /* init CPUs */
    if (cpu_model == NULL)
        cpu_model = "default";
    for (i = 0; i < smp_cpus; i++) {
        env = cpu_init(cpu_model);
        if (!env) {
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
            exit(1);
        }
        /* Set time-base frequency to 100 Mhz */
        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
#if 0
        env->osi_call = vga_osi_call;
#endif
        qemu_register_reset(&cpu_ppc_reset, env);
        envs[i] = env;
    }
    if (env->nip < 0xFFF80000) {
        /* Special test for PowerPC 601:
         * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
         * But the NVRAM is located at 0xFFF04000...
         */
        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
    }

    /* allocate RAM */
    cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);

    /* allocate and load BIOS */
    bios_offset = ram_size + vga_ram_size;
    if (bios_name == NULL)
        bios_name = BIOS_FILENAME;
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
    bios_size = load_image(buf, phys_ram_base + bios_offset);
    if (bios_size < 0 || bios_size > BIOS_SIZE) {
        cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
        exit(1);
    }
    bios_size = (bios_size + 0xfff) & ~0xfff;
    if (bios_size > 0x00080000) {
        /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
    }
    cpu_register_physical_memory((uint32_t)(-bios_size),
                                 bios_size, bios_offset | IO_MEM_ROM);

    /* allocate and load VGA BIOS */
    vga_bios_offset = bios_offset + bios_size;
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
    vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
    if (vga_bios_size < 0) {
        /* if no bios is present, we can still work */
        fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
        vga_bios_size = 0;
    } else {
        /* set a specific header (XXX: find real Apple format for NDRV
           drivers) */
        phys_ram_base[vga_bios_offset] = 'N';
        phys_ram_base[vga_bios_offset + 1] = 'D';
        phys_ram_base[vga_bios_offset + 2] = 'R';
        phys_ram_base[vga_bios_offset + 3] = 'V';
        cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
                     vga_bios_size);
        vga_bios_size += 8;
    }
    vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;

    if (linux_boot) {
        kernel_base = KERNEL_LOAD_ADDR;
        /* now we can load the kernel */
        kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
        if (kernel_size < 0) {
            cpu_abort(env, "qemu: could not load kernel '%s'\n",
                      kernel_filename);
            exit(1);
        }
        /* load initrd */
        if (initrd_filename) {
            initrd_base = INITRD_LOAD_ADDR;
            initrd_size = load_image(initrd_filename,
                                     phys_ram_base + initrd_base);
            if (initrd_size < 0) {
                cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
                          initrd_filename);
                exit(1);
            }
        } else {
            initrd_base = 0;
            initrd_size = 0;
        }
        ppc_boot_device = 'm';
    } else {
        kernel_base = 0;
        kernel_size = 0;
        initrd_base = 0;
        initrd_size = 0;
        ppc_boot_device = '\0';
        /* We consider that NewWorld PowerMac never have any floppy drive
         * For now, OHW cannot boot from the network.
         */
        for (i = 0; boot_device[i] != '\0'; i++) {
            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
                ppc_boot_device = boot_device[i];
                break;
            }
        }
        if (ppc_boot_device == '\0') {
            fprintf(stderr, "No valid boot device for Mac99 machine\n");
            exit(1);
        }
    }

    isa_mem_base = 0x80000000;

    /* Register 8 MB of ISA IO space */
    isa_mmio_init(0xf2000000, 0x00800000);

    /* UniN init */
    unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
    cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);

    openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
    openpic_irqs[0] =
        qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
    for (i = 0; i < smp_cpus; i++) {
        /* Mac99 IRQ connection between OpenPIC outputs pins
         * and PowerPC input pins
         */
        switch (PPC_INPUT(env)) {
        case PPC_FLAGS_INPUT_6xx:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
            break;
#if defined(TARGET_PPC64)
        case PPC_FLAGS_INPUT_970:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
            break;
#endif /* defined(TARGET_PPC64) */
        default:
            cpu_abort(env, "Bus model not supported on mac99 machine\n");
            exit(1);
        }
    }
    pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
    pci_bus = pci_pmac_init(pic);
    /* init basic PC hardware */
    pci_vga_init(pci_bus, phys_ram_base + ram_size,
                 ram_size, vga_ram_size,
                 vga_bios_offset, vga_bios_size);

    /* XXX: suppress that */
    dummy_irq = i8259_init(NULL);

    escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
                               serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);

    for(i = 0; i < nb_nics; i++)
        pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");

    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
        fprintf(stderr, "qemu: too many IDE bus\n");
        exit(1);
    }
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
        if (index != -1)
            hd[i] = drives_table[index].bdrv;
        else
            hd[i] = NULL;
    }
    dbdma = DBDMA_init(&dbdma_mem_index);
#if 1
    ide_mem_index[0] = pmac_ide_init(&hd[0], pic[0x13], dbdma, 0x14, pic[0x01]);
    ide_mem_index[1] = pmac_ide_init(&hd[2], pic[0x14], dbdma, 0x16, pic[0x02]);
#else
    pci_cmd646_ide_init(pci_bus, &hd[0], 0);
#endif
    /* cuda also initialize ADB */
    cuda_init(&cuda_mem_index, pic[0x19]);

    adb_kbd_init(&adb_bus);
    adb_mouse_init(&adb_bus);


    macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
               dbdma_mem_index, cuda_mem_index, NULL, 2, ide_mem_index,
               escc_mem_index);

    if (usb_enabled) {
        usb_ohci_init_pci(pci_bus, 3, -1);
    }

    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
        graphic_depth = 15;
#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
    /* The NewWorld NVRAM is not located in the MacIO device */
    nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
    pmac_format_nvram_partition(nvr, 0x2000);
    macio_nvram_map(nvr, 0xFFF04000);
    nvram.opaque = nvr;
    nvram.read_fn = &macio_nvram_read;
    nvram.write_fn = &macio_nvram_write;
#else
    m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
    nvram.opaque = m48t59;
    nvram.read_fn = &m48t59_read;
    nvram.write_fn = &m48t59_write;
#endif
    PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
                         ppc_boot_device, kernel_base, kernel_size,
                         kernel_cmdline,
                         initrd_base, initrd_size,
                         /* XXX: need an option to load a NVRAM image */
                         0,
                         graphic_width, graphic_height, graphic_depth);
    /* No PCI init: the BIOS will do it */

    /* Special port to get debug messages from Open-Firmware */
    register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
}

QEMUMachine core99_machine = {
    .name = "mac99",
    .desc = "Mac99 based PowerMAC",
    .init = ppc_core99_init,
    .ram_require = BIOS_SIZE + VGA_RAM_SIZE,
    .max_cpus = MAX_CPUS,
};
Commit	Line	Data
64201201	1	/*
3cbee15b	2	* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
5fafdf24	3	*
47103572	4	* Copyright (c) 2004-2007 Fabrice Bellard
3cbee15b	5	* Copyright (c) 2007 Jocelyn Mayer
5fafdf24	6	*
64201201 FB	7	* Permission is hereby granted, free of charge, to any person obtaining a copy
	8	* of this software and associated documentation files (the "Software"), to deal
	9	* in the Software without restriction, including without limitation the rights
	10	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	11	* copies of the Software, and to permit persons to whom the Software is
	12	* furnished to do so, subject to the following conditions:
	13	*
	14	* The above copyright notice and this permission notice shall be included in
	15	* all copies or substantial portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	22	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	23	* THE SOFTWARE.
	24	*/
87ecb68b PB	25	#include "hw.h"
87ecb68b PB	26	#include "ppc.h"
3cbee15b	27	#include "ppc_mac.h"
28ce5ce6	28	#include "mac_dbdma.h"
87ecb68b PB	29	#include "nvram.h"
	30	#include "pc.h"
	31	#include "pci.h"
	32	#include "net.h"
	33	#include "sysemu.h"
	34	#include "boards.h"
7fa9ae1a	35	#include "escc.h"
267002cd	36
e4bcb14c TS	37	#define MAX_IDE_BUS 2
e4bcb14c TS	38
0aa6a4a2 FB	39	/* UniN device */
	40	static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
	41	{
	42	}
	43
	44	static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
	45	{
	46	return 0;
	47	}
	48
	49	static CPUWriteMemoryFunc *unin_write[] = {
	50	&unin_writel,
	51	&unin_writel,
	52	&unin_writel,
	53	};
	54
	55	static CPUReadMemoryFunc *unin_read[] = {
	56	&unin_readl,
	57	&unin_readl,
	58	&unin_readl,
	59	};
	60
3cbee15b	61	/* PowerPC Mac99 hardware initialisation */
00f82b8a	62	static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
3023f332	63	const char *boot_device,
3cbee15b JM	64	const char *kernel_filename,
	65	const char *kernel_cmdline,
	66	const char *initrd_filename,
	67	const char *cpu_model)
64201201	68	{
aaed909a	69	CPUState env = NULL, envs[MAX_CPUS];
64201201	70	char buf[1024];
e9df014c	71	qemu_irq pic, *openpic_irqs;
aef445bd	72	int unin_memory;
d5295253 FB	73	int linux_boot, i;
d5295253 FB	74	unsigned long bios_offset, vga_bios_offset;
b6b8bd18	75	uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
46e50e9d	76	PCIBus *pci_bus;
3cbee15b JM	77	nvram_t nvram;
	78	#if 0
	79	MacIONVRAMState *nvr;
	80	int nvram_mem_index;
	81	#endif
	82	m48t59_t *m48t59;
d5295253	83	int vga_bios_size, bios_size;
d537cf6c	84	qemu_irq *dummy_irq;
7fa9ae1a	85	int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
3cbee15b	86	int ide_mem_index[2];
28c5af54	87	int ppc_boot_device;
e4bcb14c TS	88	int index;
e4bcb14c TS	89	BlockDriverState hd[MAX_IDE_BUS MAX_IDE_DEVS];
28ce5ce6	90	void *dbdma;
46e50e9d	91
64201201 FB	92	linux_boot = (kernel_filename != NULL);
64201201 FB	93
c68ea704	94	/* init CPUs */
94fc95cd	95	if (cpu_model == NULL)
d12f4c38	96	cpu_model = "default";
e9df014c	97	for (i = 0; i < smp_cpus; i++) {
aaed909a FB	98	env = cpu_init(cpu_model);
	99	if (!env) {
	100	fprintf(stderr, "Unable to find PowerPC CPU definition\n");
	101	exit(1);
	102	}
e9df014c JM	103	/* Set time-base frequency to 100 Mhz */
e9df014c JM	104	cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
3cbee15b	105	#if 0
e9df014c	106	env->osi_call = vga_osi_call;
3cbee15b	107	#endif
fe33cc71	108	qemu_register_reset(&cpu_ppc_reset, env);
e9df014c JM	109	envs[i] = env;
e9df014c JM	110	}
4c823cff JM	111	if (env->nip < 0xFFF80000) {
	112	/* Special test for PowerPC 601:
	113	* the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
	114	* But the NVRAM is located at 0xFFF04000...
	115	*/
	116	cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
	117	}
c68ea704	118
64201201 FB	119	/* allocate RAM */
	120	cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
	121
	122	/* allocate and load BIOS */
	123	bios_offset = ram_size + vga_ram_size;
1192dad8 JM	124	if (bios_name == NULL)
	125	bios_name = BIOS_FILENAME;
	126	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
d5295253 FB	127	bios_size = load_image(buf, phys_ram_base + bios_offset);
d5295253 FB	128	if (bios_size < 0 \|\| bios_size > BIOS_SIZE) {
4a057712	129	cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
64201201 FB	130	exit(1);
64201201 FB	131	}
d5295253	132	bios_size = (bios_size + 0xfff) & ~0xfff;
4c823cff JM	133	if (bios_size > 0x00080000) {
	134	/* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
	135	cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
	136	}
4a057712	137	cpu_register_physical_memory((uint32_t)(-bios_size),
d5295253	138	bios_size, bios_offset \| IO_MEM_ROM);
3b46e624	139
d5295253 FB	140	/* allocate and load VGA BIOS */
	141	vga_bios_offset = bios_offset + bios_size;
	142	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
	143	vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
	144	if (vga_bios_size < 0) {
	145	/* if no bios is present, we can still work */
	146	fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
	147	vga_bios_size = 0;
	148	} else {
	149	/* set a specific header (XXX: find real Apple format for NDRV
	150	drivers) */
	151	phys_ram_base[vga_bios_offset] = 'N';
	152	phys_ram_base[vga_bios_offset + 1] = 'D';
	153	phys_ram_base[vga_bios_offset + 2] = 'R';
	154	phys_ram_base[vga_bios_offset + 3] = 'V';
5fafdf24	155	cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
d5295253 FB	156	vga_bios_size);
	157	vga_bios_size += 8;
	158	}
	159	vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
3b46e624	160
b6b8bd18 FB	161	if (linux_boot) {
	162	kernel_base = KERNEL_LOAD_ADDR;
	163	/* now we can load the kernel */
	164	kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
	165	if (kernel_size < 0) {
4a057712 JM	166	cpu_abort(env, "qemu: could not load kernel '%s'\n",
4a057712 JM	167	kernel_filename);
b6b8bd18 FB	168	exit(1);
	169	}
	170	/* load initrd */
	171	if (initrd_filename) {
	172	initrd_base = INITRD_LOAD_ADDR;
	173	initrd_size = load_image(initrd_filename,
	174	phys_ram_base + initrd_base);
	175	if (initrd_size < 0) {
4a057712 JM	176	cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
4a057712 JM	177	initrd_filename);
b6b8bd18 FB	178	exit(1);
	179	}
	180	} else {
	181	initrd_base = 0;
	182	initrd_size = 0;
	183	}
6ac0e82d	184	ppc_boot_device = 'm';
b6b8bd18 FB	185	} else {
	186	kernel_base = 0;
	187	kernel_size = 0;
	188	initrd_base = 0;
	189	initrd_size = 0;
28c5af54 JM	190	ppc_boot_device = '\0';
	191	/* We consider that NewWorld PowerMac never have any floppy drive
	192	* For now, OHW cannot boot from the network.
	193	*/
0d913fdb JM	194	for (i = 0; boot_device[i] != '\0'; i++) {
	195	if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
	196	ppc_boot_device = boot_device[i];
28c5af54	197	break;
0d913fdb	198	}
28c5af54 JM	199	}
	200	if (ppc_boot_device == '\0') {
	201	fprintf(stderr, "No valid boot device for Mac99 machine\n");
	202	exit(1);
	203	}
b6b8bd18	204	}
0aa6a4a2	205
3cbee15b	206	isa_mem_base = 0x80000000;
aef445bd	207
3cbee15b JM	208	/* Register 8 MB of ISA IO space */
3cbee15b JM	209	isa_mmio_init(0xf2000000, 0x00800000);
3b46e624	210
3cbee15b JM	211	/* UniN init */
	212	unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
	213	cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
47103572	214
3cbee15b JM	215	openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
	216	openpic_irqs[0] =
	217	qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
	218	for (i = 0; i < smp_cpus; i++) {
	219	/* Mac99 IRQ connection between OpenPIC outputs pins
	220	* and PowerPC input pins
	221	*/
	222	switch (PPC_INPUT(env)) {
	223	case PPC_FLAGS_INPUT_6xx:
	224	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	225	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	226	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	227	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	228	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	229	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	230	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
	231	/* Not connected ? */
	232	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	233	/* Check this */
	234	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	235	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
	236	break;
00af685f	237	#if defined(TARGET_PPC64)
3cbee15b JM	238	case PPC_FLAGS_INPUT_970:
	239	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	240	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	241	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	242	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	243	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	244	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	245	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
	246	/* Not connected ? */
	247	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	248	/* Check this */
	249	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	250	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
	251	break;
00af685f	252	#endif /* defined(TARGET_PPC64) */
3cbee15b JM	253	default:
	254	cpu_abort(env, "Bus model not supported on mac99 machine\n");
	255	exit(1);
0aa6a4a2	256	}
3cbee15b JM	257	}
	258	pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
	259	pci_bus = pci_pmac_init(pic);
	260	/* init basic PC hardware */
3023f332	261	pci_vga_init(pci_bus, phys_ram_base + ram_size,
3cbee15b JM	262	ram_size, vga_ram_size,
3cbee15b JM	263	vga_bios_offset, vga_bios_size);
aae9366a	264
3cbee15b JM	265	/* XXX: suppress that */
	266	dummy_irq = i8259_init(NULL);
	267
aeeb69c7 AJ	268	escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
aeeb69c7 AJ	269	serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
cb457d76 AL	270
	271	for(i = 0; i < nb_nics; i++)
	272	pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");
	273
e4bcb14c TS	274	if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
	275	fprintf(stderr, "qemu: too many IDE bus\n");
	276	exit(1);
	277	}
	278	for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
	279	index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
	280	if (index != -1)
	281	hd[i] = drives_table[index].bdrv;
	282	else
	283	hd[i] = NULL;
	284	}
28ce5ce6	285	dbdma = DBDMA_init(&dbdma_mem_index);
0aa6a4a2	286	#if 1
e3007e66 AJ	287	ide_mem_index[0] = pmac_ide_init(&hd[0], pic[0x13], dbdma, 0x14, pic[0x01]);
e3007e66 AJ	288	ide_mem_index[1] = pmac_ide_init(&hd[2], pic[0x14], dbdma, 0x16, pic[0x02]);
0aa6a4a2	289	#else
e4bcb14c	290	pci_cmd646_ide_init(pci_bus, &hd[0], 0);
0aa6a4a2	291	#endif
3cbee15b JM	292	/* cuda also initialize ADB */
3cbee15b JM	293	cuda_init(&cuda_mem_index, pic[0x19]);
aae9366a	294
3cbee15b JM	295	adb_kbd_init(&adb_bus);
3cbee15b JM	296	adb_mouse_init(&adb_bus);
3b46e624	297
3b46e624	298
4ebcf884 BS	299	macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
	300	dbdma_mem_index, cuda_mem_index, NULL, 2, ide_mem_index,
	301	escc_mem_index);
0d92ed30 PB	302
0d92ed30 PB	303	if (usb_enabled) {
e24ad6f1	304	usb_ohci_init_pci(pci_bus, 3, -1);
0d92ed30 PB	305	}
0d92ed30 PB	306
b6b8bd18 FB	307	if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
b6b8bd18 FB	308	graphic_depth = 15;
3cbee15b JM	309	#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
3cbee15b JM	310	/* The NewWorld NVRAM is not located in the MacIO device */
74e91155	311	nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
3cbee15b	312	pmac_format_nvram_partition(nvr, 0x2000);
74e91155	313	macio_nvram_map(nvr, 0xFFF04000);
3cbee15b JM	314	nvram.opaque = nvr;
	315	nvram.read_fn = &macio_nvram_read;
	316	nvram.write_fn = &macio_nvram_write;
	317	#else
	318	m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
	319	nvram.opaque = m48t59;
	320	nvram.read_fn = &m48t59_read;
	321	nvram.write_fn = &m48t59_write;
	322	#endif
6ac0e82d AZ	323	PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
6ac0e82d AZ	324	ppc_boot_device, kernel_base, kernel_size,
b6b8bd18 FB	325	kernel_cmdline,
b6b8bd18 FB	326	initrd_base, initrd_size,
64201201	327	/* XXX: need an option to load a NVRAM image */
b6b8bd18 FB	328	0,
	329	graphic_width, graphic_height, graphic_depth);
	330	/* No PCI init: the BIOS will do it */
0aa6a4a2 FB	331
	332	/* Special port to get debug messages from Open-Firmware */
	333	register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
aae9366a	334	}
0aa6a4a2 FB	335
0aa6a4a2 FB	336	QEMUMachine core99_machine = {
4b32e168 AL	337	.name = "mac99",
	338	.desc = "Mac99 based PowerMAC",
	339	.init = ppc_core99_init,
	340	.ram_require = BIOS_SIZE + VGA_RAM_SIZE,
3d878caa	341	.max_cpus = MAX_CPUS,
0aa6a4a2	342	};