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ad96090a BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include <stdint.h> | |
25 | #include <stdarg.h> | |
b2e0a138 | 26 | #include <stdlib.h> |
ad96090a | 27 | #ifndef _WIN32 |
1c47cb16 | 28 | #include <sys/types.h> |
ad96090a BS |
29 | #include <sys/mman.h> |
30 | #endif | |
31 | #include "config.h" | |
83c9089e | 32 | #include "monitor/monitor.h" |
9c17d615 | 33 | #include "sysemu/sysemu.h" |
1de7afc9 PB |
34 | #include "qemu/bitops.h" |
35 | #include "qemu/bitmap.h" | |
9c17d615 | 36 | #include "sysemu/arch_init.h" |
ad96090a | 37 | #include "audio/audio.h" |
0d09e41a | 38 | #include "hw/i386/pc.h" |
a2cb15b0 | 39 | #include "hw/pci/pci.h" |
0d09e41a | 40 | #include "hw/audio/audio.h" |
9c17d615 | 41 | #include "sysemu/kvm.h" |
caf71f86 | 42 | #include "migration/migration.h" |
0d09e41a | 43 | #include "hw/i386/smbios.h" |
022c62cb | 44 | #include "exec/address-spaces.h" |
0d09e41a | 45 | #include "hw/audio/pcspk.h" |
caf71f86 | 46 | #include "migration/page_cache.h" |
1de7afc9 | 47 | #include "qemu/config-file.h" |
d97326ee | 48 | #include "qemu/error-report.h" |
99afc91d | 49 | #include "qmp-commands.h" |
3c12193d | 50 | #include "trace.h" |
0d6d3c87 | 51 | #include "exec/cpu-all.h" |
12291ec1 | 52 | #include "exec/ram_addr.h" |
0445259b | 53 | #include "hw/acpi/acpi.h" |
aa8dc044 | 54 | #include "qemu/host-utils.h" |
ad96090a | 55 | |
3a697f69 OW |
56 | #ifdef DEBUG_ARCH_INIT |
57 | #define DPRINTF(fmt, ...) \ | |
58 | do { fprintf(stdout, "arch_init: " fmt, ## __VA_ARGS__); } while (0) | |
59 | #else | |
60 | #define DPRINTF(fmt, ...) \ | |
61 | do { } while (0) | |
62 | #endif | |
63 | ||
ad96090a BS |
64 | #ifdef TARGET_SPARC |
65 | int graphic_width = 1024; | |
66 | int graphic_height = 768; | |
67 | int graphic_depth = 8; | |
68 | #else | |
69 | int graphic_width = 800; | |
70 | int graphic_height = 600; | |
f1ff0e89 | 71 | int graphic_depth = 32; |
ad96090a BS |
72 | #endif |
73 | ||
ad96090a BS |
74 | |
75 | #if defined(TARGET_ALPHA) | |
76 | #define QEMU_ARCH QEMU_ARCH_ALPHA | |
77 | #elif defined(TARGET_ARM) | |
78 | #define QEMU_ARCH QEMU_ARCH_ARM | |
79 | #elif defined(TARGET_CRIS) | |
80 | #define QEMU_ARCH QEMU_ARCH_CRIS | |
81 | #elif defined(TARGET_I386) | |
82 | #define QEMU_ARCH QEMU_ARCH_I386 | |
83 | #elif defined(TARGET_M68K) | |
84 | #define QEMU_ARCH QEMU_ARCH_M68K | |
81ea0e13 MW |
85 | #elif defined(TARGET_LM32) |
86 | #define QEMU_ARCH QEMU_ARCH_LM32 | |
ad96090a BS |
87 | #elif defined(TARGET_MICROBLAZE) |
88 | #define QEMU_ARCH QEMU_ARCH_MICROBLAZE | |
89 | #elif defined(TARGET_MIPS) | |
90 | #define QEMU_ARCH QEMU_ARCH_MIPS | |
d15a9c23 AG |
91 | #elif defined(TARGET_MOXIE) |
92 | #define QEMU_ARCH QEMU_ARCH_MOXIE | |
e67db06e JL |
93 | #elif defined(TARGET_OPENRISC) |
94 | #define QEMU_ARCH QEMU_ARCH_OPENRISC | |
ad96090a BS |
95 | #elif defined(TARGET_PPC) |
96 | #define QEMU_ARCH QEMU_ARCH_PPC | |
97 | #elif defined(TARGET_S390X) | |
98 | #define QEMU_ARCH QEMU_ARCH_S390X | |
99 | #elif defined(TARGET_SH4) | |
100 | #define QEMU_ARCH QEMU_ARCH_SH4 | |
101 | #elif defined(TARGET_SPARC) | |
102 | #define QEMU_ARCH QEMU_ARCH_SPARC | |
2328826b MF |
103 | #elif defined(TARGET_XTENSA) |
104 | #define QEMU_ARCH QEMU_ARCH_XTENSA | |
4f23a1e6 GX |
105 | #elif defined(TARGET_UNICORE32) |
106 | #define QEMU_ARCH QEMU_ARCH_UNICORE32 | |
48e06fe0 BK |
107 | #elif defined(TARGET_TRICORE) |
108 | #define QEMU_ARCH QEMU_ARCH_TRICORE | |
ad96090a BS |
109 | #endif |
110 | ||
111 | const uint32_t arch_type = QEMU_ARCH; | |
7ca1dfad CV |
112 | static bool mig_throttle_on; |
113 | static int dirty_rate_high_cnt; | |
114 | static void check_guest_throttling(void); | |
ad96090a | 115 | |
71411d35 C |
116 | static uint64_t bitmap_sync_count; |
117 | ||
ad96090a BS |
118 | /***********************************************************/ |
119 | /* ram save/restore */ | |
120 | ||
d20878d2 YT |
121 | #define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */ |
122 | #define RAM_SAVE_FLAG_COMPRESS 0x02 | |
123 | #define RAM_SAVE_FLAG_MEM_SIZE 0x04 | |
124 | #define RAM_SAVE_FLAG_PAGE 0x08 | |
125 | #define RAM_SAVE_FLAG_EOS 0x10 | |
126 | #define RAM_SAVE_FLAG_CONTINUE 0x20 | |
17ad9b35 | 127 | #define RAM_SAVE_FLAG_XBZRLE 0x40 |
0033b8b4 | 128 | /* 0x80 is reserved in migration.h start with 0x100 next */ |
ad96090a | 129 | |
756557de EH |
130 | static struct defconfig_file { |
131 | const char *filename; | |
f29a5614 EH |
132 | /* Indicates it is an user config file (disabled by -no-user-config) */ |
133 | bool userconfig; | |
756557de | 134 | } default_config_files[] = { |
f29a5614 | 135 | { CONFIG_QEMU_CONFDIR "/qemu.conf", true }, |
2e59915d | 136 | { CONFIG_QEMU_CONFDIR "/target-" TARGET_NAME ".conf", true }, |
756557de EH |
137 | { NULL }, /* end of list */ |
138 | }; | |
139 | ||
6d3cb1f9 | 140 | static const uint8_t ZERO_TARGET_PAGE[TARGET_PAGE_SIZE]; |
756557de | 141 | |
f29a5614 | 142 | int qemu_read_default_config_files(bool userconfig) |
b5a8fe5e EH |
143 | { |
144 | int ret; | |
756557de | 145 | struct defconfig_file *f; |
b5a8fe5e | 146 | |
756557de | 147 | for (f = default_config_files; f->filename; f++) { |
f29a5614 EH |
148 | if (!userconfig && f->userconfig) { |
149 | continue; | |
150 | } | |
756557de EH |
151 | ret = qemu_read_config_file(f->filename); |
152 | if (ret < 0 && ret != -ENOENT) { | |
153 | return ret; | |
154 | } | |
b5a8fe5e | 155 | } |
4d8b3c63 | 156 | |
b5a8fe5e EH |
157 | return 0; |
158 | } | |
159 | ||
dc3c26a4 | 160 | static inline bool is_zero_range(uint8_t *p, uint64_t size) |
ad96090a | 161 | { |
dc3c26a4 | 162 | return buffer_find_nonzero_offset(p, size) == size; |
ad96090a BS |
163 | } |
164 | ||
17ad9b35 OW |
165 | /* struct contains XBZRLE cache and a static page |
166 | used by the compression */ | |
167 | static struct { | |
168 | /* buffer used for XBZRLE encoding */ | |
169 | uint8_t *encoded_buf; | |
170 | /* buffer for storing page content */ | |
171 | uint8_t *current_buf; | |
fd8cec93 | 172 | /* Cache for XBZRLE, Protected by lock. */ |
17ad9b35 | 173 | PageCache *cache; |
fd8cec93 | 174 | QemuMutex lock; |
d97326ee DDAG |
175 | } XBZRLE; |
176 | ||
905f26f2 GA |
177 | /* buffer used for XBZRLE decoding */ |
178 | static uint8_t *xbzrle_decoded_buf; | |
9e1ba4cc | 179 | |
fd8cec93 GA |
180 | static void XBZRLE_cache_lock(void) |
181 | { | |
182 | if (migrate_use_xbzrle()) | |
183 | qemu_mutex_lock(&XBZRLE.lock); | |
184 | } | |
185 | ||
186 | static void XBZRLE_cache_unlock(void) | |
187 | { | |
188 | if (migrate_use_xbzrle()) | |
189 | qemu_mutex_unlock(&XBZRLE.lock); | |
190 | } | |
191 | ||
d97326ee DDAG |
192 | /* |
193 | * called from qmp_migrate_set_cache_size in main thread, possibly while | |
194 | * a migration is in progress. | |
195 | * A running migration maybe using the cache and might finish during this | |
196 | * call, hence changes to the cache are protected by XBZRLE.lock(). | |
197 | */ | |
9e1ba4cc OW |
198 | int64_t xbzrle_cache_resize(int64_t new_size) |
199 | { | |
d97326ee DDAG |
200 | PageCache *new_cache; |
201 | int64_t ret; | |
fd8cec93 | 202 | |
c91e681a OW |
203 | if (new_size < TARGET_PAGE_SIZE) { |
204 | return -1; | |
205 | } | |
206 | ||
d97326ee DDAG |
207 | XBZRLE_cache_lock(); |
208 | ||
9e1ba4cc | 209 | if (XBZRLE.cache != NULL) { |
fd8cec93 | 210 | if (pow2floor(new_size) == migrate_xbzrle_cache_size()) { |
d97326ee | 211 | goto out_new_size; |
fd8cec93 GA |
212 | } |
213 | new_cache = cache_init(new_size / TARGET_PAGE_SIZE, | |
214 | TARGET_PAGE_SIZE); | |
215 | if (!new_cache) { | |
d97326ee DDAG |
216 | error_report("Error creating cache"); |
217 | ret = -1; | |
218 | goto out; | |
fd8cec93 | 219 | } |
fd8cec93 | 220 | |
d97326ee DDAG |
221 | cache_fini(XBZRLE.cache); |
222 | XBZRLE.cache = new_cache; | |
9e1ba4cc | 223 | } |
fd8cec93 | 224 | |
d97326ee DDAG |
225 | out_new_size: |
226 | ret = pow2floor(new_size); | |
227 | out: | |
228 | XBZRLE_cache_unlock(); | |
229 | return ret; | |
9e1ba4cc OW |
230 | } |
231 | ||
004d4c10 OW |
232 | /* accounting for migration statistics */ |
233 | typedef struct AccountingInfo { | |
234 | uint64_t dup_pages; | |
f1c72795 | 235 | uint64_t skipped_pages; |
004d4c10 OW |
236 | uint64_t norm_pages; |
237 | uint64_t iterations; | |
f36d55af OW |
238 | uint64_t xbzrle_bytes; |
239 | uint64_t xbzrle_pages; | |
240 | uint64_t xbzrle_cache_miss; | |
8bc39233 | 241 | double xbzrle_cache_miss_rate; |
f36d55af | 242 | uint64_t xbzrle_overflows; |
004d4c10 OW |
243 | } AccountingInfo; |
244 | ||
245 | static AccountingInfo acct_info; | |
246 | ||
247 | static void acct_clear(void) | |
248 | { | |
249 | memset(&acct_info, 0, sizeof(acct_info)); | |
250 | } | |
251 | ||
252 | uint64_t dup_mig_bytes_transferred(void) | |
253 | { | |
254 | return acct_info.dup_pages * TARGET_PAGE_SIZE; | |
255 | } | |
256 | ||
257 | uint64_t dup_mig_pages_transferred(void) | |
258 | { | |
259 | return acct_info.dup_pages; | |
260 | } | |
261 | ||
f1c72795 PL |
262 | uint64_t skipped_mig_bytes_transferred(void) |
263 | { | |
264 | return acct_info.skipped_pages * TARGET_PAGE_SIZE; | |
265 | } | |
266 | ||
267 | uint64_t skipped_mig_pages_transferred(void) | |
268 | { | |
269 | return acct_info.skipped_pages; | |
270 | } | |
271 | ||
004d4c10 OW |
272 | uint64_t norm_mig_bytes_transferred(void) |
273 | { | |
274 | return acct_info.norm_pages * TARGET_PAGE_SIZE; | |
275 | } | |
276 | ||
277 | uint64_t norm_mig_pages_transferred(void) | |
278 | { | |
279 | return acct_info.norm_pages; | |
280 | } | |
281 | ||
f36d55af OW |
282 | uint64_t xbzrle_mig_bytes_transferred(void) |
283 | { | |
284 | return acct_info.xbzrle_bytes; | |
285 | } | |
286 | ||
287 | uint64_t xbzrle_mig_pages_transferred(void) | |
288 | { | |
289 | return acct_info.xbzrle_pages; | |
290 | } | |
291 | ||
292 | uint64_t xbzrle_mig_pages_cache_miss(void) | |
293 | { | |
294 | return acct_info.xbzrle_cache_miss; | |
295 | } | |
296 | ||
8bc39233 C |
297 | double xbzrle_mig_cache_miss_rate(void) |
298 | { | |
299 | return acct_info.xbzrle_cache_miss_rate; | |
300 | } | |
301 | ||
f36d55af OW |
302 | uint64_t xbzrle_mig_pages_overflow(void) |
303 | { | |
304 | return acct_info.xbzrle_overflows; | |
305 | } | |
306 | ||
3f7d7b09 JQ |
307 | static size_t save_block_hdr(QEMUFile *f, RAMBlock *block, ram_addr_t offset, |
308 | int cont, int flag) | |
0c51f43d | 309 | { |
3f7d7b09 JQ |
310 | size_t size; |
311 | ||
312 | qemu_put_be64(f, offset | cont | flag); | |
313 | size = 8; | |
0c51f43d | 314 | |
3f7d7b09 JQ |
315 | if (!cont) { |
316 | qemu_put_byte(f, strlen(block->idstr)); | |
317 | qemu_put_buffer(f, (uint8_t *)block->idstr, | |
318 | strlen(block->idstr)); | |
319 | size += 1 + strlen(block->idstr); | |
320 | } | |
321 | return size; | |
0c51f43d OW |
322 | } |
323 | ||
6d3cb1f9 DDAG |
324 | /* This is the last block that we have visited serching for dirty pages |
325 | */ | |
326 | static RAMBlock *last_seen_block; | |
327 | /* This is the last block from where we have sent data */ | |
328 | static RAMBlock *last_sent_block; | |
329 | static ram_addr_t last_offset; | |
330 | static unsigned long *migration_bitmap; | |
331 | static uint64_t migration_dirty_pages; | |
332 | static uint32_t last_version; | |
333 | static bool ram_bulk_stage; | |
334 | ||
335 | /* Update the xbzrle cache to reflect a page that's been sent as all 0. | |
336 | * The important thing is that a stale (not-yet-0'd) page be replaced | |
337 | * by the new data. | |
338 | * As a bonus, if the page wasn't in the cache it gets added so that | |
339 | * when a small write is made into the 0'd page it gets XBZRLE sent | |
340 | */ | |
341 | static void xbzrle_cache_zero_page(ram_addr_t current_addr) | |
342 | { | |
343 | if (ram_bulk_stage || !migrate_use_xbzrle()) { | |
344 | return; | |
345 | } | |
346 | ||
347 | /* We don't care if this fails to allocate a new cache page | |
348 | * as long as it updated an old one */ | |
349 | cache_insert(XBZRLE.cache, current_addr, ZERO_TARGET_PAGE); | |
350 | } | |
351 | ||
17ad9b35 OW |
352 | #define ENCODING_FLAG_XBZRLE 0x1 |
353 | ||
1534ee93 | 354 | static int save_xbzrle_page(QEMUFile *f, uint8_t **current_data, |
17ad9b35 | 355 | ram_addr_t current_addr, RAMBlock *block, |
dd051c72 | 356 | ram_addr_t offset, int cont, bool last_stage) |
17ad9b35 OW |
357 | { |
358 | int encoded_len = 0, bytes_sent = -1; | |
359 | uint8_t *prev_cached_page; | |
360 | ||
361 | if (!cache_is_cached(XBZRLE.cache, current_addr)) { | |
1534ee93 | 362 | acct_info.xbzrle_cache_miss++; |
dd051c72 | 363 | if (!last_stage) { |
1534ee93 | 364 | if (cache_insert(XBZRLE.cache, current_addr, *current_data) == -1) { |
89db9987 | 365 | return -1; |
1534ee93 C |
366 | } else { |
367 | /* update *current_data when the page has been | |
368 | inserted into cache */ | |
369 | *current_data = get_cached_data(XBZRLE.cache, current_addr); | |
89db9987 | 370 | } |
dd051c72 | 371 | } |
17ad9b35 OW |
372 | return -1; |
373 | } | |
374 | ||
375 | prev_cached_page = get_cached_data(XBZRLE.cache, current_addr); | |
376 | ||
377 | /* save current buffer into memory */ | |
1534ee93 | 378 | memcpy(XBZRLE.current_buf, *current_data, TARGET_PAGE_SIZE); |
17ad9b35 OW |
379 | |
380 | /* XBZRLE encoding (if there is no overflow) */ | |
381 | encoded_len = xbzrle_encode_buffer(prev_cached_page, XBZRLE.current_buf, | |
382 | TARGET_PAGE_SIZE, XBZRLE.encoded_buf, | |
383 | TARGET_PAGE_SIZE); | |
384 | if (encoded_len == 0) { | |
385 | DPRINTF("Skipping unmodified page\n"); | |
386 | return 0; | |
387 | } else if (encoded_len == -1) { | |
388 | DPRINTF("Overflow\n"); | |
f36d55af | 389 | acct_info.xbzrle_overflows++; |
17ad9b35 | 390 | /* update data in the cache */ |
1534ee93 C |
391 | if (!last_stage) { |
392 | memcpy(prev_cached_page, *current_data, TARGET_PAGE_SIZE); | |
393 | *current_data = prev_cached_page; | |
394 | } | |
17ad9b35 OW |
395 | return -1; |
396 | } | |
397 | ||
398 | /* we need to update the data in the cache, in order to get the same data */ | |
dd051c72 JQ |
399 | if (!last_stage) { |
400 | memcpy(prev_cached_page, XBZRLE.current_buf, TARGET_PAGE_SIZE); | |
401 | } | |
17ad9b35 OW |
402 | |
403 | /* Send XBZRLE based compressed page */ | |
3f7d7b09 | 404 | bytes_sent = save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_XBZRLE); |
17ad9b35 OW |
405 | qemu_put_byte(f, ENCODING_FLAG_XBZRLE); |
406 | qemu_put_be16(f, encoded_len); | |
407 | qemu_put_buffer(f, XBZRLE.encoded_buf, encoded_len); | |
3f7d7b09 | 408 | bytes_sent += encoded_len + 1 + 2; |
f36d55af OW |
409 | acct_info.xbzrle_pages++; |
410 | acct_info.xbzrle_bytes += bytes_sent; | |
17ad9b35 OW |
411 | |
412 | return bytes_sent; | |
413 | } | |
414 | ||
4c8ae0f6 JQ |
415 | static inline |
416 | ram_addr_t migration_bitmap_find_and_reset_dirty(MemoryRegion *mr, | |
417 | ram_addr_t start) | |
69268cde | 418 | { |
4c8ae0f6 JQ |
419 | unsigned long base = mr->ram_addr >> TARGET_PAGE_BITS; |
420 | unsigned long nr = base + (start >> TARGET_PAGE_BITS); | |
0851c9f7 MT |
421 | uint64_t mr_size = TARGET_PAGE_ALIGN(memory_region_size(mr)); |
422 | unsigned long size = base + (mr_size >> TARGET_PAGE_BITS); | |
c6bf8e0e | 423 | |
70c8652b PL |
424 | unsigned long next; |
425 | ||
426 | if (ram_bulk_stage && nr > base) { | |
427 | next = nr + 1; | |
428 | } else { | |
429 | next = find_next_bit(migration_bitmap, size, nr); | |
430 | } | |
69268cde | 431 | |
4c8ae0f6 JQ |
432 | if (next < size) { |
433 | clear_bit(next, migration_bitmap); | |
c6bf8e0e | 434 | migration_dirty_pages--; |
69268cde | 435 | } |
4c8ae0f6 | 436 | return (next - base) << TARGET_PAGE_BITS; |
69268cde JQ |
437 | } |
438 | ||
791fa2a2 | 439 | static inline bool migration_bitmap_set_dirty(ram_addr_t addr) |
e44d26c8 | 440 | { |
c6bf8e0e | 441 | bool ret; |
791fa2a2 | 442 | int nr = addr >> TARGET_PAGE_BITS; |
e44d26c8 | 443 | |
c6bf8e0e JQ |
444 | ret = test_and_set_bit(nr, migration_bitmap); |
445 | ||
446 | if (!ret) { | |
447 | migration_dirty_pages++; | |
e44d26c8 | 448 | } |
c6bf8e0e | 449 | return ret; |
e44d26c8 JQ |
450 | } |
451 | ||
791fa2a2 JQ |
452 | static void migration_bitmap_sync_range(ram_addr_t start, ram_addr_t length) |
453 | { | |
454 | ram_addr_t addr; | |
aa8dc044 JQ |
455 | unsigned long page = BIT_WORD(start >> TARGET_PAGE_BITS); |
456 | ||
457 | /* start address is aligned at the start of a word? */ | |
458 | if (((page * BITS_PER_LONG) << TARGET_PAGE_BITS) == start) { | |
459 | int k; | |
460 | int nr = BITS_TO_LONGS(length >> TARGET_PAGE_BITS); | |
461 | unsigned long *src = ram_list.dirty_memory[DIRTY_MEMORY_MIGRATION]; | |
462 | ||
463 | for (k = page; k < page + nr; k++) { | |
464 | if (src[k]) { | |
465 | unsigned long new_dirty; | |
466 | new_dirty = ~migration_bitmap[k]; | |
467 | migration_bitmap[k] |= src[k]; | |
468 | new_dirty &= src[k]; | |
469 | migration_dirty_pages += ctpopl(new_dirty); | |
470 | src[k] = 0; | |
471 | } | |
472 | } | |
473 | } else { | |
474 | for (addr = 0; addr < length; addr += TARGET_PAGE_SIZE) { | |
475 | if (cpu_physical_memory_get_dirty(start + addr, | |
476 | TARGET_PAGE_SIZE, | |
477 | DIRTY_MEMORY_MIGRATION)) { | |
478 | cpu_physical_memory_reset_dirty(start + addr, | |
479 | TARGET_PAGE_SIZE, | |
480 | DIRTY_MEMORY_MIGRATION); | |
481 | migration_bitmap_set_dirty(start + addr); | |
482 | } | |
791fa2a2 JQ |
483 | } |
484 | } | |
485 | } | |
486 | ||
487 | ||
32c835ba PB |
488 | /* Needs iothread lock! */ |
489 | ||
dd2df737 JQ |
490 | static void migration_bitmap_sync(void) |
491 | { | |
c6bf8e0e | 492 | RAMBlock *block; |
c6bf8e0e | 493 | uint64_t num_dirty_pages_init = migration_dirty_pages; |
8d017193 JQ |
494 | MigrationState *s = migrate_get_current(); |
495 | static int64_t start_time; | |
7ca1dfad | 496 | static int64_t bytes_xfer_prev; |
8d017193 JQ |
497 | static int64_t num_dirty_pages_period; |
498 | int64_t end_time; | |
7ca1dfad | 499 | int64_t bytes_xfer_now; |
8bc39233 C |
500 | static uint64_t xbzrle_cache_miss_prev; |
501 | static uint64_t iterations_prev; | |
7ca1dfad | 502 | |
71411d35 C |
503 | bitmap_sync_count++; |
504 | ||
7ca1dfad CV |
505 | if (!bytes_xfer_prev) { |
506 | bytes_xfer_prev = ram_bytes_transferred(); | |
507 | } | |
8d017193 JQ |
508 | |
509 | if (!start_time) { | |
bc72ad67 | 510 | start_time = qemu_clock_get_ms(QEMU_CLOCK_REALTIME); |
8d017193 | 511 | } |
3c12193d JQ |
512 | |
513 | trace_migration_bitmap_sync_start(); | |
1d671369 | 514 | address_space_sync_dirty_bitmap(&address_space_memory); |
c6bf8e0e | 515 | |
a3161038 | 516 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
791fa2a2 | 517 | migration_bitmap_sync_range(block->mr->ram_addr, block->length); |
c6bf8e0e JQ |
518 | } |
519 | trace_migration_bitmap_sync_end(migration_dirty_pages | |
3c12193d | 520 | - num_dirty_pages_init); |
8d017193 | 521 | num_dirty_pages_period += migration_dirty_pages - num_dirty_pages_init; |
bc72ad67 | 522 | end_time = qemu_clock_get_ms(QEMU_CLOCK_REALTIME); |
8d017193 JQ |
523 | |
524 | /* more than 1 second = 1000 millisecons */ | |
525 | if (end_time > start_time + 1000) { | |
7ca1dfad CV |
526 | if (migrate_auto_converge()) { |
527 | /* The following detection logic can be refined later. For now: | |
528 | Check to see if the dirtied bytes is 50% more than the approx. | |
529 | amount of bytes that just got transferred since the last time we | |
530 | were in this routine. If that happens >N times (for now N==4) | |
531 | we turn on the throttle down logic */ | |
532 | bytes_xfer_now = ram_bytes_transferred(); | |
533 | if (s->dirty_pages_rate && | |
534 | (num_dirty_pages_period * TARGET_PAGE_SIZE > | |
535 | (bytes_xfer_now - bytes_xfer_prev)/2) && | |
536 | (dirty_rate_high_cnt++ > 4)) { | |
537 | trace_migration_throttle(); | |
538 | mig_throttle_on = true; | |
539 | dirty_rate_high_cnt = 0; | |
540 | } | |
541 | bytes_xfer_prev = bytes_xfer_now; | |
542 | } else { | |
543 | mig_throttle_on = false; | |
544 | } | |
8bc39233 C |
545 | if (migrate_use_xbzrle()) { |
546 | if (iterations_prev != 0) { | |
547 | acct_info.xbzrle_cache_miss_rate = | |
548 | (double)(acct_info.xbzrle_cache_miss - | |
549 | xbzrle_cache_miss_prev) / | |
550 | (acct_info.iterations - iterations_prev); | |
551 | } | |
552 | iterations_prev = acct_info.iterations; | |
553 | xbzrle_cache_miss_prev = acct_info.xbzrle_cache_miss; | |
554 | } | |
8d017193 JQ |
555 | s->dirty_pages_rate = num_dirty_pages_period * 1000 |
556 | / (end_time - start_time); | |
90f8ae72 | 557 | s->dirty_bytes_rate = s->dirty_pages_rate * TARGET_PAGE_SIZE; |
8d017193 JQ |
558 | start_time = end_time; |
559 | num_dirty_pages_period = 0; | |
58570ed8 | 560 | s->dirty_sync_count = bitmap_sync_count; |
8d017193 | 561 | } |
dd2df737 JQ |
562 | } |
563 | ||
6c779f22 | 564 | /* |
14bcfdc7 DDAG |
565 | * ram_save_page: Send the given page to the stream |
566 | * | |
567 | * Returns: Number of bytes written. | |
568 | */ | |
569 | static int ram_save_page(QEMUFile *f, RAMBlock* block, ram_addr_t offset, | |
570 | bool last_stage) | |
571 | { | |
572 | int bytes_sent; | |
573 | int cont; | |
574 | ram_addr_t current_addr; | |
575 | MemoryRegion *mr = block->mr; | |
576 | uint8_t *p; | |
577 | int ret; | |
578 | bool send_async = true; | |
579 | ||
580 | cont = (block == last_sent_block) ? RAM_SAVE_FLAG_CONTINUE : 0; | |
581 | ||
582 | p = memory_region_get_ram_ptr(mr) + offset; | |
583 | ||
584 | /* In doubt sent page as normal */ | |
585 | bytes_sent = -1; | |
586 | ret = ram_control_save_page(f, block->offset, | |
587 | offset, TARGET_PAGE_SIZE, &bytes_sent); | |
588 | ||
589 | XBZRLE_cache_lock(); | |
590 | ||
591 | current_addr = block->offset + offset; | |
592 | if (ret != RAM_SAVE_CONTROL_NOT_SUPP) { | |
593 | if (ret != RAM_SAVE_CONTROL_DELAYED) { | |
594 | if (bytes_sent > 0) { | |
595 | acct_info.norm_pages++; | |
596 | } else if (bytes_sent == 0) { | |
597 | acct_info.dup_pages++; | |
598 | } | |
599 | } | |
600 | } else if (is_zero_range(p, TARGET_PAGE_SIZE)) { | |
601 | acct_info.dup_pages++; | |
602 | bytes_sent = save_block_hdr(f, block, offset, cont, | |
603 | RAM_SAVE_FLAG_COMPRESS); | |
604 | qemu_put_byte(f, 0); | |
605 | bytes_sent++; | |
606 | /* Must let xbzrle know, otherwise a previous (now 0'd) cached | |
607 | * page would be stale | |
608 | */ | |
609 | xbzrle_cache_zero_page(current_addr); | |
610 | } else if (!ram_bulk_stage && migrate_use_xbzrle()) { | |
611 | bytes_sent = save_xbzrle_page(f, &p, current_addr, block, | |
612 | offset, cont, last_stage); | |
613 | if (!last_stage) { | |
614 | /* Can't send this cached data async, since the cache page | |
615 | * might get updated before it gets to the wire | |
616 | */ | |
617 | send_async = false; | |
618 | } | |
619 | } | |
620 | ||
621 | /* XBZRLE overflow or normal page */ | |
622 | if (bytes_sent == -1) { | |
623 | bytes_sent = save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_PAGE); | |
624 | if (send_async) { | |
625 | qemu_put_buffer_async(f, p, TARGET_PAGE_SIZE); | |
626 | } else { | |
627 | qemu_put_buffer(f, p, TARGET_PAGE_SIZE); | |
628 | } | |
629 | bytes_sent += TARGET_PAGE_SIZE; | |
630 | acct_info.norm_pages++; | |
631 | } | |
632 | ||
633 | XBZRLE_cache_unlock(); | |
634 | ||
635 | return bytes_sent; | |
636 | } | |
637 | ||
638 | /* | |
639 | * ram_find_and_save_block: Finds a page to send and sends it to f | |
6c779f22 | 640 | * |
b823ceaa JQ |
641 | * Returns: The number of bytes written. |
642 | * 0 means no dirty pages | |
6c779f22 OW |
643 | */ |
644 | ||
14bcfdc7 | 645 | static int ram_find_and_save_block(QEMUFile *f, bool last_stage) |
ad96090a | 646 | { |
b23a9a5c | 647 | RAMBlock *block = last_seen_block; |
e44359c3 | 648 | ram_addr_t offset = last_offset; |
4c8ae0f6 | 649 | bool complete_round = false; |
b823ceaa | 650 | int bytes_sent = 0; |
71c510e2 | 651 | MemoryRegion *mr; |
ad96090a | 652 | |
e44359c3 | 653 | if (!block) |
a3161038 | 654 | block = QTAILQ_FIRST(&ram_list.blocks); |
e44359c3 | 655 | |
4c8ae0f6 | 656 | while (true) { |
71c510e2 | 657 | mr = block->mr; |
4c8ae0f6 JQ |
658 | offset = migration_bitmap_find_and_reset_dirty(mr, offset); |
659 | if (complete_round && block == last_seen_block && | |
660 | offset >= last_offset) { | |
661 | break; | |
662 | } | |
663 | if (offset >= block->length) { | |
664 | offset = 0; | |
665 | block = QTAILQ_NEXT(block, next); | |
666 | if (!block) { | |
667 | block = QTAILQ_FIRST(&ram_list.blocks); | |
668 | complete_round = true; | |
78d07ae7 | 669 | ram_bulk_stage = false; |
4c8ae0f6 JQ |
670 | } |
671 | } else { | |
14bcfdc7 | 672 | bytes_sent = ram_save_page(f, block, offset, last_stage); |
17ad9b35 | 673 | |
17ad9b35 | 674 | /* if page is unmodified, continue to the next */ |
b823ceaa | 675 | if (bytes_sent > 0) { |
5f718a15 | 676 | last_sent_block = block; |
17ad9b35 OW |
677 | break; |
678 | } | |
ad96090a | 679 | } |
4c8ae0f6 | 680 | } |
b23a9a5c | 681 | last_seen_block = block; |
e44359c3 | 682 | last_offset = offset; |
ad96090a | 683 | |
3fc250b4 | 684 | return bytes_sent; |
ad96090a BS |
685 | } |
686 | ||
687 | static uint64_t bytes_transferred; | |
688 | ||
2b0ce079 MH |
689 | void acct_update_position(QEMUFile *f, size_t size, bool zero) |
690 | { | |
691 | uint64_t pages = size / TARGET_PAGE_SIZE; | |
692 | if (zero) { | |
693 | acct_info.dup_pages += pages; | |
694 | } else { | |
695 | acct_info.norm_pages += pages; | |
696 | bytes_transferred += size; | |
697 | qemu_update_position(f, size); | |
698 | } | |
699 | } | |
700 | ||
ad96090a BS |
701 | static ram_addr_t ram_save_remaining(void) |
702 | { | |
c6bf8e0e | 703 | return migration_dirty_pages; |
ad96090a BS |
704 | } |
705 | ||
706 | uint64_t ram_bytes_remaining(void) | |
707 | { | |
708 | return ram_save_remaining() * TARGET_PAGE_SIZE; | |
709 | } | |
710 | ||
711 | uint64_t ram_bytes_transferred(void) | |
712 | { | |
713 | return bytes_transferred; | |
714 | } | |
715 | ||
716 | uint64_t ram_bytes_total(void) | |
717 | { | |
d17b5288 AW |
718 | RAMBlock *block; |
719 | uint64_t total = 0; | |
720 | ||
a3161038 | 721 | QTAILQ_FOREACH(block, &ram_list.blocks, next) |
d17b5288 AW |
722 | total += block->length; |
723 | ||
724 | return total; | |
ad96090a BS |
725 | } |
726 | ||
905f26f2 GA |
727 | void free_xbzrle_decoded_buf(void) |
728 | { | |
729 | g_free(xbzrle_decoded_buf); | |
730 | xbzrle_decoded_buf = NULL; | |
731 | } | |
732 | ||
8e21cd32 OW |
733 | static void migration_end(void) |
734 | { | |
244eaa75 PB |
735 | if (migration_bitmap) { |
736 | memory_global_dirty_log_stop(); | |
737 | g_free(migration_bitmap); | |
738 | migration_bitmap = NULL; | |
739 | } | |
17ad9b35 | 740 | |
fd8cec93 | 741 | XBZRLE_cache_lock(); |
244eaa75 | 742 | if (XBZRLE.cache) { |
17ad9b35 | 743 | cache_fini(XBZRLE.cache); |
17ad9b35 OW |
744 | g_free(XBZRLE.encoded_buf); |
745 | g_free(XBZRLE.current_buf); | |
17ad9b35 | 746 | XBZRLE.cache = NULL; |
f6c6483b OW |
747 | XBZRLE.encoded_buf = NULL; |
748 | XBZRLE.current_buf = NULL; | |
17ad9b35 | 749 | } |
fd8cec93 | 750 | XBZRLE_cache_unlock(); |
8e21cd32 OW |
751 | } |
752 | ||
9b5bfab0 JQ |
753 | static void ram_migration_cancel(void *opaque) |
754 | { | |
755 | migration_end(); | |
756 | } | |
757 | ||
5a170775 JQ |
758 | static void reset_ram_globals(void) |
759 | { | |
b23a9a5c | 760 | last_seen_block = NULL; |
5f718a15 | 761 | last_sent_block = NULL; |
5a170775 | 762 | last_offset = 0; |
f798b07f | 763 | last_version = ram_list.version; |
78d07ae7 | 764 | ram_bulk_stage = true; |
5a170775 JQ |
765 | } |
766 | ||
4508bd9e JQ |
767 | #define MAX_WAIT 50 /* ms, half buffered_file limit */ |
768 | ||
d1315aac | 769 | static int ram_save_setup(QEMUFile *f, void *opaque) |
ad96090a | 770 | { |
d1315aac | 771 | RAMBlock *block; |
e30d1d8c | 772 | int64_t ram_bitmap_pages; /* Size of bitmap in pages, including gaps */ |
c6bf8e0e | 773 | |
7ca1dfad CV |
774 | mig_throttle_on = false; |
775 | dirty_rate_high_cnt = 0; | |
71411d35 | 776 | bitmap_sync_count = 0; |
ad96090a | 777 | |
17ad9b35 | 778 | if (migrate_use_xbzrle()) { |
d97326ee | 779 | XBZRLE_cache_lock(); |
17ad9b35 OW |
780 | XBZRLE.cache = cache_init(migrate_xbzrle_cache_size() / |
781 | TARGET_PAGE_SIZE, | |
782 | TARGET_PAGE_SIZE); | |
783 | if (!XBZRLE.cache) { | |
d97326ee DDAG |
784 | XBZRLE_cache_unlock(); |
785 | error_report("Error creating cache"); | |
17ad9b35 OW |
786 | return -1; |
787 | } | |
d97326ee | 788 | XBZRLE_cache_unlock(); |
a17b2fd3 OW |
789 | |
790 | /* We prefer not to abort if there is no memory */ | |
791 | XBZRLE.encoded_buf = g_try_malloc0(TARGET_PAGE_SIZE); | |
792 | if (!XBZRLE.encoded_buf) { | |
d97326ee | 793 | error_report("Error allocating encoded_buf"); |
a17b2fd3 OW |
794 | return -1; |
795 | } | |
796 | ||
797 | XBZRLE.current_buf = g_try_malloc(TARGET_PAGE_SIZE); | |
798 | if (!XBZRLE.current_buf) { | |
d97326ee | 799 | error_report("Error allocating current_buf"); |
a17b2fd3 OW |
800 | g_free(XBZRLE.encoded_buf); |
801 | XBZRLE.encoded_buf = NULL; | |
802 | return -1; | |
803 | } | |
804 | ||
004d4c10 | 805 | acct_clear(); |
17ad9b35 OW |
806 | } |
807 | ||
9b095037 PB |
808 | qemu_mutex_lock_iothread(); |
809 | qemu_mutex_lock_ramlist(); | |
810 | bytes_transferred = 0; | |
811 | reset_ram_globals(); | |
812 | ||
e30d1d8c DDAG |
813 | ram_bitmap_pages = last_ram_offset() >> TARGET_PAGE_BITS; |
814 | migration_bitmap = bitmap_new(ram_bitmap_pages); | |
815 | bitmap_set(migration_bitmap, 0, ram_bitmap_pages); | |
816 | ||
817 | /* | |
818 | * Count the total number of pages used by ram blocks not including any | |
819 | * gaps due to alignment or unplugs. | |
820 | */ | |
821 | migration_dirty_pages = 0; | |
822 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { | |
823 | uint64_t block_pages; | |
824 | ||
825 | block_pages = block->length >> TARGET_PAGE_BITS; | |
826 | migration_dirty_pages += block_pages; | |
827 | } | |
828 | ||
d1315aac | 829 | memory_global_dirty_log_start(); |
c6bf8e0e | 830 | migration_bitmap_sync(); |
9b095037 | 831 | qemu_mutex_unlock_iothread(); |
ad96090a | 832 | |
d1315aac | 833 | qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE); |
97ab12d4 | 834 | |
a3161038 | 835 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
d1315aac JQ |
836 | qemu_put_byte(f, strlen(block->idstr)); |
837 | qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr)); | |
838 | qemu_put_be64(f, block->length); | |
ad96090a BS |
839 | } |
840 | ||
b2a8658e | 841 | qemu_mutex_unlock_ramlist(); |
0033b8b4 MH |
842 | |
843 | ram_control_before_iterate(f, RAM_CONTROL_SETUP); | |
844 | ram_control_after_iterate(f, RAM_CONTROL_SETUP); | |
845 | ||
d1315aac JQ |
846 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
847 | ||
848 | return 0; | |
849 | } | |
850 | ||
16310a3c | 851 | static int ram_save_iterate(QEMUFile *f, void *opaque) |
d1315aac | 852 | { |
d1315aac JQ |
853 | int ret; |
854 | int i; | |
e4ed1541 | 855 | int64_t t0; |
b823ceaa | 856 | int total_sent = 0; |
d1315aac | 857 | |
b2a8658e UD |
858 | qemu_mutex_lock_ramlist(); |
859 | ||
f798b07f UD |
860 | if (ram_list.version != last_version) { |
861 | reset_ram_globals(); | |
862 | } | |
863 | ||
0033b8b4 MH |
864 | ram_control_before_iterate(f, RAM_CONTROL_ROUND); |
865 | ||
bc72ad67 | 866 | t0 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
4508bd9e | 867 | i = 0; |
2975725f | 868 | while ((ret = qemu_file_rate_limit(f)) == 0) { |
3fc250b4 | 869 | int bytes_sent; |
ad96090a | 870 | |
14bcfdc7 | 871 | bytes_sent = ram_find_and_save_block(f, false); |
6c779f22 | 872 | /* no more blocks to sent */ |
b823ceaa | 873 | if (bytes_sent == 0) { |
ad96090a BS |
874 | break; |
875 | } | |
b823ceaa | 876 | total_sent += bytes_sent; |
004d4c10 | 877 | acct_info.iterations++; |
7ca1dfad | 878 | check_guest_throttling(); |
4508bd9e JQ |
879 | /* we want to check in the 1st loop, just in case it was the 1st time |
880 | and we had to sync the dirty bitmap. | |
881 | qemu_get_clock_ns() is a bit expensive, so we only check each some | |
882 | iterations | |
883 | */ | |
884 | if ((i & 63) == 0) { | |
bc72ad67 | 885 | uint64_t t1 = (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - t0) / 1000000; |
4508bd9e | 886 | if (t1 > MAX_WAIT) { |
ef37a699 | 887 | DPRINTF("big wait: %" PRIu64 " milliseconds, %d iterations\n", |
4508bd9e JQ |
888 | t1, i); |
889 | break; | |
890 | } | |
891 | } | |
892 | i++; | |
ad96090a BS |
893 | } |
894 | ||
fb3409de PB |
895 | qemu_mutex_unlock_ramlist(); |
896 | ||
0033b8b4 MH |
897 | /* |
898 | * Must occur before EOS (or any QEMUFile operation) | |
899 | * because of RDMA protocol. | |
900 | */ | |
901 | ram_control_after_iterate(f, RAM_CONTROL_ROUND); | |
902 | ||
6cd0beda LL |
903 | bytes_transferred += total_sent; |
904 | ||
905 | /* | |
906 | * Do not count these 8 bytes into total_sent, so that we can | |
907 | * return 0 if no page had been dirtied. | |
908 | */ | |
909 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); | |
910 | bytes_transferred += 8; | |
911 | ||
912 | ret = qemu_file_get_error(f); | |
2975725f JQ |
913 | if (ret < 0) { |
914 | return ret; | |
915 | } | |
916 | ||
b823ceaa | 917 | return total_sent; |
16310a3c JQ |
918 | } |
919 | ||
920 | static int ram_save_complete(QEMUFile *f, void *opaque) | |
921 | { | |
b2a8658e | 922 | qemu_mutex_lock_ramlist(); |
9c339485 | 923 | migration_bitmap_sync(); |
b2a8658e | 924 | |
0033b8b4 MH |
925 | ram_control_before_iterate(f, RAM_CONTROL_FINISH); |
926 | ||
ad96090a | 927 | /* try transferring iterative blocks of memory */ |
3a697f69 | 928 | |
16310a3c | 929 | /* flush all remaining blocks regardless of rate limiting */ |
6c779f22 | 930 | while (true) { |
3fc250b4 PR |
931 | int bytes_sent; |
932 | ||
14bcfdc7 | 933 | bytes_sent = ram_find_and_save_block(f, true); |
6c779f22 | 934 | /* no more blocks to sent */ |
b823ceaa | 935 | if (bytes_sent == 0) { |
6c779f22 | 936 | break; |
ad96090a | 937 | } |
16310a3c | 938 | bytes_transferred += bytes_sent; |
ad96090a | 939 | } |
0033b8b4 MH |
940 | |
941 | ram_control_after_iterate(f, RAM_CONTROL_FINISH); | |
244eaa75 | 942 | migration_end(); |
ad96090a | 943 | |
b2a8658e | 944 | qemu_mutex_unlock_ramlist(); |
ad96090a BS |
945 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
946 | ||
5b3c9638 | 947 | return 0; |
ad96090a BS |
948 | } |
949 | ||
e4ed1541 JQ |
950 | static uint64_t ram_save_pending(QEMUFile *f, void *opaque, uint64_t max_size) |
951 | { | |
952 | uint64_t remaining_size; | |
953 | ||
954 | remaining_size = ram_save_remaining() * TARGET_PAGE_SIZE; | |
955 | ||
956 | if (remaining_size < max_size) { | |
32c835ba | 957 | qemu_mutex_lock_iothread(); |
e4ed1541 | 958 | migration_bitmap_sync(); |
32c835ba | 959 | qemu_mutex_unlock_iothread(); |
e4ed1541 JQ |
960 | remaining_size = ram_save_remaining() * TARGET_PAGE_SIZE; |
961 | } | |
962 | return remaining_size; | |
963 | } | |
964 | ||
17ad9b35 OW |
965 | static int load_xbzrle(QEMUFile *f, ram_addr_t addr, void *host) |
966 | { | |
17ad9b35 OW |
967 | unsigned int xh_len; |
968 | int xh_flags; | |
969 | ||
905f26f2 GA |
970 | if (!xbzrle_decoded_buf) { |
971 | xbzrle_decoded_buf = g_malloc(TARGET_PAGE_SIZE); | |
17ad9b35 OW |
972 | } |
973 | ||
974 | /* extract RLE header */ | |
975 | xh_flags = qemu_get_byte(f); | |
976 | xh_len = qemu_get_be16(f); | |
977 | ||
978 | if (xh_flags != ENCODING_FLAG_XBZRLE) { | |
0971f1be | 979 | error_report("Failed to load XBZRLE page - wrong compression!"); |
17ad9b35 OW |
980 | return -1; |
981 | } | |
982 | ||
983 | if (xh_len > TARGET_PAGE_SIZE) { | |
0971f1be | 984 | error_report("Failed to load XBZRLE page - len overflow!"); |
17ad9b35 OW |
985 | return -1; |
986 | } | |
987 | /* load data and decode */ | |
905f26f2 | 988 | qemu_get_buffer(f, xbzrle_decoded_buf, xh_len); |
17ad9b35 OW |
989 | |
990 | /* decode RLE */ | |
fb626663 CG |
991 | if (xbzrle_decode_buffer(xbzrle_decoded_buf, xh_len, host, |
992 | TARGET_PAGE_SIZE) == -1) { | |
0971f1be | 993 | error_report("Failed to load XBZRLE page - decode error!"); |
fb626663 | 994 | return -1; |
17ad9b35 OW |
995 | } |
996 | ||
fb626663 | 997 | return 0; |
17ad9b35 OW |
998 | } |
999 | ||
a55bbe31 AW |
1000 | static inline void *host_from_stream_offset(QEMUFile *f, |
1001 | ram_addr_t offset, | |
1002 | int flags) | |
1003 | { | |
1004 | static RAMBlock *block = NULL; | |
1005 | char id[256]; | |
1006 | uint8_t len; | |
1007 | ||
1008 | if (flags & RAM_SAVE_FLAG_CONTINUE) { | |
1009 | if (!block) { | |
0971f1be | 1010 | error_report("Ack, bad migration stream!"); |
a55bbe31 AW |
1011 | return NULL; |
1012 | } | |
1013 | ||
dc94a7ed | 1014 | return memory_region_get_ram_ptr(block->mr) + offset; |
a55bbe31 AW |
1015 | } |
1016 | ||
1017 | len = qemu_get_byte(f); | |
1018 | qemu_get_buffer(f, (uint8_t *)id, len); | |
1019 | id[len] = 0; | |
1020 | ||
a3161038 | 1021 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
a55bbe31 | 1022 | if (!strncmp(id, block->idstr, sizeof(id))) |
dc94a7ed | 1023 | return memory_region_get_ram_ptr(block->mr) + offset; |
a55bbe31 AW |
1024 | } |
1025 | ||
0971f1be | 1026 | error_report("Can't find block %s!", id); |
a55bbe31 AW |
1027 | return NULL; |
1028 | } | |
1029 | ||
44c3b58c MH |
1030 | /* |
1031 | * If a page (or a whole RDMA chunk) has been | |
1032 | * determined to be zero, then zap it. | |
1033 | */ | |
1034 | void ram_handle_compressed(void *host, uint8_t ch, uint64_t size) | |
1035 | { | |
d613a56f | 1036 | if (ch != 0 || !is_zero_range(host, size)) { |
44c3b58c | 1037 | memset(host, ch, size); |
44c3b58c MH |
1038 | } |
1039 | } | |
1040 | ||
7908c78d | 1041 | static int ram_load(QEMUFile *f, void *opaque, int version_id) |
ad96090a BS |
1042 | { |
1043 | ram_addr_t addr; | |
3a697f69 | 1044 | int flags, ret = 0; |
3a697f69 OW |
1045 | static uint64_t seq_iter; |
1046 | ||
1047 | seq_iter++; | |
ad96090a | 1048 | |
21a246a4 | 1049 | if (version_id != 4) { |
4798fe55 | 1050 | ret = -EINVAL; |
ad96090a BS |
1051 | } |
1052 | ||
db80face | 1053 | while (!ret) { |
ad96090a BS |
1054 | addr = qemu_get_be64(f); |
1055 | ||
1056 | flags = addr & ~TARGET_PAGE_MASK; | |
1057 | addr &= TARGET_PAGE_MASK; | |
1058 | ||
1059 | if (flags & RAM_SAVE_FLAG_MEM_SIZE) { | |
21a246a4 C |
1060 | /* Synchronize RAM block list */ |
1061 | char id[256]; | |
1062 | ram_addr_t length; | |
1063 | ram_addr_t total_ram_bytes = addr; | |
1064 | ||
1065 | while (total_ram_bytes) { | |
1066 | RAMBlock *block; | |
1067 | uint8_t len; | |
1068 | ||
1069 | len = qemu_get_byte(f); | |
1070 | qemu_get_buffer(f, (uint8_t *)id, len); | |
1071 | id[len] = 0; | |
1072 | length = qemu_get_be64(f); | |
1073 | ||
1074 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { | |
1075 | if (!strncmp(id, block->idstr, sizeof(id))) { | |
1076 | if (block->length != length) { | |
a3f1f040 AB |
1077 | error_report("Length mismatch: %s: 0x" RAM_ADDR_FMT |
1078 | " in != 0x" RAM_ADDR_FMT, id, length, | |
0971f1be | 1079 | block->length); |
21a246a4 | 1080 | ret = -EINVAL; |
97ab12d4 | 1081 | } |
21a246a4 | 1082 | break; |
97ab12d4 | 1083 | } |
21a246a4 | 1084 | } |
97ab12d4 | 1085 | |
21a246a4 | 1086 | if (!block) { |
0971f1be LT |
1087 | error_report("Unknown ramblock \"%s\", cannot " |
1088 | "accept migration", id); | |
21a246a4 | 1089 | ret = -EINVAL; |
db80face PL |
1090 | } |
1091 | if (ret) { | |
1092 | break; | |
97ab12d4 | 1093 | } |
21a246a4 C |
1094 | |
1095 | total_ram_bytes -= length; | |
ad96090a | 1096 | } |
db80face | 1097 | } else if (flags & RAM_SAVE_FLAG_COMPRESS) { |
97ab12d4 AW |
1098 | void *host; |
1099 | uint8_t ch; | |
1100 | ||
f09f2189 | 1101 | host = host_from_stream_offset(f, addr, flags); |
492fb99c | 1102 | if (!host) { |
db80face | 1103 | error_report("Illegal RAM offset " RAM_ADDR_FMT, addr); |
4798fe55 | 1104 | ret = -EINVAL; |
db80face | 1105 | break; |
492fb99c | 1106 | } |
97ab12d4 | 1107 | |
97ab12d4 | 1108 | ch = qemu_get_byte(f); |
44c3b58c | 1109 | ram_handle_compressed(host, ch, TARGET_PAGE_SIZE); |
ad96090a | 1110 | } else if (flags & RAM_SAVE_FLAG_PAGE) { |
97ab12d4 AW |
1111 | void *host; |
1112 | ||
f09f2189 | 1113 | host = host_from_stream_offset(f, addr, flags); |
0ff1f9f5 | 1114 | if (!host) { |
db80face | 1115 | error_report("Illegal RAM offset " RAM_ADDR_FMT, addr); |
4798fe55 | 1116 | ret = -EINVAL; |
db80face | 1117 | break; |
0ff1f9f5 | 1118 | } |
97ab12d4 | 1119 | |
97ab12d4 | 1120 | qemu_get_buffer(f, host, TARGET_PAGE_SIZE); |
17ad9b35 | 1121 | } else if (flags & RAM_SAVE_FLAG_XBZRLE) { |
17ad9b35 OW |
1122 | void *host = host_from_stream_offset(f, addr, flags); |
1123 | if (!host) { | |
db80face | 1124 | error_report("Illegal RAM offset " RAM_ADDR_FMT, addr); |
4798fe55 | 1125 | ret = -EINVAL; |
db80face | 1126 | break; |
17ad9b35 OW |
1127 | } |
1128 | ||
1129 | if (load_xbzrle(f, addr, host) < 0) { | |
db80face PL |
1130 | error_report("Failed to decompress XBZRLE page at " |
1131 | RAM_ADDR_FMT, addr); | |
17ad9b35 | 1132 | ret = -EINVAL; |
db80face | 1133 | break; |
17ad9b35 | 1134 | } |
0033b8b4 MH |
1135 | } else if (flags & RAM_SAVE_FLAG_HOOK) { |
1136 | ram_control_load_hook(f, flags); | |
db80face PL |
1137 | } else if (flags & RAM_SAVE_FLAG_EOS) { |
1138 | /* normal exit */ | |
1139 | break; | |
1140 | } else { | |
1141 | error_report("Unknown migration flags: %#x", flags); | |
1142 | ret = -EINVAL; | |
1143 | break; | |
ad96090a | 1144 | } |
db80face PL |
1145 | ret = qemu_file_get_error(f); |
1146 | } | |
ad96090a | 1147 | |
ef37a699 IM |
1148 | DPRINTF("Completed load of VM with exit code %d seq iteration " |
1149 | "%" PRIu64 "\n", ret, seq_iter); | |
3a697f69 | 1150 | return ret; |
ad96090a BS |
1151 | } |
1152 | ||
0d6ab3ab | 1153 | static SaveVMHandlers savevm_ram_handlers = { |
d1315aac | 1154 | .save_live_setup = ram_save_setup, |
16310a3c JQ |
1155 | .save_live_iterate = ram_save_iterate, |
1156 | .save_live_complete = ram_save_complete, | |
e4ed1541 | 1157 | .save_live_pending = ram_save_pending, |
7908c78d | 1158 | .load_state = ram_load, |
9b5bfab0 | 1159 | .cancel = ram_migration_cancel, |
7908c78d JQ |
1160 | }; |
1161 | ||
0d6ab3ab DDAG |
1162 | void ram_mig_init(void) |
1163 | { | |
d97326ee | 1164 | qemu_mutex_init(&XBZRLE.lock); |
0d6ab3ab DDAG |
1165 | register_savevm_live(NULL, "ram", 0, 4, &savevm_ram_handlers, NULL); |
1166 | } | |
1167 | ||
0dfa5ef9 IY |
1168 | struct soundhw { |
1169 | const char *name; | |
1170 | const char *descr; | |
1171 | int enabled; | |
1172 | int isa; | |
1173 | union { | |
4a0f031d | 1174 | int (*init_isa) (ISABus *bus); |
0dfa5ef9 IY |
1175 | int (*init_pci) (PCIBus *bus); |
1176 | } init; | |
1177 | }; | |
1178 | ||
36cd6f6f PB |
1179 | static struct soundhw soundhw[9]; |
1180 | static int soundhw_count; | |
ad96090a | 1181 | |
36cd6f6f PB |
1182 | void isa_register_soundhw(const char *name, const char *descr, |
1183 | int (*init_isa)(ISABus *bus)) | |
1184 | { | |
1185 | assert(soundhw_count < ARRAY_SIZE(soundhw) - 1); | |
1186 | soundhw[soundhw_count].name = name; | |
1187 | soundhw[soundhw_count].descr = descr; | |
1188 | soundhw[soundhw_count].isa = 1; | |
1189 | soundhw[soundhw_count].init.init_isa = init_isa; | |
1190 | soundhw_count++; | |
1191 | } | |
ad96090a | 1192 | |
36cd6f6f PB |
1193 | void pci_register_soundhw(const char *name, const char *descr, |
1194 | int (*init_pci)(PCIBus *bus)) | |
1195 | { | |
1196 | assert(soundhw_count < ARRAY_SIZE(soundhw) - 1); | |
1197 | soundhw[soundhw_count].name = name; | |
1198 | soundhw[soundhw_count].descr = descr; | |
1199 | soundhw[soundhw_count].isa = 0; | |
1200 | soundhw[soundhw_count].init.init_pci = init_pci; | |
1201 | soundhw_count++; | |
1202 | } | |
ad96090a BS |
1203 | |
1204 | void select_soundhw(const char *optarg) | |
1205 | { | |
1206 | struct soundhw *c; | |
1207 | ||
c8057f95 | 1208 | if (is_help_option(optarg)) { |
ad96090a BS |
1209 | show_valid_cards: |
1210 | ||
36cd6f6f PB |
1211 | if (soundhw_count) { |
1212 | printf("Valid sound card names (comma separated):\n"); | |
1213 | for (c = soundhw; c->name; ++c) { | |
1214 | printf ("%-11s %s\n", c->name, c->descr); | |
1215 | } | |
1216 | printf("\n-soundhw all will enable all of the above\n"); | |
1217 | } else { | |
1218 | printf("Machine has no user-selectable audio hardware " | |
1219 | "(it may or may not have always-present audio hardware).\n"); | |
ad96090a | 1220 | } |
c8057f95 | 1221 | exit(!is_help_option(optarg)); |
ad96090a BS |
1222 | } |
1223 | else { | |
1224 | size_t l; | |
1225 | const char *p; | |
1226 | char *e; | |
1227 | int bad_card = 0; | |
1228 | ||
1229 | if (!strcmp(optarg, "all")) { | |
1230 | for (c = soundhw; c->name; ++c) { | |
1231 | c->enabled = 1; | |
1232 | } | |
1233 | return; | |
1234 | } | |
1235 | ||
1236 | p = optarg; | |
1237 | while (*p) { | |
1238 | e = strchr(p, ','); | |
1239 | l = !e ? strlen(p) : (size_t) (e - p); | |
1240 | ||
1241 | for (c = soundhw; c->name; ++c) { | |
1242 | if (!strncmp(c->name, p, l) && !c->name[l]) { | |
1243 | c->enabled = 1; | |
1244 | break; | |
1245 | } | |
1246 | } | |
1247 | ||
1248 | if (!c->name) { | |
1249 | if (l > 80) { | |
0971f1be | 1250 | error_report("Unknown sound card name (too big to show)"); |
ad96090a BS |
1251 | } |
1252 | else { | |
0971f1be LT |
1253 | error_report("Unknown sound card name `%.*s'", |
1254 | (int) l, p); | |
ad96090a BS |
1255 | } |
1256 | bad_card = 1; | |
1257 | } | |
1258 | p += l + (e != NULL); | |
1259 | } | |
1260 | ||
1261 | if (bad_card) { | |
1262 | goto show_valid_cards; | |
1263 | } | |
1264 | } | |
1265 | } | |
0dfa5ef9 | 1266 | |
f81222bc | 1267 | void audio_init(void) |
0dfa5ef9 IY |
1268 | { |
1269 | struct soundhw *c; | |
f81222bc PB |
1270 | ISABus *isa_bus = (ISABus *) object_resolve_path_type("", TYPE_ISA_BUS, NULL); |
1271 | PCIBus *pci_bus = (PCIBus *) object_resolve_path_type("", TYPE_PCI_BUS, NULL); | |
0dfa5ef9 IY |
1272 | |
1273 | for (c = soundhw; c->name; ++c) { | |
1274 | if (c->enabled) { | |
1275 | if (c->isa) { | |
f81222bc | 1276 | if (!isa_bus) { |
0971f1be | 1277 | error_report("ISA bus not available for %s", c->name); |
f81222bc | 1278 | exit(1); |
0dfa5ef9 | 1279 | } |
f81222bc | 1280 | c->init.init_isa(isa_bus); |
0dfa5ef9 | 1281 | } else { |
f81222bc | 1282 | if (!pci_bus) { |
0971f1be | 1283 | error_report("PCI bus not available for %s", c->name); |
f81222bc | 1284 | exit(1); |
0dfa5ef9 | 1285 | } |
f81222bc | 1286 | c->init.init_pci(pci_bus); |
0dfa5ef9 IY |
1287 | } |
1288 | } | |
1289 | } | |
1290 | } | |
ad96090a BS |
1291 | |
1292 | int qemu_uuid_parse(const char *str, uint8_t *uuid) | |
1293 | { | |
1294 | int ret; | |
1295 | ||
1296 | if (strlen(str) != 36) { | |
1297 | return -1; | |
1298 | } | |
1299 | ||
1300 | ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3], | |
1301 | &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9], | |
1302 | &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14], | |
1303 | &uuid[15]); | |
1304 | ||
1305 | if (ret != 16) { | |
1306 | return -1; | |
1307 | } | |
ad96090a BS |
1308 | return 0; |
1309 | } | |
1310 | ||
0c764a9d | 1311 | void do_acpitable_option(const QemuOpts *opts) |
ad96090a BS |
1312 | { |
1313 | #ifdef TARGET_I386 | |
23084327 LE |
1314 | Error *err = NULL; |
1315 | ||
1316 | acpi_table_add(opts, &err); | |
1317 | if (err) { | |
4a44d85e SA |
1318 | error_report("Wrong acpi table provided: %s", |
1319 | error_get_pretty(err)); | |
23084327 | 1320 | error_free(err); |
ad96090a BS |
1321 | exit(1); |
1322 | } | |
1323 | #endif | |
1324 | } | |
1325 | ||
4f953d2f | 1326 | void do_smbios_option(QemuOpts *opts) |
ad96090a BS |
1327 | { |
1328 | #ifdef TARGET_I386 | |
4f953d2f | 1329 | smbios_entry_add(opts); |
ad96090a BS |
1330 | #endif |
1331 | } | |
1332 | ||
1333 | void cpudef_init(void) | |
1334 | { | |
1335 | #if defined(cpudef_setup) | |
1336 | cpudef_setup(); /* parse cpu definitions in target config file */ | |
1337 | #endif | |
1338 | } | |
1339 | ||
303d4e86 AP |
1340 | int tcg_available(void) |
1341 | { | |
1342 | return 1; | |
1343 | } | |
1344 | ||
ad96090a BS |
1345 | int kvm_available(void) |
1346 | { | |
1347 | #ifdef CONFIG_KVM | |
1348 | return 1; | |
1349 | #else | |
1350 | return 0; | |
1351 | #endif | |
1352 | } | |
1353 | ||
1354 | int xen_available(void) | |
1355 | { | |
1356 | #ifdef CONFIG_XEN | |
1357 | return 1; | |
1358 | #else | |
1359 | return 0; | |
1360 | #endif | |
1361 | } | |
99afc91d DB |
1362 | |
1363 | ||
1364 | TargetInfo *qmp_query_target(Error **errp) | |
1365 | { | |
1366 | TargetInfo *info = g_malloc0(sizeof(*info)); | |
1367 | ||
c02a9552 | 1368 | info->arch = g_strdup(TARGET_NAME); |
99afc91d DB |
1369 | |
1370 | return info; | |
1371 | } | |
7ca1dfad CV |
1372 | |
1373 | /* Stub function that's gets run on the vcpu when its brought out of the | |
1374 | VM to run inside qemu via async_run_on_cpu()*/ | |
1375 | static void mig_sleep_cpu(void *opq) | |
1376 | { | |
1377 | qemu_mutex_unlock_iothread(); | |
1378 | g_usleep(30*1000); | |
1379 | qemu_mutex_lock_iothread(); | |
1380 | } | |
1381 | ||
1382 | /* To reduce the dirty rate explicitly disallow the VCPUs from spending | |
1383 | much time in the VM. The migration thread will try to catchup. | |
1384 | Workload will experience a performance drop. | |
1385 | */ | |
7ca1dfad CV |
1386 | static void mig_throttle_guest_down(void) |
1387 | { | |
38fcbd3f AF |
1388 | CPUState *cpu; |
1389 | ||
7ca1dfad | 1390 | qemu_mutex_lock_iothread(); |
38fcbd3f AF |
1391 | CPU_FOREACH(cpu) { |
1392 | async_run_on_cpu(cpu, mig_sleep_cpu, NULL); | |
1393 | } | |
7ca1dfad CV |
1394 | qemu_mutex_unlock_iothread(); |
1395 | } | |
1396 | ||
1397 | static void check_guest_throttling(void) | |
1398 | { | |
1399 | static int64_t t0; | |
1400 | int64_t t1; | |
1401 | ||
1402 | if (!mig_throttle_on) { | |
1403 | return; | |
1404 | } | |
1405 | ||
1406 | if (!t0) { | |
bc72ad67 | 1407 | t0 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
7ca1dfad CV |
1408 | return; |
1409 | } | |
1410 | ||
bc72ad67 | 1411 | t1 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
7ca1dfad CV |
1412 | |
1413 | /* If it has been more than 40 ms since the last time the guest | |
1414 | * was throttled then do it again. | |
1415 | */ | |
1416 | if (40 < (t1-t0)/1000000) { | |
1417 | mig_throttle_guest_down(); | |
1418 | t0 = t1; | |
1419 | } | |
1420 | } |