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ad96090a BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include <stdint.h> | |
25 | #include <stdarg.h> | |
b2e0a138 | 26 | #include <stdlib.h> |
ad96090a | 27 | #ifndef _WIN32 |
1c47cb16 | 28 | #include <sys/types.h> |
ad96090a BS |
29 | #include <sys/mman.h> |
30 | #endif | |
31 | #include "config.h" | |
32 | #include "monitor.h" | |
33 | #include "sysemu.h" | |
34 | #include "arch_init.h" | |
35 | #include "audio/audio.h" | |
36 | #include "hw/pc.h" | |
37 | #include "hw/pci.h" | |
38 | #include "hw/audiodev.h" | |
39 | #include "kvm.h" | |
40 | #include "migration.h" | |
41 | #include "net.h" | |
42 | #include "gdbstub.h" | |
43 | #include "hw/smbios.h" | |
86e775c6 | 44 | #include "exec-memory.h" |
302fe51b | 45 | #include "hw/pcspk.h" |
ad96090a | 46 | |
3a697f69 OW |
47 | #ifdef DEBUG_ARCH_INIT |
48 | #define DPRINTF(fmt, ...) \ | |
49 | do { fprintf(stdout, "arch_init: " fmt, ## __VA_ARGS__); } while (0) | |
50 | #else | |
51 | #define DPRINTF(fmt, ...) \ | |
52 | do { } while (0) | |
53 | #endif | |
54 | ||
ad96090a BS |
55 | #ifdef TARGET_SPARC |
56 | int graphic_width = 1024; | |
57 | int graphic_height = 768; | |
58 | int graphic_depth = 8; | |
59 | #else | |
60 | int graphic_width = 800; | |
61 | int graphic_height = 600; | |
62 | int graphic_depth = 15; | |
63 | #endif | |
64 | ||
ad96090a BS |
65 | |
66 | #if defined(TARGET_ALPHA) | |
67 | #define QEMU_ARCH QEMU_ARCH_ALPHA | |
68 | #elif defined(TARGET_ARM) | |
69 | #define QEMU_ARCH QEMU_ARCH_ARM | |
70 | #elif defined(TARGET_CRIS) | |
71 | #define QEMU_ARCH QEMU_ARCH_CRIS | |
72 | #elif defined(TARGET_I386) | |
73 | #define QEMU_ARCH QEMU_ARCH_I386 | |
74 | #elif defined(TARGET_M68K) | |
75 | #define QEMU_ARCH QEMU_ARCH_M68K | |
81ea0e13 MW |
76 | #elif defined(TARGET_LM32) |
77 | #define QEMU_ARCH QEMU_ARCH_LM32 | |
ad96090a BS |
78 | #elif defined(TARGET_MICROBLAZE) |
79 | #define QEMU_ARCH QEMU_ARCH_MICROBLAZE | |
80 | #elif defined(TARGET_MIPS) | |
81 | #define QEMU_ARCH QEMU_ARCH_MIPS | |
82 | #elif defined(TARGET_PPC) | |
83 | #define QEMU_ARCH QEMU_ARCH_PPC | |
84 | #elif defined(TARGET_S390X) | |
85 | #define QEMU_ARCH QEMU_ARCH_S390X | |
86 | #elif defined(TARGET_SH4) | |
87 | #define QEMU_ARCH QEMU_ARCH_SH4 | |
88 | #elif defined(TARGET_SPARC) | |
89 | #define QEMU_ARCH QEMU_ARCH_SPARC | |
2328826b MF |
90 | #elif defined(TARGET_XTENSA) |
91 | #define QEMU_ARCH QEMU_ARCH_XTENSA | |
ad96090a BS |
92 | #endif |
93 | ||
94 | const uint32_t arch_type = QEMU_ARCH; | |
95 | ||
96 | /***********************************************************/ | |
97 | /* ram save/restore */ | |
98 | ||
d20878d2 YT |
99 | #define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */ |
100 | #define RAM_SAVE_FLAG_COMPRESS 0x02 | |
101 | #define RAM_SAVE_FLAG_MEM_SIZE 0x04 | |
102 | #define RAM_SAVE_FLAG_PAGE 0x08 | |
103 | #define RAM_SAVE_FLAG_EOS 0x10 | |
104 | #define RAM_SAVE_FLAG_CONTINUE 0x20 | |
ad96090a | 105 | |
86003615 PB |
106 | #ifdef __ALTIVEC__ |
107 | #include <altivec.h> | |
108 | #define VECTYPE vector unsigned char | |
109 | #define SPLAT(p) vec_splat(vec_ld(0, p), 0) | |
110 | #define ALL_EQ(v1, v2) vec_all_eq(v1, v2) | |
f283edc4 AF |
111 | /* altivec.h may redefine the bool macro as vector type. |
112 | * Reset it to POSIX semantics. */ | |
113 | #undef bool | |
114 | #define bool _Bool | |
86003615 PB |
115 | #elif defined __SSE2__ |
116 | #include <emmintrin.h> | |
117 | #define VECTYPE __m128i | |
118 | #define SPLAT(p) _mm_set1_epi8(*(p)) | |
119 | #define ALL_EQ(v1, v2) (_mm_movemask_epi8(_mm_cmpeq_epi8(v1, v2)) == 0xFFFF) | |
120 | #else | |
121 | #define VECTYPE unsigned long | |
122 | #define SPLAT(p) (*(p) * (~0UL / 255)) | |
123 | #define ALL_EQ(v1, v2) ((v1) == (v2)) | |
124 | #endif | |
125 | ||
b5a8fe5e | 126 | |
756557de EH |
127 | static struct defconfig_file { |
128 | const char *filename; | |
f29a5614 EH |
129 | /* Indicates it is an user config file (disabled by -no-user-config) */ |
130 | bool userconfig; | |
756557de | 131 | } default_config_files[] = { |
e2d87bff | 132 | { CONFIG_QEMU_DATADIR "/cpus-" TARGET_ARCH ".conf", false }, |
f29a5614 EH |
133 | { CONFIG_QEMU_CONFDIR "/qemu.conf", true }, |
134 | { CONFIG_QEMU_CONFDIR "/target-" TARGET_ARCH ".conf", true }, | |
756557de EH |
135 | { NULL }, /* end of list */ |
136 | }; | |
137 | ||
138 | ||
f29a5614 | 139 | int qemu_read_default_config_files(bool userconfig) |
b5a8fe5e EH |
140 | { |
141 | int ret; | |
756557de | 142 | struct defconfig_file *f; |
b5a8fe5e | 143 | |
756557de | 144 | for (f = default_config_files; f->filename; f++) { |
f29a5614 EH |
145 | if (!userconfig && f->userconfig) { |
146 | continue; | |
147 | } | |
756557de EH |
148 | ret = qemu_read_config_file(f->filename); |
149 | if (ret < 0 && ret != -ENOENT) { | |
150 | return ret; | |
151 | } | |
b5a8fe5e | 152 | } |
756557de | 153 | |
b5a8fe5e EH |
154 | return 0; |
155 | } | |
156 | ||
86003615 | 157 | static int is_dup_page(uint8_t *page) |
ad96090a | 158 | { |
86003615 PB |
159 | VECTYPE *p = (VECTYPE *)page; |
160 | VECTYPE val = SPLAT(page); | |
ad96090a BS |
161 | int i; |
162 | ||
86003615 PB |
163 | for (i = 0; i < TARGET_PAGE_SIZE / sizeof(VECTYPE); i++) { |
164 | if (!ALL_EQ(val, p[i])) { | |
ad96090a BS |
165 | return 0; |
166 | } | |
167 | } | |
168 | ||
169 | return 1; | |
170 | } | |
171 | ||
0c51f43d OW |
172 | static void save_block_hdr(QEMUFile *f, RAMBlock *block, ram_addr_t offset, |
173 | int cont, int flag) | |
174 | { | |
175 | qemu_put_be64(f, offset | cont | flag); | |
176 | if (!cont) { | |
177 | qemu_put_byte(f, strlen(block->idstr)); | |
178 | qemu_put_buffer(f, (uint8_t *)block->idstr, | |
179 | strlen(block->idstr)); | |
180 | } | |
181 | ||
182 | } | |
183 | ||
760e77ea AW |
184 | static RAMBlock *last_block; |
185 | static ram_addr_t last_offset; | |
186 | ||
ad96090a BS |
187 | static int ram_save_block(QEMUFile *f) |
188 | { | |
e44359c3 AW |
189 | RAMBlock *block = last_block; |
190 | ram_addr_t offset = last_offset; | |
3fc250b4 | 191 | int bytes_sent = 0; |
71c510e2 | 192 | MemoryRegion *mr; |
ad96090a | 193 | |
e44359c3 AW |
194 | if (!block) |
195 | block = QLIST_FIRST(&ram_list.blocks); | |
196 | ||
e44359c3 | 197 | do { |
71c510e2 | 198 | mr = block->mr; |
cd7a45c9 BS |
199 | if (memory_region_get_dirty(mr, offset, TARGET_PAGE_SIZE, |
200 | DIRTY_MEMORY_MIGRATION)) { | |
ad96090a | 201 | uint8_t *p; |
a55bbe31 | 202 | int cont = (block == last_block) ? RAM_SAVE_FLAG_CONTINUE : 0; |
ad96090a | 203 | |
71c510e2 AK |
204 | memory_region_reset_dirty(mr, offset, TARGET_PAGE_SIZE, |
205 | DIRTY_MEMORY_MIGRATION); | |
ad96090a | 206 | |
71c510e2 | 207 | p = memory_region_get_ram_ptr(mr) + offset; |
ad96090a | 208 | |
86003615 | 209 | if (is_dup_page(p)) { |
0c51f43d | 210 | save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_COMPRESS); |
ad96090a | 211 | qemu_put_byte(f, *p); |
3fc250b4 | 212 | bytes_sent = 1; |
ad96090a | 213 | } else { |
0c51f43d | 214 | save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_PAGE); |
ad96090a | 215 | qemu_put_buffer(f, p, TARGET_PAGE_SIZE); |
3fc250b4 | 216 | bytes_sent = TARGET_PAGE_SIZE; |
ad96090a BS |
217 | } |
218 | ||
ad96090a BS |
219 | break; |
220 | } | |
e44359c3 AW |
221 | |
222 | offset += TARGET_PAGE_SIZE; | |
223 | if (offset >= block->length) { | |
224 | offset = 0; | |
225 | block = QLIST_NEXT(block, next); | |
226 | if (!block) | |
227 | block = QLIST_FIRST(&ram_list.blocks); | |
228 | } | |
71c510e2 | 229 | } while (block != last_block || offset != last_offset); |
e44359c3 AW |
230 | |
231 | last_block = block; | |
232 | last_offset = offset; | |
ad96090a | 233 | |
3fc250b4 | 234 | return bytes_sent; |
ad96090a BS |
235 | } |
236 | ||
237 | static uint64_t bytes_transferred; | |
238 | ||
239 | static ram_addr_t ram_save_remaining(void) | |
240 | { | |
45f33f01 | 241 | return ram_list.dirty_pages; |
ad96090a BS |
242 | } |
243 | ||
244 | uint64_t ram_bytes_remaining(void) | |
245 | { | |
246 | return ram_save_remaining() * TARGET_PAGE_SIZE; | |
247 | } | |
248 | ||
249 | uint64_t ram_bytes_transferred(void) | |
250 | { | |
251 | return bytes_transferred; | |
252 | } | |
253 | ||
254 | uint64_t ram_bytes_total(void) | |
255 | { | |
d17b5288 AW |
256 | RAMBlock *block; |
257 | uint64_t total = 0; | |
258 | ||
259 | QLIST_FOREACH(block, &ram_list.blocks, next) | |
260 | total += block->length; | |
261 | ||
262 | return total; | |
ad96090a BS |
263 | } |
264 | ||
b2e0a138 MT |
265 | static int block_compar(const void *a, const void *b) |
266 | { | |
267 | RAMBlock * const *ablock = a; | |
268 | RAMBlock * const *bblock = b; | |
8fec98b4 AK |
269 | |
270 | return strcmp((*ablock)->idstr, (*bblock)->idstr); | |
b2e0a138 MT |
271 | } |
272 | ||
273 | static void sort_ram_list(void) | |
274 | { | |
275 | RAMBlock *block, *nblock, **blocks; | |
276 | int n; | |
277 | n = 0; | |
278 | QLIST_FOREACH(block, &ram_list.blocks, next) { | |
279 | ++n; | |
280 | } | |
7267c094 | 281 | blocks = g_malloc(n * sizeof *blocks); |
b2e0a138 MT |
282 | n = 0; |
283 | QLIST_FOREACH_SAFE(block, &ram_list.blocks, next, nblock) { | |
284 | blocks[n++] = block; | |
285 | QLIST_REMOVE(block, next); | |
286 | } | |
287 | qsort(blocks, n, sizeof *blocks, block_compar); | |
288 | while (--n >= 0) { | |
289 | QLIST_INSERT_HEAD(&ram_list.blocks, blocks[n], next); | |
290 | } | |
7267c094 | 291 | g_free(blocks); |
b2e0a138 MT |
292 | } |
293 | ||
8e21cd32 OW |
294 | static void migration_end(void) |
295 | { | |
296 | memory_global_dirty_log_stop(); | |
297 | } | |
298 | ||
9b5bfab0 JQ |
299 | static void ram_migration_cancel(void *opaque) |
300 | { | |
301 | migration_end(); | |
302 | } | |
303 | ||
4508bd9e JQ |
304 | #define MAX_WAIT 50 /* ms, half buffered_file limit */ |
305 | ||
d1315aac | 306 | static int ram_save_setup(QEMUFile *f, void *opaque) |
ad96090a BS |
307 | { |
308 | ram_addr_t addr; | |
d1315aac | 309 | RAMBlock *block; |
ad96090a | 310 | double bwidth = 0; |
2975725f | 311 | int ret; |
4508bd9e | 312 | int i; |
ad96090a | 313 | |
86e775c6 | 314 | memory_global_sync_dirty_bitmap(get_system_memory()); |
ad96090a | 315 | |
d1315aac JQ |
316 | bytes_transferred = 0; |
317 | last_block = NULL; | |
318 | last_offset = 0; | |
319 | sort_ram_list(); | |
320 | ||
321 | /* Make sure all dirty bits are set */ | |
322 | QLIST_FOREACH(block, &ram_list.blocks, next) { | |
323 | for (addr = 0; addr < block->length; addr += TARGET_PAGE_SIZE) { | |
324 | if (!memory_region_get_dirty(block->mr, addr, TARGET_PAGE_SIZE, | |
325 | DIRTY_MEMORY_MIGRATION)) { | |
326 | memory_region_set_dirty(block->mr, addr, TARGET_PAGE_SIZE); | |
ad96090a BS |
327 | } |
328 | } | |
d1315aac | 329 | } |
ad96090a | 330 | |
d1315aac JQ |
331 | memory_global_dirty_log_start(); |
332 | ||
333 | qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE); | |
334 | ||
335 | QLIST_FOREACH(block, &ram_list.blocks, next) { | |
336 | qemu_put_byte(f, strlen(block->idstr)); | |
337 | qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr)); | |
338 | qemu_put_be64(f, block->length); | |
339 | } | |
340 | ||
341 | bwidth = qemu_get_clock_ns(rt_clock); | |
ad96090a | 342 | |
d1315aac JQ |
343 | i = 0; |
344 | while ((ret = qemu_file_rate_limit(f)) == 0) { | |
345 | int bytes_sent; | |
97ab12d4 | 346 | |
d1315aac JQ |
347 | bytes_sent = ram_save_block(f); |
348 | bytes_transferred += bytes_sent; | |
349 | if (bytes_sent == 0) { /* no more blocks */ | |
350 | break; | |
351 | } | |
352 | /* we want to check in the 1st loop, just in case it was the 1st time | |
353 | and we had to sync the dirty bitmap. | |
354 | qemu_get_clock_ns() is a bit expensive, so we only check each some | |
355 | iterations | |
356 | */ | |
357 | if ((i & 63) == 0) { | |
358 | uint64_t t1 = (qemu_get_clock_ns(rt_clock) - bwidth) / 1000000; | |
359 | if (t1 > MAX_WAIT) { | |
360 | DPRINTF("big wait: " PRIu64 " milliseconds, %d iterations\n", | |
361 | t1, i); | |
362 | break; | |
363 | } | |
97ab12d4 | 364 | } |
d1315aac JQ |
365 | i++; |
366 | } | |
367 | ||
368 | if (ret < 0) { | |
369 | return ret; | |
ad96090a BS |
370 | } |
371 | ||
d1315aac JQ |
372 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
373 | ||
374 | return 0; | |
375 | } | |
376 | ||
377 | static int ram_save_live(QEMUFile *f, int stage, void *opaque) | |
378 | { | |
379 | uint64_t bytes_transferred_last; | |
380 | double bwidth = 0; | |
381 | int ret; | |
382 | int i; | |
383 | ||
384 | memory_global_sync_dirty_bitmap(get_system_memory()); | |
385 | ||
ad96090a BS |
386 | bytes_transferred_last = bytes_transferred; |
387 | bwidth = qemu_get_clock_ns(rt_clock); | |
388 | ||
4508bd9e | 389 | i = 0; |
2975725f | 390 | while ((ret = qemu_file_rate_limit(f)) == 0) { |
3fc250b4 | 391 | int bytes_sent; |
ad96090a | 392 | |
3fc250b4 PR |
393 | bytes_sent = ram_save_block(f); |
394 | bytes_transferred += bytes_sent; | |
395 | if (bytes_sent == 0) { /* no more blocks */ | |
ad96090a BS |
396 | break; |
397 | } | |
4508bd9e JQ |
398 | /* we want to check in the 1st loop, just in case it was the 1st time |
399 | and we had to sync the dirty bitmap. | |
400 | qemu_get_clock_ns() is a bit expensive, so we only check each some | |
401 | iterations | |
402 | */ | |
403 | if ((i & 63) == 0) { | |
404 | uint64_t t1 = (qemu_get_clock_ns(rt_clock) - bwidth) / 1000000; | |
405 | if (t1 > MAX_WAIT) { | |
406 | DPRINTF("big wait: " PRIu64 " milliseconds, %d iterations\n", | |
407 | t1, i); | |
408 | break; | |
409 | } | |
410 | } | |
411 | i++; | |
ad96090a BS |
412 | } |
413 | ||
2975725f JQ |
414 | if (ret < 0) { |
415 | return ret; | |
416 | } | |
417 | ||
ad96090a BS |
418 | bwidth = qemu_get_clock_ns(rt_clock) - bwidth; |
419 | bwidth = (bytes_transferred - bytes_transferred_last) / bwidth; | |
420 | ||
421 | /* if we haven't transferred anything this round, force expected_time to a | |
422 | * a very high value, but without crashing */ | |
423 | if (bwidth == 0) { | |
424 | bwidth = 0.000001; | |
425 | } | |
426 | ||
427 | /* try transferring iterative blocks of memory */ | |
428 | if (stage == 3) { | |
3fc250b4 PR |
429 | int bytes_sent; |
430 | ||
ad96090a | 431 | /* flush all remaining blocks regardless of rate limiting */ |
3fc250b4 PR |
432 | while ((bytes_sent = ram_save_block(f)) != 0) { |
433 | bytes_transferred += bytes_sent; | |
ad96090a | 434 | } |
8f77558f | 435 | memory_global_dirty_log_stop(); |
ad96090a BS |
436 | } |
437 | ||
438 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); | |
439 | ||
5b3c9638 JQ |
440 | if (stage == 2) { |
441 | uint64_t expected_time; | |
442 | expected_time = ram_save_remaining() * TARGET_PAGE_SIZE / bwidth; | |
ad96090a | 443 | |
5b3c9638 JQ |
444 | DPRINTF("ram_save_live: expected(" PRIu64 ") <= max(" PRIu64 ")?\n", |
445 | expected_time, migrate_max_downtime()); | |
3a697f69 | 446 | |
5b3c9638 JQ |
447 | return expected_time <= migrate_max_downtime(); |
448 | } | |
449 | return 0; | |
ad96090a BS |
450 | } |
451 | ||
a55bbe31 AW |
452 | static inline void *host_from_stream_offset(QEMUFile *f, |
453 | ram_addr_t offset, | |
454 | int flags) | |
455 | { | |
456 | static RAMBlock *block = NULL; | |
457 | char id[256]; | |
458 | uint8_t len; | |
459 | ||
460 | if (flags & RAM_SAVE_FLAG_CONTINUE) { | |
461 | if (!block) { | |
462 | fprintf(stderr, "Ack, bad migration stream!\n"); | |
463 | return NULL; | |
464 | } | |
465 | ||
dc94a7ed | 466 | return memory_region_get_ram_ptr(block->mr) + offset; |
a55bbe31 AW |
467 | } |
468 | ||
469 | len = qemu_get_byte(f); | |
470 | qemu_get_buffer(f, (uint8_t *)id, len); | |
471 | id[len] = 0; | |
472 | ||
473 | QLIST_FOREACH(block, &ram_list.blocks, next) { | |
474 | if (!strncmp(id, block->idstr, sizeof(id))) | |
dc94a7ed | 475 | return memory_region_get_ram_ptr(block->mr) + offset; |
a55bbe31 AW |
476 | } |
477 | ||
478 | fprintf(stderr, "Can't find block %s!\n", id); | |
479 | return NULL; | |
480 | } | |
481 | ||
7908c78d | 482 | static int ram_load(QEMUFile *f, void *opaque, int version_id) |
ad96090a BS |
483 | { |
484 | ram_addr_t addr; | |
3a697f69 | 485 | int flags, ret = 0; |
42802d47 | 486 | int error; |
3a697f69 OW |
487 | static uint64_t seq_iter; |
488 | ||
489 | seq_iter++; | |
ad96090a | 490 | |
f09f2189 | 491 | if (version_id < 4 || version_id > 4) { |
ad96090a BS |
492 | return -EINVAL; |
493 | } | |
494 | ||
495 | do { | |
496 | addr = qemu_get_be64(f); | |
497 | ||
498 | flags = addr & ~TARGET_PAGE_MASK; | |
499 | addr &= TARGET_PAGE_MASK; | |
500 | ||
501 | if (flags & RAM_SAVE_FLAG_MEM_SIZE) { | |
f09f2189 | 502 | if (version_id == 4) { |
97ab12d4 AW |
503 | /* Synchronize RAM block list */ |
504 | char id[256]; | |
505 | ram_addr_t length; | |
506 | ram_addr_t total_ram_bytes = addr; | |
507 | ||
508 | while (total_ram_bytes) { | |
509 | RAMBlock *block; | |
510 | uint8_t len; | |
511 | ||
512 | len = qemu_get_byte(f); | |
513 | qemu_get_buffer(f, (uint8_t *)id, len); | |
514 | id[len] = 0; | |
515 | length = qemu_get_be64(f); | |
516 | ||
517 | QLIST_FOREACH(block, &ram_list.blocks, next) { | |
518 | if (!strncmp(id, block->idstr, sizeof(id))) { | |
3a697f69 OW |
519 | if (block->length != length) { |
520 | ret = -EINVAL; | |
521 | goto done; | |
522 | } | |
97ab12d4 AW |
523 | break; |
524 | } | |
525 | } | |
526 | ||
527 | if (!block) { | |
fb787f81 AW |
528 | fprintf(stderr, "Unknown ramblock \"%s\", cannot " |
529 | "accept migration\n", id); | |
3a697f69 OW |
530 | ret = -EINVAL; |
531 | goto done; | |
97ab12d4 AW |
532 | } |
533 | ||
534 | total_ram_bytes -= length; | |
535 | } | |
ad96090a BS |
536 | } |
537 | } | |
538 | ||
539 | if (flags & RAM_SAVE_FLAG_COMPRESS) { | |
97ab12d4 AW |
540 | void *host; |
541 | uint8_t ch; | |
542 | ||
f09f2189 | 543 | host = host_from_stream_offset(f, addr, flags); |
492fb99c MT |
544 | if (!host) { |
545 | return -EINVAL; | |
546 | } | |
97ab12d4 | 547 | |
97ab12d4 AW |
548 | ch = qemu_get_byte(f); |
549 | memset(host, ch, TARGET_PAGE_SIZE); | |
ad96090a BS |
550 | #ifndef _WIN32 |
551 | if (ch == 0 && | |
552 | (!kvm_enabled() || kvm_has_sync_mmu())) { | |
e78815a5 | 553 | qemu_madvise(host, TARGET_PAGE_SIZE, QEMU_MADV_DONTNEED); |
ad96090a BS |
554 | } |
555 | #endif | |
556 | } else if (flags & RAM_SAVE_FLAG_PAGE) { | |
97ab12d4 AW |
557 | void *host; |
558 | ||
f09f2189 | 559 | host = host_from_stream_offset(f, addr, flags); |
0ff1f9f5 OW |
560 | if (!host) { |
561 | return -EINVAL; | |
562 | } | |
97ab12d4 | 563 | |
97ab12d4 | 564 | qemu_get_buffer(f, host, TARGET_PAGE_SIZE); |
ad96090a | 565 | } |
42802d47 JQ |
566 | error = qemu_file_get_error(f); |
567 | if (error) { | |
3a697f69 OW |
568 | ret = error; |
569 | goto done; | |
ad96090a BS |
570 | } |
571 | } while (!(flags & RAM_SAVE_FLAG_EOS)); | |
572 | ||
3a697f69 OW |
573 | done: |
574 | DPRINTF("Completed load of VM with exit code %d seq iteration " PRIu64 "\n", | |
575 | ret, seq_iter); | |
576 | return ret; | |
ad96090a BS |
577 | } |
578 | ||
7908c78d | 579 | SaveVMHandlers savevm_ram_handlers = { |
d1315aac | 580 | .save_live_setup = ram_save_setup, |
7908c78d JQ |
581 | .save_live_state = ram_save_live, |
582 | .load_state = ram_load, | |
9b5bfab0 | 583 | .cancel = ram_migration_cancel, |
7908c78d JQ |
584 | }; |
585 | ||
ad96090a | 586 | #ifdef HAS_AUDIO |
0dfa5ef9 IY |
587 | struct soundhw { |
588 | const char *name; | |
589 | const char *descr; | |
590 | int enabled; | |
591 | int isa; | |
592 | union { | |
4a0f031d | 593 | int (*init_isa) (ISABus *bus); |
0dfa5ef9 IY |
594 | int (*init_pci) (PCIBus *bus); |
595 | } init; | |
596 | }; | |
597 | ||
598 | static struct soundhw soundhw[] = { | |
ad96090a | 599 | #ifdef HAS_AUDIO_CHOICE |
da12872a | 600 | #ifdef CONFIG_PCSPK |
ad96090a BS |
601 | { |
602 | "pcspk", | |
603 | "PC speaker", | |
604 | 0, | |
605 | 1, | |
606 | { .init_isa = pcspk_audio_init } | |
607 | }, | |
608 | #endif | |
609 | ||
610 | #ifdef CONFIG_SB16 | |
611 | { | |
612 | "sb16", | |
613 | "Creative Sound Blaster 16", | |
614 | 0, | |
615 | 1, | |
616 | { .init_isa = SB16_init } | |
617 | }, | |
618 | #endif | |
619 | ||
620 | #ifdef CONFIG_CS4231A | |
621 | { | |
622 | "cs4231a", | |
623 | "CS4231A", | |
624 | 0, | |
625 | 1, | |
626 | { .init_isa = cs4231a_init } | |
627 | }, | |
628 | #endif | |
629 | ||
630 | #ifdef CONFIG_ADLIB | |
631 | { | |
632 | "adlib", | |
633 | #ifdef HAS_YMF262 | |
634 | "Yamaha YMF262 (OPL3)", | |
635 | #else | |
636 | "Yamaha YM3812 (OPL2)", | |
637 | #endif | |
638 | 0, | |
639 | 1, | |
640 | { .init_isa = Adlib_init } | |
641 | }, | |
642 | #endif | |
643 | ||
644 | #ifdef CONFIG_GUS | |
645 | { | |
646 | "gus", | |
647 | "Gravis Ultrasound GF1", | |
648 | 0, | |
649 | 1, | |
650 | { .init_isa = GUS_init } | |
651 | }, | |
652 | #endif | |
653 | ||
654 | #ifdef CONFIG_AC97 | |
655 | { | |
656 | "ac97", | |
657 | "Intel 82801AA AC97 Audio", | |
658 | 0, | |
659 | 0, | |
660 | { .init_pci = ac97_init } | |
661 | }, | |
662 | #endif | |
663 | ||
664 | #ifdef CONFIG_ES1370 | |
665 | { | |
666 | "es1370", | |
667 | "ENSONIQ AudioPCI ES1370", | |
668 | 0, | |
669 | 0, | |
670 | { .init_pci = es1370_init } | |
671 | }, | |
672 | #endif | |
673 | ||
d61a4ce8 GH |
674 | #ifdef CONFIG_HDA |
675 | { | |
676 | "hda", | |
677 | "Intel HD Audio", | |
678 | 0, | |
679 | 0, | |
680 | { .init_pci = intel_hda_and_codec_init } | |
681 | }, | |
682 | #endif | |
683 | ||
ad96090a BS |
684 | #endif /* HAS_AUDIO_CHOICE */ |
685 | ||
686 | { NULL, NULL, 0, 0, { NULL } } | |
687 | }; | |
688 | ||
689 | void select_soundhw(const char *optarg) | |
690 | { | |
691 | struct soundhw *c; | |
692 | ||
693 | if (*optarg == '?') { | |
694 | show_valid_cards: | |
695 | ||
696 | printf("Valid sound card names (comma separated):\n"); | |
697 | for (c = soundhw; c->name; ++c) { | |
698 | printf ("%-11s %s\n", c->name, c->descr); | |
699 | } | |
700 | printf("\n-soundhw all will enable all of the above\n"); | |
701 | exit(*optarg != '?'); | |
702 | } | |
703 | else { | |
704 | size_t l; | |
705 | const char *p; | |
706 | char *e; | |
707 | int bad_card = 0; | |
708 | ||
709 | if (!strcmp(optarg, "all")) { | |
710 | for (c = soundhw; c->name; ++c) { | |
711 | c->enabled = 1; | |
712 | } | |
713 | return; | |
714 | } | |
715 | ||
716 | p = optarg; | |
717 | while (*p) { | |
718 | e = strchr(p, ','); | |
719 | l = !e ? strlen(p) : (size_t) (e - p); | |
720 | ||
721 | for (c = soundhw; c->name; ++c) { | |
722 | if (!strncmp(c->name, p, l) && !c->name[l]) { | |
723 | c->enabled = 1; | |
724 | break; | |
725 | } | |
726 | } | |
727 | ||
728 | if (!c->name) { | |
729 | if (l > 80) { | |
730 | fprintf(stderr, | |
731 | "Unknown sound card name (too big to show)\n"); | |
732 | } | |
733 | else { | |
734 | fprintf(stderr, "Unknown sound card name `%.*s'\n", | |
735 | (int) l, p); | |
736 | } | |
737 | bad_card = 1; | |
738 | } | |
739 | p += l + (e != NULL); | |
740 | } | |
741 | ||
742 | if (bad_card) { | |
743 | goto show_valid_cards; | |
744 | } | |
745 | } | |
746 | } | |
0dfa5ef9 | 747 | |
4a0f031d | 748 | void audio_init(ISABus *isa_bus, PCIBus *pci_bus) |
0dfa5ef9 IY |
749 | { |
750 | struct soundhw *c; | |
751 | ||
752 | for (c = soundhw; c->name; ++c) { | |
753 | if (c->enabled) { | |
754 | if (c->isa) { | |
4a0f031d HP |
755 | if (isa_bus) { |
756 | c->init.init_isa(isa_bus); | |
0dfa5ef9 IY |
757 | } |
758 | } else { | |
759 | if (pci_bus) { | |
760 | c->init.init_pci(pci_bus); | |
761 | } | |
762 | } | |
763 | } | |
764 | } | |
765 | } | |
ad96090a BS |
766 | #else |
767 | void select_soundhw(const char *optarg) | |
768 | { | |
769 | } | |
4a0f031d | 770 | void audio_init(ISABus *isa_bus, PCIBus *pci_bus) |
0dfa5ef9 IY |
771 | { |
772 | } | |
ad96090a BS |
773 | #endif |
774 | ||
775 | int qemu_uuid_parse(const char *str, uint8_t *uuid) | |
776 | { | |
777 | int ret; | |
778 | ||
779 | if (strlen(str) != 36) { | |
780 | return -1; | |
781 | } | |
782 | ||
783 | ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3], | |
784 | &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9], | |
785 | &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14], | |
786 | &uuid[15]); | |
787 | ||
788 | if (ret != 16) { | |
789 | return -1; | |
790 | } | |
791 | #ifdef TARGET_I386 | |
792 | smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 16, uuid); | |
793 | #endif | |
794 | return 0; | |
795 | } | |
796 | ||
797 | void do_acpitable_option(const char *optarg) | |
798 | { | |
799 | #ifdef TARGET_I386 | |
800 | if (acpi_table_add(optarg) < 0) { | |
801 | fprintf(stderr, "Wrong acpi table provided\n"); | |
802 | exit(1); | |
803 | } | |
804 | #endif | |
805 | } | |
806 | ||
807 | void do_smbios_option(const char *optarg) | |
808 | { | |
809 | #ifdef TARGET_I386 | |
810 | if (smbios_entry_add(optarg) < 0) { | |
811 | fprintf(stderr, "Wrong smbios provided\n"); | |
812 | exit(1); | |
813 | } | |
814 | #endif | |
815 | } | |
816 | ||
817 | void cpudef_init(void) | |
818 | { | |
819 | #if defined(cpudef_setup) | |
820 | cpudef_setup(); /* parse cpu definitions in target config file */ | |
821 | #endif | |
822 | } | |
823 | ||
824 | int audio_available(void) | |
825 | { | |
826 | #ifdef HAS_AUDIO | |
827 | return 1; | |
828 | #else | |
829 | return 0; | |
830 | #endif | |
831 | } | |
832 | ||
303d4e86 AP |
833 | int tcg_available(void) |
834 | { | |
835 | return 1; | |
836 | } | |
837 | ||
ad96090a BS |
838 | int kvm_available(void) |
839 | { | |
840 | #ifdef CONFIG_KVM | |
841 | return 1; | |
842 | #else | |
843 | return 0; | |
844 | #endif | |
845 | } | |
846 | ||
847 | int xen_available(void) | |
848 | { | |
849 | #ifdef CONFIG_XEN | |
850 | return 1; | |
851 | #else | |
852 | return 0; | |
853 | #endif | |
854 | } |