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ad96090a BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include <stdint.h> | |
25 | #include <stdarg.h> | |
b2e0a138 | 26 | #include <stdlib.h> |
ad96090a | 27 | #ifndef _WIN32 |
1c47cb16 | 28 | #include <sys/types.h> |
ad96090a BS |
29 | #include <sys/mman.h> |
30 | #endif | |
31 | #include "config.h" | |
83c9089e | 32 | #include "monitor/monitor.h" |
9c17d615 | 33 | #include "sysemu/sysemu.h" |
1de7afc9 PB |
34 | #include "qemu/bitops.h" |
35 | #include "qemu/bitmap.h" | |
9c17d615 | 36 | #include "sysemu/arch_init.h" |
ad96090a | 37 | #include "audio/audio.h" |
0d09e41a | 38 | #include "hw/i386/pc.h" |
a2cb15b0 | 39 | #include "hw/pci/pci.h" |
0d09e41a | 40 | #include "hw/audio/audio.h" |
9c17d615 | 41 | #include "sysemu/kvm.h" |
caf71f86 | 42 | #include "migration/migration.h" |
0d09e41a | 43 | #include "hw/i386/smbios.h" |
022c62cb | 44 | #include "exec/address-spaces.h" |
0d09e41a | 45 | #include "hw/audio/pcspk.h" |
caf71f86 | 46 | #include "migration/page_cache.h" |
1de7afc9 | 47 | #include "qemu/config-file.h" |
d97326ee | 48 | #include "qemu/error-report.h" |
99afc91d | 49 | #include "qmp-commands.h" |
3c12193d | 50 | #include "trace.h" |
0d6d3c87 | 51 | #include "exec/cpu-all.h" |
12291ec1 | 52 | #include "exec/ram_addr.h" |
0445259b | 53 | #include "hw/acpi/acpi.h" |
aa8dc044 | 54 | #include "qemu/host-utils.h" |
ad96090a | 55 | |
3a697f69 OW |
56 | #ifdef DEBUG_ARCH_INIT |
57 | #define DPRINTF(fmt, ...) \ | |
58 | do { fprintf(stdout, "arch_init: " fmt, ## __VA_ARGS__); } while (0) | |
59 | #else | |
60 | #define DPRINTF(fmt, ...) \ | |
61 | do { } while (0) | |
62 | #endif | |
63 | ||
ad96090a BS |
64 | #ifdef TARGET_SPARC |
65 | int graphic_width = 1024; | |
66 | int graphic_height = 768; | |
67 | int graphic_depth = 8; | |
68 | #else | |
69 | int graphic_width = 800; | |
70 | int graphic_height = 600; | |
f1ff0e89 | 71 | int graphic_depth = 32; |
ad96090a BS |
72 | #endif |
73 | ||
ad96090a BS |
74 | |
75 | #if defined(TARGET_ALPHA) | |
76 | #define QEMU_ARCH QEMU_ARCH_ALPHA | |
77 | #elif defined(TARGET_ARM) | |
78 | #define QEMU_ARCH QEMU_ARCH_ARM | |
79 | #elif defined(TARGET_CRIS) | |
80 | #define QEMU_ARCH QEMU_ARCH_CRIS | |
81 | #elif defined(TARGET_I386) | |
82 | #define QEMU_ARCH QEMU_ARCH_I386 | |
83 | #elif defined(TARGET_M68K) | |
84 | #define QEMU_ARCH QEMU_ARCH_M68K | |
81ea0e13 MW |
85 | #elif defined(TARGET_LM32) |
86 | #define QEMU_ARCH QEMU_ARCH_LM32 | |
ad96090a BS |
87 | #elif defined(TARGET_MICROBLAZE) |
88 | #define QEMU_ARCH QEMU_ARCH_MICROBLAZE | |
89 | #elif defined(TARGET_MIPS) | |
90 | #define QEMU_ARCH QEMU_ARCH_MIPS | |
d15a9c23 AG |
91 | #elif defined(TARGET_MOXIE) |
92 | #define QEMU_ARCH QEMU_ARCH_MOXIE | |
e67db06e JL |
93 | #elif defined(TARGET_OPENRISC) |
94 | #define QEMU_ARCH QEMU_ARCH_OPENRISC | |
ad96090a BS |
95 | #elif defined(TARGET_PPC) |
96 | #define QEMU_ARCH QEMU_ARCH_PPC | |
97 | #elif defined(TARGET_S390X) | |
98 | #define QEMU_ARCH QEMU_ARCH_S390X | |
99 | #elif defined(TARGET_SH4) | |
100 | #define QEMU_ARCH QEMU_ARCH_SH4 | |
101 | #elif defined(TARGET_SPARC) | |
102 | #define QEMU_ARCH QEMU_ARCH_SPARC | |
2328826b MF |
103 | #elif defined(TARGET_XTENSA) |
104 | #define QEMU_ARCH QEMU_ARCH_XTENSA | |
4f23a1e6 GX |
105 | #elif defined(TARGET_UNICORE32) |
106 | #define QEMU_ARCH QEMU_ARCH_UNICORE32 | |
ad96090a BS |
107 | #endif |
108 | ||
109 | const uint32_t arch_type = QEMU_ARCH; | |
7ca1dfad CV |
110 | static bool mig_throttle_on; |
111 | static int dirty_rate_high_cnt; | |
112 | static void check_guest_throttling(void); | |
ad96090a | 113 | |
71411d35 C |
114 | static uint64_t bitmap_sync_count; |
115 | ||
ad96090a BS |
116 | /***********************************************************/ |
117 | /* ram save/restore */ | |
118 | ||
d20878d2 YT |
119 | #define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */ |
120 | #define RAM_SAVE_FLAG_COMPRESS 0x02 | |
121 | #define RAM_SAVE_FLAG_MEM_SIZE 0x04 | |
122 | #define RAM_SAVE_FLAG_PAGE 0x08 | |
123 | #define RAM_SAVE_FLAG_EOS 0x10 | |
124 | #define RAM_SAVE_FLAG_CONTINUE 0x20 | |
17ad9b35 | 125 | #define RAM_SAVE_FLAG_XBZRLE 0x40 |
0033b8b4 | 126 | /* 0x80 is reserved in migration.h start with 0x100 next */ |
ad96090a | 127 | |
756557de EH |
128 | static struct defconfig_file { |
129 | const char *filename; | |
f29a5614 EH |
130 | /* Indicates it is an user config file (disabled by -no-user-config) */ |
131 | bool userconfig; | |
756557de | 132 | } default_config_files[] = { |
f29a5614 | 133 | { CONFIG_QEMU_CONFDIR "/qemu.conf", true }, |
2e59915d | 134 | { CONFIG_QEMU_CONFDIR "/target-" TARGET_NAME ".conf", true }, |
756557de EH |
135 | { NULL }, /* end of list */ |
136 | }; | |
137 | ||
6d3cb1f9 | 138 | static const uint8_t ZERO_TARGET_PAGE[TARGET_PAGE_SIZE]; |
756557de | 139 | |
f29a5614 | 140 | int qemu_read_default_config_files(bool userconfig) |
b5a8fe5e EH |
141 | { |
142 | int ret; | |
756557de | 143 | struct defconfig_file *f; |
b5a8fe5e | 144 | |
756557de | 145 | for (f = default_config_files; f->filename; f++) { |
f29a5614 EH |
146 | if (!userconfig && f->userconfig) { |
147 | continue; | |
148 | } | |
756557de EH |
149 | ret = qemu_read_config_file(f->filename); |
150 | if (ret < 0 && ret != -ENOENT) { | |
151 | return ret; | |
152 | } | |
b5a8fe5e | 153 | } |
4d8b3c63 | 154 | |
b5a8fe5e EH |
155 | return 0; |
156 | } | |
157 | ||
dc3c26a4 | 158 | static inline bool is_zero_range(uint8_t *p, uint64_t size) |
ad96090a | 159 | { |
dc3c26a4 | 160 | return buffer_find_nonzero_offset(p, size) == size; |
ad96090a BS |
161 | } |
162 | ||
17ad9b35 OW |
163 | /* struct contains XBZRLE cache and a static page |
164 | used by the compression */ | |
165 | static struct { | |
166 | /* buffer used for XBZRLE encoding */ | |
167 | uint8_t *encoded_buf; | |
168 | /* buffer for storing page content */ | |
169 | uint8_t *current_buf; | |
fd8cec93 | 170 | /* Cache for XBZRLE, Protected by lock. */ |
17ad9b35 | 171 | PageCache *cache; |
fd8cec93 | 172 | QemuMutex lock; |
d97326ee DDAG |
173 | } XBZRLE; |
174 | ||
905f26f2 GA |
175 | /* buffer used for XBZRLE decoding */ |
176 | static uint8_t *xbzrle_decoded_buf; | |
9e1ba4cc | 177 | |
fd8cec93 GA |
178 | static void XBZRLE_cache_lock(void) |
179 | { | |
180 | if (migrate_use_xbzrle()) | |
181 | qemu_mutex_lock(&XBZRLE.lock); | |
182 | } | |
183 | ||
184 | static void XBZRLE_cache_unlock(void) | |
185 | { | |
186 | if (migrate_use_xbzrle()) | |
187 | qemu_mutex_unlock(&XBZRLE.lock); | |
188 | } | |
189 | ||
d97326ee DDAG |
190 | /* |
191 | * called from qmp_migrate_set_cache_size in main thread, possibly while | |
192 | * a migration is in progress. | |
193 | * A running migration maybe using the cache and might finish during this | |
194 | * call, hence changes to the cache are protected by XBZRLE.lock(). | |
195 | */ | |
9e1ba4cc OW |
196 | int64_t xbzrle_cache_resize(int64_t new_size) |
197 | { | |
d97326ee DDAG |
198 | PageCache *new_cache; |
199 | int64_t ret; | |
fd8cec93 | 200 | |
c91e681a OW |
201 | if (new_size < TARGET_PAGE_SIZE) { |
202 | return -1; | |
203 | } | |
204 | ||
d97326ee DDAG |
205 | XBZRLE_cache_lock(); |
206 | ||
9e1ba4cc | 207 | if (XBZRLE.cache != NULL) { |
fd8cec93 | 208 | if (pow2floor(new_size) == migrate_xbzrle_cache_size()) { |
d97326ee | 209 | goto out_new_size; |
fd8cec93 GA |
210 | } |
211 | new_cache = cache_init(new_size / TARGET_PAGE_SIZE, | |
212 | TARGET_PAGE_SIZE); | |
213 | if (!new_cache) { | |
d97326ee DDAG |
214 | error_report("Error creating cache"); |
215 | ret = -1; | |
216 | goto out; | |
fd8cec93 | 217 | } |
fd8cec93 | 218 | |
d97326ee DDAG |
219 | cache_fini(XBZRLE.cache); |
220 | XBZRLE.cache = new_cache; | |
9e1ba4cc | 221 | } |
fd8cec93 | 222 | |
d97326ee DDAG |
223 | out_new_size: |
224 | ret = pow2floor(new_size); | |
225 | out: | |
226 | XBZRLE_cache_unlock(); | |
227 | return ret; | |
9e1ba4cc OW |
228 | } |
229 | ||
004d4c10 OW |
230 | /* accounting for migration statistics */ |
231 | typedef struct AccountingInfo { | |
232 | uint64_t dup_pages; | |
f1c72795 | 233 | uint64_t skipped_pages; |
004d4c10 OW |
234 | uint64_t norm_pages; |
235 | uint64_t iterations; | |
f36d55af OW |
236 | uint64_t xbzrle_bytes; |
237 | uint64_t xbzrle_pages; | |
238 | uint64_t xbzrle_cache_miss; | |
8bc39233 | 239 | double xbzrle_cache_miss_rate; |
f36d55af | 240 | uint64_t xbzrle_overflows; |
004d4c10 OW |
241 | } AccountingInfo; |
242 | ||
243 | static AccountingInfo acct_info; | |
244 | ||
245 | static void acct_clear(void) | |
246 | { | |
247 | memset(&acct_info, 0, sizeof(acct_info)); | |
248 | } | |
249 | ||
250 | uint64_t dup_mig_bytes_transferred(void) | |
251 | { | |
252 | return acct_info.dup_pages * TARGET_PAGE_SIZE; | |
253 | } | |
254 | ||
255 | uint64_t dup_mig_pages_transferred(void) | |
256 | { | |
257 | return acct_info.dup_pages; | |
258 | } | |
259 | ||
f1c72795 PL |
260 | uint64_t skipped_mig_bytes_transferred(void) |
261 | { | |
262 | return acct_info.skipped_pages * TARGET_PAGE_SIZE; | |
263 | } | |
264 | ||
265 | uint64_t skipped_mig_pages_transferred(void) | |
266 | { | |
267 | return acct_info.skipped_pages; | |
268 | } | |
269 | ||
004d4c10 OW |
270 | uint64_t norm_mig_bytes_transferred(void) |
271 | { | |
272 | return acct_info.norm_pages * TARGET_PAGE_SIZE; | |
273 | } | |
274 | ||
275 | uint64_t norm_mig_pages_transferred(void) | |
276 | { | |
277 | return acct_info.norm_pages; | |
278 | } | |
279 | ||
f36d55af OW |
280 | uint64_t xbzrle_mig_bytes_transferred(void) |
281 | { | |
282 | return acct_info.xbzrle_bytes; | |
283 | } | |
284 | ||
285 | uint64_t xbzrle_mig_pages_transferred(void) | |
286 | { | |
287 | return acct_info.xbzrle_pages; | |
288 | } | |
289 | ||
290 | uint64_t xbzrle_mig_pages_cache_miss(void) | |
291 | { | |
292 | return acct_info.xbzrle_cache_miss; | |
293 | } | |
294 | ||
8bc39233 C |
295 | double xbzrle_mig_cache_miss_rate(void) |
296 | { | |
297 | return acct_info.xbzrle_cache_miss_rate; | |
298 | } | |
299 | ||
f36d55af OW |
300 | uint64_t xbzrle_mig_pages_overflow(void) |
301 | { | |
302 | return acct_info.xbzrle_overflows; | |
303 | } | |
304 | ||
3f7d7b09 JQ |
305 | static size_t save_block_hdr(QEMUFile *f, RAMBlock *block, ram_addr_t offset, |
306 | int cont, int flag) | |
0c51f43d | 307 | { |
3f7d7b09 JQ |
308 | size_t size; |
309 | ||
310 | qemu_put_be64(f, offset | cont | flag); | |
311 | size = 8; | |
0c51f43d | 312 | |
3f7d7b09 JQ |
313 | if (!cont) { |
314 | qemu_put_byte(f, strlen(block->idstr)); | |
315 | qemu_put_buffer(f, (uint8_t *)block->idstr, | |
316 | strlen(block->idstr)); | |
317 | size += 1 + strlen(block->idstr); | |
318 | } | |
319 | return size; | |
0c51f43d OW |
320 | } |
321 | ||
6d3cb1f9 DDAG |
322 | /* This is the last block that we have visited serching for dirty pages |
323 | */ | |
324 | static RAMBlock *last_seen_block; | |
325 | /* This is the last block from where we have sent data */ | |
326 | static RAMBlock *last_sent_block; | |
327 | static ram_addr_t last_offset; | |
328 | static unsigned long *migration_bitmap; | |
329 | static uint64_t migration_dirty_pages; | |
330 | static uint32_t last_version; | |
331 | static bool ram_bulk_stage; | |
332 | ||
333 | /* Update the xbzrle cache to reflect a page that's been sent as all 0. | |
334 | * The important thing is that a stale (not-yet-0'd) page be replaced | |
335 | * by the new data. | |
336 | * As a bonus, if the page wasn't in the cache it gets added so that | |
337 | * when a small write is made into the 0'd page it gets XBZRLE sent | |
338 | */ | |
339 | static void xbzrle_cache_zero_page(ram_addr_t current_addr) | |
340 | { | |
341 | if (ram_bulk_stage || !migrate_use_xbzrle()) { | |
342 | return; | |
343 | } | |
344 | ||
345 | /* We don't care if this fails to allocate a new cache page | |
346 | * as long as it updated an old one */ | |
347 | cache_insert(XBZRLE.cache, current_addr, ZERO_TARGET_PAGE); | |
348 | } | |
349 | ||
17ad9b35 OW |
350 | #define ENCODING_FLAG_XBZRLE 0x1 |
351 | ||
1534ee93 | 352 | static int save_xbzrle_page(QEMUFile *f, uint8_t **current_data, |
17ad9b35 | 353 | ram_addr_t current_addr, RAMBlock *block, |
dd051c72 | 354 | ram_addr_t offset, int cont, bool last_stage) |
17ad9b35 OW |
355 | { |
356 | int encoded_len = 0, bytes_sent = -1; | |
357 | uint8_t *prev_cached_page; | |
358 | ||
359 | if (!cache_is_cached(XBZRLE.cache, current_addr)) { | |
1534ee93 | 360 | acct_info.xbzrle_cache_miss++; |
dd051c72 | 361 | if (!last_stage) { |
1534ee93 | 362 | if (cache_insert(XBZRLE.cache, current_addr, *current_data) == -1) { |
89db9987 | 363 | return -1; |
1534ee93 C |
364 | } else { |
365 | /* update *current_data when the page has been | |
366 | inserted into cache */ | |
367 | *current_data = get_cached_data(XBZRLE.cache, current_addr); | |
89db9987 | 368 | } |
dd051c72 | 369 | } |
17ad9b35 OW |
370 | return -1; |
371 | } | |
372 | ||
373 | prev_cached_page = get_cached_data(XBZRLE.cache, current_addr); | |
374 | ||
375 | /* save current buffer into memory */ | |
1534ee93 | 376 | memcpy(XBZRLE.current_buf, *current_data, TARGET_PAGE_SIZE); |
17ad9b35 OW |
377 | |
378 | /* XBZRLE encoding (if there is no overflow) */ | |
379 | encoded_len = xbzrle_encode_buffer(prev_cached_page, XBZRLE.current_buf, | |
380 | TARGET_PAGE_SIZE, XBZRLE.encoded_buf, | |
381 | TARGET_PAGE_SIZE); | |
382 | if (encoded_len == 0) { | |
383 | DPRINTF("Skipping unmodified page\n"); | |
384 | return 0; | |
385 | } else if (encoded_len == -1) { | |
386 | DPRINTF("Overflow\n"); | |
f36d55af | 387 | acct_info.xbzrle_overflows++; |
17ad9b35 | 388 | /* update data in the cache */ |
1534ee93 C |
389 | if (!last_stage) { |
390 | memcpy(prev_cached_page, *current_data, TARGET_PAGE_SIZE); | |
391 | *current_data = prev_cached_page; | |
392 | } | |
17ad9b35 OW |
393 | return -1; |
394 | } | |
395 | ||
396 | /* we need to update the data in the cache, in order to get the same data */ | |
dd051c72 JQ |
397 | if (!last_stage) { |
398 | memcpy(prev_cached_page, XBZRLE.current_buf, TARGET_PAGE_SIZE); | |
399 | } | |
17ad9b35 OW |
400 | |
401 | /* Send XBZRLE based compressed page */ | |
3f7d7b09 | 402 | bytes_sent = save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_XBZRLE); |
17ad9b35 OW |
403 | qemu_put_byte(f, ENCODING_FLAG_XBZRLE); |
404 | qemu_put_be16(f, encoded_len); | |
405 | qemu_put_buffer(f, XBZRLE.encoded_buf, encoded_len); | |
3f7d7b09 | 406 | bytes_sent += encoded_len + 1 + 2; |
f36d55af OW |
407 | acct_info.xbzrle_pages++; |
408 | acct_info.xbzrle_bytes += bytes_sent; | |
17ad9b35 OW |
409 | |
410 | return bytes_sent; | |
411 | } | |
412 | ||
4c8ae0f6 JQ |
413 | static inline |
414 | ram_addr_t migration_bitmap_find_and_reset_dirty(MemoryRegion *mr, | |
415 | ram_addr_t start) | |
69268cde | 416 | { |
4c8ae0f6 JQ |
417 | unsigned long base = mr->ram_addr >> TARGET_PAGE_BITS; |
418 | unsigned long nr = base + (start >> TARGET_PAGE_BITS); | |
0851c9f7 MT |
419 | uint64_t mr_size = TARGET_PAGE_ALIGN(memory_region_size(mr)); |
420 | unsigned long size = base + (mr_size >> TARGET_PAGE_BITS); | |
c6bf8e0e | 421 | |
70c8652b PL |
422 | unsigned long next; |
423 | ||
424 | if (ram_bulk_stage && nr > base) { | |
425 | next = nr + 1; | |
426 | } else { | |
427 | next = find_next_bit(migration_bitmap, size, nr); | |
428 | } | |
69268cde | 429 | |
4c8ae0f6 JQ |
430 | if (next < size) { |
431 | clear_bit(next, migration_bitmap); | |
c6bf8e0e | 432 | migration_dirty_pages--; |
69268cde | 433 | } |
4c8ae0f6 | 434 | return (next - base) << TARGET_PAGE_BITS; |
69268cde JQ |
435 | } |
436 | ||
791fa2a2 | 437 | static inline bool migration_bitmap_set_dirty(ram_addr_t addr) |
e44d26c8 | 438 | { |
c6bf8e0e | 439 | bool ret; |
791fa2a2 | 440 | int nr = addr >> TARGET_PAGE_BITS; |
e44d26c8 | 441 | |
c6bf8e0e JQ |
442 | ret = test_and_set_bit(nr, migration_bitmap); |
443 | ||
444 | if (!ret) { | |
445 | migration_dirty_pages++; | |
e44d26c8 | 446 | } |
c6bf8e0e | 447 | return ret; |
e44d26c8 JQ |
448 | } |
449 | ||
791fa2a2 JQ |
450 | static void migration_bitmap_sync_range(ram_addr_t start, ram_addr_t length) |
451 | { | |
452 | ram_addr_t addr; | |
aa8dc044 JQ |
453 | unsigned long page = BIT_WORD(start >> TARGET_PAGE_BITS); |
454 | ||
455 | /* start address is aligned at the start of a word? */ | |
456 | if (((page * BITS_PER_LONG) << TARGET_PAGE_BITS) == start) { | |
457 | int k; | |
458 | int nr = BITS_TO_LONGS(length >> TARGET_PAGE_BITS); | |
459 | unsigned long *src = ram_list.dirty_memory[DIRTY_MEMORY_MIGRATION]; | |
460 | ||
461 | for (k = page; k < page + nr; k++) { | |
462 | if (src[k]) { | |
463 | unsigned long new_dirty; | |
464 | new_dirty = ~migration_bitmap[k]; | |
465 | migration_bitmap[k] |= src[k]; | |
466 | new_dirty &= src[k]; | |
467 | migration_dirty_pages += ctpopl(new_dirty); | |
468 | src[k] = 0; | |
469 | } | |
470 | } | |
471 | } else { | |
472 | for (addr = 0; addr < length; addr += TARGET_PAGE_SIZE) { | |
473 | if (cpu_physical_memory_get_dirty(start + addr, | |
474 | TARGET_PAGE_SIZE, | |
475 | DIRTY_MEMORY_MIGRATION)) { | |
476 | cpu_physical_memory_reset_dirty(start + addr, | |
477 | TARGET_PAGE_SIZE, | |
478 | DIRTY_MEMORY_MIGRATION); | |
479 | migration_bitmap_set_dirty(start + addr); | |
480 | } | |
791fa2a2 JQ |
481 | } |
482 | } | |
483 | } | |
484 | ||
485 | ||
32c835ba PB |
486 | /* Needs iothread lock! */ |
487 | ||
dd2df737 JQ |
488 | static void migration_bitmap_sync(void) |
489 | { | |
c6bf8e0e | 490 | RAMBlock *block; |
c6bf8e0e | 491 | uint64_t num_dirty_pages_init = migration_dirty_pages; |
8d017193 JQ |
492 | MigrationState *s = migrate_get_current(); |
493 | static int64_t start_time; | |
7ca1dfad | 494 | static int64_t bytes_xfer_prev; |
8d017193 JQ |
495 | static int64_t num_dirty_pages_period; |
496 | int64_t end_time; | |
7ca1dfad | 497 | int64_t bytes_xfer_now; |
8bc39233 C |
498 | static uint64_t xbzrle_cache_miss_prev; |
499 | static uint64_t iterations_prev; | |
7ca1dfad | 500 | |
71411d35 C |
501 | bitmap_sync_count++; |
502 | ||
7ca1dfad CV |
503 | if (!bytes_xfer_prev) { |
504 | bytes_xfer_prev = ram_bytes_transferred(); | |
505 | } | |
8d017193 JQ |
506 | |
507 | if (!start_time) { | |
bc72ad67 | 508 | start_time = qemu_clock_get_ms(QEMU_CLOCK_REALTIME); |
8d017193 | 509 | } |
3c12193d JQ |
510 | |
511 | trace_migration_bitmap_sync_start(); | |
1d671369 | 512 | address_space_sync_dirty_bitmap(&address_space_memory); |
c6bf8e0e | 513 | |
a3161038 | 514 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
791fa2a2 | 515 | migration_bitmap_sync_range(block->mr->ram_addr, block->length); |
c6bf8e0e JQ |
516 | } |
517 | trace_migration_bitmap_sync_end(migration_dirty_pages | |
3c12193d | 518 | - num_dirty_pages_init); |
8d017193 | 519 | num_dirty_pages_period += migration_dirty_pages - num_dirty_pages_init; |
bc72ad67 | 520 | end_time = qemu_clock_get_ms(QEMU_CLOCK_REALTIME); |
8d017193 JQ |
521 | |
522 | /* more than 1 second = 1000 millisecons */ | |
523 | if (end_time > start_time + 1000) { | |
7ca1dfad CV |
524 | if (migrate_auto_converge()) { |
525 | /* The following detection logic can be refined later. For now: | |
526 | Check to see if the dirtied bytes is 50% more than the approx. | |
527 | amount of bytes that just got transferred since the last time we | |
528 | were in this routine. If that happens >N times (for now N==4) | |
529 | we turn on the throttle down logic */ | |
530 | bytes_xfer_now = ram_bytes_transferred(); | |
531 | if (s->dirty_pages_rate && | |
532 | (num_dirty_pages_period * TARGET_PAGE_SIZE > | |
533 | (bytes_xfer_now - bytes_xfer_prev)/2) && | |
534 | (dirty_rate_high_cnt++ > 4)) { | |
535 | trace_migration_throttle(); | |
536 | mig_throttle_on = true; | |
537 | dirty_rate_high_cnt = 0; | |
538 | } | |
539 | bytes_xfer_prev = bytes_xfer_now; | |
540 | } else { | |
541 | mig_throttle_on = false; | |
542 | } | |
8bc39233 C |
543 | if (migrate_use_xbzrle()) { |
544 | if (iterations_prev != 0) { | |
545 | acct_info.xbzrle_cache_miss_rate = | |
546 | (double)(acct_info.xbzrle_cache_miss - | |
547 | xbzrle_cache_miss_prev) / | |
548 | (acct_info.iterations - iterations_prev); | |
549 | } | |
550 | iterations_prev = acct_info.iterations; | |
551 | xbzrle_cache_miss_prev = acct_info.xbzrle_cache_miss; | |
552 | } | |
8d017193 JQ |
553 | s->dirty_pages_rate = num_dirty_pages_period * 1000 |
554 | / (end_time - start_time); | |
90f8ae72 | 555 | s->dirty_bytes_rate = s->dirty_pages_rate * TARGET_PAGE_SIZE; |
8d017193 JQ |
556 | start_time = end_time; |
557 | num_dirty_pages_period = 0; | |
58570ed8 | 558 | s->dirty_sync_count = bitmap_sync_count; |
8d017193 | 559 | } |
dd2df737 JQ |
560 | } |
561 | ||
6c779f22 | 562 | /* |
14bcfdc7 DDAG |
563 | * ram_save_page: Send the given page to the stream |
564 | * | |
565 | * Returns: Number of bytes written. | |
566 | */ | |
567 | static int ram_save_page(QEMUFile *f, RAMBlock* block, ram_addr_t offset, | |
568 | bool last_stage) | |
569 | { | |
570 | int bytes_sent; | |
571 | int cont; | |
572 | ram_addr_t current_addr; | |
573 | MemoryRegion *mr = block->mr; | |
574 | uint8_t *p; | |
575 | int ret; | |
576 | bool send_async = true; | |
577 | ||
578 | cont = (block == last_sent_block) ? RAM_SAVE_FLAG_CONTINUE : 0; | |
579 | ||
580 | p = memory_region_get_ram_ptr(mr) + offset; | |
581 | ||
582 | /* In doubt sent page as normal */ | |
583 | bytes_sent = -1; | |
584 | ret = ram_control_save_page(f, block->offset, | |
585 | offset, TARGET_PAGE_SIZE, &bytes_sent); | |
586 | ||
587 | XBZRLE_cache_lock(); | |
588 | ||
589 | current_addr = block->offset + offset; | |
590 | if (ret != RAM_SAVE_CONTROL_NOT_SUPP) { | |
591 | if (ret != RAM_SAVE_CONTROL_DELAYED) { | |
592 | if (bytes_sent > 0) { | |
593 | acct_info.norm_pages++; | |
594 | } else if (bytes_sent == 0) { | |
595 | acct_info.dup_pages++; | |
596 | } | |
597 | } | |
598 | } else if (is_zero_range(p, TARGET_PAGE_SIZE)) { | |
599 | acct_info.dup_pages++; | |
600 | bytes_sent = save_block_hdr(f, block, offset, cont, | |
601 | RAM_SAVE_FLAG_COMPRESS); | |
602 | qemu_put_byte(f, 0); | |
603 | bytes_sent++; | |
604 | /* Must let xbzrle know, otherwise a previous (now 0'd) cached | |
605 | * page would be stale | |
606 | */ | |
607 | xbzrle_cache_zero_page(current_addr); | |
608 | } else if (!ram_bulk_stage && migrate_use_xbzrle()) { | |
609 | bytes_sent = save_xbzrle_page(f, &p, current_addr, block, | |
610 | offset, cont, last_stage); | |
611 | if (!last_stage) { | |
612 | /* Can't send this cached data async, since the cache page | |
613 | * might get updated before it gets to the wire | |
614 | */ | |
615 | send_async = false; | |
616 | } | |
617 | } | |
618 | ||
619 | /* XBZRLE overflow or normal page */ | |
620 | if (bytes_sent == -1) { | |
621 | bytes_sent = save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_PAGE); | |
622 | if (send_async) { | |
623 | qemu_put_buffer_async(f, p, TARGET_PAGE_SIZE); | |
624 | } else { | |
625 | qemu_put_buffer(f, p, TARGET_PAGE_SIZE); | |
626 | } | |
627 | bytes_sent += TARGET_PAGE_SIZE; | |
628 | acct_info.norm_pages++; | |
629 | } | |
630 | ||
631 | XBZRLE_cache_unlock(); | |
632 | ||
633 | return bytes_sent; | |
634 | } | |
635 | ||
636 | /* | |
637 | * ram_find_and_save_block: Finds a page to send and sends it to f | |
6c779f22 | 638 | * |
b823ceaa JQ |
639 | * Returns: The number of bytes written. |
640 | * 0 means no dirty pages | |
6c779f22 OW |
641 | */ |
642 | ||
14bcfdc7 | 643 | static int ram_find_and_save_block(QEMUFile *f, bool last_stage) |
ad96090a | 644 | { |
b23a9a5c | 645 | RAMBlock *block = last_seen_block; |
e44359c3 | 646 | ram_addr_t offset = last_offset; |
4c8ae0f6 | 647 | bool complete_round = false; |
b823ceaa | 648 | int bytes_sent = 0; |
71c510e2 | 649 | MemoryRegion *mr; |
ad96090a | 650 | |
e44359c3 | 651 | if (!block) |
a3161038 | 652 | block = QTAILQ_FIRST(&ram_list.blocks); |
e44359c3 | 653 | |
4c8ae0f6 | 654 | while (true) { |
71c510e2 | 655 | mr = block->mr; |
4c8ae0f6 JQ |
656 | offset = migration_bitmap_find_and_reset_dirty(mr, offset); |
657 | if (complete_round && block == last_seen_block && | |
658 | offset >= last_offset) { | |
659 | break; | |
660 | } | |
661 | if (offset >= block->length) { | |
662 | offset = 0; | |
663 | block = QTAILQ_NEXT(block, next); | |
664 | if (!block) { | |
665 | block = QTAILQ_FIRST(&ram_list.blocks); | |
666 | complete_round = true; | |
78d07ae7 | 667 | ram_bulk_stage = false; |
4c8ae0f6 JQ |
668 | } |
669 | } else { | |
14bcfdc7 | 670 | bytes_sent = ram_save_page(f, block, offset, last_stage); |
17ad9b35 | 671 | |
17ad9b35 | 672 | /* if page is unmodified, continue to the next */ |
b823ceaa | 673 | if (bytes_sent > 0) { |
5f718a15 | 674 | last_sent_block = block; |
17ad9b35 OW |
675 | break; |
676 | } | |
ad96090a | 677 | } |
4c8ae0f6 | 678 | } |
b23a9a5c | 679 | last_seen_block = block; |
e44359c3 | 680 | last_offset = offset; |
ad96090a | 681 | |
3fc250b4 | 682 | return bytes_sent; |
ad96090a BS |
683 | } |
684 | ||
685 | static uint64_t bytes_transferred; | |
686 | ||
2b0ce079 MH |
687 | void acct_update_position(QEMUFile *f, size_t size, bool zero) |
688 | { | |
689 | uint64_t pages = size / TARGET_PAGE_SIZE; | |
690 | if (zero) { | |
691 | acct_info.dup_pages += pages; | |
692 | } else { | |
693 | acct_info.norm_pages += pages; | |
694 | bytes_transferred += size; | |
695 | qemu_update_position(f, size); | |
696 | } | |
697 | } | |
698 | ||
ad96090a BS |
699 | static ram_addr_t ram_save_remaining(void) |
700 | { | |
c6bf8e0e | 701 | return migration_dirty_pages; |
ad96090a BS |
702 | } |
703 | ||
704 | uint64_t ram_bytes_remaining(void) | |
705 | { | |
706 | return ram_save_remaining() * TARGET_PAGE_SIZE; | |
707 | } | |
708 | ||
709 | uint64_t ram_bytes_transferred(void) | |
710 | { | |
711 | return bytes_transferred; | |
712 | } | |
713 | ||
714 | uint64_t ram_bytes_total(void) | |
715 | { | |
d17b5288 AW |
716 | RAMBlock *block; |
717 | uint64_t total = 0; | |
718 | ||
a3161038 | 719 | QTAILQ_FOREACH(block, &ram_list.blocks, next) |
d17b5288 AW |
720 | total += block->length; |
721 | ||
722 | return total; | |
ad96090a BS |
723 | } |
724 | ||
905f26f2 GA |
725 | void free_xbzrle_decoded_buf(void) |
726 | { | |
727 | g_free(xbzrle_decoded_buf); | |
728 | xbzrle_decoded_buf = NULL; | |
729 | } | |
730 | ||
8e21cd32 OW |
731 | static void migration_end(void) |
732 | { | |
244eaa75 PB |
733 | if (migration_bitmap) { |
734 | memory_global_dirty_log_stop(); | |
735 | g_free(migration_bitmap); | |
736 | migration_bitmap = NULL; | |
737 | } | |
17ad9b35 | 738 | |
fd8cec93 | 739 | XBZRLE_cache_lock(); |
244eaa75 | 740 | if (XBZRLE.cache) { |
17ad9b35 | 741 | cache_fini(XBZRLE.cache); |
17ad9b35 OW |
742 | g_free(XBZRLE.encoded_buf); |
743 | g_free(XBZRLE.current_buf); | |
17ad9b35 | 744 | XBZRLE.cache = NULL; |
f6c6483b OW |
745 | XBZRLE.encoded_buf = NULL; |
746 | XBZRLE.current_buf = NULL; | |
17ad9b35 | 747 | } |
fd8cec93 | 748 | XBZRLE_cache_unlock(); |
8e21cd32 OW |
749 | } |
750 | ||
9b5bfab0 JQ |
751 | static void ram_migration_cancel(void *opaque) |
752 | { | |
753 | migration_end(); | |
754 | } | |
755 | ||
5a170775 JQ |
756 | static void reset_ram_globals(void) |
757 | { | |
b23a9a5c | 758 | last_seen_block = NULL; |
5f718a15 | 759 | last_sent_block = NULL; |
5a170775 | 760 | last_offset = 0; |
f798b07f | 761 | last_version = ram_list.version; |
78d07ae7 | 762 | ram_bulk_stage = true; |
5a170775 JQ |
763 | } |
764 | ||
4508bd9e JQ |
765 | #define MAX_WAIT 50 /* ms, half buffered_file limit */ |
766 | ||
d1315aac | 767 | static int ram_save_setup(QEMUFile *f, void *opaque) |
ad96090a | 768 | { |
d1315aac | 769 | RAMBlock *block; |
e30d1d8c | 770 | int64_t ram_bitmap_pages; /* Size of bitmap in pages, including gaps */ |
c6bf8e0e | 771 | |
7ca1dfad CV |
772 | mig_throttle_on = false; |
773 | dirty_rate_high_cnt = 0; | |
71411d35 | 774 | bitmap_sync_count = 0; |
ad96090a | 775 | |
17ad9b35 | 776 | if (migrate_use_xbzrle()) { |
d97326ee | 777 | XBZRLE_cache_lock(); |
17ad9b35 OW |
778 | XBZRLE.cache = cache_init(migrate_xbzrle_cache_size() / |
779 | TARGET_PAGE_SIZE, | |
780 | TARGET_PAGE_SIZE); | |
781 | if (!XBZRLE.cache) { | |
d97326ee DDAG |
782 | XBZRLE_cache_unlock(); |
783 | error_report("Error creating cache"); | |
17ad9b35 OW |
784 | return -1; |
785 | } | |
d97326ee | 786 | XBZRLE_cache_unlock(); |
a17b2fd3 OW |
787 | |
788 | /* We prefer not to abort if there is no memory */ | |
789 | XBZRLE.encoded_buf = g_try_malloc0(TARGET_PAGE_SIZE); | |
790 | if (!XBZRLE.encoded_buf) { | |
d97326ee | 791 | error_report("Error allocating encoded_buf"); |
a17b2fd3 OW |
792 | return -1; |
793 | } | |
794 | ||
795 | XBZRLE.current_buf = g_try_malloc(TARGET_PAGE_SIZE); | |
796 | if (!XBZRLE.current_buf) { | |
d97326ee | 797 | error_report("Error allocating current_buf"); |
a17b2fd3 OW |
798 | g_free(XBZRLE.encoded_buf); |
799 | XBZRLE.encoded_buf = NULL; | |
800 | return -1; | |
801 | } | |
802 | ||
004d4c10 | 803 | acct_clear(); |
17ad9b35 OW |
804 | } |
805 | ||
9b095037 PB |
806 | qemu_mutex_lock_iothread(); |
807 | qemu_mutex_lock_ramlist(); | |
808 | bytes_transferred = 0; | |
809 | reset_ram_globals(); | |
810 | ||
e30d1d8c DDAG |
811 | ram_bitmap_pages = last_ram_offset() >> TARGET_PAGE_BITS; |
812 | migration_bitmap = bitmap_new(ram_bitmap_pages); | |
813 | bitmap_set(migration_bitmap, 0, ram_bitmap_pages); | |
814 | ||
815 | /* | |
816 | * Count the total number of pages used by ram blocks not including any | |
817 | * gaps due to alignment or unplugs. | |
818 | */ | |
819 | migration_dirty_pages = 0; | |
820 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { | |
821 | uint64_t block_pages; | |
822 | ||
823 | block_pages = block->length >> TARGET_PAGE_BITS; | |
824 | migration_dirty_pages += block_pages; | |
825 | } | |
826 | ||
d1315aac | 827 | memory_global_dirty_log_start(); |
c6bf8e0e | 828 | migration_bitmap_sync(); |
9b095037 | 829 | qemu_mutex_unlock_iothread(); |
ad96090a | 830 | |
d1315aac | 831 | qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE); |
97ab12d4 | 832 | |
a3161038 | 833 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
d1315aac JQ |
834 | qemu_put_byte(f, strlen(block->idstr)); |
835 | qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr)); | |
836 | qemu_put_be64(f, block->length); | |
ad96090a BS |
837 | } |
838 | ||
b2a8658e | 839 | qemu_mutex_unlock_ramlist(); |
0033b8b4 MH |
840 | |
841 | ram_control_before_iterate(f, RAM_CONTROL_SETUP); | |
842 | ram_control_after_iterate(f, RAM_CONTROL_SETUP); | |
843 | ||
d1315aac JQ |
844 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
845 | ||
846 | return 0; | |
847 | } | |
848 | ||
16310a3c | 849 | static int ram_save_iterate(QEMUFile *f, void *opaque) |
d1315aac | 850 | { |
d1315aac JQ |
851 | int ret; |
852 | int i; | |
e4ed1541 | 853 | int64_t t0; |
b823ceaa | 854 | int total_sent = 0; |
d1315aac | 855 | |
b2a8658e UD |
856 | qemu_mutex_lock_ramlist(); |
857 | ||
f798b07f UD |
858 | if (ram_list.version != last_version) { |
859 | reset_ram_globals(); | |
860 | } | |
861 | ||
0033b8b4 MH |
862 | ram_control_before_iterate(f, RAM_CONTROL_ROUND); |
863 | ||
bc72ad67 | 864 | t0 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
4508bd9e | 865 | i = 0; |
2975725f | 866 | while ((ret = qemu_file_rate_limit(f)) == 0) { |
3fc250b4 | 867 | int bytes_sent; |
ad96090a | 868 | |
14bcfdc7 | 869 | bytes_sent = ram_find_and_save_block(f, false); |
6c779f22 | 870 | /* no more blocks to sent */ |
b823ceaa | 871 | if (bytes_sent == 0) { |
ad96090a BS |
872 | break; |
873 | } | |
b823ceaa | 874 | total_sent += bytes_sent; |
004d4c10 | 875 | acct_info.iterations++; |
7ca1dfad | 876 | check_guest_throttling(); |
4508bd9e JQ |
877 | /* we want to check in the 1st loop, just in case it was the 1st time |
878 | and we had to sync the dirty bitmap. | |
879 | qemu_get_clock_ns() is a bit expensive, so we only check each some | |
880 | iterations | |
881 | */ | |
882 | if ((i & 63) == 0) { | |
bc72ad67 | 883 | uint64_t t1 = (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - t0) / 1000000; |
4508bd9e | 884 | if (t1 > MAX_WAIT) { |
ef37a699 | 885 | DPRINTF("big wait: %" PRIu64 " milliseconds, %d iterations\n", |
4508bd9e JQ |
886 | t1, i); |
887 | break; | |
888 | } | |
889 | } | |
890 | i++; | |
ad96090a BS |
891 | } |
892 | ||
fb3409de PB |
893 | qemu_mutex_unlock_ramlist(); |
894 | ||
0033b8b4 MH |
895 | /* |
896 | * Must occur before EOS (or any QEMUFile operation) | |
897 | * because of RDMA protocol. | |
898 | */ | |
899 | ram_control_after_iterate(f, RAM_CONTROL_ROUND); | |
900 | ||
6cd0beda LL |
901 | bytes_transferred += total_sent; |
902 | ||
903 | /* | |
904 | * Do not count these 8 bytes into total_sent, so that we can | |
905 | * return 0 if no page had been dirtied. | |
906 | */ | |
907 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); | |
908 | bytes_transferred += 8; | |
909 | ||
910 | ret = qemu_file_get_error(f); | |
2975725f JQ |
911 | if (ret < 0) { |
912 | return ret; | |
913 | } | |
914 | ||
b823ceaa | 915 | return total_sent; |
16310a3c JQ |
916 | } |
917 | ||
918 | static int ram_save_complete(QEMUFile *f, void *opaque) | |
919 | { | |
b2a8658e | 920 | qemu_mutex_lock_ramlist(); |
9c339485 | 921 | migration_bitmap_sync(); |
b2a8658e | 922 | |
0033b8b4 MH |
923 | ram_control_before_iterate(f, RAM_CONTROL_FINISH); |
924 | ||
ad96090a | 925 | /* try transferring iterative blocks of memory */ |
3a697f69 | 926 | |
16310a3c | 927 | /* flush all remaining blocks regardless of rate limiting */ |
6c779f22 | 928 | while (true) { |
3fc250b4 PR |
929 | int bytes_sent; |
930 | ||
14bcfdc7 | 931 | bytes_sent = ram_find_and_save_block(f, true); |
6c779f22 | 932 | /* no more blocks to sent */ |
b823ceaa | 933 | if (bytes_sent == 0) { |
6c779f22 | 934 | break; |
ad96090a | 935 | } |
16310a3c | 936 | bytes_transferred += bytes_sent; |
ad96090a | 937 | } |
0033b8b4 MH |
938 | |
939 | ram_control_after_iterate(f, RAM_CONTROL_FINISH); | |
244eaa75 | 940 | migration_end(); |
ad96090a | 941 | |
b2a8658e | 942 | qemu_mutex_unlock_ramlist(); |
ad96090a BS |
943 | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
944 | ||
5b3c9638 | 945 | return 0; |
ad96090a BS |
946 | } |
947 | ||
e4ed1541 JQ |
948 | static uint64_t ram_save_pending(QEMUFile *f, void *opaque, uint64_t max_size) |
949 | { | |
950 | uint64_t remaining_size; | |
951 | ||
952 | remaining_size = ram_save_remaining() * TARGET_PAGE_SIZE; | |
953 | ||
954 | if (remaining_size < max_size) { | |
32c835ba | 955 | qemu_mutex_lock_iothread(); |
e4ed1541 | 956 | migration_bitmap_sync(); |
32c835ba | 957 | qemu_mutex_unlock_iothread(); |
e4ed1541 JQ |
958 | remaining_size = ram_save_remaining() * TARGET_PAGE_SIZE; |
959 | } | |
960 | return remaining_size; | |
961 | } | |
962 | ||
17ad9b35 OW |
963 | static int load_xbzrle(QEMUFile *f, ram_addr_t addr, void *host) |
964 | { | |
17ad9b35 OW |
965 | unsigned int xh_len; |
966 | int xh_flags; | |
967 | ||
905f26f2 GA |
968 | if (!xbzrle_decoded_buf) { |
969 | xbzrle_decoded_buf = g_malloc(TARGET_PAGE_SIZE); | |
17ad9b35 OW |
970 | } |
971 | ||
972 | /* extract RLE header */ | |
973 | xh_flags = qemu_get_byte(f); | |
974 | xh_len = qemu_get_be16(f); | |
975 | ||
976 | if (xh_flags != ENCODING_FLAG_XBZRLE) { | |
0971f1be | 977 | error_report("Failed to load XBZRLE page - wrong compression!"); |
17ad9b35 OW |
978 | return -1; |
979 | } | |
980 | ||
981 | if (xh_len > TARGET_PAGE_SIZE) { | |
0971f1be | 982 | error_report("Failed to load XBZRLE page - len overflow!"); |
17ad9b35 OW |
983 | return -1; |
984 | } | |
985 | /* load data and decode */ | |
905f26f2 | 986 | qemu_get_buffer(f, xbzrle_decoded_buf, xh_len); |
17ad9b35 OW |
987 | |
988 | /* decode RLE */ | |
fb626663 CG |
989 | if (xbzrle_decode_buffer(xbzrle_decoded_buf, xh_len, host, |
990 | TARGET_PAGE_SIZE) == -1) { | |
0971f1be | 991 | error_report("Failed to load XBZRLE page - decode error!"); |
fb626663 | 992 | return -1; |
17ad9b35 OW |
993 | } |
994 | ||
fb626663 | 995 | return 0; |
17ad9b35 OW |
996 | } |
997 | ||
a55bbe31 AW |
998 | static inline void *host_from_stream_offset(QEMUFile *f, |
999 | ram_addr_t offset, | |
1000 | int flags) | |
1001 | { | |
1002 | static RAMBlock *block = NULL; | |
1003 | char id[256]; | |
1004 | uint8_t len; | |
1005 | ||
1006 | if (flags & RAM_SAVE_FLAG_CONTINUE) { | |
1007 | if (!block) { | |
0971f1be | 1008 | error_report("Ack, bad migration stream!"); |
a55bbe31 AW |
1009 | return NULL; |
1010 | } | |
1011 | ||
dc94a7ed | 1012 | return memory_region_get_ram_ptr(block->mr) + offset; |
a55bbe31 AW |
1013 | } |
1014 | ||
1015 | len = qemu_get_byte(f); | |
1016 | qemu_get_buffer(f, (uint8_t *)id, len); | |
1017 | id[len] = 0; | |
1018 | ||
a3161038 | 1019 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
a55bbe31 | 1020 | if (!strncmp(id, block->idstr, sizeof(id))) |
dc94a7ed | 1021 | return memory_region_get_ram_ptr(block->mr) + offset; |
a55bbe31 AW |
1022 | } |
1023 | ||
0971f1be | 1024 | error_report("Can't find block %s!", id); |
a55bbe31 AW |
1025 | return NULL; |
1026 | } | |
1027 | ||
44c3b58c MH |
1028 | /* |
1029 | * If a page (or a whole RDMA chunk) has been | |
1030 | * determined to be zero, then zap it. | |
1031 | */ | |
1032 | void ram_handle_compressed(void *host, uint8_t ch, uint64_t size) | |
1033 | { | |
d613a56f | 1034 | if (ch != 0 || !is_zero_range(host, size)) { |
44c3b58c | 1035 | memset(host, ch, size); |
44c3b58c MH |
1036 | } |
1037 | } | |
1038 | ||
7908c78d | 1039 | static int ram_load(QEMUFile *f, void *opaque, int version_id) |
ad96090a BS |
1040 | { |
1041 | ram_addr_t addr; | |
3a697f69 | 1042 | int flags, ret = 0; |
3a697f69 OW |
1043 | static uint64_t seq_iter; |
1044 | ||
1045 | seq_iter++; | |
ad96090a | 1046 | |
21a246a4 | 1047 | if (version_id != 4) { |
4798fe55 | 1048 | ret = -EINVAL; |
ad96090a BS |
1049 | } |
1050 | ||
db80face | 1051 | while (!ret) { |
ad96090a BS |
1052 | addr = qemu_get_be64(f); |
1053 | ||
1054 | flags = addr & ~TARGET_PAGE_MASK; | |
1055 | addr &= TARGET_PAGE_MASK; | |
1056 | ||
1057 | if (flags & RAM_SAVE_FLAG_MEM_SIZE) { | |
21a246a4 C |
1058 | /* Synchronize RAM block list */ |
1059 | char id[256]; | |
1060 | ram_addr_t length; | |
1061 | ram_addr_t total_ram_bytes = addr; | |
1062 | ||
1063 | while (total_ram_bytes) { | |
1064 | RAMBlock *block; | |
1065 | uint8_t len; | |
1066 | ||
1067 | len = qemu_get_byte(f); | |
1068 | qemu_get_buffer(f, (uint8_t *)id, len); | |
1069 | id[len] = 0; | |
1070 | length = qemu_get_be64(f); | |
1071 | ||
1072 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { | |
1073 | if (!strncmp(id, block->idstr, sizeof(id))) { | |
1074 | if (block->length != length) { | |
0971f1be LT |
1075 | error_report("Length mismatch: %s: " RAM_ADDR_FMT |
1076 | " in != " RAM_ADDR_FMT, id, length, | |
1077 | block->length); | |
21a246a4 | 1078 | ret = -EINVAL; |
97ab12d4 | 1079 | } |
21a246a4 | 1080 | break; |
97ab12d4 | 1081 | } |
21a246a4 | 1082 | } |
97ab12d4 | 1083 | |
21a246a4 | 1084 | if (!block) { |
0971f1be LT |
1085 | error_report("Unknown ramblock \"%s\", cannot " |
1086 | "accept migration", id); | |
21a246a4 | 1087 | ret = -EINVAL; |
db80face PL |
1088 | } |
1089 | if (ret) { | |
1090 | break; | |
97ab12d4 | 1091 | } |
21a246a4 C |
1092 | |
1093 | total_ram_bytes -= length; | |
ad96090a | 1094 | } |
db80face | 1095 | } else if (flags & RAM_SAVE_FLAG_COMPRESS) { |
97ab12d4 AW |
1096 | void *host; |
1097 | uint8_t ch; | |
1098 | ||
f09f2189 | 1099 | host = host_from_stream_offset(f, addr, flags); |
492fb99c | 1100 | if (!host) { |
db80face | 1101 | error_report("Illegal RAM offset " RAM_ADDR_FMT, addr); |
4798fe55 | 1102 | ret = -EINVAL; |
db80face | 1103 | break; |
492fb99c | 1104 | } |
97ab12d4 | 1105 | |
97ab12d4 | 1106 | ch = qemu_get_byte(f); |
44c3b58c | 1107 | ram_handle_compressed(host, ch, TARGET_PAGE_SIZE); |
ad96090a | 1108 | } else if (flags & RAM_SAVE_FLAG_PAGE) { |
97ab12d4 AW |
1109 | void *host; |
1110 | ||
f09f2189 | 1111 | host = host_from_stream_offset(f, addr, flags); |
0ff1f9f5 | 1112 | if (!host) { |
db80face | 1113 | error_report("Illegal RAM offset " RAM_ADDR_FMT, addr); |
4798fe55 | 1114 | ret = -EINVAL; |
db80face | 1115 | break; |
0ff1f9f5 | 1116 | } |
97ab12d4 | 1117 | |
97ab12d4 | 1118 | qemu_get_buffer(f, host, TARGET_PAGE_SIZE); |
17ad9b35 | 1119 | } else if (flags & RAM_SAVE_FLAG_XBZRLE) { |
17ad9b35 OW |
1120 | void *host = host_from_stream_offset(f, addr, flags); |
1121 | if (!host) { | |
db80face | 1122 | error_report("Illegal RAM offset " RAM_ADDR_FMT, addr); |
4798fe55 | 1123 | ret = -EINVAL; |
db80face | 1124 | break; |
17ad9b35 OW |
1125 | } |
1126 | ||
1127 | if (load_xbzrle(f, addr, host) < 0) { | |
db80face PL |
1128 | error_report("Failed to decompress XBZRLE page at " |
1129 | RAM_ADDR_FMT, addr); | |
17ad9b35 | 1130 | ret = -EINVAL; |
db80face | 1131 | break; |
17ad9b35 | 1132 | } |
0033b8b4 MH |
1133 | } else if (flags & RAM_SAVE_FLAG_HOOK) { |
1134 | ram_control_load_hook(f, flags); | |
db80face PL |
1135 | } else if (flags & RAM_SAVE_FLAG_EOS) { |
1136 | /* normal exit */ | |
1137 | break; | |
1138 | } else { | |
1139 | error_report("Unknown migration flags: %#x", flags); | |
1140 | ret = -EINVAL; | |
1141 | break; | |
ad96090a | 1142 | } |
db80face PL |
1143 | ret = qemu_file_get_error(f); |
1144 | } | |
ad96090a | 1145 | |
ef37a699 IM |
1146 | DPRINTF("Completed load of VM with exit code %d seq iteration " |
1147 | "%" PRIu64 "\n", ret, seq_iter); | |
3a697f69 | 1148 | return ret; |
ad96090a BS |
1149 | } |
1150 | ||
0d6ab3ab | 1151 | static SaveVMHandlers savevm_ram_handlers = { |
d1315aac | 1152 | .save_live_setup = ram_save_setup, |
16310a3c JQ |
1153 | .save_live_iterate = ram_save_iterate, |
1154 | .save_live_complete = ram_save_complete, | |
e4ed1541 | 1155 | .save_live_pending = ram_save_pending, |
7908c78d | 1156 | .load_state = ram_load, |
9b5bfab0 | 1157 | .cancel = ram_migration_cancel, |
7908c78d JQ |
1158 | }; |
1159 | ||
0d6ab3ab DDAG |
1160 | void ram_mig_init(void) |
1161 | { | |
d97326ee | 1162 | qemu_mutex_init(&XBZRLE.lock); |
0d6ab3ab DDAG |
1163 | register_savevm_live(NULL, "ram", 0, 4, &savevm_ram_handlers, NULL); |
1164 | } | |
1165 | ||
0dfa5ef9 IY |
1166 | struct soundhw { |
1167 | const char *name; | |
1168 | const char *descr; | |
1169 | int enabled; | |
1170 | int isa; | |
1171 | union { | |
4a0f031d | 1172 | int (*init_isa) (ISABus *bus); |
0dfa5ef9 IY |
1173 | int (*init_pci) (PCIBus *bus); |
1174 | } init; | |
1175 | }; | |
1176 | ||
36cd6f6f PB |
1177 | static struct soundhw soundhw[9]; |
1178 | static int soundhw_count; | |
ad96090a | 1179 | |
36cd6f6f PB |
1180 | void isa_register_soundhw(const char *name, const char *descr, |
1181 | int (*init_isa)(ISABus *bus)) | |
1182 | { | |
1183 | assert(soundhw_count < ARRAY_SIZE(soundhw) - 1); | |
1184 | soundhw[soundhw_count].name = name; | |
1185 | soundhw[soundhw_count].descr = descr; | |
1186 | soundhw[soundhw_count].isa = 1; | |
1187 | soundhw[soundhw_count].init.init_isa = init_isa; | |
1188 | soundhw_count++; | |
1189 | } | |
ad96090a | 1190 | |
36cd6f6f PB |
1191 | void pci_register_soundhw(const char *name, const char *descr, |
1192 | int (*init_pci)(PCIBus *bus)) | |
1193 | { | |
1194 | assert(soundhw_count < ARRAY_SIZE(soundhw) - 1); | |
1195 | soundhw[soundhw_count].name = name; | |
1196 | soundhw[soundhw_count].descr = descr; | |
1197 | soundhw[soundhw_count].isa = 0; | |
1198 | soundhw[soundhw_count].init.init_pci = init_pci; | |
1199 | soundhw_count++; | |
1200 | } | |
ad96090a BS |
1201 | |
1202 | void select_soundhw(const char *optarg) | |
1203 | { | |
1204 | struct soundhw *c; | |
1205 | ||
c8057f95 | 1206 | if (is_help_option(optarg)) { |
ad96090a BS |
1207 | show_valid_cards: |
1208 | ||
36cd6f6f PB |
1209 | if (soundhw_count) { |
1210 | printf("Valid sound card names (comma separated):\n"); | |
1211 | for (c = soundhw; c->name; ++c) { | |
1212 | printf ("%-11s %s\n", c->name, c->descr); | |
1213 | } | |
1214 | printf("\n-soundhw all will enable all of the above\n"); | |
1215 | } else { | |
1216 | printf("Machine has no user-selectable audio hardware " | |
1217 | "(it may or may not have always-present audio hardware).\n"); | |
ad96090a | 1218 | } |
c8057f95 | 1219 | exit(!is_help_option(optarg)); |
ad96090a BS |
1220 | } |
1221 | else { | |
1222 | size_t l; | |
1223 | const char *p; | |
1224 | char *e; | |
1225 | int bad_card = 0; | |
1226 | ||
1227 | if (!strcmp(optarg, "all")) { | |
1228 | for (c = soundhw; c->name; ++c) { | |
1229 | c->enabled = 1; | |
1230 | } | |
1231 | return; | |
1232 | } | |
1233 | ||
1234 | p = optarg; | |
1235 | while (*p) { | |
1236 | e = strchr(p, ','); | |
1237 | l = !e ? strlen(p) : (size_t) (e - p); | |
1238 | ||
1239 | for (c = soundhw; c->name; ++c) { | |
1240 | if (!strncmp(c->name, p, l) && !c->name[l]) { | |
1241 | c->enabled = 1; | |
1242 | break; | |
1243 | } | |
1244 | } | |
1245 | ||
1246 | if (!c->name) { | |
1247 | if (l > 80) { | |
0971f1be | 1248 | error_report("Unknown sound card name (too big to show)"); |
ad96090a BS |
1249 | } |
1250 | else { | |
0971f1be LT |
1251 | error_report("Unknown sound card name `%.*s'", |
1252 | (int) l, p); | |
ad96090a BS |
1253 | } |
1254 | bad_card = 1; | |
1255 | } | |
1256 | p += l + (e != NULL); | |
1257 | } | |
1258 | ||
1259 | if (bad_card) { | |
1260 | goto show_valid_cards; | |
1261 | } | |
1262 | } | |
1263 | } | |
0dfa5ef9 | 1264 | |
f81222bc | 1265 | void audio_init(void) |
0dfa5ef9 IY |
1266 | { |
1267 | struct soundhw *c; | |
f81222bc PB |
1268 | ISABus *isa_bus = (ISABus *) object_resolve_path_type("", TYPE_ISA_BUS, NULL); |
1269 | PCIBus *pci_bus = (PCIBus *) object_resolve_path_type("", TYPE_PCI_BUS, NULL); | |
0dfa5ef9 IY |
1270 | |
1271 | for (c = soundhw; c->name; ++c) { | |
1272 | if (c->enabled) { | |
1273 | if (c->isa) { | |
f81222bc | 1274 | if (!isa_bus) { |
0971f1be | 1275 | error_report("ISA bus not available for %s", c->name); |
f81222bc | 1276 | exit(1); |
0dfa5ef9 | 1277 | } |
f81222bc | 1278 | c->init.init_isa(isa_bus); |
0dfa5ef9 | 1279 | } else { |
f81222bc | 1280 | if (!pci_bus) { |
0971f1be | 1281 | error_report("PCI bus not available for %s", c->name); |
f81222bc | 1282 | exit(1); |
0dfa5ef9 | 1283 | } |
f81222bc | 1284 | c->init.init_pci(pci_bus); |
0dfa5ef9 IY |
1285 | } |
1286 | } | |
1287 | } | |
1288 | } | |
ad96090a BS |
1289 | |
1290 | int qemu_uuid_parse(const char *str, uint8_t *uuid) | |
1291 | { | |
1292 | int ret; | |
1293 | ||
1294 | if (strlen(str) != 36) { | |
1295 | return -1; | |
1296 | } | |
1297 | ||
1298 | ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3], | |
1299 | &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9], | |
1300 | &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14], | |
1301 | &uuid[15]); | |
1302 | ||
1303 | if (ret != 16) { | |
1304 | return -1; | |
1305 | } | |
ad96090a BS |
1306 | return 0; |
1307 | } | |
1308 | ||
0c764a9d | 1309 | void do_acpitable_option(const QemuOpts *opts) |
ad96090a BS |
1310 | { |
1311 | #ifdef TARGET_I386 | |
23084327 LE |
1312 | Error *err = NULL; |
1313 | ||
1314 | acpi_table_add(opts, &err); | |
1315 | if (err) { | |
4a44d85e SA |
1316 | error_report("Wrong acpi table provided: %s", |
1317 | error_get_pretty(err)); | |
23084327 | 1318 | error_free(err); |
ad96090a BS |
1319 | exit(1); |
1320 | } | |
1321 | #endif | |
1322 | } | |
1323 | ||
4f953d2f | 1324 | void do_smbios_option(QemuOpts *opts) |
ad96090a BS |
1325 | { |
1326 | #ifdef TARGET_I386 | |
4f953d2f | 1327 | smbios_entry_add(opts); |
ad96090a BS |
1328 | #endif |
1329 | } | |
1330 | ||
1331 | void cpudef_init(void) | |
1332 | { | |
1333 | #if defined(cpudef_setup) | |
1334 | cpudef_setup(); /* parse cpu definitions in target config file */ | |
1335 | #endif | |
1336 | } | |
1337 | ||
303d4e86 AP |
1338 | int tcg_available(void) |
1339 | { | |
1340 | return 1; | |
1341 | } | |
1342 | ||
ad96090a BS |
1343 | int kvm_available(void) |
1344 | { | |
1345 | #ifdef CONFIG_KVM | |
1346 | return 1; | |
1347 | #else | |
1348 | return 0; | |
1349 | #endif | |
1350 | } | |
1351 | ||
1352 | int xen_available(void) | |
1353 | { | |
1354 | #ifdef CONFIG_XEN | |
1355 | return 1; | |
1356 | #else | |
1357 | return 0; | |
1358 | #endif | |
1359 | } | |
99afc91d DB |
1360 | |
1361 | ||
1362 | TargetInfo *qmp_query_target(Error **errp) | |
1363 | { | |
1364 | TargetInfo *info = g_malloc0(sizeof(*info)); | |
1365 | ||
c02a9552 | 1366 | info->arch = g_strdup(TARGET_NAME); |
99afc91d DB |
1367 | |
1368 | return info; | |
1369 | } | |
7ca1dfad CV |
1370 | |
1371 | /* Stub function that's gets run on the vcpu when its brought out of the | |
1372 | VM to run inside qemu via async_run_on_cpu()*/ | |
1373 | static void mig_sleep_cpu(void *opq) | |
1374 | { | |
1375 | qemu_mutex_unlock_iothread(); | |
1376 | g_usleep(30*1000); | |
1377 | qemu_mutex_lock_iothread(); | |
1378 | } | |
1379 | ||
1380 | /* To reduce the dirty rate explicitly disallow the VCPUs from spending | |
1381 | much time in the VM. The migration thread will try to catchup. | |
1382 | Workload will experience a performance drop. | |
1383 | */ | |
7ca1dfad CV |
1384 | static void mig_throttle_guest_down(void) |
1385 | { | |
38fcbd3f AF |
1386 | CPUState *cpu; |
1387 | ||
7ca1dfad | 1388 | qemu_mutex_lock_iothread(); |
38fcbd3f AF |
1389 | CPU_FOREACH(cpu) { |
1390 | async_run_on_cpu(cpu, mig_sleep_cpu, NULL); | |
1391 | } | |
7ca1dfad CV |
1392 | qemu_mutex_unlock_iothread(); |
1393 | } | |
1394 | ||
1395 | static void check_guest_throttling(void) | |
1396 | { | |
1397 | static int64_t t0; | |
1398 | int64_t t1; | |
1399 | ||
1400 | if (!mig_throttle_on) { | |
1401 | return; | |
1402 | } | |
1403 | ||
1404 | if (!t0) { | |
bc72ad67 | 1405 | t0 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
7ca1dfad CV |
1406 | return; |
1407 | } | |
1408 | ||
bc72ad67 | 1409 | t1 = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
7ca1dfad CV |
1410 | |
1411 | /* If it has been more than 40 ms since the last time the guest | |
1412 | * was throttled then do it again. | |
1413 | */ | |
1414 | if (40 < (t1-t0)/1000000) { | |
1415 | mig_throttle_guest_down(); | |
1416 | t0 = t1; | |
1417 | } | |
1418 | } |