]>
Commit | Line | Data |
---|---|---|
4040ab72 DG |
1 | #ifndef _HW_SPAPR_VIO_H |
2 | #define _HW_SPAPR_VIO_H | |
3 | /* | |
4 | * QEMU sPAPR VIO bus definitions | |
5 | * | |
6 | * Copyright (c) 2010 David Gibson, IBM Corporation <[email protected]> | |
7 | * Based on the s390 virtio bus definitions: | |
8 | * Copyright (c) 2009 Alexander Graf <[email protected]> | |
9 | * | |
10 | * This library is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU Lesser General Public | |
12 | * License as published by the Free Software Foundation; either | |
13 | * version 2 of the License, or (at your option) any later version. | |
14 | * | |
15 | * This library is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * Lesser General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU Lesser General Public | |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
22 | */ | |
23 | ||
ad0ebb91 | 24 | #include "dma.h" |
ee86dfee | 25 | |
3954d33a AL |
26 | #define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device" |
27 | #define VIO_SPAPR_DEVICE(obj) \ | |
28 | OBJECT_CHECK(VIOsPAPRDevice, (obj), TYPE_VIO_SPAPR_DEVICE) | |
29 | #define VIO_SPAPR_DEVICE_CLASS(klass) \ | |
30 | OBJECT_CLASS_CHECK(VIOsPAPRDeviceClass, (klass), TYPE_VIO_SPAPR_DEVICE) | |
31 | #define VIO_SPAPR_DEVICE_GET_CLASS(obj) \ | |
32 | OBJECT_GET_CLASS(VIOsPAPRDeviceClass, (obj), TYPE_VIO_SPAPR_DEVICE) | |
33 | ||
0d936928 AL |
34 | #define TYPE_SPAPR_VIO_BUS "spapr-vio-bus" |
35 | #define SPAPR_VIO_BUS(obj) OBJECT_CHECK(VIOsPAPRBus, (obj), TYPE_SPAPR_VIO_BUS) | |
36 | ||
b45d63b6 BH |
37 | struct VIOsPAPRDevice; |
38 | ||
b45d63b6 BH |
39 | typedef struct VIOsPAPR_CRQ { |
40 | uint64_t qladdr; | |
41 | uint32_t qsize; | |
42 | uint32_t qnext; | |
43 | int(*SendFunc)(struct VIOsPAPRDevice *vdev, uint8_t *crq); | |
44 | } VIOsPAPR_CRQ; | |
45 | ||
3954d33a AL |
46 | typedef struct VIOsPAPRDevice VIOsPAPRDevice; |
47 | typedef struct VIOsPAPRBus VIOsPAPRBus; | |
48 | ||
49 | typedef struct VIOsPAPRDeviceClass { | |
50 | DeviceClass parent_class; | |
51 | ||
52 | const char *dt_name, *dt_type, *dt_compatible; | |
53 | target_ulong signal_mask; | |
ad0ebb91 | 54 | uint32_t rtce_window_size; |
3954d33a | 55 | int (*init)(VIOsPAPRDevice *dev); |
b1c7f725 | 56 | void (*reset)(VIOsPAPRDevice *dev); |
3954d33a AL |
57 | int (*devnode)(VIOsPAPRDevice *dev, void *fdt, int node_off); |
58 | } VIOsPAPRDeviceClass; | |
59 | ||
60 | struct VIOsPAPRDevice { | |
4040ab72 DG |
61 | DeviceState qdev; |
62 | uint32_t reg; | |
a307d594 | 63 | uint32_t irq; |
00dc738d | 64 | target_ulong signal_state; |
b45d63b6 | 65 | VIOsPAPR_CRQ crq; |
ad0ebb91 | 66 | DMAContext *dma; |
3954d33a | 67 | }; |
4040ab72 | 68 | |
ad0ebb91 DG |
69 | #define DEFINE_SPAPR_PROPERTIES(type, field) \ |
70 | DEFINE_PROP_UINT32("reg", type, field.reg, -1) | |
77c7ea5e | 71 | |
3954d33a | 72 | struct VIOsPAPRBus { |
4040ab72 | 73 | BusState bus; |
d601fac4 | 74 | uint32_t next_reg; |
4040ab72 | 75 | int (*init)(VIOsPAPRDevice *dev); |
4040ab72 | 76 | int (*devnode)(VIOsPAPRDevice *dev, void *fdt, int node_off); |
3954d33a | 77 | }; |
4040ab72 DG |
78 | |
79 | extern VIOsPAPRBus *spapr_vio_bus_init(void); | |
80 | extern VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg); | |
4040ab72 | 81 | extern int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt); |
68f3a94c | 82 | extern int spapr_populate_chosen_stdout(void *fdt, VIOsPAPRBus *bus); |
4040ab72 | 83 | |
00dc738d DG |
84 | extern int spapr_vio_signal(VIOsPAPRDevice *dev, target_ulong mode); |
85 | ||
a307d594 AK |
86 | static inline qemu_irq spapr_vio_qirq(VIOsPAPRDevice *dev) |
87 | { | |
88 | return xics_get_qirq(spapr->icp, dev->irq); | |
89 | } | |
90 | ||
ad0ebb91 DG |
91 | static inline bool spapr_vio_dma_valid(VIOsPAPRDevice *dev, uint64_t taddr, |
92 | uint32_t size, DMADirection dir) | |
93 | { | |
94 | return dma_memory_valid(dev->dma, taddr, size, dir); | |
95 | } | |
96 | ||
97 | static inline int spapr_vio_dma_read(VIOsPAPRDevice *dev, uint64_t taddr, | |
98 | void *buf, uint32_t size) | |
99 | { | |
100 | return (dma_memory_read(dev->dma, taddr, buf, size) != 0) ? | |
101 | H_DEST_PARM : H_SUCCESS; | |
102 | } | |
103 | ||
104 | static inline int spapr_vio_dma_write(VIOsPAPRDevice *dev, uint64_t taddr, | |
105 | const void *buf, uint32_t size) | |
106 | { | |
107 | return (dma_memory_write(dev->dma, taddr, buf, size) != 0) ? | |
108 | H_DEST_PARM : H_SUCCESS; | |
109 | } | |
110 | ||
111 | static inline int spapr_vio_dma_set(VIOsPAPRDevice *dev, uint64_t taddr, | |
112 | uint8_t c, uint32_t size) | |
113 | { | |
114 | return (dma_memory_set(dev->dma, taddr, c, size) != 0) ? | |
115 | H_DEST_PARM : H_SUCCESS; | |
116 | } | |
117 | ||
118 | #define vio_stb(_dev, _addr, _val) (stb_dma((_dev)->dma, (_addr), (_val))) | |
119 | #define vio_sth(_dev, _addr, _val) (stw_be_dma((_dev)->dma, (_addr), (_val))) | |
120 | #define vio_stl(_dev, _addr, _val) (stl_be_dma((_dev)->dma, (_addr), (_val))) | |
121 | #define vio_stq(_dev, _addr, _val) (stq_be_dma((_dev)->dma, (_addr), (_val))) | |
122 | #define vio_ldq(_dev, _addr) (ldq_be_dma((_dev)->dma, (_addr))) | |
ee86dfee | 123 | |
b45d63b6 BH |
124 | int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq); |
125 | ||
5f2e2ba2 | 126 | VIOsPAPRDevice *vty_lookup(sPAPREnvironment *spapr, target_ulong reg); |
4040ab72 | 127 | void vty_putchars(VIOsPAPRDevice *sdev, uint8_t *buf, int len); |
d601fac4 DG |
128 | void spapr_vty_create(VIOsPAPRBus *bus, CharDriverState *chardev); |
129 | void spapr_vlan_create(VIOsPAPRBus *bus, NICInfo *nd); | |
130 | void spapr_vscsi_create(VIOsPAPRBus *bus); | |
6e270446 | 131 | |
68f3a94c DG |
132 | VIOsPAPRDevice *spapr_vty_get_default(VIOsPAPRBus *bus); |
133 | ||
08942ac1 BH |
134 | void spapr_vio_quiesce(void); |
135 | ||
4040ab72 | 136 | #endif /* _HW_SPAPR_VIO_H */ |