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tcg: Bake tb_destroy() into tcg_region_tree
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CommitLineData
8f2e8c07
KB
1/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <[email protected]>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
757e725b 26#include "qemu/osdep.h"
dcb32f1d 27#include "tcg/tcg-op.h"
90163900 28#include "tcg-internal.h"
8f2e8c07 29
8f2e8c07
KB
30#define CASE_OP_32_64(x) \
31 glue(glue(case INDEX_op_, x), _i32): \
32 glue(glue(case INDEX_op_, x), _i64)
8f2e8c07 33
170ba88f
RH
34#define CASE_OP_32_64_VEC(x) \
35 glue(glue(case INDEX_op_, x), _i32): \
36 glue(glue(case INDEX_op_, x), _i64): \
37 glue(glue(case INDEX_op_, x), _vec)
38
6fcb98ed 39typedef struct TempOptInfo {
b41059dd 40 bool is_const;
6349039d
RH
41 TCGTemp *prev_copy;
42 TCGTemp *next_copy;
54795544
RH
43 uint64_t val;
44 uint64_t mask;
6fcb98ed 45} TempOptInfo;
22613af4 46
6fcb98ed 47static inline TempOptInfo *ts_info(TCGTemp *ts)
d9c769c6 48{
6349039d 49 return ts->state_ptr;
d9c769c6
AJ
50}
51
6fcb98ed 52static inline TempOptInfo *arg_info(TCGArg arg)
d9c769c6 53{
6349039d
RH
54 return ts_info(arg_temp(arg));
55}
56
57static inline bool ts_is_const(TCGTemp *ts)
58{
59 return ts_info(ts)->is_const;
60}
61
62static inline bool arg_is_const(TCGArg arg)
63{
64 return ts_is_const(arg_temp(arg));
65}
66
67static inline bool ts_is_copy(TCGTemp *ts)
68{
69 return ts_info(ts)->next_copy != ts;
d9c769c6
AJ
70}
71
b41059dd 72/* Reset TEMP's state, possibly removing the temp for the list of copies. */
6349039d
RH
73static void reset_ts(TCGTemp *ts)
74{
6fcb98ed
RH
75 TempOptInfo *ti = ts_info(ts);
76 TempOptInfo *pi = ts_info(ti->prev_copy);
77 TempOptInfo *ni = ts_info(ti->next_copy);
6349039d
RH
78
79 ni->prev_copy = ti->prev_copy;
80 pi->next_copy = ti->next_copy;
81 ti->next_copy = ts;
82 ti->prev_copy = ts;
83 ti->is_const = false;
84 ti->mask = -1;
85}
86
87static void reset_temp(TCGArg arg)
22613af4 88{
6349039d 89 reset_ts(arg_temp(arg));
22613af4
KB
90}
91
1208d7dd 92/* Initialize and activate a temporary. */
8f17a975 93static void init_ts_info(TCGTempSet *temps_used, TCGTemp *ts)
1208d7dd 94{
6349039d 95 size_t idx = temp_idx(ts);
8f17a975 96 TempOptInfo *ti;
6349039d 97
8f17a975
RH
98 if (test_bit(idx, temps_used->l)) {
99 return;
100 }
101 set_bit(idx, temps_used->l);
102
103 ti = ts->state_ptr;
104 if (ti == NULL) {
105 ti = tcg_malloc(sizeof(TempOptInfo));
6349039d 106 ts->state_ptr = ti;
8f17a975
RH
107 }
108
109 ti->next_copy = ts;
110 ti->prev_copy = ts;
111 if (ts->kind == TEMP_CONST) {
112 ti->is_const = true;
113 ti->val = ts->val;
114 ti->mask = ts->val;
115 if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
116 /* High bits of a 32-bit quantity are garbage. */
117 ti->mask |= ~0xffffffffull;
c0522136 118 }
8f17a975
RH
119 } else {
120 ti->is_const = false;
121 ti->mask = -1;
1208d7dd
AJ
122 }
123}
124
8f17a975 125static void init_arg_info(TCGTempSet *temps_used, TCGArg arg)
6349039d 126{
8f17a975 127 init_ts_info(temps_used, arg_temp(arg));
6349039d
RH
128}
129
6349039d 130static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
e590d4e6 131{
4c868ce6 132 TCGTemp *i, *g, *l;
e590d4e6 133
4c868ce6
RH
134 /* If this is already readonly, we can't do better. */
135 if (temp_readonly(ts)) {
6349039d 136 return ts;
e590d4e6
AJ
137 }
138
4c868ce6 139 g = l = NULL;
6349039d 140 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
4c868ce6 141 if (temp_readonly(i)) {
e590d4e6 142 return i;
4c868ce6
RH
143 } else if (i->kind > ts->kind) {
144 if (i->kind == TEMP_GLOBAL) {
145 g = i;
146 } else if (i->kind == TEMP_LOCAL) {
147 l = i;
e590d4e6
AJ
148 }
149 }
150 }
151
4c868ce6
RH
152 /* If we didn't find a better representation, return the same temp. */
153 return g ? g : l ? l : ts;
e590d4e6
AJ
154}
155
6349039d 156static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
e590d4e6 157{
6349039d 158 TCGTemp *i;
e590d4e6 159
6349039d 160 if (ts1 == ts2) {
e590d4e6
AJ
161 return true;
162 }
163
6349039d 164 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
e590d4e6
AJ
165 return false;
166 }
167
6349039d
RH
168 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
169 if (i == ts2) {
e590d4e6
AJ
170 return true;
171 }
172 }
173
174 return false;
175}
176
6349039d
RH
177static bool args_are_copies(TCGArg arg1, TCGArg arg2)
178{
179 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
180}
181
acd93701 182static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
22613af4 183{
6349039d
RH
184 TCGTemp *dst_ts = arg_temp(dst);
185 TCGTemp *src_ts = arg_temp(src);
170ba88f 186 const TCGOpDef *def;
6fcb98ed
RH
187 TempOptInfo *di;
188 TempOptInfo *si;
54795544 189 uint64_t mask;
6349039d
RH
190 TCGOpcode new_op;
191
192 if (ts_are_copies(dst_ts, src_ts)) {
5365718a
AJ
193 tcg_op_remove(s, op);
194 return;
195 }
196
6349039d
RH
197 reset_ts(dst_ts);
198 di = ts_info(dst_ts);
199 si = ts_info(src_ts);
170ba88f
RH
200 def = &tcg_op_defs[op->opc];
201 if (def->flags & TCG_OPF_VECTOR) {
202 new_op = INDEX_op_mov_vec;
203 } else if (def->flags & TCG_OPF_64BIT) {
204 new_op = INDEX_op_mov_i64;
205 } else {
206 new_op = INDEX_op_mov_i32;
207 }
c45cb8bb 208 op->opc = new_op;
170ba88f 209 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
6349039d
RH
210 op->args[0] = dst;
211 op->args[1] = src;
a62f6f56 212
6349039d 213 mask = si->mask;
24666baf
RH
214 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
215 /* High bits of the destination are now garbage. */
216 mask |= ~0xffffffffull;
217 }
6349039d 218 di->mask = mask;
e590d4e6 219
6349039d 220 if (src_ts->type == dst_ts->type) {
6fcb98ed 221 TempOptInfo *ni = ts_info(si->next_copy);
6349039d
RH
222
223 di->next_copy = si->next_copy;
224 di->prev_copy = src_ts;
225 ni->prev_copy = dst_ts;
226 si->next_copy = dst_ts;
227 di->is_const = si->is_const;
228 di->val = si->val;
229 }
22613af4
KB
230}
231
8fe35e04
RH
232static void tcg_opt_gen_movi(TCGContext *s, TCGTempSet *temps_used,
233 TCGOp *op, TCGArg dst, uint64_t val)
234{
235 const TCGOpDef *def = &tcg_op_defs[op->opc];
236 TCGType type;
237 TCGTemp *tv;
238
239 if (def->flags & TCG_OPF_VECTOR) {
240 type = TCGOP_VECL(op) + TCG_TYPE_V64;
241 } else if (def->flags & TCG_OPF_64BIT) {
242 type = TCG_TYPE_I64;
243 } else {
244 type = TCG_TYPE_I32;
245 }
246
247 /* Convert movi to mov with constant temp. */
248 tv = tcg_constant_internal(type, val);
249 init_ts_info(temps_used, tv);
250 tcg_opt_gen_mov(s, op, dst, temp_arg(tv));
251}
252
54795544 253static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
53108fb5 254{
03271524
RH
255 uint64_t l64, h64;
256
53108fb5
KB
257 switch (op) {
258 CASE_OP_32_64(add):
259 return x + y;
260
261 CASE_OP_32_64(sub):
262 return x - y;
263
264 CASE_OP_32_64(mul):
265 return x * y;
266
9a81090b
KB
267 CASE_OP_32_64(and):
268 return x & y;
269
270 CASE_OP_32_64(or):
271 return x | y;
272
273 CASE_OP_32_64(xor):
274 return x ^ y;
275
55c0975c 276 case INDEX_op_shl_i32:
50c5c4d1 277 return (uint32_t)x << (y & 31);
55c0975c 278
55c0975c 279 case INDEX_op_shl_i64:
50c5c4d1 280 return (uint64_t)x << (y & 63);
55c0975c
KB
281
282 case INDEX_op_shr_i32:
50c5c4d1 283 return (uint32_t)x >> (y & 31);
55c0975c 284
55c0975c 285 case INDEX_op_shr_i64:
50c5c4d1 286 return (uint64_t)x >> (y & 63);
55c0975c
KB
287
288 case INDEX_op_sar_i32:
50c5c4d1 289 return (int32_t)x >> (y & 31);
55c0975c 290
55c0975c 291 case INDEX_op_sar_i64:
50c5c4d1 292 return (int64_t)x >> (y & 63);
55c0975c
KB
293
294 case INDEX_op_rotr_i32:
50c5c4d1 295 return ror32(x, y & 31);
55c0975c 296
55c0975c 297 case INDEX_op_rotr_i64:
50c5c4d1 298 return ror64(x, y & 63);
55c0975c
KB
299
300 case INDEX_op_rotl_i32:
50c5c4d1 301 return rol32(x, y & 31);
55c0975c 302
55c0975c 303 case INDEX_op_rotl_i64:
50c5c4d1 304 return rol64(x, y & 63);
25c4d9cc
RH
305
306 CASE_OP_32_64(not):
a640f031 307 return ~x;
25c4d9cc 308
cb25c80a
RH
309 CASE_OP_32_64(neg):
310 return -x;
311
312 CASE_OP_32_64(andc):
313 return x & ~y;
314
315 CASE_OP_32_64(orc):
316 return x | ~y;
317
318 CASE_OP_32_64(eqv):
319 return ~(x ^ y);
320
321 CASE_OP_32_64(nand):
322 return ~(x & y);
323
324 CASE_OP_32_64(nor):
325 return ~(x | y);
326
0e28d006
RH
327 case INDEX_op_clz_i32:
328 return (uint32_t)x ? clz32(x) : y;
329
330 case INDEX_op_clz_i64:
331 return x ? clz64(x) : y;
332
333 case INDEX_op_ctz_i32:
334 return (uint32_t)x ? ctz32(x) : y;
335
336 case INDEX_op_ctz_i64:
337 return x ? ctz64(x) : y;
338
a768e4e9
RH
339 case INDEX_op_ctpop_i32:
340 return ctpop32(x);
341
342 case INDEX_op_ctpop_i64:
343 return ctpop64(x);
344
25c4d9cc 345 CASE_OP_32_64(ext8s):
a640f031 346 return (int8_t)x;
25c4d9cc
RH
347
348 CASE_OP_32_64(ext16s):
a640f031 349 return (int16_t)x;
25c4d9cc
RH
350
351 CASE_OP_32_64(ext8u):
a640f031 352 return (uint8_t)x;
25c4d9cc
RH
353
354 CASE_OP_32_64(ext16u):
a640f031
KB
355 return (uint16_t)x;
356
6498594c 357 CASE_OP_32_64(bswap16):
0b76ff8f
RH
358 x = bswap16(x);
359 return y & TCG_BSWAP_OS ? (int16_t)x : x;
6498594c
RH
360
361 CASE_OP_32_64(bswap32):
0b76ff8f
RH
362 x = bswap32(x);
363 return y & TCG_BSWAP_OS ? (int32_t)x : x;
6498594c
RH
364
365 case INDEX_op_bswap64_i64:
366 return bswap64(x);
367
8bcb5c8f 368 case INDEX_op_ext_i32_i64:
a640f031
KB
369 case INDEX_op_ext32s_i64:
370 return (int32_t)x;
371
8bcb5c8f 372 case INDEX_op_extu_i32_i64:
609ad705 373 case INDEX_op_extrl_i64_i32:
a640f031
KB
374 case INDEX_op_ext32u_i64:
375 return (uint32_t)x;
a640f031 376
609ad705
RH
377 case INDEX_op_extrh_i64_i32:
378 return (uint64_t)x >> 32;
379
03271524
RH
380 case INDEX_op_muluh_i32:
381 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
382 case INDEX_op_mulsh_i32:
383 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
384
385 case INDEX_op_muluh_i64:
386 mulu64(&l64, &h64, x, y);
387 return h64;
388 case INDEX_op_mulsh_i64:
389 muls64(&l64, &h64, x, y);
390 return h64;
391
01547f7f
RH
392 case INDEX_op_div_i32:
393 /* Avoid crashing on divide by zero, otherwise undefined. */
394 return (int32_t)x / ((int32_t)y ? : 1);
395 case INDEX_op_divu_i32:
396 return (uint32_t)x / ((uint32_t)y ? : 1);
397 case INDEX_op_div_i64:
398 return (int64_t)x / ((int64_t)y ? : 1);
399 case INDEX_op_divu_i64:
400 return (uint64_t)x / ((uint64_t)y ? : 1);
401
402 case INDEX_op_rem_i32:
403 return (int32_t)x % ((int32_t)y ? : 1);
404 case INDEX_op_remu_i32:
405 return (uint32_t)x % ((uint32_t)y ? : 1);
406 case INDEX_op_rem_i64:
407 return (int64_t)x % ((int64_t)y ? : 1);
408 case INDEX_op_remu_i64:
409 return (uint64_t)x % ((uint64_t)y ? : 1);
410
53108fb5
KB
411 default:
412 fprintf(stderr,
413 "Unrecognized operation %d in do_constant_folding.\n", op);
414 tcg_abort();
415 }
416}
417
54795544 418static uint64_t do_constant_folding(TCGOpcode op, uint64_t x, uint64_t y)
53108fb5 419{
170ba88f 420 const TCGOpDef *def = &tcg_op_defs[op];
54795544 421 uint64_t res = do_constant_folding_2(op, x, y);
170ba88f 422 if (!(def->flags & TCG_OPF_64BIT)) {
29f3ff8d 423 res = (int32_t)res;
53108fb5 424 }
53108fb5
KB
425 return res;
426}
427
9519da7e
RH
428static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
429{
430 switch (c) {
431 case TCG_COND_EQ:
432 return x == y;
433 case TCG_COND_NE:
434 return x != y;
435 case TCG_COND_LT:
436 return (int32_t)x < (int32_t)y;
437 case TCG_COND_GE:
438 return (int32_t)x >= (int32_t)y;
439 case TCG_COND_LE:
440 return (int32_t)x <= (int32_t)y;
441 case TCG_COND_GT:
442 return (int32_t)x > (int32_t)y;
443 case TCG_COND_LTU:
444 return x < y;
445 case TCG_COND_GEU:
446 return x >= y;
447 case TCG_COND_LEU:
448 return x <= y;
449 case TCG_COND_GTU:
450 return x > y;
451 default:
452 tcg_abort();
453 }
454}
455
456static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
457{
458 switch (c) {
459 case TCG_COND_EQ:
460 return x == y;
461 case TCG_COND_NE:
462 return x != y;
463 case TCG_COND_LT:
464 return (int64_t)x < (int64_t)y;
465 case TCG_COND_GE:
466 return (int64_t)x >= (int64_t)y;
467 case TCG_COND_LE:
468 return (int64_t)x <= (int64_t)y;
469 case TCG_COND_GT:
470 return (int64_t)x > (int64_t)y;
471 case TCG_COND_LTU:
472 return x < y;
473 case TCG_COND_GEU:
474 return x >= y;
475 case TCG_COND_LEU:
476 return x <= y;
477 case TCG_COND_GTU:
478 return x > y;
479 default:
480 tcg_abort();
481 }
482}
483
484static bool do_constant_folding_cond_eq(TCGCond c)
485{
486 switch (c) {
487 case TCG_COND_GT:
488 case TCG_COND_LTU:
489 case TCG_COND_LT:
490 case TCG_COND_GTU:
491 case TCG_COND_NE:
492 return 0;
493 case TCG_COND_GE:
494 case TCG_COND_GEU:
495 case TCG_COND_LE:
496 case TCG_COND_LEU:
497 case TCG_COND_EQ:
498 return 1;
499 default:
500 tcg_abort();
501 }
502}
503
b336ceb6
AJ
504/* Return 2 if the condition can't be simplified, and the result
505 of the condition (0 or 1) if it can */
f8dd19e5
AJ
506static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
507 TCGArg y, TCGCond c)
508{
54795544
RH
509 uint64_t xv = arg_info(x)->val;
510 uint64_t yv = arg_info(y)->val;
511
6349039d 512 if (arg_is_const(x) && arg_is_const(y)) {
170ba88f
RH
513 const TCGOpDef *def = &tcg_op_defs[op];
514 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
515 if (def->flags & TCG_OPF_64BIT) {
6349039d 516 return do_constant_folding_cond_64(xv, yv, c);
170ba88f
RH
517 } else {
518 return do_constant_folding_cond_32(xv, yv, c);
b336ceb6 519 }
6349039d 520 } else if (args_are_copies(x, y)) {
9519da7e 521 return do_constant_folding_cond_eq(c);
6349039d 522 } else if (arg_is_const(y) && yv == 0) {
b336ceb6 523 switch (c) {
f8dd19e5 524 case TCG_COND_LTU:
b336ceb6 525 return 0;
f8dd19e5 526 case TCG_COND_GEU:
b336ceb6
AJ
527 return 1;
528 default:
529 return 2;
f8dd19e5 530 }
f8dd19e5 531 }
550276ae 532 return 2;
f8dd19e5
AJ
533}
534
6c4382f8
RH
535/* Return 2 if the condition can't be simplified, and the result
536 of the condition (0 or 1) if it can */
537static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
538{
539 TCGArg al = p1[0], ah = p1[1];
540 TCGArg bl = p2[0], bh = p2[1];
541
6349039d
RH
542 if (arg_is_const(bl) && arg_is_const(bh)) {
543 tcg_target_ulong blv = arg_info(bl)->val;
544 tcg_target_ulong bhv = arg_info(bh)->val;
545 uint64_t b = deposit64(blv, 32, 32, bhv);
6c4382f8 546
6349039d
RH
547 if (arg_is_const(al) && arg_is_const(ah)) {
548 tcg_target_ulong alv = arg_info(al)->val;
549 tcg_target_ulong ahv = arg_info(ah)->val;
550 uint64_t a = deposit64(alv, 32, 32, ahv);
6c4382f8
RH
551 return do_constant_folding_cond_64(a, b, c);
552 }
553 if (b == 0) {
554 switch (c) {
555 case TCG_COND_LTU:
556 return 0;
557 case TCG_COND_GEU:
558 return 1;
559 default:
560 break;
561 }
562 }
563 }
6349039d 564 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
6c4382f8
RH
565 return do_constant_folding_cond_eq(c);
566 }
567 return 2;
568}
569
24c9ae4e
RH
570static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
571{
572 TCGArg a1 = *p1, a2 = *p2;
573 int sum = 0;
6349039d
RH
574 sum += arg_is_const(a1);
575 sum -= arg_is_const(a2);
24c9ae4e
RH
576
577 /* Prefer the constant in second argument, and then the form
578 op a, a, b, which is better handled on non-RISC hosts. */
579 if (sum > 0 || (sum == 0 && dest == a2)) {
580 *p1 = a2;
581 *p2 = a1;
582 return true;
583 }
584 return false;
585}
586
0bfcb865
RH
587static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
588{
589 int sum = 0;
6349039d
RH
590 sum += arg_is_const(p1[0]);
591 sum += arg_is_const(p1[1]);
592 sum -= arg_is_const(p2[0]);
593 sum -= arg_is_const(p2[1]);
0bfcb865
RH
594 if (sum > 0) {
595 TCGArg t;
596 t = p1[0], p1[0] = p2[0], p2[0] = t;
597 t = p1[1], p1[1] = p2[1], p2[1] = t;
598 return true;
599 }
600 return false;
601}
602
22613af4 603/* Propagate constants and copies, fold constant expressions. */
36e60ef6 604void tcg_optimize(TCGContext *s)
8f2e8c07 605{
8f17a975 606 int nb_temps, nb_globals, i;
15fa08f8 607 TCGOp *op, *op_next, *prev_mb = NULL;
34184b07 608 TCGTempSet temps_used;
5d8f5363 609
22613af4
KB
610 /* Array VALS has an element for each temp.
611 If this temp holds a constant then its value is kept in VALS' element.
e590d4e6
AJ
612 If this temp is a copy of other ones then the other copies are
613 available through the doubly linked circular list. */
8f2e8c07
KB
614
615 nb_temps = s->nb_temps;
616 nb_globals = s->nb_globals;
8f17a975 617
8fe35e04 618 memset(&temps_used, 0, sizeof(temps_used));
8f17a975
RH
619 for (i = 0; i < nb_temps; ++i) {
620 s->temps[i].state_ptr = NULL;
621 }
8f2e8c07 622
15fa08f8 623 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
54795544 624 uint64_t mask, partmask, affected, tmp;
8f17a975 625 int nb_oargs, nb_iargs;
c45cb8bb
RH
626 TCGOpcode opc = op->opc;
627 const TCGOpDef *def = &tcg_op_defs[opc];
628
1208d7dd
AJ
629 /* Count the arguments, and initialize the temps that are
630 going to be used */
c45cb8bb 631 if (opc == INDEX_op_call) {
cd9090aa
RH
632 nb_oargs = TCGOP_CALLO(op);
633 nb_iargs = TCGOP_CALLI(op);
1208d7dd 634 for (i = 0; i < nb_oargs + nb_iargs; i++) {
6349039d
RH
635 TCGTemp *ts = arg_temp(op->args[i]);
636 if (ts) {
8f17a975 637 init_ts_info(&temps_used, ts);
1208d7dd
AJ
638 }
639 }
1ff8c541 640 } else {
cf066674
RH
641 nb_oargs = def->nb_oargs;
642 nb_iargs = def->nb_iargs;
1208d7dd 643 for (i = 0; i < nb_oargs + nb_iargs; i++) {
8f17a975 644 init_arg_info(&temps_used, op->args[i]);
1208d7dd 645 }
cf066674
RH
646 }
647
648 /* Do copy propagation */
649 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
6349039d
RH
650 TCGTemp *ts = arg_temp(op->args[i]);
651 if (ts && ts_is_copy(ts)) {
652 op->args[i] = temp_arg(find_better_copy(s, ts));
22613af4
KB
653 }
654 }
655
53108fb5 656 /* For commutative operations make constant second argument */
c45cb8bb 657 switch (opc) {
170ba88f
RH
658 CASE_OP_32_64_VEC(add):
659 CASE_OP_32_64_VEC(mul):
660 CASE_OP_32_64_VEC(and):
661 CASE_OP_32_64_VEC(or):
662 CASE_OP_32_64_VEC(xor):
cb25c80a
RH
663 CASE_OP_32_64(eqv):
664 CASE_OP_32_64(nand):
665 CASE_OP_32_64(nor):
03271524
RH
666 CASE_OP_32_64(muluh):
667 CASE_OP_32_64(mulsh):
acd93701 668 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
53108fb5 669 break;
65a7cce1 670 CASE_OP_32_64(brcond):
acd93701
RH
671 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
672 op->args[2] = tcg_swap_cond(op->args[2]);
65a7cce1
AJ
673 }
674 break;
675 CASE_OP_32_64(setcond):
acd93701
RH
676 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
677 op->args[3] = tcg_swap_cond(op->args[3]);
65a7cce1
AJ
678 }
679 break;
fa01a208 680 CASE_OP_32_64(movcond):
acd93701
RH
681 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
682 op->args[5] = tcg_swap_cond(op->args[5]);
5d8f5363
RH
683 }
684 /* For movcond, we canonicalize the "false" input reg to match
685 the destination reg so that the tcg backend can implement
686 a "move if true" operation. */
acd93701
RH
687 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
688 op->args[5] = tcg_invert_cond(op->args[5]);
fa01a208 689 }
1e484e61 690 break;
d7156f7c 691 CASE_OP_32_64(add2):
acd93701
RH
692 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
693 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
1e484e61 694 break;
d7156f7c 695 CASE_OP_32_64(mulu2):
4d3203fd 696 CASE_OP_32_64(muls2):
acd93701 697 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
1414968a 698 break;
0bfcb865 699 case INDEX_op_brcond2_i32:
acd93701
RH
700 if (swap_commutative2(&op->args[0], &op->args[2])) {
701 op->args[4] = tcg_swap_cond(op->args[4]);
0bfcb865
RH
702 }
703 break;
704 case INDEX_op_setcond2_i32:
acd93701
RH
705 if (swap_commutative2(&op->args[1], &op->args[3])) {
706 op->args[5] = tcg_swap_cond(op->args[5]);
0bfcb865
RH
707 }
708 break;
53108fb5
KB
709 default:
710 break;
711 }
712
2d497542
RH
713 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
714 and "sub r, 0, a => neg r, a" case. */
c45cb8bb 715 switch (opc) {
01ee5282
AJ
716 CASE_OP_32_64(shl):
717 CASE_OP_32_64(shr):
718 CASE_OP_32_64(sar):
719 CASE_OP_32_64(rotl):
720 CASE_OP_32_64(rotr):
6349039d
RH
721 if (arg_is_const(op->args[1])
722 && arg_info(op->args[1])->val == 0) {
8fe35e04 723 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
01ee5282
AJ
724 continue;
725 }
726 break;
170ba88f 727 CASE_OP_32_64_VEC(sub):
2d497542
RH
728 {
729 TCGOpcode neg_op;
730 bool have_neg;
731
6349039d 732 if (arg_is_const(op->args[2])) {
2d497542
RH
733 /* Proceed with possible constant folding. */
734 break;
735 }
c45cb8bb 736 if (opc == INDEX_op_sub_i32) {
2d497542
RH
737 neg_op = INDEX_op_neg_i32;
738 have_neg = TCG_TARGET_HAS_neg_i32;
170ba88f 739 } else if (opc == INDEX_op_sub_i64) {
2d497542
RH
740 neg_op = INDEX_op_neg_i64;
741 have_neg = TCG_TARGET_HAS_neg_i64;
ac383dde
RH
742 } else if (TCG_TARGET_HAS_neg_vec) {
743 TCGType type = TCGOP_VECL(op) + TCG_TYPE_V64;
744 unsigned vece = TCGOP_VECE(op);
170ba88f 745 neg_op = INDEX_op_neg_vec;
ac383dde
RH
746 have_neg = tcg_can_emit_vec_op(neg_op, type, vece) > 0;
747 } else {
748 break;
2d497542
RH
749 }
750 if (!have_neg) {
751 break;
752 }
6349039d
RH
753 if (arg_is_const(op->args[1])
754 && arg_info(op->args[1])->val == 0) {
c45cb8bb 755 op->opc = neg_op;
acd93701
RH
756 reset_temp(op->args[0]);
757 op->args[1] = op->args[2];
2d497542
RH
758 continue;
759 }
760 }
761 break;
170ba88f 762 CASE_OP_32_64_VEC(xor):
e201b564 763 CASE_OP_32_64(nand):
6349039d
RH
764 if (!arg_is_const(op->args[1])
765 && arg_is_const(op->args[2])
766 && arg_info(op->args[2])->val == -1) {
e201b564
RH
767 i = 1;
768 goto try_not;
769 }
770 break;
771 CASE_OP_32_64(nor):
6349039d
RH
772 if (!arg_is_const(op->args[1])
773 && arg_is_const(op->args[2])
774 && arg_info(op->args[2])->val == 0) {
e201b564
RH
775 i = 1;
776 goto try_not;
777 }
778 break;
170ba88f 779 CASE_OP_32_64_VEC(andc):
6349039d
RH
780 if (!arg_is_const(op->args[2])
781 && arg_is_const(op->args[1])
782 && arg_info(op->args[1])->val == -1) {
e201b564
RH
783 i = 2;
784 goto try_not;
785 }
786 break;
170ba88f 787 CASE_OP_32_64_VEC(orc):
e201b564 788 CASE_OP_32_64(eqv):
6349039d
RH
789 if (!arg_is_const(op->args[2])
790 && arg_is_const(op->args[1])
791 && arg_info(op->args[1])->val == 0) {
e201b564
RH
792 i = 2;
793 goto try_not;
794 }
795 break;
796 try_not:
797 {
798 TCGOpcode not_op;
799 bool have_not;
800
170ba88f
RH
801 if (def->flags & TCG_OPF_VECTOR) {
802 not_op = INDEX_op_not_vec;
803 have_not = TCG_TARGET_HAS_not_vec;
804 } else if (def->flags & TCG_OPF_64BIT) {
e201b564
RH
805 not_op = INDEX_op_not_i64;
806 have_not = TCG_TARGET_HAS_not_i64;
807 } else {
808 not_op = INDEX_op_not_i32;
809 have_not = TCG_TARGET_HAS_not_i32;
810 }
811 if (!have_not) {
812 break;
813 }
c45cb8bb 814 op->opc = not_op;
acd93701
RH
815 reset_temp(op->args[0]);
816 op->args[1] = op->args[i];
e201b564
RH
817 continue;
818 }
01ee5282
AJ
819 default:
820 break;
821 }
822
464a1441 823 /* Simplify expression for "op r, a, const => mov r, a" cases */
c45cb8bb 824 switch (opc) {
170ba88f
RH
825 CASE_OP_32_64_VEC(add):
826 CASE_OP_32_64_VEC(sub):
827 CASE_OP_32_64_VEC(or):
828 CASE_OP_32_64_VEC(xor):
829 CASE_OP_32_64_VEC(andc):
55c0975c
KB
830 CASE_OP_32_64(shl):
831 CASE_OP_32_64(shr):
832 CASE_OP_32_64(sar):
25c4d9cc
RH
833 CASE_OP_32_64(rotl):
834 CASE_OP_32_64(rotr):
6349039d
RH
835 if (!arg_is_const(op->args[1])
836 && arg_is_const(op->args[2])
837 && arg_info(op->args[2])->val == 0) {
acd93701 838 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
97a79eb7 839 continue;
53108fb5
KB
840 }
841 break;
170ba88f
RH
842 CASE_OP_32_64_VEC(and):
843 CASE_OP_32_64_VEC(orc):
464a1441 844 CASE_OP_32_64(eqv):
6349039d
RH
845 if (!arg_is_const(op->args[1])
846 && arg_is_const(op->args[2])
847 && arg_info(op->args[2])->val == -1) {
acd93701 848 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
97a79eb7 849 continue;
464a1441
RH
850 }
851 break;
56e49438
AJ
852 default:
853 break;
854 }
855
3031244b
AJ
856 /* Simplify using known-zero bits. Currently only ops with a single
857 output argument is supported. */
3a9d8b17 858 mask = -1;
633f6502 859 affected = -1;
c45cb8bb 860 switch (opc) {
3a9d8b17 861 CASE_OP_32_64(ext8s):
6349039d 862 if ((arg_info(op->args[1])->mask & 0x80) != 0) {
3a9d8b17
PB
863 break;
864 }
d84568b7 865 QEMU_FALLTHROUGH;
3a9d8b17
PB
866 CASE_OP_32_64(ext8u):
867 mask = 0xff;
868 goto and_const;
869 CASE_OP_32_64(ext16s):
6349039d 870 if ((arg_info(op->args[1])->mask & 0x8000) != 0) {
3a9d8b17
PB
871 break;
872 }
d84568b7 873 QEMU_FALLTHROUGH;
3a9d8b17
PB
874 CASE_OP_32_64(ext16u):
875 mask = 0xffff;
876 goto and_const;
877 case INDEX_op_ext32s_i64:
6349039d 878 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
3a9d8b17
PB
879 break;
880 }
d84568b7 881 QEMU_FALLTHROUGH;
3a9d8b17
PB
882 case INDEX_op_ext32u_i64:
883 mask = 0xffffffffU;
884 goto and_const;
885
886 CASE_OP_32_64(and):
6349039d
RH
887 mask = arg_info(op->args[2])->mask;
888 if (arg_is_const(op->args[2])) {
3a9d8b17 889 and_const:
6349039d 890 affected = arg_info(op->args[1])->mask & ~mask;
3a9d8b17 891 }
6349039d 892 mask = arg_info(op->args[1])->mask & mask;
3a9d8b17
PB
893 break;
894
8bcb5c8f 895 case INDEX_op_ext_i32_i64:
6349039d 896 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
8bcb5c8f
AJ
897 break;
898 }
d84568b7 899 QEMU_FALLTHROUGH;
8bcb5c8f
AJ
900 case INDEX_op_extu_i32_i64:
901 /* We do not compute affected as it is a size changing op. */
6349039d 902 mask = (uint32_t)arg_info(op->args[1])->mask;
8bcb5c8f
AJ
903 break;
904
23ec69ed
RH
905 CASE_OP_32_64(andc):
906 /* Known-zeros does not imply known-ones. Therefore unless
acd93701 907 op->args[2] is constant, we can't infer anything from it. */
6349039d
RH
908 if (arg_is_const(op->args[2])) {
909 mask = ~arg_info(op->args[2])->mask;
23ec69ed
RH
910 goto and_const;
911 }
6349039d
RH
912 /* But we certainly know nothing outside args[1] may be set. */
913 mask = arg_info(op->args[1])->mask;
23ec69ed
RH
914 break;
915
e46b225a 916 case INDEX_op_sar_i32:
6349039d
RH
917 if (arg_is_const(op->args[2])) {
918 tmp = arg_info(op->args[2])->val & 31;
919 mask = (int32_t)arg_info(op->args[1])->mask >> tmp;
e46b225a
AJ
920 }
921 break;
922 case INDEX_op_sar_i64:
6349039d
RH
923 if (arg_is_const(op->args[2])) {
924 tmp = arg_info(op->args[2])->val & 63;
925 mask = (int64_t)arg_info(op->args[1])->mask >> tmp;
3a9d8b17
PB
926 }
927 break;
928
e46b225a 929 case INDEX_op_shr_i32:
6349039d
RH
930 if (arg_is_const(op->args[2])) {
931 tmp = arg_info(op->args[2])->val & 31;
932 mask = (uint32_t)arg_info(op->args[1])->mask >> tmp;
e46b225a
AJ
933 }
934 break;
935 case INDEX_op_shr_i64:
6349039d
RH
936 if (arg_is_const(op->args[2])) {
937 tmp = arg_info(op->args[2])->val & 63;
938 mask = (uint64_t)arg_info(op->args[1])->mask >> tmp;
3a9d8b17
PB
939 }
940 break;
941
609ad705 942 case INDEX_op_extrl_i64_i32:
6349039d 943 mask = (uint32_t)arg_info(op->args[1])->mask;
609ad705
RH
944 break;
945 case INDEX_op_extrh_i64_i32:
6349039d 946 mask = (uint64_t)arg_info(op->args[1])->mask >> 32;
4bb7a41e
RH
947 break;
948
3a9d8b17 949 CASE_OP_32_64(shl):
6349039d
RH
950 if (arg_is_const(op->args[2])) {
951 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
952 mask = arg_info(op->args[1])->mask << tmp;
3a9d8b17
PB
953 }
954 break;
955
956 CASE_OP_32_64(neg):
957 /* Set to 1 all bits to the left of the rightmost. */
6349039d
RH
958 mask = -(arg_info(op->args[1])->mask
959 & -arg_info(op->args[1])->mask);
3a9d8b17
PB
960 break;
961
962 CASE_OP_32_64(deposit):
6349039d
RH
963 mask = deposit64(arg_info(op->args[1])->mask,
964 op->args[3], op->args[4],
965 arg_info(op->args[2])->mask);
3a9d8b17
PB
966 break;
967
7ec8bab3 968 CASE_OP_32_64(extract):
6349039d
RH
969 mask = extract64(arg_info(op->args[1])->mask,
970 op->args[2], op->args[3]);
acd93701 971 if (op->args[2] == 0) {
6349039d 972 affected = arg_info(op->args[1])->mask & ~mask;
7ec8bab3
RH
973 }
974 break;
975 CASE_OP_32_64(sextract):
6349039d 976 mask = sextract64(arg_info(op->args[1])->mask,
acd93701
RH
977 op->args[2], op->args[3]);
978 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
6349039d 979 affected = arg_info(op->args[1])->mask & ~mask;
7ec8bab3
RH
980 }
981 break;
982
3a9d8b17
PB
983 CASE_OP_32_64(or):
984 CASE_OP_32_64(xor):
6349039d 985 mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask;
3a9d8b17
PB
986 break;
987
0e28d006
RH
988 case INDEX_op_clz_i32:
989 case INDEX_op_ctz_i32:
6349039d 990 mask = arg_info(op->args[2])->mask | 31;
0e28d006
RH
991 break;
992
993 case INDEX_op_clz_i64:
994 case INDEX_op_ctz_i64:
6349039d 995 mask = arg_info(op->args[2])->mask | 63;
0e28d006
RH
996 break;
997
a768e4e9
RH
998 case INDEX_op_ctpop_i32:
999 mask = 32 | 31;
1000 break;
1001 case INDEX_op_ctpop_i64:
1002 mask = 64 | 63;
1003 break;
1004
3a9d8b17 1005 CASE_OP_32_64(setcond):
a763551a 1006 case INDEX_op_setcond2_i32:
3a9d8b17
PB
1007 mask = 1;
1008 break;
1009
1010 CASE_OP_32_64(movcond):
6349039d 1011 mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask;
3a9d8b17
PB
1012 break;
1013
c8d70272 1014 CASE_OP_32_64(ld8u):
c8d70272
AJ
1015 mask = 0xff;
1016 break;
1017 CASE_OP_32_64(ld16u):
c8d70272
AJ
1018 mask = 0xffff;
1019 break;
1020 case INDEX_op_ld32u_i64:
c8d70272
AJ
1021 mask = 0xffffffffu;
1022 break;
1023
1024 CASE_OP_32_64(qemu_ld):
1025 {
acd93701 1026 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
14776ab5 1027 MemOp mop = get_memop(oi);
c8d70272
AJ
1028 if (!(mop & MO_SIGN)) {
1029 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
1030 }
1031 }
1032 break;
1033
0b76ff8f
RH
1034 CASE_OP_32_64(bswap16):
1035 mask = arg_info(op->args[1])->mask;
1036 if (mask <= 0xffff) {
1037 op->args[2] |= TCG_BSWAP_IZ;
1038 }
1039 mask = bswap16(mask);
1040 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1041 case TCG_BSWAP_OZ:
1042 break;
1043 case TCG_BSWAP_OS:
1044 mask = (int16_t)mask;
1045 break;
1046 default: /* undefined high bits */
1047 mask |= MAKE_64BIT_MASK(16, 48);
1048 break;
1049 }
1050 break;
1051
1052 case INDEX_op_bswap32_i64:
1053 mask = arg_info(op->args[1])->mask;
1054 if (mask <= 0xffffffffu) {
1055 op->args[2] |= TCG_BSWAP_IZ;
1056 }
1057 mask = bswap32(mask);
1058 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1059 case TCG_BSWAP_OZ:
1060 break;
1061 case TCG_BSWAP_OS:
1062 mask = (int32_t)mask;
1063 break;
1064 default: /* undefined high bits */
1065 mask |= MAKE_64BIT_MASK(32, 32);
1066 break;
1067 }
1068 break;
1069
3a9d8b17
PB
1070 default:
1071 break;
1072 }
1073
bc8d688f
RH
1074 /* 32-bit ops generate 32-bit results. For the result is zero test
1075 below, we can ignore high bits, but for further optimizations we
1076 need to record that the high bits contain garbage. */
24666baf 1077 partmask = mask;
bc8d688f 1078 if (!(def->flags & TCG_OPF_64BIT)) {
24666baf
RH
1079 mask |= ~(tcg_target_ulong)0xffffffffu;
1080 partmask &= 0xffffffffu;
1081 affected &= 0xffffffffu;
f096dc96
AJ
1082 }
1083
24666baf 1084 if (partmask == 0) {
eabb7b91 1085 tcg_debug_assert(nb_oargs == 1);
8fe35e04 1086 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
633f6502
PB
1087 continue;
1088 }
1089 if (affected == 0) {
eabb7b91 1090 tcg_debug_assert(nb_oargs == 1);
acd93701 1091 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
633f6502
PB
1092 continue;
1093 }
1094
56e49438 1095 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
c45cb8bb 1096 switch (opc) {
170ba88f
RH
1097 CASE_OP_32_64_VEC(and):
1098 CASE_OP_32_64_VEC(mul):
03271524
RH
1099 CASE_OP_32_64(muluh):
1100 CASE_OP_32_64(mulsh):
6349039d
RH
1101 if (arg_is_const(op->args[2])
1102 && arg_info(op->args[2])->val == 0) {
8fe35e04 1103 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
53108fb5
KB
1104 continue;
1105 }
1106 break;
56e49438
AJ
1107 default:
1108 break;
1109 }
1110
1111 /* Simplify expression for "op r, a, a => mov r, a" cases */
c45cb8bb 1112 switch (opc) {
170ba88f
RH
1113 CASE_OP_32_64_VEC(or):
1114 CASE_OP_32_64_VEC(and):
6349039d 1115 if (args_are_copies(op->args[1], op->args[2])) {
acd93701 1116 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
9a81090b
KB
1117 continue;
1118 }
1119 break;
fe0de7aa
BS
1120 default:
1121 break;
53108fb5
KB
1122 }
1123
3c94193e 1124 /* Simplify expression for "op r, a, a => movi r, 0" cases */
c45cb8bb 1125 switch (opc) {
170ba88f
RH
1126 CASE_OP_32_64_VEC(andc):
1127 CASE_OP_32_64_VEC(sub):
1128 CASE_OP_32_64_VEC(xor):
6349039d 1129 if (args_are_copies(op->args[1], op->args[2])) {
8fe35e04 1130 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
3c94193e
AJ
1131 continue;
1132 }
1133 break;
1134 default:
1135 break;
1136 }
1137
22613af4
KB
1138 /* Propagate constants through copy operations and do constant
1139 folding. Constants will be substituted to arguments by register
1140 allocator where needed and possible. Also detect copies. */
c45cb8bb 1141 switch (opc) {
170ba88f 1142 CASE_OP_32_64_VEC(mov):
acd93701 1143 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
97a79eb7 1144 break;
6e14e91b 1145
170ba88f
RH
1146 case INDEX_op_dup_vec:
1147 if (arg_is_const(op->args[1])) {
1148 tmp = arg_info(op->args[1])->val;
1149 tmp = dup_const(TCGOP_VECE(op), tmp);
8fe35e04 1150 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
1fb57da7 1151 break;
170ba88f 1152 }
1fb57da7 1153 goto do_default;
170ba88f 1154
1dc4fe70
RH
1155 case INDEX_op_dup2_vec:
1156 assert(TCG_TARGET_REG_BITS == 32);
1157 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
0b4286dd
RH
1158 tcg_opt_gen_movi(s, &temps_used, op, op->args[0],
1159 deposit64(arg_info(op->args[1])->val, 32, 32,
1160 arg_info(op->args[2])->val));
1161 break;
1dc4fe70
RH
1162 } else if (args_are_copies(op->args[1], op->args[2])) {
1163 op->opc = INDEX_op_dup_vec;
1164 TCGOP_VECE(op) = MO_32;
1165 nb_iargs = 1;
1166 }
1167 goto do_default;
1168
a640f031 1169 CASE_OP_32_64(not):
cb25c80a 1170 CASE_OP_32_64(neg):
25c4d9cc
RH
1171 CASE_OP_32_64(ext8s):
1172 CASE_OP_32_64(ext8u):
1173 CASE_OP_32_64(ext16s):
1174 CASE_OP_32_64(ext16u):
a768e4e9 1175 CASE_OP_32_64(ctpop):
a640f031
KB
1176 case INDEX_op_ext32s_i64:
1177 case INDEX_op_ext32u_i64:
8bcb5c8f
AJ
1178 case INDEX_op_ext_i32_i64:
1179 case INDEX_op_extu_i32_i64:
609ad705
RH
1180 case INDEX_op_extrl_i64_i32:
1181 case INDEX_op_extrh_i64_i32:
6349039d
RH
1182 if (arg_is_const(op->args[1])) {
1183 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
8fe35e04 1184 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
6e14e91b 1185 break;
a640f031 1186 }
6e14e91b
RH
1187 goto do_default;
1188
0b76ff8f
RH
1189 CASE_OP_32_64(bswap16):
1190 CASE_OP_32_64(bswap32):
1191 case INDEX_op_bswap64_i64:
1192 if (arg_is_const(op->args[1])) {
1193 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1194 op->args[2]);
1195 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
1196 break;
1197 }
1198 goto do_default;
1199
53108fb5
KB
1200 CASE_OP_32_64(add):
1201 CASE_OP_32_64(sub):
1202 CASE_OP_32_64(mul):
9a81090b
KB
1203 CASE_OP_32_64(or):
1204 CASE_OP_32_64(and):
1205 CASE_OP_32_64(xor):
55c0975c
KB
1206 CASE_OP_32_64(shl):
1207 CASE_OP_32_64(shr):
1208 CASE_OP_32_64(sar):
25c4d9cc
RH
1209 CASE_OP_32_64(rotl):
1210 CASE_OP_32_64(rotr):
cb25c80a
RH
1211 CASE_OP_32_64(andc):
1212 CASE_OP_32_64(orc):
1213 CASE_OP_32_64(eqv):
1214 CASE_OP_32_64(nand):
1215 CASE_OP_32_64(nor):
03271524
RH
1216 CASE_OP_32_64(muluh):
1217 CASE_OP_32_64(mulsh):
01547f7f
RH
1218 CASE_OP_32_64(div):
1219 CASE_OP_32_64(divu):
1220 CASE_OP_32_64(rem):
1221 CASE_OP_32_64(remu):
6349039d
RH
1222 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1223 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1224 arg_info(op->args[2])->val);
8fe35e04 1225 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
6e14e91b 1226 break;
53108fb5 1227 }
6e14e91b
RH
1228 goto do_default;
1229
0e28d006
RH
1230 CASE_OP_32_64(clz):
1231 CASE_OP_32_64(ctz):
6349039d
RH
1232 if (arg_is_const(op->args[1])) {
1233 TCGArg v = arg_info(op->args[1])->val;
0e28d006
RH
1234 if (v != 0) {
1235 tmp = do_constant_folding(opc, v, 0);
8fe35e04 1236 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
0e28d006 1237 } else {
acd93701 1238 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
0e28d006
RH
1239 }
1240 break;
1241 }
1242 goto do_default;
1243
7ef55fc9 1244 CASE_OP_32_64(deposit):
6349039d
RH
1245 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1246 tmp = deposit64(arg_info(op->args[1])->val,
1247 op->args[3], op->args[4],
1248 arg_info(op->args[2])->val);
8fe35e04 1249 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
6e14e91b 1250 break;
7ef55fc9 1251 }
6e14e91b
RH
1252 goto do_default;
1253
7ec8bab3 1254 CASE_OP_32_64(extract):
6349039d
RH
1255 if (arg_is_const(op->args[1])) {
1256 tmp = extract64(arg_info(op->args[1])->val,
acd93701 1257 op->args[2], op->args[3]);
8fe35e04 1258 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
7ec8bab3
RH
1259 break;
1260 }
1261 goto do_default;
1262
1263 CASE_OP_32_64(sextract):
6349039d
RH
1264 if (arg_is_const(op->args[1])) {
1265 tmp = sextract64(arg_info(op->args[1])->val,
acd93701 1266 op->args[2], op->args[3]);
8fe35e04 1267 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
7ec8bab3
RH
1268 break;
1269 }
1270 goto do_default;
1271
fce1296f
RH
1272 CASE_OP_32_64(extract2):
1273 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
54795544
RH
1274 uint64_t v1 = arg_info(op->args[1])->val;
1275 uint64_t v2 = arg_info(op->args[2])->val;
1276 int shr = op->args[3];
fce1296f
RH
1277
1278 if (opc == INDEX_op_extract2_i64) {
54795544 1279 tmp = (v1 >> shr) | (v2 << (64 - shr));
fce1296f 1280 } else {
54795544
RH
1281 tmp = (int32_t)(((uint32_t)v1 >> shr) |
1282 ((uint32_t)v2 << (32 - shr)));
fce1296f 1283 }
8fe35e04 1284 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
fce1296f
RH
1285 break;
1286 }
1287 goto do_default;
1288
f8dd19e5 1289 CASE_OP_32_64(setcond):
acd93701
RH
1290 tmp = do_constant_folding_cond(opc, op->args[1],
1291 op->args[2], op->args[3]);
b336ceb6 1292 if (tmp != 2) {
8fe35e04 1293 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
6e14e91b 1294 break;
f8dd19e5 1295 }
6e14e91b
RH
1296 goto do_default;
1297
fbeaa26c 1298 CASE_OP_32_64(brcond):
acd93701
RH
1299 tmp = do_constant_folding_cond(opc, op->args[0],
1300 op->args[1], op->args[2]);
b336ceb6
AJ
1301 if (tmp != 2) {
1302 if (tmp) {
8fe35e04 1303 memset(&temps_used, 0, sizeof(temps_used));
c45cb8bb 1304 op->opc = INDEX_op_br;
acd93701 1305 op->args[0] = op->args[3];
fbeaa26c 1306 } else {
0c627cdc 1307 tcg_op_remove(s, op);
fbeaa26c 1308 }
6e14e91b 1309 break;
fbeaa26c 1310 }
6e14e91b
RH
1311 goto do_default;
1312
fa01a208 1313 CASE_OP_32_64(movcond):
acd93701
RH
1314 tmp = do_constant_folding_cond(opc, op->args[1],
1315 op->args[2], op->args[5]);
b336ceb6 1316 if (tmp != 2) {
acd93701 1317 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
6e14e91b 1318 break;
fa01a208 1319 }
6349039d 1320 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
54795544
RH
1321 uint64_t tv = arg_info(op->args[3])->val;
1322 uint64_t fv = arg_info(op->args[4])->val;
acd93701 1323 TCGCond cond = op->args[5];
54795544 1324
333b21b8
RH
1325 if (fv == 1 && tv == 0) {
1326 cond = tcg_invert_cond(cond);
1327 } else if (!(tv == 1 && fv == 0)) {
1328 goto do_default;
1329 }
acd93701 1330 op->args[3] = cond;
333b21b8
RH
1331 op->opc = opc = (opc == INDEX_op_movcond_i32
1332 ? INDEX_op_setcond_i32
1333 : INDEX_op_setcond_i64);
1334 nb_iargs = 2;
1335 }
6e14e91b 1336 goto do_default;
212c328d
RH
1337
1338 case INDEX_op_add2_i32:
1339 case INDEX_op_sub2_i32:
6349039d
RH
1340 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1341 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1342 uint32_t al = arg_info(op->args[2])->val;
1343 uint32_t ah = arg_info(op->args[3])->val;
1344 uint32_t bl = arg_info(op->args[4])->val;
1345 uint32_t bh = arg_info(op->args[5])->val;
212c328d
RH
1346 uint64_t a = ((uint64_t)ah << 32) | al;
1347 uint64_t b = ((uint64_t)bh << 32) | bl;
1348 TCGArg rl, rh;
8fe35e04 1349 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
212c328d 1350
c45cb8bb 1351 if (opc == INDEX_op_add2_i32) {
212c328d
RH
1352 a += b;
1353 } else {
1354 a -= b;
1355 }
1356
acd93701
RH
1357 rl = op->args[0];
1358 rh = op->args[1];
8fe35e04
RH
1359 tcg_opt_gen_movi(s, &temps_used, op, rl, (int32_t)a);
1360 tcg_opt_gen_movi(s, &temps_used, op2, rh, (int32_t)(a >> 32));
212c328d
RH
1361 break;
1362 }
1363 goto do_default;
1414968a
RH
1364
1365 case INDEX_op_mulu2_i32:
6349039d
RH
1366 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1367 uint32_t a = arg_info(op->args[2])->val;
1368 uint32_t b = arg_info(op->args[3])->val;
1414968a
RH
1369 uint64_t r = (uint64_t)a * b;
1370 TCGArg rl, rh;
8fe35e04 1371 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
1414968a 1372
acd93701
RH
1373 rl = op->args[0];
1374 rh = op->args[1];
8fe35e04
RH
1375 tcg_opt_gen_movi(s, &temps_used, op, rl, (int32_t)r);
1376 tcg_opt_gen_movi(s, &temps_used, op2, rh, (int32_t)(r >> 32));
1414968a
RH
1377 break;
1378 }
1379 goto do_default;
6e14e91b 1380
bc1473ef 1381 case INDEX_op_brcond2_i32:
acd93701
RH
1382 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1383 op->args[4]);
6c4382f8
RH
1384 if (tmp != 2) {
1385 if (tmp) {
a763551a 1386 do_brcond_true:
8fe35e04 1387 memset(&temps_used, 0, sizeof(temps_used));
c45cb8bb 1388 op->opc = INDEX_op_br;
acd93701 1389 op->args[0] = op->args[5];
6c4382f8 1390 } else {
a763551a 1391 do_brcond_false:
0c627cdc 1392 tcg_op_remove(s, op);
6c4382f8 1393 }
acd93701
RH
1394 } else if ((op->args[4] == TCG_COND_LT
1395 || op->args[4] == TCG_COND_GE)
6349039d
RH
1396 && arg_is_const(op->args[2])
1397 && arg_info(op->args[2])->val == 0
1398 && arg_is_const(op->args[3])
1399 && arg_info(op->args[3])->val == 0) {
6c4382f8
RH
1400 /* Simplify LT/GE comparisons vs zero to a single compare
1401 vs the high word of the input. */
a763551a 1402 do_brcond_high:
8fe35e04 1403 memset(&temps_used, 0, sizeof(temps_used));
c45cb8bb 1404 op->opc = INDEX_op_brcond_i32;
acd93701
RH
1405 op->args[0] = op->args[1];
1406 op->args[1] = op->args[3];
1407 op->args[2] = op->args[4];
1408 op->args[3] = op->args[5];
1409 } else if (op->args[4] == TCG_COND_EQ) {
a763551a
RH
1410 /* Simplify EQ comparisons where one of the pairs
1411 can be simplified. */
1412 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
acd93701
RH
1413 op->args[0], op->args[2],
1414 TCG_COND_EQ);
a763551a
RH
1415 if (tmp == 0) {
1416 goto do_brcond_false;
1417 } else if (tmp == 1) {
1418 goto do_brcond_high;
1419 }
1420 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
acd93701
RH
1421 op->args[1], op->args[3],
1422 TCG_COND_EQ);
a763551a
RH
1423 if (tmp == 0) {
1424 goto do_brcond_false;
1425 } else if (tmp != 1) {
1426 goto do_default;
1427 }
1428 do_brcond_low:
8fe35e04 1429 memset(&temps_used, 0, sizeof(temps_used));
c45cb8bb 1430 op->opc = INDEX_op_brcond_i32;
acd93701
RH
1431 op->args[1] = op->args[2];
1432 op->args[2] = op->args[4];
1433 op->args[3] = op->args[5];
1434 } else if (op->args[4] == TCG_COND_NE) {
a763551a
RH
1435 /* Simplify NE comparisons where one of the pairs
1436 can be simplified. */
1437 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
acd93701
RH
1438 op->args[0], op->args[2],
1439 TCG_COND_NE);
a763551a
RH
1440 if (tmp == 0) {
1441 goto do_brcond_high;
1442 } else if (tmp == 1) {
1443 goto do_brcond_true;
1444 }
1445 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
acd93701
RH
1446 op->args[1], op->args[3],
1447 TCG_COND_NE);
a763551a
RH
1448 if (tmp == 0) {
1449 goto do_brcond_low;
1450 } else if (tmp == 1) {
1451 goto do_brcond_true;
1452 }
1453 goto do_default;
6c4382f8
RH
1454 } else {
1455 goto do_default;
bc1473ef 1456 }
6c4382f8 1457 break;
bc1473ef
RH
1458
1459 case INDEX_op_setcond2_i32:
acd93701
RH
1460 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1461 op->args[5]);
6c4382f8 1462 if (tmp != 2) {
a763551a 1463 do_setcond_const:
8fe35e04 1464 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
acd93701
RH
1465 } else if ((op->args[5] == TCG_COND_LT
1466 || op->args[5] == TCG_COND_GE)
6349039d
RH
1467 && arg_is_const(op->args[3])
1468 && arg_info(op->args[3])->val == 0
1469 && arg_is_const(op->args[4])
1470 && arg_info(op->args[4])->val == 0) {
6c4382f8
RH
1471 /* Simplify LT/GE comparisons vs zero to a single compare
1472 vs the high word of the input. */
a763551a 1473 do_setcond_high:
acd93701 1474 reset_temp(op->args[0]);
6349039d 1475 arg_info(op->args[0])->mask = 1;
c45cb8bb 1476 op->opc = INDEX_op_setcond_i32;
acd93701
RH
1477 op->args[1] = op->args[2];
1478 op->args[2] = op->args[4];
1479 op->args[3] = op->args[5];
1480 } else if (op->args[5] == TCG_COND_EQ) {
a763551a
RH
1481 /* Simplify EQ comparisons where one of the pairs
1482 can be simplified. */
1483 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
acd93701
RH
1484 op->args[1], op->args[3],
1485 TCG_COND_EQ);
a763551a
RH
1486 if (tmp == 0) {
1487 goto do_setcond_const;
1488 } else if (tmp == 1) {
1489 goto do_setcond_high;
1490 }
1491 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
acd93701
RH
1492 op->args[2], op->args[4],
1493 TCG_COND_EQ);
a763551a
RH
1494 if (tmp == 0) {
1495 goto do_setcond_high;
1496 } else if (tmp != 1) {
1497 goto do_default;
1498 }
1499 do_setcond_low:
acd93701 1500 reset_temp(op->args[0]);
6349039d 1501 arg_info(op->args[0])->mask = 1;
c45cb8bb 1502 op->opc = INDEX_op_setcond_i32;
acd93701
RH
1503 op->args[2] = op->args[3];
1504 op->args[3] = op->args[5];
1505 } else if (op->args[5] == TCG_COND_NE) {
a763551a
RH
1506 /* Simplify NE comparisons where one of the pairs
1507 can be simplified. */
1508 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
acd93701
RH
1509 op->args[1], op->args[3],
1510 TCG_COND_NE);
a763551a
RH
1511 if (tmp == 0) {
1512 goto do_setcond_high;
1513 } else if (tmp == 1) {
1514 goto do_setcond_const;
1515 }
1516 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
acd93701
RH
1517 op->args[2], op->args[4],
1518 TCG_COND_NE);
a763551a
RH
1519 if (tmp == 0) {
1520 goto do_setcond_low;
1521 } else if (tmp == 1) {
1522 goto do_setcond_const;
1523 }
1524 goto do_default;
6c4382f8
RH
1525 } else {
1526 goto do_default;
bc1473ef 1527 }
6c4382f8 1528 break;
bc1473ef 1529
8f2e8c07 1530 case INDEX_op_call:
90163900 1531 if (!(tcg_call_flags(op)
cf066674 1532 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
22613af4 1533 for (i = 0; i < nb_globals; i++) {
1208d7dd 1534 if (test_bit(i, temps_used.l)) {
6349039d 1535 reset_ts(&s->temps[i]);
1208d7dd 1536 }
22613af4
KB
1537 }
1538 }
c56caea3 1539 goto do_reset_output;
6e14e91b 1540
8f2e8c07 1541 default:
6e14e91b 1542 do_default:
c56caea3
RH
1543 /* Default case: we know nothing about operation (or were unable
1544 to compute the operation result) so no propagation is done.
1545 We trash everything if the operation is the end of a basic
1546 block, otherwise we only trash the output args. "mask" is
1547 the non-zero bits mask for the first output arg. */
1548 if (def->flags & TCG_OPF_BB_END) {
8fe35e04 1549 memset(&temps_used, 0, sizeof(temps_used));
c56caea3
RH
1550 } else {
1551 do_reset_output:
1552 for (i = 0; i < nb_oargs; i++) {
1553 reset_temp(op->args[i]);
1554 /* Save the corresponding known-zero bits mask for the
1555 first output argument (only one supported so far). */
1556 if (i == 0) {
1557 arg_info(op->args[i])->mask = mask;
1558 }
a2550660 1559 }
22613af4 1560 }
8f2e8c07
KB
1561 break;
1562 }
34f93921
PK
1563
1564 /* Eliminate duplicate and redundant fence instructions. */
acd93701 1565 if (prev_mb) {
34f93921
PK
1566 switch (opc) {
1567 case INDEX_op_mb:
1568 /* Merge two barriers of the same type into one,
1569 * or a weaker barrier into a stronger one,
1570 * or two weaker barriers into a stronger one.
1571 * mb X; mb Y => mb X|Y
1572 * mb; strl => mb; st
1573 * ldaq; mb => ld; mb
1574 * ldaq; strl => ld; mb; st
1575 * Other combinations are also merged into a strong
1576 * barrier. This is stricter than specified but for
1577 * the purposes of TCG is better than not optimizing.
1578 */
acd93701 1579 prev_mb->args[0] |= op->args[0];
34f93921
PK
1580 tcg_op_remove(s, op);
1581 break;
1582
1583 default:
1584 /* Opcodes that end the block stop the optimization. */
1585 if ((def->flags & TCG_OPF_BB_END) == 0) {
1586 break;
1587 }
1588 /* fallthru */
1589 case INDEX_op_qemu_ld_i32:
1590 case INDEX_op_qemu_ld_i64:
1591 case INDEX_op_qemu_st_i32:
07ce0b05 1592 case INDEX_op_qemu_st8_i32:
34f93921
PK
1593 case INDEX_op_qemu_st_i64:
1594 case INDEX_op_call:
1595 /* Opcodes that touch guest memory stop the optimization. */
acd93701 1596 prev_mb = NULL;
34f93921
PK
1597 break;
1598 }
1599 } else if (opc == INDEX_op_mb) {
acd93701 1600 prev_mb = op;
34f93921 1601 }
8f2e8c07 1602 }
8f2e8c07 1603}
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