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1 | /* |
2 | * Optimizations for Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2010 Samsung Electronics. | |
5 | * Contributed by Kirill Batuzov <[email protected]> | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
26 | #include "config.h" | |
27 | ||
28 | #include <stdlib.h> | |
29 | #include <stdio.h> | |
30 | ||
31 | #include "qemu-common.h" | |
32 | #include "tcg-op.h" | |
33 | ||
8f2e8c07 KB |
34 | #define CASE_OP_32_64(x) \ |
35 | glue(glue(case INDEX_op_, x), _i32): \ | |
36 | glue(glue(case INDEX_op_, x), _i64) | |
8f2e8c07 | 37 | |
22613af4 KB |
38 | typedef enum { |
39 | TCG_TEMP_UNDEF = 0, | |
40 | TCG_TEMP_CONST, | |
41 | TCG_TEMP_COPY, | |
22613af4 KB |
42 | } tcg_temp_state; |
43 | ||
44 | struct tcg_temp_info { | |
45 | tcg_temp_state state; | |
46 | uint16_t prev_copy; | |
47 | uint16_t next_copy; | |
48 | tcg_target_ulong val; | |
3a9d8b17 | 49 | tcg_target_ulong mask; |
22613af4 KB |
50 | }; |
51 | ||
52 | static struct tcg_temp_info temps[TCG_MAX_TEMPS]; | |
53 | ||
e590d4e6 AJ |
54 | /* Reset TEMP's state to TCG_TEMP_UNDEF. If TEMP only had one copy, remove |
55 | the copy flag from the left temp. */ | |
56 | static void reset_temp(TCGArg temp) | |
22613af4 | 57 | { |
e590d4e6 AJ |
58 | if (temps[temp].state == TCG_TEMP_COPY) { |
59 | if (temps[temp].prev_copy == temps[temp].next_copy) { | |
60 | temps[temps[temp].next_copy].state = TCG_TEMP_UNDEF; | |
61 | } else { | |
62 | temps[temps[temp].next_copy].prev_copy = temps[temp].prev_copy; | |
63 | temps[temps[temp].prev_copy].next_copy = temps[temp].next_copy; | |
22613af4 | 64 | } |
22613af4 | 65 | } |
48b56ce1 | 66 | temps[temp].state = TCG_TEMP_UNDEF; |
3a9d8b17 | 67 | temps[temp].mask = -1; |
22613af4 KB |
68 | } |
69 | ||
d193a14a PB |
70 | /* Reset all temporaries, given that there are NB_TEMPS of them. */ |
71 | static void reset_all_temps(int nb_temps) | |
72 | { | |
73 | int i; | |
74 | for (i = 0; i < nb_temps; i++) { | |
75 | temps[i].state = TCG_TEMP_UNDEF; | |
3a9d8b17 | 76 | temps[i].mask = -1; |
d193a14a PB |
77 | } |
78 | } | |
79 | ||
fe0de7aa | 80 | static int op_bits(TCGOpcode op) |
22613af4 | 81 | { |
8399ad59 RH |
82 | const TCGOpDef *def = &tcg_op_defs[op]; |
83 | return def->flags & TCG_OPF_64BIT ? 64 : 32; | |
22613af4 KB |
84 | } |
85 | ||
fe0de7aa | 86 | static TCGOpcode op_to_movi(TCGOpcode op) |
22613af4 KB |
87 | { |
88 | switch (op_bits(op)) { | |
89 | case 32: | |
90 | return INDEX_op_movi_i32; | |
22613af4 KB |
91 | case 64: |
92 | return INDEX_op_movi_i64; | |
22613af4 KB |
93 | default: |
94 | fprintf(stderr, "op_to_movi: unexpected return value of " | |
95 | "function op_bits.\n"); | |
96 | tcg_abort(); | |
97 | } | |
98 | } | |
99 | ||
e590d4e6 AJ |
100 | static TCGArg find_better_copy(TCGContext *s, TCGArg temp) |
101 | { | |
102 | TCGArg i; | |
103 | ||
104 | /* If this is already a global, we can't do better. */ | |
105 | if (temp < s->nb_globals) { | |
106 | return temp; | |
107 | } | |
108 | ||
109 | /* Search for a global first. */ | |
110 | for (i = temps[temp].next_copy ; i != temp ; i = temps[i].next_copy) { | |
111 | if (i < s->nb_globals) { | |
112 | return i; | |
113 | } | |
114 | } | |
115 | ||
116 | /* If it is a temp, search for a temp local. */ | |
117 | if (!s->temps[temp].temp_local) { | |
118 | for (i = temps[temp].next_copy ; i != temp ; i = temps[i].next_copy) { | |
119 | if (s->temps[i].temp_local) { | |
120 | return i; | |
121 | } | |
122 | } | |
123 | } | |
124 | ||
125 | /* Failure to find a better representation, return the same temp. */ | |
126 | return temp; | |
127 | } | |
128 | ||
129 | static bool temps_are_copies(TCGArg arg1, TCGArg arg2) | |
130 | { | |
131 | TCGArg i; | |
132 | ||
133 | if (arg1 == arg2) { | |
134 | return true; | |
135 | } | |
136 | ||
137 | if (temps[arg1].state != TCG_TEMP_COPY | |
138 | || temps[arg2].state != TCG_TEMP_COPY) { | |
139 | return false; | |
140 | } | |
141 | ||
142 | for (i = temps[arg1].next_copy ; i != arg1 ; i = temps[i].next_copy) { | |
143 | if (i == arg2) { | |
144 | return true; | |
145 | } | |
146 | } | |
147 | ||
148 | return false; | |
149 | } | |
150 | ||
b80bb016 AJ |
151 | static void tcg_opt_gen_mov(TCGContext *s, TCGArg *gen_args, |
152 | TCGArg dst, TCGArg src) | |
22613af4 | 153 | { |
3a9d8b17 PB |
154 | reset_temp(dst); |
155 | temps[dst].mask = temps[src].mask; | |
156 | assert(temps[src].state != TCG_TEMP_CONST); | |
157 | ||
158 | if (s->temps[src].type == s->temps[dst].type) { | |
159 | if (temps[src].state != TCG_TEMP_COPY) { | |
160 | temps[src].state = TCG_TEMP_COPY; | |
161 | temps[src].next_copy = src; | |
162 | temps[src].prev_copy = src; | |
22613af4 | 163 | } |
3a9d8b17 PB |
164 | temps[dst].state = TCG_TEMP_COPY; |
165 | temps[dst].next_copy = temps[src].next_copy; | |
166 | temps[dst].prev_copy = src; | |
167 | temps[temps[dst].next_copy].prev_copy = dst; | |
168 | temps[src].next_copy = dst; | |
169 | } | |
e590d4e6 | 170 | |
3a9d8b17 PB |
171 | gen_args[0] = dst; |
172 | gen_args[1] = src; | |
22613af4 KB |
173 | } |
174 | ||
e590d4e6 | 175 | static void tcg_opt_gen_movi(TCGArg *gen_args, TCGArg dst, TCGArg val) |
22613af4 | 176 | { |
3a9d8b17 PB |
177 | reset_temp(dst); |
178 | temps[dst].state = TCG_TEMP_CONST; | |
179 | temps[dst].val = val; | |
180 | temps[dst].mask = val; | |
181 | gen_args[0] = dst; | |
182 | gen_args[1] = val; | |
22613af4 KB |
183 | } |
184 | ||
fe0de7aa | 185 | static TCGOpcode op_to_mov(TCGOpcode op) |
53108fb5 KB |
186 | { |
187 | switch (op_bits(op)) { | |
188 | case 32: | |
189 | return INDEX_op_mov_i32; | |
53108fb5 KB |
190 | case 64: |
191 | return INDEX_op_mov_i64; | |
53108fb5 KB |
192 | default: |
193 | fprintf(stderr, "op_to_mov: unexpected return value of " | |
194 | "function op_bits.\n"); | |
195 | tcg_abort(); | |
196 | } | |
197 | } | |
198 | ||
fe0de7aa | 199 | static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) |
53108fb5 | 200 | { |
03271524 RH |
201 | uint64_t l64, h64; |
202 | ||
53108fb5 KB |
203 | switch (op) { |
204 | CASE_OP_32_64(add): | |
205 | return x + y; | |
206 | ||
207 | CASE_OP_32_64(sub): | |
208 | return x - y; | |
209 | ||
210 | CASE_OP_32_64(mul): | |
211 | return x * y; | |
212 | ||
9a81090b KB |
213 | CASE_OP_32_64(and): |
214 | return x & y; | |
215 | ||
216 | CASE_OP_32_64(or): | |
217 | return x | y; | |
218 | ||
219 | CASE_OP_32_64(xor): | |
220 | return x ^ y; | |
221 | ||
55c0975c KB |
222 | case INDEX_op_shl_i32: |
223 | return (uint32_t)x << (uint32_t)y; | |
224 | ||
55c0975c KB |
225 | case INDEX_op_shl_i64: |
226 | return (uint64_t)x << (uint64_t)y; | |
55c0975c KB |
227 | |
228 | case INDEX_op_shr_i32: | |
229 | return (uint32_t)x >> (uint32_t)y; | |
230 | ||
55c0975c KB |
231 | case INDEX_op_shr_i64: |
232 | return (uint64_t)x >> (uint64_t)y; | |
55c0975c KB |
233 | |
234 | case INDEX_op_sar_i32: | |
235 | return (int32_t)x >> (int32_t)y; | |
236 | ||
55c0975c KB |
237 | case INDEX_op_sar_i64: |
238 | return (int64_t)x >> (int64_t)y; | |
55c0975c KB |
239 | |
240 | case INDEX_op_rotr_i32: | |
3df2b8fd | 241 | return ror32(x, y); |
55c0975c | 242 | |
55c0975c | 243 | case INDEX_op_rotr_i64: |
3df2b8fd | 244 | return ror64(x, y); |
55c0975c KB |
245 | |
246 | case INDEX_op_rotl_i32: | |
3df2b8fd | 247 | return rol32(x, y); |
55c0975c | 248 | |
55c0975c | 249 | case INDEX_op_rotl_i64: |
3df2b8fd | 250 | return rol64(x, y); |
25c4d9cc RH |
251 | |
252 | CASE_OP_32_64(not): | |
a640f031 | 253 | return ~x; |
25c4d9cc | 254 | |
cb25c80a RH |
255 | CASE_OP_32_64(neg): |
256 | return -x; | |
257 | ||
258 | CASE_OP_32_64(andc): | |
259 | return x & ~y; | |
260 | ||
261 | CASE_OP_32_64(orc): | |
262 | return x | ~y; | |
263 | ||
264 | CASE_OP_32_64(eqv): | |
265 | return ~(x ^ y); | |
266 | ||
267 | CASE_OP_32_64(nand): | |
268 | return ~(x & y); | |
269 | ||
270 | CASE_OP_32_64(nor): | |
271 | return ~(x | y); | |
272 | ||
25c4d9cc | 273 | CASE_OP_32_64(ext8s): |
a640f031 | 274 | return (int8_t)x; |
25c4d9cc RH |
275 | |
276 | CASE_OP_32_64(ext16s): | |
a640f031 | 277 | return (int16_t)x; |
25c4d9cc RH |
278 | |
279 | CASE_OP_32_64(ext8u): | |
a640f031 | 280 | return (uint8_t)x; |
25c4d9cc RH |
281 | |
282 | CASE_OP_32_64(ext16u): | |
a640f031 KB |
283 | return (uint16_t)x; |
284 | ||
a640f031 KB |
285 | case INDEX_op_ext32s_i64: |
286 | return (int32_t)x; | |
287 | ||
288 | case INDEX_op_ext32u_i64: | |
289 | return (uint32_t)x; | |
a640f031 | 290 | |
03271524 RH |
291 | case INDEX_op_muluh_i32: |
292 | return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32; | |
293 | case INDEX_op_mulsh_i32: | |
294 | return ((int64_t)(int32_t)x * (int32_t)y) >> 32; | |
295 | ||
296 | case INDEX_op_muluh_i64: | |
297 | mulu64(&l64, &h64, x, y); | |
298 | return h64; | |
299 | case INDEX_op_mulsh_i64: | |
300 | muls64(&l64, &h64, x, y); | |
301 | return h64; | |
302 | ||
01547f7f RH |
303 | case INDEX_op_div_i32: |
304 | /* Avoid crashing on divide by zero, otherwise undefined. */ | |
305 | return (int32_t)x / ((int32_t)y ? : 1); | |
306 | case INDEX_op_divu_i32: | |
307 | return (uint32_t)x / ((uint32_t)y ? : 1); | |
308 | case INDEX_op_div_i64: | |
309 | return (int64_t)x / ((int64_t)y ? : 1); | |
310 | case INDEX_op_divu_i64: | |
311 | return (uint64_t)x / ((uint64_t)y ? : 1); | |
312 | ||
313 | case INDEX_op_rem_i32: | |
314 | return (int32_t)x % ((int32_t)y ? : 1); | |
315 | case INDEX_op_remu_i32: | |
316 | return (uint32_t)x % ((uint32_t)y ? : 1); | |
317 | case INDEX_op_rem_i64: | |
318 | return (int64_t)x % ((int64_t)y ? : 1); | |
319 | case INDEX_op_remu_i64: | |
320 | return (uint64_t)x % ((uint64_t)y ? : 1); | |
321 | ||
53108fb5 KB |
322 | default: |
323 | fprintf(stderr, | |
324 | "Unrecognized operation %d in do_constant_folding.\n", op); | |
325 | tcg_abort(); | |
326 | } | |
327 | } | |
328 | ||
fe0de7aa | 329 | static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y) |
53108fb5 KB |
330 | { |
331 | TCGArg res = do_constant_folding_2(op, x, y); | |
53108fb5 KB |
332 | if (op_bits(op) == 32) { |
333 | res &= 0xffffffff; | |
334 | } | |
53108fb5 KB |
335 | return res; |
336 | } | |
337 | ||
9519da7e RH |
338 | static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c) |
339 | { | |
340 | switch (c) { | |
341 | case TCG_COND_EQ: | |
342 | return x == y; | |
343 | case TCG_COND_NE: | |
344 | return x != y; | |
345 | case TCG_COND_LT: | |
346 | return (int32_t)x < (int32_t)y; | |
347 | case TCG_COND_GE: | |
348 | return (int32_t)x >= (int32_t)y; | |
349 | case TCG_COND_LE: | |
350 | return (int32_t)x <= (int32_t)y; | |
351 | case TCG_COND_GT: | |
352 | return (int32_t)x > (int32_t)y; | |
353 | case TCG_COND_LTU: | |
354 | return x < y; | |
355 | case TCG_COND_GEU: | |
356 | return x >= y; | |
357 | case TCG_COND_LEU: | |
358 | return x <= y; | |
359 | case TCG_COND_GTU: | |
360 | return x > y; | |
361 | default: | |
362 | tcg_abort(); | |
363 | } | |
364 | } | |
365 | ||
366 | static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c) | |
367 | { | |
368 | switch (c) { | |
369 | case TCG_COND_EQ: | |
370 | return x == y; | |
371 | case TCG_COND_NE: | |
372 | return x != y; | |
373 | case TCG_COND_LT: | |
374 | return (int64_t)x < (int64_t)y; | |
375 | case TCG_COND_GE: | |
376 | return (int64_t)x >= (int64_t)y; | |
377 | case TCG_COND_LE: | |
378 | return (int64_t)x <= (int64_t)y; | |
379 | case TCG_COND_GT: | |
380 | return (int64_t)x > (int64_t)y; | |
381 | case TCG_COND_LTU: | |
382 | return x < y; | |
383 | case TCG_COND_GEU: | |
384 | return x >= y; | |
385 | case TCG_COND_LEU: | |
386 | return x <= y; | |
387 | case TCG_COND_GTU: | |
388 | return x > y; | |
389 | default: | |
390 | tcg_abort(); | |
391 | } | |
392 | } | |
393 | ||
394 | static bool do_constant_folding_cond_eq(TCGCond c) | |
395 | { | |
396 | switch (c) { | |
397 | case TCG_COND_GT: | |
398 | case TCG_COND_LTU: | |
399 | case TCG_COND_LT: | |
400 | case TCG_COND_GTU: | |
401 | case TCG_COND_NE: | |
402 | return 0; | |
403 | case TCG_COND_GE: | |
404 | case TCG_COND_GEU: | |
405 | case TCG_COND_LE: | |
406 | case TCG_COND_LEU: | |
407 | case TCG_COND_EQ: | |
408 | return 1; | |
409 | default: | |
410 | tcg_abort(); | |
411 | } | |
412 | } | |
413 | ||
b336ceb6 AJ |
414 | /* Return 2 if the condition can't be simplified, and the result |
415 | of the condition (0 or 1) if it can */ | |
f8dd19e5 AJ |
416 | static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x, |
417 | TCGArg y, TCGCond c) | |
418 | { | |
b336ceb6 AJ |
419 | if (temps[x].state == TCG_TEMP_CONST && temps[y].state == TCG_TEMP_CONST) { |
420 | switch (op_bits(op)) { | |
421 | case 32: | |
9519da7e | 422 | return do_constant_folding_cond_32(temps[x].val, temps[y].val, c); |
b336ceb6 | 423 | case 64: |
9519da7e | 424 | return do_constant_folding_cond_64(temps[x].val, temps[y].val, c); |
0aed257f | 425 | default: |
9519da7e | 426 | tcg_abort(); |
b336ceb6 | 427 | } |
9519da7e RH |
428 | } else if (temps_are_copies(x, y)) { |
429 | return do_constant_folding_cond_eq(c); | |
b336ceb6 AJ |
430 | } else if (temps[y].state == TCG_TEMP_CONST && temps[y].val == 0) { |
431 | switch (c) { | |
f8dd19e5 | 432 | case TCG_COND_LTU: |
b336ceb6 | 433 | return 0; |
f8dd19e5 | 434 | case TCG_COND_GEU: |
b336ceb6 AJ |
435 | return 1; |
436 | default: | |
437 | return 2; | |
f8dd19e5 | 438 | } |
b336ceb6 AJ |
439 | } else { |
440 | return 2; | |
f8dd19e5 | 441 | } |
f8dd19e5 AJ |
442 | } |
443 | ||
6c4382f8 RH |
444 | /* Return 2 if the condition can't be simplified, and the result |
445 | of the condition (0 or 1) if it can */ | |
446 | static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c) | |
447 | { | |
448 | TCGArg al = p1[0], ah = p1[1]; | |
449 | TCGArg bl = p2[0], bh = p2[1]; | |
450 | ||
451 | if (temps[bl].state == TCG_TEMP_CONST | |
452 | && temps[bh].state == TCG_TEMP_CONST) { | |
453 | uint64_t b = ((uint64_t)temps[bh].val << 32) | (uint32_t)temps[bl].val; | |
454 | ||
455 | if (temps[al].state == TCG_TEMP_CONST | |
456 | && temps[ah].state == TCG_TEMP_CONST) { | |
457 | uint64_t a; | |
458 | a = ((uint64_t)temps[ah].val << 32) | (uint32_t)temps[al].val; | |
459 | return do_constant_folding_cond_64(a, b, c); | |
460 | } | |
461 | if (b == 0) { | |
462 | switch (c) { | |
463 | case TCG_COND_LTU: | |
464 | return 0; | |
465 | case TCG_COND_GEU: | |
466 | return 1; | |
467 | default: | |
468 | break; | |
469 | } | |
470 | } | |
471 | } | |
472 | if (temps_are_copies(al, bl) && temps_are_copies(ah, bh)) { | |
473 | return do_constant_folding_cond_eq(c); | |
474 | } | |
475 | return 2; | |
476 | } | |
477 | ||
24c9ae4e RH |
478 | static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2) |
479 | { | |
480 | TCGArg a1 = *p1, a2 = *p2; | |
481 | int sum = 0; | |
482 | sum += temps[a1].state == TCG_TEMP_CONST; | |
483 | sum -= temps[a2].state == TCG_TEMP_CONST; | |
484 | ||
485 | /* Prefer the constant in second argument, and then the form | |
486 | op a, a, b, which is better handled on non-RISC hosts. */ | |
487 | if (sum > 0 || (sum == 0 && dest == a2)) { | |
488 | *p1 = a2; | |
489 | *p2 = a1; | |
490 | return true; | |
491 | } | |
492 | return false; | |
493 | } | |
494 | ||
0bfcb865 RH |
495 | static bool swap_commutative2(TCGArg *p1, TCGArg *p2) |
496 | { | |
497 | int sum = 0; | |
498 | sum += temps[p1[0]].state == TCG_TEMP_CONST; | |
499 | sum += temps[p1[1]].state == TCG_TEMP_CONST; | |
500 | sum -= temps[p2[0]].state == TCG_TEMP_CONST; | |
501 | sum -= temps[p2[1]].state == TCG_TEMP_CONST; | |
502 | if (sum > 0) { | |
503 | TCGArg t; | |
504 | t = p1[0], p1[0] = p2[0], p2[0] = t; | |
505 | t = p1[1], p1[1] = p2[1], p2[1] = t; | |
506 | return true; | |
507 | } | |
508 | return false; | |
509 | } | |
510 | ||
22613af4 | 511 | /* Propagate constants and copies, fold constant expressions. */ |
8f2e8c07 KB |
512 | static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, |
513 | TCGArg *args, TCGOpDef *tcg_op_defs) | |
514 | { | |
fe0de7aa | 515 | int i, nb_ops, op_index, nb_temps, nb_globals, nb_call_args; |
633f6502 | 516 | tcg_target_ulong mask, affected; |
fe0de7aa | 517 | TCGOpcode op; |
8f2e8c07 KB |
518 | const TCGOpDef *def; |
519 | TCGArg *gen_args; | |
53108fb5 | 520 | TCGArg tmp; |
5d8f5363 | 521 | |
22613af4 KB |
522 | /* Array VALS has an element for each temp. |
523 | If this temp holds a constant then its value is kept in VALS' element. | |
e590d4e6 AJ |
524 | If this temp is a copy of other ones then the other copies are |
525 | available through the doubly linked circular list. */ | |
8f2e8c07 KB |
526 | |
527 | nb_temps = s->nb_temps; | |
528 | nb_globals = s->nb_globals; | |
d193a14a | 529 | reset_all_temps(nb_temps); |
8f2e8c07 | 530 | |
92414b31 | 531 | nb_ops = tcg_opc_ptr - s->gen_opc_buf; |
8f2e8c07 KB |
532 | gen_args = args; |
533 | for (op_index = 0; op_index < nb_ops; op_index++) { | |
92414b31 | 534 | op = s->gen_opc_buf[op_index]; |
8f2e8c07 | 535 | def = &tcg_op_defs[op]; |
22613af4 | 536 | /* Do copy propagation */ |
1ff8c541 AJ |
537 | if (op == INDEX_op_call) { |
538 | int nb_oargs = args[0] >> 16; | |
539 | int nb_iargs = args[0] & 0xffff; | |
540 | for (i = nb_oargs + 1; i < nb_oargs + nb_iargs + 1; i++) { | |
541 | if (temps[args[i]].state == TCG_TEMP_COPY) { | |
542 | args[i] = find_better_copy(s, args[i]); | |
543 | } | |
544 | } | |
545 | } else { | |
22613af4 KB |
546 | for (i = def->nb_oargs; i < def->nb_oargs + def->nb_iargs; i++) { |
547 | if (temps[args[i]].state == TCG_TEMP_COPY) { | |
e590d4e6 | 548 | args[i] = find_better_copy(s, args[i]); |
22613af4 KB |
549 | } |
550 | } | |
551 | } | |
552 | ||
53108fb5 KB |
553 | /* For commutative operations make constant second argument */ |
554 | switch (op) { | |
555 | CASE_OP_32_64(add): | |
556 | CASE_OP_32_64(mul): | |
9a81090b KB |
557 | CASE_OP_32_64(and): |
558 | CASE_OP_32_64(or): | |
559 | CASE_OP_32_64(xor): | |
cb25c80a RH |
560 | CASE_OP_32_64(eqv): |
561 | CASE_OP_32_64(nand): | |
562 | CASE_OP_32_64(nor): | |
03271524 RH |
563 | CASE_OP_32_64(muluh): |
564 | CASE_OP_32_64(mulsh): | |
24c9ae4e | 565 | swap_commutative(args[0], &args[1], &args[2]); |
53108fb5 | 566 | break; |
65a7cce1 | 567 | CASE_OP_32_64(brcond): |
24c9ae4e | 568 | if (swap_commutative(-1, &args[0], &args[1])) { |
65a7cce1 AJ |
569 | args[2] = tcg_swap_cond(args[2]); |
570 | } | |
571 | break; | |
572 | CASE_OP_32_64(setcond): | |
24c9ae4e | 573 | if (swap_commutative(args[0], &args[1], &args[2])) { |
65a7cce1 AJ |
574 | args[3] = tcg_swap_cond(args[3]); |
575 | } | |
576 | break; | |
fa01a208 | 577 | CASE_OP_32_64(movcond): |
24c9ae4e RH |
578 | if (swap_commutative(-1, &args[1], &args[2])) { |
579 | args[5] = tcg_swap_cond(args[5]); | |
5d8f5363 RH |
580 | } |
581 | /* For movcond, we canonicalize the "false" input reg to match | |
582 | the destination reg so that the tcg backend can implement | |
583 | a "move if true" operation. */ | |
24c9ae4e RH |
584 | if (swap_commutative(args[0], &args[4], &args[3])) { |
585 | args[5] = tcg_invert_cond(args[5]); | |
fa01a208 | 586 | } |
1e484e61 | 587 | break; |
d7156f7c | 588 | CASE_OP_32_64(add2): |
1e484e61 RH |
589 | swap_commutative(args[0], &args[2], &args[4]); |
590 | swap_commutative(args[1], &args[3], &args[5]); | |
591 | break; | |
d7156f7c | 592 | CASE_OP_32_64(mulu2): |
4d3203fd | 593 | CASE_OP_32_64(muls2): |
1414968a RH |
594 | swap_commutative(args[0], &args[2], &args[3]); |
595 | break; | |
0bfcb865 RH |
596 | case INDEX_op_brcond2_i32: |
597 | if (swap_commutative2(&args[0], &args[2])) { | |
598 | args[4] = tcg_swap_cond(args[4]); | |
599 | } | |
600 | break; | |
601 | case INDEX_op_setcond2_i32: | |
602 | if (swap_commutative2(&args[1], &args[3])) { | |
603 | args[5] = tcg_swap_cond(args[5]); | |
604 | } | |
605 | break; | |
53108fb5 KB |
606 | default: |
607 | break; | |
608 | } | |
609 | ||
2d497542 RH |
610 | /* Simplify expressions for "shift/rot r, 0, a => movi r, 0", |
611 | and "sub r, 0, a => neg r, a" case. */ | |
01ee5282 AJ |
612 | switch (op) { |
613 | CASE_OP_32_64(shl): | |
614 | CASE_OP_32_64(shr): | |
615 | CASE_OP_32_64(sar): | |
616 | CASE_OP_32_64(rotl): | |
617 | CASE_OP_32_64(rotr): | |
618 | if (temps[args[1]].state == TCG_TEMP_CONST | |
619 | && temps[args[1]].val == 0) { | |
92414b31 | 620 | s->gen_opc_buf[op_index] = op_to_movi(op); |
e590d4e6 | 621 | tcg_opt_gen_movi(gen_args, args[0], 0); |
01ee5282 AJ |
622 | args += 3; |
623 | gen_args += 2; | |
624 | continue; | |
625 | } | |
626 | break; | |
2d497542 RH |
627 | CASE_OP_32_64(sub): |
628 | { | |
629 | TCGOpcode neg_op; | |
630 | bool have_neg; | |
631 | ||
632 | if (temps[args[2]].state == TCG_TEMP_CONST) { | |
633 | /* Proceed with possible constant folding. */ | |
634 | break; | |
635 | } | |
636 | if (op == INDEX_op_sub_i32) { | |
637 | neg_op = INDEX_op_neg_i32; | |
638 | have_neg = TCG_TARGET_HAS_neg_i32; | |
639 | } else { | |
640 | neg_op = INDEX_op_neg_i64; | |
641 | have_neg = TCG_TARGET_HAS_neg_i64; | |
642 | } | |
643 | if (!have_neg) { | |
644 | break; | |
645 | } | |
646 | if (temps[args[1]].state == TCG_TEMP_CONST | |
647 | && temps[args[1]].val == 0) { | |
648 | s->gen_opc_buf[op_index] = neg_op; | |
649 | reset_temp(args[0]); | |
650 | gen_args[0] = args[0]; | |
651 | gen_args[1] = args[2]; | |
652 | args += 3; | |
653 | gen_args += 2; | |
654 | continue; | |
655 | } | |
656 | } | |
657 | break; | |
01ee5282 AJ |
658 | default: |
659 | break; | |
660 | } | |
661 | ||
56e49438 | 662 | /* Simplify expression for "op r, a, 0 => mov r, a" cases */ |
53108fb5 KB |
663 | switch (op) { |
664 | CASE_OP_32_64(add): | |
665 | CASE_OP_32_64(sub): | |
55c0975c KB |
666 | CASE_OP_32_64(shl): |
667 | CASE_OP_32_64(shr): | |
668 | CASE_OP_32_64(sar): | |
25c4d9cc RH |
669 | CASE_OP_32_64(rotl): |
670 | CASE_OP_32_64(rotr): | |
38ee188b AJ |
671 | CASE_OP_32_64(or): |
672 | CASE_OP_32_64(xor): | |
53108fb5 KB |
673 | if (temps[args[1]].state == TCG_TEMP_CONST) { |
674 | /* Proceed with possible constant folding. */ | |
675 | break; | |
676 | } | |
677 | if (temps[args[2]].state == TCG_TEMP_CONST | |
678 | && temps[args[2]].val == 0) { | |
e590d4e6 | 679 | if (temps_are_copies(args[0], args[1])) { |
92414b31 | 680 | s->gen_opc_buf[op_index] = INDEX_op_nop; |
53108fb5 | 681 | } else { |
92414b31 | 682 | s->gen_opc_buf[op_index] = op_to_mov(op); |
b80bb016 | 683 | tcg_opt_gen_mov(s, gen_args, args[0], args[1]); |
53108fb5 | 684 | gen_args += 2; |
53108fb5 | 685 | } |
fedc0da2 | 686 | args += 3; |
53108fb5 KB |
687 | continue; |
688 | } | |
689 | break; | |
56e49438 AJ |
690 | default: |
691 | break; | |
692 | } | |
693 | ||
3031244b AJ |
694 | /* Simplify using known-zero bits. Currently only ops with a single |
695 | output argument is supported. */ | |
3a9d8b17 | 696 | mask = -1; |
633f6502 | 697 | affected = -1; |
3a9d8b17 PB |
698 | switch (op) { |
699 | CASE_OP_32_64(ext8s): | |
700 | if ((temps[args[1]].mask & 0x80) != 0) { | |
701 | break; | |
702 | } | |
703 | CASE_OP_32_64(ext8u): | |
704 | mask = 0xff; | |
705 | goto and_const; | |
706 | CASE_OP_32_64(ext16s): | |
707 | if ((temps[args[1]].mask & 0x8000) != 0) { | |
708 | break; | |
709 | } | |
710 | CASE_OP_32_64(ext16u): | |
711 | mask = 0xffff; | |
712 | goto and_const; | |
713 | case INDEX_op_ext32s_i64: | |
714 | if ((temps[args[1]].mask & 0x80000000) != 0) { | |
715 | break; | |
716 | } | |
717 | case INDEX_op_ext32u_i64: | |
718 | mask = 0xffffffffU; | |
719 | goto and_const; | |
720 | ||
721 | CASE_OP_32_64(and): | |
722 | mask = temps[args[2]].mask; | |
723 | if (temps[args[2]].state == TCG_TEMP_CONST) { | |
724 | and_const: | |
633f6502 | 725 | affected = temps[args[1]].mask & ~mask; |
3a9d8b17 PB |
726 | } |
727 | mask = temps[args[1]].mask & mask; | |
728 | break; | |
729 | ||
e46b225a AJ |
730 | case INDEX_op_sar_i32: |
731 | if (temps[args[2]].state == TCG_TEMP_CONST) { | |
732 | mask = (int32_t)temps[args[1]].mask >> temps[args[2]].val; | |
733 | } | |
734 | break; | |
735 | case INDEX_op_sar_i64: | |
3a9d8b17 | 736 | if (temps[args[2]].state == TCG_TEMP_CONST) { |
e46b225a | 737 | mask = (int64_t)temps[args[1]].mask >> temps[args[2]].val; |
3a9d8b17 PB |
738 | } |
739 | break; | |
740 | ||
e46b225a AJ |
741 | case INDEX_op_shr_i32: |
742 | if (temps[args[2]].state == TCG_TEMP_CONST) { | |
743 | mask = (uint32_t)temps[args[1]].mask >> temps[args[2]].val; | |
744 | } | |
745 | break; | |
746 | case INDEX_op_shr_i64: | |
3a9d8b17 | 747 | if (temps[args[2]].state == TCG_TEMP_CONST) { |
e46b225a | 748 | mask = (uint64_t)temps[args[1]].mask >> temps[args[2]].val; |
3a9d8b17 PB |
749 | } |
750 | break; | |
751 | ||
752 | CASE_OP_32_64(shl): | |
753 | if (temps[args[2]].state == TCG_TEMP_CONST) { | |
754 | mask = temps[args[1]].mask << temps[args[2]].val; | |
755 | } | |
756 | break; | |
757 | ||
758 | CASE_OP_32_64(neg): | |
759 | /* Set to 1 all bits to the left of the rightmost. */ | |
760 | mask = -(temps[args[1]].mask & -temps[args[1]].mask); | |
761 | break; | |
762 | ||
763 | CASE_OP_32_64(deposit): | |
764 | tmp = ((1ull << args[4]) - 1); | |
765 | mask = ((temps[args[1]].mask & ~(tmp << args[3])) | |
766 | | ((temps[args[2]].mask & tmp) << args[3])); | |
767 | break; | |
768 | ||
769 | CASE_OP_32_64(or): | |
770 | CASE_OP_32_64(xor): | |
771 | mask = temps[args[1]].mask | temps[args[2]].mask; | |
772 | break; | |
773 | ||
774 | CASE_OP_32_64(setcond): | |
775 | mask = 1; | |
776 | break; | |
777 | ||
778 | CASE_OP_32_64(movcond): | |
779 | mask = temps[args[3]].mask | temps[args[4]].mask; | |
780 | break; | |
781 | ||
782 | default: | |
783 | break; | |
784 | } | |
785 | ||
f096dc96 AJ |
786 | /* 32-bit ops (non 64-bit ops and non load/store ops) generate 32-bit |
787 | results */ | |
788 | if (!(tcg_op_defs[op].flags & (TCG_OPF_CALL_CLOBBER | TCG_OPF_64BIT))) { | |
789 | mask &= 0xffffffffu; | |
790 | } | |
791 | ||
633f6502 PB |
792 | if (mask == 0) { |
793 | assert(def->nb_oargs == 1); | |
794 | s->gen_opc_buf[op_index] = op_to_movi(op); | |
795 | tcg_opt_gen_movi(gen_args, args[0], 0); | |
796 | args += def->nb_oargs + def->nb_iargs + def->nb_cargs; | |
797 | gen_args += 2; | |
798 | continue; | |
799 | } | |
800 | if (affected == 0) { | |
801 | assert(def->nb_oargs == 1); | |
802 | if (temps_are_copies(args[0], args[1])) { | |
803 | s->gen_opc_buf[op_index] = INDEX_op_nop; | |
804 | } else if (temps[args[1]].state != TCG_TEMP_CONST) { | |
805 | s->gen_opc_buf[op_index] = op_to_mov(op); | |
806 | tcg_opt_gen_mov(s, gen_args, args[0], args[1]); | |
807 | gen_args += 2; | |
808 | } else { | |
809 | s->gen_opc_buf[op_index] = op_to_movi(op); | |
810 | tcg_opt_gen_movi(gen_args, args[0], temps[args[1]].val); | |
811 | gen_args += 2; | |
812 | } | |
813 | args += def->nb_iargs + 1; | |
814 | continue; | |
815 | } | |
816 | ||
56e49438 AJ |
817 | /* Simplify expression for "op r, a, 0 => movi r, 0" cases */ |
818 | switch (op) { | |
61251c0c | 819 | CASE_OP_32_64(and): |
53108fb5 | 820 | CASE_OP_32_64(mul): |
03271524 RH |
821 | CASE_OP_32_64(muluh): |
822 | CASE_OP_32_64(mulsh): | |
53108fb5 KB |
823 | if ((temps[args[2]].state == TCG_TEMP_CONST |
824 | && temps[args[2]].val == 0)) { | |
92414b31 | 825 | s->gen_opc_buf[op_index] = op_to_movi(op); |
e590d4e6 | 826 | tcg_opt_gen_movi(gen_args, args[0], 0); |
53108fb5 KB |
827 | args += 3; |
828 | gen_args += 2; | |
829 | continue; | |
830 | } | |
831 | break; | |
56e49438 AJ |
832 | default: |
833 | break; | |
834 | } | |
835 | ||
836 | /* Simplify expression for "op r, a, a => mov r, a" cases */ | |
837 | switch (op) { | |
9a81090b KB |
838 | CASE_OP_32_64(or): |
839 | CASE_OP_32_64(and): | |
0aba1c73 | 840 | if (temps_are_copies(args[1], args[2])) { |
e590d4e6 | 841 | if (temps_are_copies(args[0], args[1])) { |
92414b31 | 842 | s->gen_opc_buf[op_index] = INDEX_op_nop; |
9a81090b | 843 | } else { |
92414b31 | 844 | s->gen_opc_buf[op_index] = op_to_mov(op); |
b80bb016 | 845 | tcg_opt_gen_mov(s, gen_args, args[0], args[1]); |
9a81090b | 846 | gen_args += 2; |
9a81090b | 847 | } |
fedc0da2 | 848 | args += 3; |
9a81090b KB |
849 | continue; |
850 | } | |
851 | break; | |
fe0de7aa BS |
852 | default: |
853 | break; | |
53108fb5 KB |
854 | } |
855 | ||
3c94193e AJ |
856 | /* Simplify expression for "op r, a, a => movi r, 0" cases */ |
857 | switch (op) { | |
858 | CASE_OP_32_64(sub): | |
859 | CASE_OP_32_64(xor): | |
860 | if (temps_are_copies(args[1], args[2])) { | |
92414b31 | 861 | s->gen_opc_buf[op_index] = op_to_movi(op); |
3c94193e AJ |
862 | tcg_opt_gen_movi(gen_args, args[0], 0); |
863 | gen_args += 2; | |
864 | args += 3; | |
865 | continue; | |
866 | } | |
867 | break; | |
868 | default: | |
869 | break; | |
870 | } | |
871 | ||
22613af4 KB |
872 | /* Propagate constants through copy operations and do constant |
873 | folding. Constants will be substituted to arguments by register | |
874 | allocator where needed and possible. Also detect copies. */ | |
8f2e8c07 | 875 | switch (op) { |
22613af4 | 876 | CASE_OP_32_64(mov): |
e590d4e6 | 877 | if (temps_are_copies(args[0], args[1])) { |
22613af4 | 878 | args += 2; |
92414b31 | 879 | s->gen_opc_buf[op_index] = INDEX_op_nop; |
22613af4 KB |
880 | break; |
881 | } | |
882 | if (temps[args[1]].state != TCG_TEMP_CONST) { | |
b80bb016 | 883 | tcg_opt_gen_mov(s, gen_args, args[0], args[1]); |
22613af4 KB |
884 | gen_args += 2; |
885 | args += 2; | |
886 | break; | |
887 | } | |
888 | /* Source argument is constant. Rewrite the operation and | |
889 | let movi case handle it. */ | |
890 | op = op_to_movi(op); | |
92414b31 | 891 | s->gen_opc_buf[op_index] = op; |
22613af4 KB |
892 | args[1] = temps[args[1]].val; |
893 | /* fallthrough */ | |
894 | CASE_OP_32_64(movi): | |
e590d4e6 | 895 | tcg_opt_gen_movi(gen_args, args[0], args[1]); |
22613af4 KB |
896 | gen_args += 2; |
897 | args += 2; | |
898 | break; | |
6e14e91b | 899 | |
a640f031 | 900 | CASE_OP_32_64(not): |
cb25c80a | 901 | CASE_OP_32_64(neg): |
25c4d9cc RH |
902 | CASE_OP_32_64(ext8s): |
903 | CASE_OP_32_64(ext8u): | |
904 | CASE_OP_32_64(ext16s): | |
905 | CASE_OP_32_64(ext16u): | |
a640f031 KB |
906 | case INDEX_op_ext32s_i64: |
907 | case INDEX_op_ext32u_i64: | |
a640f031 | 908 | if (temps[args[1]].state == TCG_TEMP_CONST) { |
92414b31 | 909 | s->gen_opc_buf[op_index] = op_to_movi(op); |
a640f031 | 910 | tmp = do_constant_folding(op, temps[args[1]].val, 0); |
e590d4e6 | 911 | tcg_opt_gen_movi(gen_args, args[0], tmp); |
6e14e91b RH |
912 | gen_args += 2; |
913 | args += 2; | |
914 | break; | |
a640f031 | 915 | } |
6e14e91b RH |
916 | goto do_default; |
917 | ||
53108fb5 KB |
918 | CASE_OP_32_64(add): |
919 | CASE_OP_32_64(sub): | |
920 | CASE_OP_32_64(mul): | |
9a81090b KB |
921 | CASE_OP_32_64(or): |
922 | CASE_OP_32_64(and): | |
923 | CASE_OP_32_64(xor): | |
55c0975c KB |
924 | CASE_OP_32_64(shl): |
925 | CASE_OP_32_64(shr): | |
926 | CASE_OP_32_64(sar): | |
25c4d9cc RH |
927 | CASE_OP_32_64(rotl): |
928 | CASE_OP_32_64(rotr): | |
cb25c80a RH |
929 | CASE_OP_32_64(andc): |
930 | CASE_OP_32_64(orc): | |
931 | CASE_OP_32_64(eqv): | |
932 | CASE_OP_32_64(nand): | |
933 | CASE_OP_32_64(nor): | |
03271524 RH |
934 | CASE_OP_32_64(muluh): |
935 | CASE_OP_32_64(mulsh): | |
01547f7f RH |
936 | CASE_OP_32_64(div): |
937 | CASE_OP_32_64(divu): | |
938 | CASE_OP_32_64(rem): | |
939 | CASE_OP_32_64(remu): | |
53108fb5 KB |
940 | if (temps[args[1]].state == TCG_TEMP_CONST |
941 | && temps[args[2]].state == TCG_TEMP_CONST) { | |
92414b31 | 942 | s->gen_opc_buf[op_index] = op_to_movi(op); |
53108fb5 KB |
943 | tmp = do_constant_folding(op, temps[args[1]].val, |
944 | temps[args[2]].val); | |
e590d4e6 | 945 | tcg_opt_gen_movi(gen_args, args[0], tmp); |
53108fb5 | 946 | gen_args += 2; |
6e14e91b RH |
947 | args += 3; |
948 | break; | |
53108fb5 | 949 | } |
6e14e91b RH |
950 | goto do_default; |
951 | ||
7ef55fc9 AJ |
952 | CASE_OP_32_64(deposit): |
953 | if (temps[args[1]].state == TCG_TEMP_CONST | |
954 | && temps[args[2]].state == TCG_TEMP_CONST) { | |
92414b31 | 955 | s->gen_opc_buf[op_index] = op_to_movi(op); |
7ef55fc9 AJ |
956 | tmp = ((1ull << args[4]) - 1); |
957 | tmp = (temps[args[1]].val & ~(tmp << args[3])) | |
958 | | ((temps[args[2]].val & tmp) << args[3]); | |
959 | tcg_opt_gen_movi(gen_args, args[0], tmp); | |
960 | gen_args += 2; | |
6e14e91b RH |
961 | args += 5; |
962 | break; | |
7ef55fc9 | 963 | } |
6e14e91b RH |
964 | goto do_default; |
965 | ||
f8dd19e5 | 966 | CASE_OP_32_64(setcond): |
b336ceb6 AJ |
967 | tmp = do_constant_folding_cond(op, args[1], args[2], args[3]); |
968 | if (tmp != 2) { | |
92414b31 | 969 | s->gen_opc_buf[op_index] = op_to_movi(op); |
e590d4e6 | 970 | tcg_opt_gen_movi(gen_args, args[0], tmp); |
f8dd19e5 | 971 | gen_args += 2; |
6e14e91b RH |
972 | args += 4; |
973 | break; | |
f8dd19e5 | 974 | } |
6e14e91b RH |
975 | goto do_default; |
976 | ||
fbeaa26c | 977 | CASE_OP_32_64(brcond): |
b336ceb6 AJ |
978 | tmp = do_constant_folding_cond(op, args[0], args[1], args[2]); |
979 | if (tmp != 2) { | |
980 | if (tmp) { | |
d193a14a | 981 | reset_all_temps(nb_temps); |
92414b31 | 982 | s->gen_opc_buf[op_index] = INDEX_op_br; |
fbeaa26c AJ |
983 | gen_args[0] = args[3]; |
984 | gen_args += 1; | |
fbeaa26c | 985 | } else { |
92414b31 | 986 | s->gen_opc_buf[op_index] = INDEX_op_nop; |
fbeaa26c | 987 | } |
6e14e91b RH |
988 | args += 4; |
989 | break; | |
fbeaa26c | 990 | } |
6e14e91b RH |
991 | goto do_default; |
992 | ||
fa01a208 | 993 | CASE_OP_32_64(movcond): |
b336ceb6 AJ |
994 | tmp = do_constant_folding_cond(op, args[1], args[2], args[5]); |
995 | if (tmp != 2) { | |
e590d4e6 | 996 | if (temps_are_copies(args[0], args[4-tmp])) { |
92414b31 | 997 | s->gen_opc_buf[op_index] = INDEX_op_nop; |
fa01a208 | 998 | } else if (temps[args[4-tmp]].state == TCG_TEMP_CONST) { |
92414b31 | 999 | s->gen_opc_buf[op_index] = op_to_movi(op); |
e590d4e6 | 1000 | tcg_opt_gen_movi(gen_args, args[0], temps[args[4-tmp]].val); |
fa01a208 RH |
1001 | gen_args += 2; |
1002 | } else { | |
92414b31 | 1003 | s->gen_opc_buf[op_index] = op_to_mov(op); |
e590d4e6 | 1004 | tcg_opt_gen_mov(s, gen_args, args[0], args[4-tmp]); |
fa01a208 RH |
1005 | gen_args += 2; |
1006 | } | |
6e14e91b RH |
1007 | args += 6; |
1008 | break; | |
fa01a208 | 1009 | } |
6e14e91b | 1010 | goto do_default; |
212c328d RH |
1011 | |
1012 | case INDEX_op_add2_i32: | |
1013 | case INDEX_op_sub2_i32: | |
1014 | if (temps[args[2]].state == TCG_TEMP_CONST | |
1015 | && temps[args[3]].state == TCG_TEMP_CONST | |
1016 | && temps[args[4]].state == TCG_TEMP_CONST | |
1017 | && temps[args[5]].state == TCG_TEMP_CONST) { | |
1018 | uint32_t al = temps[args[2]].val; | |
1019 | uint32_t ah = temps[args[3]].val; | |
1020 | uint32_t bl = temps[args[4]].val; | |
1021 | uint32_t bh = temps[args[5]].val; | |
1022 | uint64_t a = ((uint64_t)ah << 32) | al; | |
1023 | uint64_t b = ((uint64_t)bh << 32) | bl; | |
1024 | TCGArg rl, rh; | |
1025 | ||
1026 | if (op == INDEX_op_add2_i32) { | |
1027 | a += b; | |
1028 | } else { | |
1029 | a -= b; | |
1030 | } | |
1031 | ||
1032 | /* We emit the extra nop when we emit the add2/sub2. */ | |
92414b31 | 1033 | assert(s->gen_opc_buf[op_index + 1] == INDEX_op_nop); |
212c328d RH |
1034 | |
1035 | rl = args[0]; | |
1036 | rh = args[1]; | |
92414b31 EV |
1037 | s->gen_opc_buf[op_index] = INDEX_op_movi_i32; |
1038 | s->gen_opc_buf[++op_index] = INDEX_op_movi_i32; | |
212c328d RH |
1039 | tcg_opt_gen_movi(&gen_args[0], rl, (uint32_t)a); |
1040 | tcg_opt_gen_movi(&gen_args[2], rh, (uint32_t)(a >> 32)); | |
1041 | gen_args += 4; | |
1042 | args += 6; | |
1043 | break; | |
1044 | } | |
1045 | goto do_default; | |
1414968a RH |
1046 | |
1047 | case INDEX_op_mulu2_i32: | |
1048 | if (temps[args[2]].state == TCG_TEMP_CONST | |
1049 | && temps[args[3]].state == TCG_TEMP_CONST) { | |
1050 | uint32_t a = temps[args[2]].val; | |
1051 | uint32_t b = temps[args[3]].val; | |
1052 | uint64_t r = (uint64_t)a * b; | |
1053 | TCGArg rl, rh; | |
1054 | ||
1055 | /* We emit the extra nop when we emit the mulu2. */ | |
92414b31 | 1056 | assert(s->gen_opc_buf[op_index + 1] == INDEX_op_nop); |
1414968a RH |
1057 | |
1058 | rl = args[0]; | |
1059 | rh = args[1]; | |
92414b31 EV |
1060 | s->gen_opc_buf[op_index] = INDEX_op_movi_i32; |
1061 | s->gen_opc_buf[++op_index] = INDEX_op_movi_i32; | |
1414968a RH |
1062 | tcg_opt_gen_movi(&gen_args[0], rl, (uint32_t)r); |
1063 | tcg_opt_gen_movi(&gen_args[2], rh, (uint32_t)(r >> 32)); | |
1064 | gen_args += 4; | |
1065 | args += 4; | |
1066 | break; | |
1067 | } | |
1068 | goto do_default; | |
6e14e91b | 1069 | |
bc1473ef | 1070 | case INDEX_op_brcond2_i32: |
6c4382f8 RH |
1071 | tmp = do_constant_folding_cond2(&args[0], &args[2], args[4]); |
1072 | if (tmp != 2) { | |
1073 | if (tmp) { | |
d193a14a | 1074 | reset_all_temps(nb_temps); |
92414b31 | 1075 | s->gen_opc_buf[op_index] = INDEX_op_br; |
6c4382f8 RH |
1076 | gen_args[0] = args[5]; |
1077 | gen_args += 1; | |
1078 | } else { | |
92414b31 | 1079 | s->gen_opc_buf[op_index] = INDEX_op_nop; |
6c4382f8 RH |
1080 | } |
1081 | } else if ((args[4] == TCG_COND_LT || args[4] == TCG_COND_GE) | |
1082 | && temps[args[2]].state == TCG_TEMP_CONST | |
1083 | && temps[args[3]].state == TCG_TEMP_CONST | |
1084 | && temps[args[2]].val == 0 | |
1085 | && temps[args[3]].val == 0) { | |
1086 | /* Simplify LT/GE comparisons vs zero to a single compare | |
1087 | vs the high word of the input. */ | |
d193a14a | 1088 | reset_all_temps(nb_temps); |
92414b31 | 1089 | s->gen_opc_buf[op_index] = INDEX_op_brcond_i32; |
bc1473ef RH |
1090 | gen_args[0] = args[1]; |
1091 | gen_args[1] = args[3]; | |
1092 | gen_args[2] = args[4]; | |
1093 | gen_args[3] = args[5]; | |
1094 | gen_args += 4; | |
6c4382f8 RH |
1095 | } else { |
1096 | goto do_default; | |
bc1473ef | 1097 | } |
6c4382f8 RH |
1098 | args += 6; |
1099 | break; | |
bc1473ef RH |
1100 | |
1101 | case INDEX_op_setcond2_i32: | |
6c4382f8 RH |
1102 | tmp = do_constant_folding_cond2(&args[1], &args[3], args[5]); |
1103 | if (tmp != 2) { | |
92414b31 | 1104 | s->gen_opc_buf[op_index] = INDEX_op_movi_i32; |
6c4382f8 RH |
1105 | tcg_opt_gen_movi(gen_args, args[0], tmp); |
1106 | gen_args += 2; | |
1107 | } else if ((args[5] == TCG_COND_LT || args[5] == TCG_COND_GE) | |
1108 | && temps[args[3]].state == TCG_TEMP_CONST | |
1109 | && temps[args[4]].state == TCG_TEMP_CONST | |
1110 | && temps[args[3]].val == 0 | |
1111 | && temps[args[4]].val == 0) { | |
1112 | /* Simplify LT/GE comparisons vs zero to a single compare | |
1113 | vs the high word of the input. */ | |
92414b31 | 1114 | s->gen_opc_buf[op_index] = INDEX_op_setcond_i32; |
66e61b55 | 1115 | reset_temp(args[0]); |
bc1473ef RH |
1116 | gen_args[0] = args[0]; |
1117 | gen_args[1] = args[2]; | |
1118 | gen_args[2] = args[4]; | |
1119 | gen_args[3] = args[5]; | |
1120 | gen_args += 4; | |
6c4382f8 RH |
1121 | } else { |
1122 | goto do_default; | |
bc1473ef | 1123 | } |
6c4382f8 RH |
1124 | args += 6; |
1125 | break; | |
bc1473ef | 1126 | |
8f2e8c07 | 1127 | case INDEX_op_call: |
22613af4 | 1128 | nb_call_args = (args[0] >> 16) + (args[0] & 0xffff); |
78505279 AJ |
1129 | if (!(args[nb_call_args + 1] & (TCG_CALL_NO_READ_GLOBALS | |
1130 | TCG_CALL_NO_WRITE_GLOBALS))) { | |
22613af4 | 1131 | for (i = 0; i < nb_globals; i++) { |
e590d4e6 | 1132 | reset_temp(i); |
22613af4 KB |
1133 | } |
1134 | } | |
1135 | for (i = 0; i < (args[0] >> 16); i++) { | |
e590d4e6 | 1136 | reset_temp(args[i + 1]); |
22613af4 KB |
1137 | } |
1138 | i = nb_call_args + 3; | |
8f2e8c07 KB |
1139 | while (i) { |
1140 | *gen_args = *args; | |
1141 | args++; | |
1142 | gen_args++; | |
1143 | i--; | |
1144 | } | |
1145 | break; | |
6e14e91b | 1146 | |
8f2e8c07 | 1147 | default: |
6e14e91b RH |
1148 | do_default: |
1149 | /* Default case: we know nothing about operation (or were unable | |
1150 | to compute the operation result) so no propagation is done. | |
1151 | We trash everything if the operation is the end of a basic | |
3a9d8b17 PB |
1152 | block, otherwise we only trash the output args. "mask" is |
1153 | the non-zero bits mask for the first output arg. */ | |
a2550660 | 1154 | if (def->flags & TCG_OPF_BB_END) { |
d193a14a | 1155 | reset_all_temps(nb_temps); |
a2550660 AJ |
1156 | } else { |
1157 | for (i = 0; i < def->nb_oargs; i++) { | |
e590d4e6 | 1158 | reset_temp(args[i]); |
3031244b AJ |
1159 | /* Save the corresponding known-zero bits mask for the |
1160 | first output argument (only one supported so far). */ | |
1161 | if (i == 0) { | |
1162 | temps[args[i]].mask = mask; | |
1163 | } | |
a2550660 | 1164 | } |
22613af4 | 1165 | } |
8f2e8c07 KB |
1166 | for (i = 0; i < def->nb_args; i++) { |
1167 | gen_args[i] = args[i]; | |
1168 | } | |
1169 | args += def->nb_args; | |
1170 | gen_args += def->nb_args; | |
1171 | break; | |
1172 | } | |
1173 | } | |
1174 | ||
1175 | return gen_args; | |
1176 | } | |
1177 | ||
1178 | TCGArg *tcg_optimize(TCGContext *s, uint16_t *tcg_opc_ptr, | |
1179 | TCGArg *args, TCGOpDef *tcg_op_defs) | |
1180 | { | |
1181 | TCGArg *res; | |
1182 | res = tcg_constant_folding(s, tcg_opc_ptr, args, tcg_op_defs); | |
1183 | return res; | |
1184 | } |