[qemu.git] / hw / ppc_newworld.c

/*
 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 * PCI bus layout on a real G5 (U3 based):
 *
 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
 *
 */
#include "hw.h"
#include "ppc.h"
#include "ppc_mac.h"
#include "adb.h"
#include "mac_dbdma.h"
#include "nvram.h"
#include "pc.h"
#include "pci.h"
#include "usb-ohci.h"
#include "net.h"
#include "sysemu.h"
#include "boards.h"
#include "fw_cfg.h"
#include "escc.h"
#include "openpic.h"
#include "ide.h"
#include "loader.h"
#include "elf.h"
#include "kvm.h"
#include "kvm_ppc.h"
#include "hw/usb.h"
#include "blockdev.h"
#include "exec-memory.h"

#define MAX_IDE_BUS 2
#define CFG_ADDR 0xf0000510

/* debug UniNorth */
//#define DEBUG_UNIN

#ifdef DEBUG_UNIN
#define UNIN_DPRINTF(fmt, ...)                                  \
    do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
#else
#define UNIN_DPRINTF(fmt, ...)
#endif

/* UniN device */
static void unin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
                       unsigned size)
{
    UNIN_DPRINTF("write addr " TARGET_FMT_plx " val %"PRIx64"\n", addr, value);
}

static uint64_t unin_read(void *opaque, target_phys_addr_t addr, unsigned size)
{
    uint32_t value;

    value = 0;
    UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);

    return value;
}

static const MemoryRegionOps unin_ops = {
    .read = unin_read,
    .write = unin_write,
    .endianness = DEVICE_NATIVE_ENDIAN,
};

static int fw_cfg_boot_set(void *opaque, const char *boot_device)
{
    fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
    return 0;
}

static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
{
    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
}

static target_phys_addr_t round_page(target_phys_addr_t addr)
{
    return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
}

/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size,
                             const char *boot_device,
                             const char *kernel_filename,
                             const char *kernel_cmdline,
                             const char *initrd_filename,
                             const char *cpu_model)
{
    CPUState *env = NULL;
    char *filename;
    qemu_irq *pic, **openpic_irqs;
    MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
    int linux_boot, i;
    MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
    target_phys_addr_t kernel_base, initrd_base, cmdline_base = 0;
    long kernel_size, initrd_size;
    PCIBus *pci_bus;
    MacIONVRAMState *nvr;
    int bios_size;
    MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem, *escc_mem;
    MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
    MemoryRegion *ide_mem[3];
    int ppc_boot_device;
    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
    void *fw_cfg;
    void *dbdma;
    int machine_arch;

    linux_boot = (kernel_filename != NULL);

    /* init CPUs */
    if (cpu_model == NULL)
#ifdef TARGET_PPC64
        cpu_model = "970fx";
#else
        cpu_model = "G4";
#endif
    for (i = 0; i < smp_cpus; i++) {
        env = cpu_init(cpu_model);
        if (!env) {
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
            exit(1);
        }
        /* Set time-base frequency to 100 Mhz */
        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
        qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
    }

    /* allocate RAM */
    memory_region_init_ram(ram, NULL, "ppc_core99.ram", ram_size);
    memory_region_add_subregion(get_system_memory(), 0, ram);

    /* allocate and load BIOS */
    memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE);
    if (bios_name == NULL)
        bios_name = PROM_FILENAME;
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
    memory_region_set_readonly(bios, true);
    memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);

    /* Load OpenBIOS (ELF) */
    if (filename) {
        bios_size = load_elf(filename, NULL, NULL, NULL,
                             NULL, NULL, 1, ELF_MACHINE, 0);

        g_free(filename);
    } else {
        bios_size = -1;
    }
    if (bios_size < 0 || bios_size > BIOS_SIZE) {
        hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
        exit(1);
    }

    if (linux_boot) {
        uint64_t lowaddr = 0;
        int bswap_needed;

#ifdef BSWAP_NEEDED
        bswap_needed = 1;
#else
        bswap_needed = 0;
#endif
        kernel_base = KERNEL_LOAD_ADDR;

        kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
                               NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
        if (kernel_size < 0)
            kernel_size = load_aout(kernel_filename, kernel_base,
                                    ram_size - kernel_base, bswap_needed,
                                    TARGET_PAGE_SIZE);
        if (kernel_size < 0)
            kernel_size = load_image_targphys(kernel_filename,
                                              kernel_base,
                                              ram_size - kernel_base);
        if (kernel_size < 0) {
            hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
            exit(1);
        }
        /* load initrd */
        if (initrd_filename) {
            initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
            initrd_size = load_image_targphys(initrd_filename, initrd_base,
                                              ram_size - initrd_base);
            if (initrd_size < 0) {
                hw_error("qemu: could not load initial ram disk '%s'\n",
                         initrd_filename);
                exit(1);
            }
            cmdline_base = round_page(initrd_base + initrd_size);
        } else {
            initrd_base = 0;
            initrd_size = 0;
            cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
        }
        ppc_boot_device = 'm';
    } else {
        kernel_base = 0;
        kernel_size = 0;
        initrd_base = 0;
        initrd_size = 0;
        ppc_boot_device = '\0';
        /* We consider that NewWorld PowerMac never have any floppy drive
         * For now, OHW cannot boot from the network.
         */
        for (i = 0; boot_device[i] != '\0'; i++) {
            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
                ppc_boot_device = boot_device[i];
                break;
            }
        }
        if (ppc_boot_device == '\0') {
            fprintf(stderr, "No valid boot device for Mac99 machine\n");
            exit(1);
        }
    }

    /* Register 8 MB of ISA IO space */
    isa_mmio_init(0xf2000000, 0x00800000);

    /* UniN init */
    memory_region_init_io(unin_memory, &unin_ops, NULL, "unin", 0x1000);
    memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);

    openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
    openpic_irqs[0] =
        g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
    for (i = 0; i < smp_cpus; i++) {
        /* Mac99 IRQ connection between OpenPIC outputs pins
         * and PowerPC input pins
         */
        switch (PPC_INPUT(env)) {
        case PPC_FLAGS_INPUT_6xx:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
            break;
#if defined(TARGET_PPC64)
        case PPC_FLAGS_INPUT_970:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
            break;
#endif /* defined(TARGET_PPC64) */
        default:
            hw_error("Bus model not supported on mac99 machine\n");
            exit(1);
        }
    }
    pic = openpic_init(NULL, &pic_mem, smp_cpus, openpic_irqs, NULL);
    if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
        /* 970 gets a U3 bus */
        pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
        machine_arch = ARCH_MAC99_U3;
    } else {
        pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
        machine_arch = ARCH_MAC99;
    }
    /* init basic PC hardware */
    pci_vga_init(pci_bus);

    escc_mem = escc_init(0, pic[0x25], pic[0x24],
                         serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
    memory_region_init_alias(escc_bar, "escc-bar",
                             escc_mem, 0, memory_region_size(escc_mem));

    for(i = 0; i < nb_nics; i++)
        pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);

    ide_drive_get(hd, MAX_IDE_BUS);
    dbdma = DBDMA_init(&dbdma_mem);

    /* We only emulate 2 out of 3 IDE controllers for now */
    ide_mem[0] = NULL;
    ide_mem[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
    ide_mem[2] = pmac_ide_init(&hd[MAX_IDE_DEVS], pic[0x0e], dbdma, 0x1a, pic[0x02]);

    /* cuda also initialize ADB */
    if (machine_arch == ARCH_MAC99_U3) {
        usb_enabled = 1;
    }
    cuda_init(&cuda_mem, pic[0x19]);

    adb_kbd_init(&adb_bus);
    adb_mouse_init(&adb_bus);

    macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem,
               dbdma_mem, cuda_mem, NULL, 3, ide_mem, escc_bar);

    if (usb_enabled) {
        usb_ohci_init_pci(pci_bus, -1);
    }

    /* U3 needs to use USB for input because Linux doesn't support via-cuda
       on PPC64 */
    if (machine_arch == ARCH_MAC99_U3) {
        usbdevice_create("keyboard");
        usbdevice_create("mouse");
    }

    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
        graphic_depth = 15;

    /* The NewWorld NVRAM is not located in the MacIO device */
    nvr = macio_nvram_init(0x2000, 1);
    pmac_format_nvram_partition(nvr, 0x2000);
    macio_nvram_setup_bar(nvr, get_system_memory(), 0xFFF04000);
    /* No PCI init: the BIOS will do it */

    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
    if (kernel_cmdline) {
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
        pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
    } else {
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
    }
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);

    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);

    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
    if (kvm_enabled()) {
#ifdef CONFIG_KVM
        uint8_t *hypercall;

        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
        hypercall = g_malloc(16);
        kvmppc_get_hypercall(env, hypercall, 16);
        fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
#endif
    } else {
        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
    }

    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}

static QEMUMachine core99_machine = {
    .name = "mac99",
    .desc = "Mac99 based PowerMAC",
    .init = ppc_core99_init,
    .max_cpus = MAX_CPUS,
#ifdef TARGET_PPC64
    .is_default = 1,
#endif
};

static void core99_machine_init(void)
{
    qemu_register_machine(&core99_machine);
}

machine_init(core99_machine_init);
Commit	Line	Data
64201201	1	/*
3cbee15b	2	* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
5fafdf24	3	*
47103572	4	* Copyright (c) 2004-2007 Fabrice Bellard
3cbee15b	5	* Copyright (c) 2007 Jocelyn Mayer
5fafdf24	6	*
64201201 FB	7	* Permission is hereby granted, free of charge, to any person obtaining a copy
	8	* of this software and associated documentation files (the "Software"), to deal
	9	* in the Software without restriction, including without limitation the rights
	10	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	11	* copies of the Software, and to permit persons to whom the Software is
	12	* furnished to do so, subject to the following conditions:
	13	*
	14	* The above copyright notice and this permission notice shall be included in
	15	* all copies or substantial portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	22	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	23	* THE SOFTWARE.
915cd3a9 AG	24	*
	25	* PCI bus layout on a real G5 (U3 based):
	26	*
	27	* 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
	28	* 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
	29	* 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
	30	* 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
	31	* 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
	32	* 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
	33	* 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
	34	* 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
	35	* 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
	36	* 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
	37	* 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
	38	* 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
	39	* 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
	40	* 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
	41	* 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
	42	* 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
	43	* 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
	44	* 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
	45	* 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
	46	* 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
	47	*
64201201	48	*/
87ecb68b PB	49	#include "hw.h"
87ecb68b PB	50	#include "ppc.h"
3cbee15b	51	#include "ppc_mac.h"
7a880d93	52	#include "adb.h"
28ce5ce6	53	#include "mac_dbdma.h"
87ecb68b PB	54	#include "nvram.h"
	55	#include "pc.h"
	56	#include "pci.h"
18e08a55	57	#include "usb-ohci.h"
87ecb68b PB	58	#include "net.h"
	59	#include "sysemu.h"
	60	#include "boards.h"
006f3a48	61	#include "fw_cfg.h"
7fa9ae1a	62	#include "escc.h"
b7169916	63	#include "openpic.h"
977e1244	64	#include "ide.h"
ca20cf32 BS	65	#include "loader.h"
ca20cf32 BS	66	#include "elf.h"
dc702288	67	#include "kvm.h"
dc333cd6	68	#include "kvm_ppc.h"
a2236d48	69	#include "hw/usb.h"
2446333c	70	#include "blockdev.h"
1e39101c	71	#include "exec-memory.h"
267002cd	72
e4bcb14c	73	#define MAX_IDE_BUS 2
006f3a48	74	#define CFG_ADDR 0xf0000510
e4bcb14c	75
f3902383 BS	76	/* debug UniNorth */
	77	//#define DEBUG_UNIN
	78
	79	#ifdef DEBUG_UNIN
001faf32 BS	80	#define UNIN_DPRINTF(fmt, ...) \
001faf32 BS	81	do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
f3902383	82	#else
001faf32	83	#define UNIN_DPRINTF(fmt, ...)
f3902383 BS	84	#endif
f3902383 BS	85
0aa6a4a2	86	/* UniN device */
febbd7c2 AK	87	static void unin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
febbd7c2 AK	88	unsigned size)
0aa6a4a2	89	{
febbd7c2	90	UNIN_DPRINTF("write addr " TARGET_FMT_plx " val %"PRIx64"\n", addr, value);
0aa6a4a2 FB	91	}
0aa6a4a2 FB	92
febbd7c2	93	static uint64_t unin_read(void *opaque, target_phys_addr_t addr, unsigned size)
0aa6a4a2	94	{
f3902383 BS	95	uint32_t value;
	96
	97	value = 0;
	98	UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
	99
	100	return value;
0aa6a4a2 FB	101	}
0aa6a4a2 FB	102
febbd7c2 AK	103	static const MemoryRegionOps unin_ops = {
	104	.read = unin_read,
	105	.write = unin_write,
	106	.endianness = DEVICE_NATIVE_ENDIAN,
0aa6a4a2 FB	107	};
0aa6a4a2 FB	108
513f789f BS	109	static int fw_cfg_boot_set(void opaque, const char boot_device)
	110	{
	111	fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
	112	return 0;
	113	}
	114
409dbce5 AJ	115	static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
	116	{
	117	return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
	118	}
	119
b9e17a34 AG	120	static target_phys_addr_t round_page(target_phys_addr_t addr)
	121	{
	122	return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
	123	}
	124
3cbee15b	125	/* PowerPC Mac99 hardware initialisation */
c227f099	126	static void ppc_core99_init (ram_addr_t ram_size,
3023f332	127	const char *boot_device,
3cbee15b JM	128	const char *kernel_filename,
	129	const char *kernel_cmdline,
	130	const char *initrd_filename,
	131	const char *cpu_model)
64201201	132	{
49a2942d	133	CPUState *env = NULL;
5cea8590	134	char *filename;
e9df014c	135	qemu_irq pic, *openpic_irqs;
febbd7c2	136	MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
d5295253	137	int linux_boot, i;
febbd7c2	138	MemoryRegion ram = g_new(MemoryRegion, 1), bios = g_new(MemoryRegion, 1);
b9e17a34	139	target_phys_addr_t kernel_base, initrd_base, cmdline_base = 0;
093209cd	140	long kernel_size, initrd_size;
46e50e9d	141	PCIBus *pci_bus;
3cbee15b	142	MacIONVRAMState *nvr;
ae0bfb79	143	int bios_size;
23c5e4ca	144	MemoryRegion pic_mem, dbdma_mem, cuda_mem, escc_mem;
5b15f275	145	MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
23c5e4ca	146	MemoryRegion *ide_mem[3];
28c5af54	147	int ppc_boot_device;
f455e98c	148	DriveInfo hd[MAX_IDE_BUS MAX_IDE_DEVS];
006f3a48	149	void *fw_cfg;
28ce5ce6	150	void *dbdma;
0f921197	151	int machine_arch;
46e50e9d	152
64201201 FB	153	linux_boot = (kernel_filename != NULL);
64201201 FB	154
c68ea704	155	/* init CPUs */
94fc95cd	156	if (cpu_model == NULL)
46214a27 AF	157	#ifdef TARGET_PPC64
	158	cpu_model = "970fx";
	159	#else
e6bd862b	160	cpu_model = "G4";
46214a27	161	#endif
e9df014c	162	for (i = 0; i < smp_cpus; i++) {
aaed909a FB	163	env = cpu_init(cpu_model);
	164	if (!env) {
	165	fprintf(stderr, "Unable to find PowerPC CPU definition\n");
	166	exit(1);
	167	}
e9df014c JM	168	/* Set time-base frequency to 100 Mhz */
e9df014c JM	169	cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
d84bda46	170	qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
e9df014c	171	}
c68ea704	172
64201201	173	/* allocate RAM */
febbd7c2 AK	174	memory_region_init_ram(ram, NULL, "ppc_core99.ram", ram_size);
febbd7c2 AK	175	memory_region_add_subregion(get_system_memory(), 0, ram);
864c136a	176
64201201	177	/* allocate and load BIOS */
febbd7c2	178	memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE);
1192dad8	179	if (bios_name == NULL)
006f3a48	180	bios_name = PROM_FILENAME;
5cea8590	181	filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
febbd7c2 AK	182	memory_region_set_readonly(bios, true);
febbd7c2 AK	183	memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);
006f3a48 BS	184
006f3a48 BS	185	/* Load OpenBIOS (ELF) */
5cea8590	186	if (filename) {
409dbce5 AJ	187	bios_size = load_elf(filename, NULL, NULL, NULL,
409dbce5 AJ	188	NULL, NULL, 1, ELF_MACHINE, 0);
ca20cf32	189
7267c094	190	g_free(filename);
5cea8590 PB	191	} else {
	192	bios_size = -1;
	193	}
d5295253	194	if (bios_size < 0 \|\| bios_size > BIOS_SIZE) {
5cea8590	195	hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
64201201 FB	196	exit(1);
64201201 FB	197	}
3b46e624	198
b6b8bd18	199	if (linux_boot) {
513f789f	200	uint64_t lowaddr = 0;
ca20cf32 BS	201	int bswap_needed;
	202
	203	#ifdef BSWAP_NEEDED
	204	bswap_needed = 1;
	205	#else
	206	bswap_needed = 0;
	207	#endif
b6b8bd18	208	kernel_base = KERNEL_LOAD_ADDR;
513f789f	209
409dbce5 AJ	210	kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
409dbce5 AJ	211	NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
513f789f BS	212	if (kernel_size < 0)
513f789f BS	213	kernel_size = load_aout(kernel_filename, kernel_base,
ca20cf32 BS	214	ram_size - kernel_base, bswap_needed,
ca20cf32 BS	215	TARGET_PAGE_SIZE);
513f789f BS	216	if (kernel_size < 0)
	217	kernel_size = load_image_targphys(kernel_filename,
	218	kernel_base,
	219	ram_size - kernel_base);
b6b8bd18	220	if (kernel_size < 0) {
2ac71179	221	hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
b6b8bd18 FB	222	exit(1);
	223	}
	224	/* load initrd */
	225	if (initrd_filename) {
b9e17a34	226	initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
44654490 PB	227	initrd_size = load_image_targphys(initrd_filename, initrd_base,
44654490 PB	228	ram_size - initrd_base);
b6b8bd18	229	if (initrd_size < 0) {
2ac71179 PB	230	hw_error("qemu: could not load initial ram disk '%s'\n",
2ac71179 PB	231	initrd_filename);
b6b8bd18 FB	232	exit(1);
b6b8bd18 FB	233	}
b9e17a34	234	cmdline_base = round_page(initrd_base + initrd_size);
b6b8bd18 FB	235	} else {
	236	initrd_base = 0;
	237	initrd_size = 0;
b9e17a34	238	cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
b6b8bd18	239	}
6ac0e82d	240	ppc_boot_device = 'm';
b6b8bd18 FB	241	} else {
	242	kernel_base = 0;
	243	kernel_size = 0;
	244	initrd_base = 0;
	245	initrd_size = 0;
28c5af54 JM	246	ppc_boot_device = '\0';
	247	/* We consider that NewWorld PowerMac never have any floppy drive
	248	* For now, OHW cannot boot from the network.
	249	*/
0d913fdb JM	250	for (i = 0; boot_device[i] != '\0'; i++) {
	251	if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
	252	ppc_boot_device = boot_device[i];
28c5af54	253	break;
0d913fdb	254	}
28c5af54 JM	255	}
	256	if (ppc_boot_device == '\0') {
	257	fprintf(stderr, "No valid boot device for Mac99 machine\n");
	258	exit(1);
	259	}
b6b8bd18	260	}
0aa6a4a2	261
3cbee15b	262	/* Register 8 MB of ISA IO space */
968d683c	263	isa_mmio_init(0xf2000000, 0x00800000);
3b46e624	264
3cbee15b	265	/* UniN init */
febbd7c2 AK	266	memory_region_init_io(unin_memory, &unin_ops, NULL, "unin", 0x1000);
febbd7c2 AK	267	memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
47103572	268
7267c094	269	openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
3cbee15b	270	openpic_irqs[0] =
7267c094	271	g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
3cbee15b JM	272	for (i = 0; i < smp_cpus; i++) {
	273	/* Mac99 IRQ connection between OpenPIC outputs pins
	274	* and PowerPC input pins
	275	*/
	276	switch (PPC_INPUT(env)) {
	277	case PPC_FLAGS_INPUT_6xx:
	278	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	279	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	280	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	281	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	282	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	283	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	284	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
	285	/* Not connected ? */
	286	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	287	/* Check this */
	288	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	289	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
	290	break;
00af685f	291	#if defined(TARGET_PPC64)
3cbee15b JM	292	case PPC_FLAGS_INPUT_970:
	293	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	294	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	295	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	296	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	297	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	298	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	299	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
	300	/* Not connected ? */
	301	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	302	/* Check this */
	303	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	304	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
	305	break;
00af685f	306	#endif /* defined(TARGET_PPC64) */
3cbee15b	307	default:
2ac71179	308	hw_error("Bus model not supported on mac99 machine\n");
3cbee15b	309	exit(1);
0aa6a4a2	310	}
3cbee15b	311	}
23c5e4ca	312	pic = openpic_init(NULL, &pic_mem, smp_cpus, openpic_irqs, NULL);
0f921197 AG	313	if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
0f921197 AG	314	/* 970 gets a U3 bus */
aee97b84	315	pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
0f921197 AG	316	machine_arch = ARCH_MAC99_U3;
0f921197 AG	317	} else {
aee97b84	318	pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
0f921197 AG	319	machine_arch = ARCH_MAC99;
0f921197 AG	320	}
3cbee15b	321	/* init basic PC hardware */
78895427	322	pci_vga_init(pci_bus);
aae9366a	323
b39491a8	324	escc_mem = escc_init(0, pic[0x25], pic[0x24],
23c5e4ca	325	serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
5b15f275 AK	326	memory_region_init_alias(escc_bar, "escc-bar",
5b15f275 AK	327	escc_mem, 0, memory_region_size(escc_mem));
cb457d76 AL	328
cb457d76 AL	329	for(i = 0; i < nb_nics; i++)
07caea31	330	pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
cb457d76	331
75717903	332	ide_drive_get(hd, MAX_IDE_BUS);
23c5e4ca	333	dbdma = DBDMA_init(&dbdma_mem);
dffc07ca AG	334
dffc07ca AG	335	/* We only emulate 2 out of 3 IDE controllers for now */
23c5e4ca AK	336	ide_mem[0] = NULL;
	337	ide_mem[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
	338	ide_mem[2] = pmac_ide_init(&hd[MAX_IDE_DEVS], pic[0x0e], dbdma, 0x1a, pic[0x02]);
77f0435e	339
3cbee15b	340	/* cuda also initialize ADB */
a2236d48 AG	341	if (machine_arch == ARCH_MAC99_U3) {
	342	usb_enabled = 1;
	343	}
23c5e4ca	344	cuda_init(&cuda_mem, pic[0x19]);
aae9366a	345
3cbee15b JM	346	adb_kbd_init(&adb_bus);
3cbee15b JM	347	adb_mouse_init(&adb_bus);
3b46e624	348
23c5e4ca	349	macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem,
5b15f275	350	dbdma_mem, cuda_mem, NULL, 3, ide_mem, escc_bar);
0d92ed30 PB	351
0d92ed30 PB	352	if (usb_enabled) {
a67ba3b6	353	usb_ohci_init_pci(pci_bus, -1);
0d92ed30 PB	354	}
0d92ed30 PB	355
a2236d48 AG	356	/* U3 needs to use USB for input because Linux doesn't support via-cuda
	357	on PPC64 */
	358	if (machine_arch == ARCH_MAC99_U3) {
	359	usbdevice_create("keyboard");
	360	usbdevice_create("mouse");
	361	}
	362
b6b8bd18 FB	363	if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
b6b8bd18 FB	364	graphic_depth = 15;
4f3f238b	365
3cbee15b	366	/* The NewWorld NVRAM is not located in the MacIO device */
23c5e4ca	367	nvr = macio_nvram_init(0x2000, 1);
3cbee15b	368	pmac_format_nvram_partition(nvr, 0x2000);
23c5e4ca	369	macio_nvram_setup_bar(nvr, get_system_memory(), 0xFFF04000);
b6b8bd18	370	/* No PCI init: the BIOS will do it */
0aa6a4a2	371
006f3a48 BS	372	fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
	373	fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
	374	fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
0f921197	375	fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
513f789f BS	376	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
	377	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
	378	if (kernel_cmdline) {
b9e17a34 AG	379	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
b9e17a34 AG	380	pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
513f789f BS	381	} else {
	382	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
	383	}
	384	fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
	385	fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
	386	fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
10696b4f BS	387
	388	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
	389	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
	390	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
	391
45024f09	392	fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
dc333cd6 AG	393	if (kvm_enabled()) {
dc333cd6 AG	394	#ifdef CONFIG_KVM
45024f09 AG	395	uint8_t *hypercall;
45024f09 AG	396
dc333cd6	397	fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
7267c094	398	hypercall = g_malloc(16);
45024f09 AG	399	kvmppc_get_hypercall(env, hypercall, 16);
	400	fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
	401	fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
dc333cd6 AG	402	#endif
	403	} else {
	404	fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
	405	}
	406
513f789f	407	qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
aae9366a	408	}
0aa6a4a2	409
f80f9ec9	410	static QEMUMachine core99_machine = {
4b32e168 AL	411	.name = "mac99",
	412	.desc = "Mac99 based PowerMAC",
	413	.init = ppc_core99_init,
3d878caa	414	.max_cpus = MAX_CPUS,
46214a27 AF	415	#ifdef TARGET_PPC64
	416	.is_default = 1,
	417	#endif
0aa6a4a2	418	};
f80f9ec9 AL	419
	420	static void core99_machine_init(void)
	421	{
	422	qemu_register_machine(&core99_machine);
	423	}
	424
	425	machine_init(core99_machine_init);