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Commit | Line | Data |
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fc01f7e7 FB |
1 | /* |
2 | * QEMU System Emulator header | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #ifndef VL_H | |
25 | #define VL_H | |
26 | ||
67b915a5 FB |
27 | /* we put basic includes here to avoid repeating them in device drivers */ |
28 | #include <stdlib.h> | |
29 | #include <stdio.h> | |
30 | #include <stdarg.h> | |
31 | #include <string.h> | |
32 | #include <inttypes.h> | |
85571bc7 | 33 | #include <limits.h> |
8a7ddc38 | 34 | #include <time.h> |
67b915a5 FB |
35 | #include <ctype.h> |
36 | #include <errno.h> | |
37 | #include <unistd.h> | |
38 | #include <fcntl.h> | |
7d3505c5 | 39 | #include <sys/stat.h> |
67b915a5 FB |
40 | |
41 | #ifndef O_LARGEFILE | |
42 | #define O_LARGEFILE 0 | |
43 | #endif | |
40c3bac3 FB |
44 | #ifndef O_BINARY |
45 | #define O_BINARY 0 | |
46 | #endif | |
67b915a5 FB |
47 | |
48 | #ifdef _WIN32 | |
a18e524a | 49 | #include <windows.h> |
ac62f715 | 50 | #define fsync _commit |
57d1a2b6 FB |
51 | #define lseek _lseeki64 |
52 | #define ENOTSUP 4096 | |
beac80cd FB |
53 | extern int qemu_ftruncate64(int, int64_t); |
54 | #define ftruncate qemu_ftruncate64 | |
55 | ||
57d1a2b6 FB |
56 | |
57 | static inline char *realpath(const char *path, char *resolved_path) | |
58 | { | |
59 | _fullpath(resolved_path, path, _MAX_PATH); | |
60 | return resolved_path; | |
61 | } | |
ec3757de FB |
62 | |
63 | #define PRId64 "I64d" | |
26a76461 FB |
64 | #define PRIx64 "I64x" |
65 | #define PRIu64 "I64u" | |
66 | #define PRIo64 "I64o" | |
67b915a5 | 67 | #endif |
8a7ddc38 | 68 | |
ea2384d3 FB |
69 | #ifdef QEMU_TOOL |
70 | ||
71 | /* we use QEMU_TOOL in the command line tools which do not depend on | |
72 | the target CPU type */ | |
73 | #include "config-host.h" | |
74 | #include <setjmp.h> | |
75 | #include "osdep.h" | |
76 | #include "bswap.h" | |
77 | ||
78 | #else | |
79 | ||
4f209290 | 80 | #include "audio/audio.h" |
16f62432 | 81 | #include "cpu.h" |
1fddef4b | 82 | #include "gdbstub.h" |
16f62432 | 83 | |
ea2384d3 FB |
84 | #endif /* !defined(QEMU_TOOL) */ |
85 | ||
67b915a5 FB |
86 | #ifndef glue |
87 | #define xglue(x, y) x ## y | |
88 | #define glue(x, y) xglue(x, y) | |
89 | #define stringify(s) tostring(s) | |
90 | #define tostring(s) #s | |
91 | #endif | |
92 | ||
24236869 FB |
93 | #ifndef MIN |
94 | #define MIN(a, b) (((a) < (b)) ? (a) : (b)) | |
95 | #endif | |
96 | #ifndef MAX | |
97 | #define MAX(a, b) (((a) > (b)) ? (a) : (b)) | |
98 | #endif | |
99 | ||
33e3963e | 100 | /* vl.c */ |
80cabfad | 101 | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
313aa567 | 102 | |
80cabfad FB |
103 | void hw_error(const char *fmt, ...); |
104 | ||
80cabfad FB |
105 | extern const char *bios_dir; |
106 | ||
107 | void pstrcpy(char *buf, int buf_size, const char *str); | |
108 | char *pstrcat(char *buf, int buf_size, const char *s); | |
82c643ff | 109 | int strstart(const char *str, const char *val, const char **ptr); |
c4b1fcc0 | 110 | |
8a7ddc38 FB |
111 | extern int vm_running; |
112 | ||
0bd48850 FB |
113 | typedef struct vm_change_state_entry VMChangeStateEntry; |
114 | typedef void VMChangeStateHandler(void *opaque, int running); | |
8a7ddc38 FB |
115 | typedef void VMStopHandler(void *opaque, int reason); |
116 | ||
0bd48850 FB |
117 | VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, |
118 | void *opaque); | |
119 | void qemu_del_vm_change_state_handler(VMChangeStateEntry *e); | |
120 | ||
8a7ddc38 FB |
121 | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
122 | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); | |
123 | ||
124 | void vm_start(void); | |
125 | void vm_stop(int reason); | |
126 | ||
bb0c6722 FB |
127 | typedef void QEMUResetHandler(void *opaque); |
128 | ||
129 | void qemu_register_reset(QEMUResetHandler *func, void *opaque); | |
130 | void qemu_system_reset_request(void); | |
131 | void qemu_system_shutdown_request(void); | |
3475187d FB |
132 | void qemu_system_powerdown_request(void); |
133 | #if !defined(TARGET_SPARC) | |
134 | // Please implement a power failure function to signal the OS | |
135 | #define qemu_system_powerdown() do{}while(0) | |
136 | #else | |
137 | void qemu_system_powerdown(void); | |
138 | #endif | |
bb0c6722 | 139 | |
ea2384d3 FB |
140 | void main_loop_wait(int timeout); |
141 | ||
0ced6589 FB |
142 | extern int ram_size; |
143 | extern int bios_size; | |
ee22c2f7 | 144 | extern int rtc_utc; |
1f04275e | 145 | extern int cirrus_vga_enabled; |
28b9b5af FB |
146 | extern int graphic_width; |
147 | extern int graphic_height; | |
148 | extern int graphic_depth; | |
3d11d0eb | 149 | extern const char *keyboard_layout; |
d993e026 | 150 | extern int kqemu_allowed; |
a09db21f | 151 | extern int win2k_install_hack; |
bb36d470 | 152 | extern int usb_enabled; |
6a00d601 | 153 | extern int smp_cpus; |
0ced6589 FB |
154 | |
155 | /* XXX: make it dynamic */ | |
75956cf0 | 156 | #if defined (TARGET_PPC) || defined (TARGET_SPARC64) |
d5295253 | 157 | #define BIOS_SIZE ((512 + 32) * 1024) |
6af0bf9c FB |
158 | #elif defined(TARGET_MIPS) |
159 | #define BIOS_SIZE (128 * 1024) | |
0ced6589 | 160 | #else |
7587cf44 | 161 | #define BIOS_SIZE ((256 + 64) * 1024) |
0ced6589 | 162 | #endif |
aaaa7df6 | 163 | |
63066f4f FB |
164 | /* keyboard/mouse support */ |
165 | ||
166 | #define MOUSE_EVENT_LBUTTON 0x01 | |
167 | #define MOUSE_EVENT_RBUTTON 0x02 | |
168 | #define MOUSE_EVENT_MBUTTON 0x04 | |
169 | ||
170 | typedef void QEMUPutKBDEvent(void *opaque, int keycode); | |
171 | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); | |
172 | ||
173 | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); | |
09b26c5e | 174 | void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute); |
63066f4f FB |
175 | |
176 | void kbd_put_keycode(int keycode); | |
177 | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); | |
09b26c5e | 178 | int kbd_mouse_is_absolute(void); |
63066f4f | 179 | |
82c643ff FB |
180 | /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx |
181 | constants) */ | |
182 | #define QEMU_KEY_ESC1(c) ((c) | 0xe100) | |
183 | #define QEMU_KEY_BACKSPACE 0x007f | |
184 | #define QEMU_KEY_UP QEMU_KEY_ESC1('A') | |
185 | #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') | |
186 | #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') | |
187 | #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') | |
188 | #define QEMU_KEY_HOME QEMU_KEY_ESC1(1) | |
189 | #define QEMU_KEY_END QEMU_KEY_ESC1(4) | |
190 | #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) | |
191 | #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) | |
192 | #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) | |
193 | ||
194 | #define QEMU_KEY_CTRL_UP 0xe400 | |
195 | #define QEMU_KEY_CTRL_DOWN 0xe401 | |
196 | #define QEMU_KEY_CTRL_LEFT 0xe402 | |
197 | #define QEMU_KEY_CTRL_RIGHT 0xe403 | |
198 | #define QEMU_KEY_CTRL_HOME 0xe404 | |
199 | #define QEMU_KEY_CTRL_END 0xe405 | |
200 | #define QEMU_KEY_CTRL_PAGEUP 0xe406 | |
201 | #define QEMU_KEY_CTRL_PAGEDOWN 0xe407 | |
202 | ||
203 | void kbd_put_keysym(int keysym); | |
204 | ||
c20709aa FB |
205 | /* async I/O support */ |
206 | ||
207 | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); | |
208 | typedef int IOCanRWHandler(void *opaque); | |
7c9d8e07 | 209 | typedef void IOHandler(void *opaque); |
c20709aa | 210 | |
7c9d8e07 FB |
211 | int qemu_set_fd_handler2(int fd, |
212 | IOCanRWHandler *fd_read_poll, | |
213 | IOHandler *fd_read, | |
214 | IOHandler *fd_write, | |
215 | void *opaque); | |
216 | int qemu_set_fd_handler(int fd, | |
217 | IOHandler *fd_read, | |
218 | IOHandler *fd_write, | |
219 | void *opaque); | |
c20709aa | 220 | |
f331110f FB |
221 | /* Polling handling */ |
222 | ||
223 | /* return TRUE if no sleep should be done afterwards */ | |
224 | typedef int PollingFunc(void *opaque); | |
225 | ||
226 | int qemu_add_polling_cb(PollingFunc *func, void *opaque); | |
227 | void qemu_del_polling_cb(PollingFunc *func, void *opaque); | |
228 | ||
a18e524a FB |
229 | #ifdef _WIN32 |
230 | /* Wait objects handling */ | |
231 | typedef void WaitObjectFunc(void *opaque); | |
232 | ||
233 | int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); | |
234 | void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); | |
235 | #endif | |
236 | ||
82c643ff FB |
237 | /* character device */ |
238 | ||
239 | #define CHR_EVENT_BREAK 0 /* serial break char */ | |
ea2384d3 | 240 | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
82c643ff | 241 | |
2122c51a FB |
242 | |
243 | ||
244 | #define CHR_IOCTL_SERIAL_SET_PARAMS 1 | |
245 | typedef struct { | |
246 | int speed; | |
247 | int parity; | |
248 | int data_bits; | |
249 | int stop_bits; | |
250 | } QEMUSerialSetParams; | |
251 | ||
252 | #define CHR_IOCTL_SERIAL_SET_BREAK 2 | |
253 | ||
254 | #define CHR_IOCTL_PP_READ_DATA 3 | |
255 | #define CHR_IOCTL_PP_WRITE_DATA 4 | |
256 | #define CHR_IOCTL_PP_READ_CONTROL 5 | |
257 | #define CHR_IOCTL_PP_WRITE_CONTROL 6 | |
258 | #define CHR_IOCTL_PP_READ_STATUS 7 | |
259 | ||
82c643ff FB |
260 | typedef void IOEventHandler(void *opaque, int event); |
261 | ||
262 | typedef struct CharDriverState { | |
263 | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); | |
264 | void (*chr_add_read_handler)(struct CharDriverState *s, | |
265 | IOCanRWHandler *fd_can_read, | |
266 | IOReadHandler *fd_read, void *opaque); | |
2122c51a | 267 | int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); |
82c643ff | 268 | IOEventHandler *chr_event; |
eb45f5fe | 269 | void (*chr_send_event)(struct CharDriverState *chr, int event); |
f331110f | 270 | void (*chr_close)(struct CharDriverState *chr); |
82c643ff FB |
271 | void *opaque; |
272 | } CharDriverState; | |
273 | ||
274 | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); | |
275 | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); | |
ea2384d3 | 276 | void qemu_chr_send_event(CharDriverState *s, int event); |
82c643ff FB |
277 | void qemu_chr_add_read_handler(CharDriverState *s, |
278 | IOCanRWHandler *fd_can_read, | |
279 | IOReadHandler *fd_read, void *opaque); | |
280 | void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event); | |
2122c51a | 281 | int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); |
f8d179e3 | 282 | |
82c643ff FB |
283 | /* consoles */ |
284 | ||
285 | typedef struct DisplayState DisplayState; | |
286 | typedef struct TextConsole TextConsole; | |
287 | ||
95219897 PB |
288 | typedef void (*vga_hw_update_ptr)(void *); |
289 | typedef void (*vga_hw_invalidate_ptr)(void *); | |
290 | typedef void (*vga_hw_screen_dump_ptr)(void *, const char *); | |
291 | ||
292 | TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update, | |
293 | vga_hw_invalidate_ptr invalidate, | |
294 | vga_hw_screen_dump_ptr screen_dump, | |
295 | void *opaque); | |
296 | void vga_hw_update(void); | |
297 | void vga_hw_invalidate(void); | |
298 | void vga_hw_screen_dump(const char *filename); | |
299 | ||
300 | int is_graphic_console(void); | |
82c643ff FB |
301 | CharDriverState *text_console_init(DisplayState *ds); |
302 | void console_select(unsigned int index); | |
303 | ||
8d11df9e FB |
304 | /* serial ports */ |
305 | ||
306 | #define MAX_SERIAL_PORTS 4 | |
307 | ||
308 | extern CharDriverState *serial_hds[MAX_SERIAL_PORTS]; | |
309 | ||
6508fe59 FB |
310 | /* parallel ports */ |
311 | ||
312 | #define MAX_PARALLEL_PORTS 3 | |
313 | ||
314 | extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS]; | |
315 | ||
7c9d8e07 FB |
316 | /* VLANs support */ |
317 | ||
318 | typedef struct VLANClientState VLANClientState; | |
319 | ||
320 | struct VLANClientState { | |
321 | IOReadHandler *fd_read; | |
d861b05e PB |
322 | /* Packets may still be sent if this returns zero. It's used to |
323 | rate-limit the slirp code. */ | |
324 | IOCanRWHandler *fd_can_read; | |
7c9d8e07 FB |
325 | void *opaque; |
326 | struct VLANClientState *next; | |
327 | struct VLANState *vlan; | |
328 | char info_str[256]; | |
329 | }; | |
330 | ||
331 | typedef struct VLANState { | |
332 | int id; | |
333 | VLANClientState *first_client; | |
334 | struct VLANState *next; | |
335 | } VLANState; | |
336 | ||
337 | VLANState *qemu_find_vlan(int id); | |
338 | VLANClientState *qemu_new_vlan_client(VLANState *vlan, | |
d861b05e PB |
339 | IOReadHandler *fd_read, |
340 | IOCanRWHandler *fd_can_read, | |
341 | void *opaque); | |
342 | int qemu_can_send_packet(VLANClientState *vc); | |
7c9d8e07 | 343 | void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size); |
d861b05e | 344 | void qemu_handler_true(void *opaque); |
7c9d8e07 FB |
345 | |
346 | void do_info_network(void); | |
347 | ||
7fb843f8 FB |
348 | /* TAP win32 */ |
349 | int tap_win32_init(VLANState *vlan, const char *ifname); | |
350 | void tap_win32_poll(void); | |
351 | ||
7c9d8e07 | 352 | /* NIC info */ |
c4b1fcc0 FB |
353 | |
354 | #define MAX_NICS 8 | |
355 | ||
7c9d8e07 | 356 | typedef struct NICInfo { |
c4b1fcc0 | 357 | uint8_t macaddr[6]; |
a41b2ff2 | 358 | const char *model; |
7c9d8e07 FB |
359 | VLANState *vlan; |
360 | } NICInfo; | |
c4b1fcc0 FB |
361 | |
362 | extern int nb_nics; | |
7c9d8e07 | 363 | extern NICInfo nd_table[MAX_NICS]; |
8a7ddc38 FB |
364 | |
365 | /* timers */ | |
366 | ||
367 | typedef struct QEMUClock QEMUClock; | |
368 | typedef struct QEMUTimer QEMUTimer; | |
369 | typedef void QEMUTimerCB(void *opaque); | |
370 | ||
371 | /* The real time clock should be used only for stuff which does not | |
372 | change the virtual machine state, as it is run even if the virtual | |
69b91039 | 373 | machine is stopped. The real time clock has a frequency of 1000 |
8a7ddc38 FB |
374 | Hz. */ |
375 | extern QEMUClock *rt_clock; | |
376 | ||
e80cfcfc | 377 | /* The virtual clock is only run during the emulation. It is stopped |
8a7ddc38 FB |
378 | when the virtual machine is stopped. Virtual timers use a high |
379 | precision clock, usually cpu cycles (use ticks_per_sec). */ | |
380 | extern QEMUClock *vm_clock; | |
381 | ||
382 | int64_t qemu_get_clock(QEMUClock *clock); | |
383 | ||
384 | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque); | |
385 | void qemu_free_timer(QEMUTimer *ts); | |
386 | void qemu_del_timer(QEMUTimer *ts); | |
387 | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time); | |
388 | int qemu_timer_pending(QEMUTimer *ts); | |
389 | ||
390 | extern int64_t ticks_per_sec; | |
391 | extern int pit_min_timer_count; | |
392 | ||
393 | void cpu_enable_ticks(void); | |
394 | void cpu_disable_ticks(void); | |
395 | ||
396 | /* VM Load/Save */ | |
397 | ||
398 | typedef FILE QEMUFile; | |
399 | ||
400 | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); | |
401 | void qemu_put_byte(QEMUFile *f, int v); | |
402 | void qemu_put_be16(QEMUFile *f, unsigned int v); | |
403 | void qemu_put_be32(QEMUFile *f, unsigned int v); | |
404 | void qemu_put_be64(QEMUFile *f, uint64_t v); | |
405 | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); | |
406 | int qemu_get_byte(QEMUFile *f); | |
407 | unsigned int qemu_get_be16(QEMUFile *f); | |
408 | unsigned int qemu_get_be32(QEMUFile *f); | |
409 | uint64_t qemu_get_be64(QEMUFile *f); | |
410 | ||
411 | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) | |
412 | { | |
413 | qemu_put_be64(f, *pv); | |
414 | } | |
415 | ||
416 | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) | |
417 | { | |
418 | qemu_put_be32(f, *pv); | |
419 | } | |
420 | ||
421 | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) | |
422 | { | |
423 | qemu_put_be16(f, *pv); | |
424 | } | |
425 | ||
426 | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) | |
427 | { | |
428 | qemu_put_byte(f, *pv); | |
429 | } | |
430 | ||
431 | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) | |
432 | { | |
433 | *pv = qemu_get_be64(f); | |
434 | } | |
435 | ||
436 | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) | |
437 | { | |
438 | *pv = qemu_get_be32(f); | |
439 | } | |
440 | ||
441 | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) | |
442 | { | |
443 | *pv = qemu_get_be16(f); | |
444 | } | |
445 | ||
446 | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) | |
447 | { | |
448 | *pv = qemu_get_byte(f); | |
449 | } | |
450 | ||
c27004ec FB |
451 | #if TARGET_LONG_BITS == 64 |
452 | #define qemu_put_betl qemu_put_be64 | |
453 | #define qemu_get_betl qemu_get_be64 | |
454 | #define qemu_put_betls qemu_put_be64s | |
455 | #define qemu_get_betls qemu_get_be64s | |
456 | #else | |
457 | #define qemu_put_betl qemu_put_be32 | |
458 | #define qemu_get_betl qemu_get_be32 | |
459 | #define qemu_put_betls qemu_put_be32s | |
460 | #define qemu_get_betls qemu_get_be32s | |
461 | #endif | |
462 | ||
8a7ddc38 FB |
463 | int64_t qemu_ftell(QEMUFile *f); |
464 | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence); | |
465 | ||
466 | typedef void SaveStateHandler(QEMUFile *f, void *opaque); | |
467 | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); | |
468 | ||
469 | int qemu_loadvm(const char *filename); | |
470 | int qemu_savevm(const char *filename); | |
471 | int register_savevm(const char *idstr, | |
472 | int instance_id, | |
473 | int version_id, | |
474 | SaveStateHandler *save_state, | |
475 | LoadStateHandler *load_state, | |
476 | void *opaque); | |
477 | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts); | |
478 | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts); | |
c4b1fcc0 | 479 | |
6a00d601 FB |
480 | void cpu_save(QEMUFile *f, void *opaque); |
481 | int cpu_load(QEMUFile *f, void *opaque, int version_id); | |
482 | ||
fc01f7e7 FB |
483 | /* block.c */ |
484 | typedef struct BlockDriverState BlockDriverState; | |
ea2384d3 FB |
485 | typedef struct BlockDriver BlockDriver; |
486 | ||
487 | extern BlockDriver bdrv_raw; | |
488 | extern BlockDriver bdrv_cow; | |
489 | extern BlockDriver bdrv_qcow; | |
490 | extern BlockDriver bdrv_vmdk; | |
3c56521b | 491 | extern BlockDriver bdrv_cloop; |
585d0ed9 | 492 | extern BlockDriver bdrv_dmg; |
a8753c34 | 493 | extern BlockDriver bdrv_bochs; |
6a0f9e82 | 494 | extern BlockDriver bdrv_vpc; |
de167e41 | 495 | extern BlockDriver bdrv_vvfat; |
ea2384d3 FB |
496 | |
497 | void bdrv_init(void); | |
498 | BlockDriver *bdrv_find_format(const char *format_name); | |
499 | int bdrv_create(BlockDriver *drv, | |
500 | const char *filename, int64_t size_in_sectors, | |
501 | const char *backing_file, int flags); | |
c4b1fcc0 FB |
502 | BlockDriverState *bdrv_new(const char *device_name); |
503 | void bdrv_delete(BlockDriverState *bs); | |
504 | int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot); | |
ea2384d3 FB |
505 | int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot, |
506 | BlockDriver *drv); | |
fc01f7e7 FB |
507 | void bdrv_close(BlockDriverState *bs); |
508 | int bdrv_read(BlockDriverState *bs, int64_t sector_num, | |
509 | uint8_t *buf, int nb_sectors); | |
510 | int bdrv_write(BlockDriverState *bs, int64_t sector_num, | |
511 | const uint8_t *buf, int nb_sectors); | |
512 | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr); | |
33e3963e | 513 | int bdrv_commit(BlockDriverState *bs); |
77fef8c1 | 514 | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
7a6cba61 PB |
515 | /* Ensure contents are flushed to disk. */ |
516 | void bdrv_flush(BlockDriverState *bs); | |
33e3963e | 517 | |
c4b1fcc0 FB |
518 | #define BDRV_TYPE_HD 0 |
519 | #define BDRV_TYPE_CDROM 1 | |
520 | #define BDRV_TYPE_FLOPPY 2 | |
46d4767d FB |
521 | #define BIOS_ATA_TRANSLATION_AUTO 0 |
522 | #define BIOS_ATA_TRANSLATION_NONE 1 | |
523 | #define BIOS_ATA_TRANSLATION_LBA 2 | |
c4b1fcc0 FB |
524 | |
525 | void bdrv_set_geometry_hint(BlockDriverState *bs, | |
526 | int cyls, int heads, int secs); | |
527 | void bdrv_set_type_hint(BlockDriverState *bs, int type); | |
46d4767d | 528 | void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
c4b1fcc0 FB |
529 | void bdrv_get_geometry_hint(BlockDriverState *bs, |
530 | int *pcyls, int *pheads, int *psecs); | |
531 | int bdrv_get_type_hint(BlockDriverState *bs); | |
46d4767d | 532 | int bdrv_get_translation_hint(BlockDriverState *bs); |
c4b1fcc0 FB |
533 | int bdrv_is_removable(BlockDriverState *bs); |
534 | int bdrv_is_read_only(BlockDriverState *bs); | |
535 | int bdrv_is_inserted(BlockDriverState *bs); | |
536 | int bdrv_is_locked(BlockDriverState *bs); | |
537 | void bdrv_set_locked(BlockDriverState *bs, int locked); | |
538 | void bdrv_set_change_cb(BlockDriverState *bs, | |
539 | void (*change_cb)(void *opaque), void *opaque); | |
ea2384d3 | 540 | void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
c4b1fcc0 FB |
541 | void bdrv_info(void); |
542 | BlockDriverState *bdrv_find(const char *name); | |
82c643ff | 543 | void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
ea2384d3 FB |
544 | int bdrv_is_encrypted(BlockDriverState *bs); |
545 | int bdrv_set_key(BlockDriverState *bs, const char *key); | |
546 | void bdrv_iterate_format(void (*it)(void *opaque, const char *name), | |
547 | void *opaque); | |
548 | const char *bdrv_get_device_name(BlockDriverState *bs); | |
c4b1fcc0 | 549 | |
ea2384d3 FB |
550 | int qcow_get_cluster_size(BlockDriverState *bs); |
551 | int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num, | |
552 | const uint8_t *buf); | |
553 | ||
554 | #ifndef QEMU_TOOL | |
54fa5af5 FB |
555 | |
556 | typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, | |
557 | int boot_device, | |
558 | DisplayState *ds, const char **fd_filename, int snapshot, | |
559 | const char *kernel_filename, const char *kernel_cmdline, | |
560 | const char *initrd_filename); | |
561 | ||
562 | typedef struct QEMUMachine { | |
563 | const char *name; | |
564 | const char *desc; | |
565 | QEMUMachineInitFunc *init; | |
566 | struct QEMUMachine *next; | |
567 | } QEMUMachine; | |
568 | ||
569 | int qemu_register_machine(QEMUMachine *m); | |
570 | ||
571 | typedef void SetIRQFunc(void *opaque, int irq_num, int level); | |
3de388f6 | 572 | typedef void IRQRequestFunc(void *opaque, int level); |
54fa5af5 | 573 | |
26aa7d72 FB |
574 | /* ISA bus */ |
575 | ||
576 | extern target_phys_addr_t isa_mem_base; | |
577 | ||
578 | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | |
579 | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); | |
580 | ||
581 | int register_ioport_read(int start, int length, int size, | |
582 | IOPortReadFunc *func, void *opaque); | |
583 | int register_ioport_write(int start, int length, int size, | |
584 | IOPortWriteFunc *func, void *opaque); | |
69b91039 FB |
585 | void isa_unassign_ioport(int start, int length); |
586 | ||
587 | /* PCI bus */ | |
588 | ||
69b91039 FB |
589 | extern target_phys_addr_t pci_mem_base; |
590 | ||
46e50e9d | 591 | typedef struct PCIBus PCIBus; |
69b91039 FB |
592 | typedef struct PCIDevice PCIDevice; |
593 | ||
594 | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, | |
595 | uint32_t address, uint32_t data, int len); | |
596 | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, | |
597 | uint32_t address, int len); | |
598 | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, | |
599 | uint32_t addr, uint32_t size, int type); | |
600 | ||
601 | #define PCI_ADDRESS_SPACE_MEM 0x00 | |
602 | #define PCI_ADDRESS_SPACE_IO 0x01 | |
603 | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 | |
604 | ||
605 | typedef struct PCIIORegion { | |
5768f5ac | 606 | uint32_t addr; /* current PCI mapping address. -1 means not mapped */ |
69b91039 FB |
607 | uint32_t size; |
608 | uint8_t type; | |
609 | PCIMapIORegionFunc *map_func; | |
610 | } PCIIORegion; | |
611 | ||
8a8696a3 FB |
612 | #define PCI_ROM_SLOT 6 |
613 | #define PCI_NUM_REGIONS 7 | |
502a5395 PB |
614 | |
615 | #define PCI_DEVICES_MAX 64 | |
616 | ||
617 | #define PCI_VENDOR_ID 0x00 /* 16 bits */ | |
618 | #define PCI_DEVICE_ID 0x02 /* 16 bits */ | |
619 | #define PCI_COMMAND 0x04 /* 16 bits */ | |
620 | #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ | |
621 | #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ | |
622 | #define PCI_CLASS_DEVICE 0x0a /* Device class */ | |
623 | #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ | |
624 | #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ | |
625 | #define PCI_MIN_GNT 0x3e /* 8 bits */ | |
626 | #define PCI_MAX_LAT 0x3f /* 8 bits */ | |
627 | ||
69b91039 FB |
628 | struct PCIDevice { |
629 | /* PCI config space */ | |
630 | uint8_t config[256]; | |
631 | ||
632 | /* the following fields are read only */ | |
46e50e9d | 633 | PCIBus *bus; |
69b91039 FB |
634 | int devfn; |
635 | char name[64]; | |
8a8696a3 | 636 | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
69b91039 FB |
637 | |
638 | /* do not access the following fields */ | |
639 | PCIConfigReadFunc *config_read; | |
640 | PCIConfigWriteFunc *config_write; | |
502a5395 | 641 | /* ??? This is a PC-specific hack, and should be removed. */ |
5768f5ac | 642 | int irq_index; |
69b91039 FB |
643 | }; |
644 | ||
46e50e9d FB |
645 | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
646 | int instance_size, int devfn, | |
69b91039 FB |
647 | PCIConfigReadFunc *config_read, |
648 | PCIConfigWriteFunc *config_write); | |
649 | ||
650 | void pci_register_io_region(PCIDevice *pci_dev, int region_num, | |
651 | uint32_t size, int type, | |
652 | PCIMapIORegionFunc *map_func); | |
653 | ||
5768f5ac FB |
654 | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
655 | ||
656 | uint32_t pci_default_read_config(PCIDevice *d, | |
657 | uint32_t address, int len); | |
658 | void pci_default_write_config(PCIDevice *d, | |
659 | uint32_t address, uint32_t val, int len); | |
30ca2aab FB |
660 | void generic_pci_save(QEMUFile* f, void *opaque); |
661 | int generic_pci_load(QEMUFile* f, void *opaque, int version_id); | |
5768f5ac | 662 | |
502a5395 PB |
663 | typedef void (*pci_set_irq_fn)(PCIDevice *pci_dev, void *pic, |
664 | int irq_num, int level); | |
665 | PCIBus *pci_register_bus(pci_set_irq_fn set_irq, void *pic, int devfn_min); | |
666 | ||
667 | void pci_nic_init(PCIBus *bus, NICInfo *nd); | |
668 | void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); | |
669 | uint32_t pci_data_read(void *opaque, uint32_t addr, int len); | |
670 | int pci_bus_num(PCIBus *s); | |
671 | void pci_for_each_device(void (*fn)(PCIDevice *d)); | |
9995c51f | 672 | |
5768f5ac | 673 | void pci_info(void); |
26aa7d72 | 674 | |
502a5395 | 675 | /* prep_pci.c */ |
46e50e9d | 676 | PCIBus *pci_prep_init(void); |
77d4bc34 | 677 | |
502a5395 PB |
678 | /* grackle_pci.c */ |
679 | PCIBus *pci_grackle_init(uint32_t base, void *pic); | |
680 | ||
681 | /* unin_pci.c */ | |
682 | PCIBus *pci_pmac_init(void *pic); | |
683 | ||
684 | /* apb_pci.c */ | |
685 | PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base, | |
686 | void *pic); | |
687 | ||
688 | PCIBus *pci_vpb_init(void *pic); | |
689 | ||
690 | /* piix_pci.c */ | |
691 | PCIBus *i440fx_init(void); | |
692 | int piix3_init(PCIBus *bus); | |
693 | void pci_bios_init(void); | |
a41b2ff2 | 694 | |
28b9b5af FB |
695 | /* openpic.c */ |
696 | typedef struct openpic_t openpic_t; | |
54fa5af5 | 697 | void openpic_set_irq(void *opaque, int n_IRQ, int level); |
7668a27f FB |
698 | openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, |
699 | CPUState **envp); | |
28b9b5af | 700 | |
54fa5af5 FB |
701 | /* heathrow_pic.c */ |
702 | typedef struct HeathrowPICS HeathrowPICS; | |
703 | void heathrow_pic_set_irq(void *opaque, int num, int level); | |
704 | HeathrowPICS *heathrow_pic_init(int *pmem_index); | |
705 | ||
6a36d84e FB |
706 | #ifdef HAS_AUDIO |
707 | struct soundhw { | |
708 | const char *name; | |
709 | const char *descr; | |
710 | int enabled; | |
711 | int isa; | |
712 | union { | |
713 | int (*init_isa) (AudioState *s); | |
714 | int (*init_pci) (PCIBus *bus, AudioState *s); | |
715 | } init; | |
716 | }; | |
717 | ||
718 | extern struct soundhw soundhw[]; | |
719 | #endif | |
720 | ||
313aa567 FB |
721 | /* vga.c */ |
722 | ||
74a14f22 | 723 | #define VGA_RAM_SIZE (8192 * 1024) |
313aa567 | 724 | |
82c643ff | 725 | struct DisplayState { |
313aa567 FB |
726 | uint8_t *data; |
727 | int linesize; | |
728 | int depth; | |
d3079cd2 | 729 | int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */ |
82c643ff FB |
730 | int width; |
731 | int height; | |
24236869 FB |
732 | void *opaque; |
733 | ||
313aa567 FB |
734 | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
735 | void (*dpy_resize)(struct DisplayState *s, int w, int h); | |
736 | void (*dpy_refresh)(struct DisplayState *s); | |
24236869 | 737 | void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h); |
82c643ff | 738 | }; |
313aa567 FB |
739 | |
740 | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) | |
741 | { | |
742 | s->dpy_update(s, x, y, w, h); | |
743 | } | |
744 | ||
745 | static inline void dpy_resize(DisplayState *s, int w, int h) | |
746 | { | |
747 | s->dpy_resize(s, w, h); | |
748 | } | |
749 | ||
46e50e9d | 750 | int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
d5295253 FB |
751 | unsigned long vga_ram_offset, int vga_ram_size, |
752 | unsigned long vga_bios_offset, int vga_bios_size); | |
313aa567 | 753 | |
d6bfa22f | 754 | /* cirrus_vga.c */ |
46e50e9d | 755 | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
d6bfa22f | 756 | unsigned long vga_ram_offset, int vga_ram_size); |
d6bfa22f FB |
757 | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, |
758 | unsigned long vga_ram_offset, int vga_ram_size); | |
759 | ||
313aa567 | 760 | /* sdl.c */ |
d63d307f | 761 | void sdl_display_init(DisplayState *ds, int full_screen); |
313aa567 | 762 | |
da4dbf74 FB |
763 | /* cocoa.m */ |
764 | void cocoa_display_init(DisplayState *ds, int full_screen); | |
765 | ||
24236869 FB |
766 | /* vnc.c */ |
767 | void vnc_display_init(DisplayState *ds, int display); | |
768 | ||
5391d806 FB |
769 | /* ide.c */ |
770 | #define MAX_DISKS 4 | |
771 | ||
772 | extern BlockDriverState *bs_table[MAX_DISKS]; | |
773 | ||
69b91039 FB |
774 | void isa_ide_init(int iobase, int iobase2, int irq, |
775 | BlockDriverState *hd0, BlockDriverState *hd1); | |
54fa5af5 FB |
776 | void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, |
777 | int secondary_ide_enabled); | |
502a5395 | 778 | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn); |
28b9b5af | 779 | int pmac_ide_init (BlockDriverState **hd_table, |
54fa5af5 | 780 | SetIRQFunc *set_irq, void *irq_opaque, int irq); |
5391d806 | 781 | |
2e5d83bb PB |
782 | /* cdrom.c */ |
783 | int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track); | |
784 | int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num); | |
785 | ||
1d14ffa9 | 786 | /* es1370.c */ |
c0fe3827 | 787 | int es1370_init (PCIBus *bus, AudioState *s); |
1d14ffa9 | 788 | |
fb065187 | 789 | /* sb16.c */ |
c0fe3827 | 790 | int SB16_init (AudioState *s); |
fb065187 FB |
791 | |
792 | /* adlib.c */ | |
c0fe3827 | 793 | int Adlib_init (AudioState *s); |
fb065187 FB |
794 | |
795 | /* gus.c */ | |
c0fe3827 | 796 | int GUS_init (AudioState *s); |
27503323 FB |
797 | |
798 | /* dma.c */ | |
85571bc7 | 799 | typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
27503323 | 800 | int DMA_get_channel_mode (int nchan); |
85571bc7 FB |
801 | int DMA_read_memory (int nchan, void *buf, int pos, int size); |
802 | int DMA_write_memory (int nchan, void *buf, int pos, int size); | |
27503323 FB |
803 | void DMA_hold_DREQ (int nchan); |
804 | void DMA_release_DREQ (int nchan); | |
16f62432 | 805 | void DMA_schedule(int nchan); |
27503323 | 806 | void DMA_run (void); |
28b9b5af | 807 | void DMA_init (int high_page_enable); |
27503323 | 808 | void DMA_register_channel (int nchan, |
85571bc7 FB |
809 | DMA_transfer_handler transfer_handler, |
810 | void *opaque); | |
7138fcfb FB |
811 | /* fdc.c */ |
812 | #define MAX_FD 2 | |
813 | extern BlockDriverState *fd_table[MAX_FD]; | |
814 | ||
baca51fa FB |
815 | typedef struct fdctrl_t fdctrl_t; |
816 | ||
817 | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, | |
818 | uint32_t io_base, | |
819 | BlockDriverState **fds); | |
820 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); | |
7138fcfb | 821 | |
80cabfad FB |
822 | /* ne2000.c */ |
823 | ||
7c9d8e07 FB |
824 | void isa_ne2000_init(int base, int irq, NICInfo *nd); |
825 | void pci_ne2000_init(PCIBus *bus, NICInfo *nd); | |
80cabfad | 826 | |
a41b2ff2 PB |
827 | /* rtl8139.c */ |
828 | ||
829 | void pci_rtl8139_init(PCIBus *bus, NICInfo *nd); | |
830 | ||
e3c2613f FB |
831 | /* pcnet.c */ |
832 | ||
833 | void pci_pcnet_init(PCIBus *bus, NICInfo *nd); | |
834 | ||
80cabfad FB |
835 | /* pckbd.c */ |
836 | ||
80cabfad FB |
837 | void kbd_init(void); |
838 | ||
839 | /* mc146818rtc.c */ | |
840 | ||
8a7ddc38 | 841 | typedef struct RTCState RTCState; |
80cabfad | 842 | |
8a7ddc38 FB |
843 | RTCState *rtc_init(int base, int irq); |
844 | void rtc_set_memory(RTCState *s, int addr, int val); | |
845 | void rtc_set_date(RTCState *s, const struct tm *tm); | |
80cabfad FB |
846 | |
847 | /* serial.c */ | |
848 | ||
c4b1fcc0 | 849 | typedef struct SerialState SerialState; |
e5d13e2f FB |
850 | SerialState *serial_init(SetIRQFunc *set_irq, void *opaque, |
851 | int base, int irq, CharDriverState *chr); | |
852 | SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque, | |
853 | target_ulong base, int it_shift, | |
854 | int irq, CharDriverState *chr); | |
80cabfad | 855 | |
6508fe59 FB |
856 | /* parallel.c */ |
857 | ||
858 | typedef struct ParallelState ParallelState; | |
859 | ParallelState *parallel_init(int base, int irq, CharDriverState *chr); | |
860 | ||
80cabfad FB |
861 | /* i8259.c */ |
862 | ||
3de388f6 FB |
863 | typedef struct PicState2 PicState2; |
864 | extern PicState2 *isa_pic; | |
80cabfad | 865 | void pic_set_irq(int irq, int level); |
54fa5af5 | 866 | void pic_set_irq_new(void *opaque, int irq, int level); |
3de388f6 | 867 | PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque); |
d592d303 FB |
868 | void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func, |
869 | void *alt_irq_opaque); | |
3de388f6 FB |
870 | int pic_read_irq(PicState2 *s); |
871 | void pic_update_irq(PicState2 *s); | |
872 | uint32_t pic_intack_read(PicState2 *s); | |
c20709aa | 873 | void pic_info(void); |
4a0fb71e | 874 | void irq_info(void); |
80cabfad | 875 | |
c27004ec | 876 | /* APIC */ |
d592d303 FB |
877 | typedef struct IOAPICState IOAPICState; |
878 | ||
c27004ec FB |
879 | int apic_init(CPUState *env); |
880 | int apic_get_interrupt(CPUState *env); | |
d592d303 FB |
881 | IOAPICState *ioapic_init(void); |
882 | void ioapic_set_irq(void *opaque, int vector, int level); | |
c27004ec | 883 | |
80cabfad FB |
884 | /* i8254.c */ |
885 | ||
886 | #define PIT_FREQ 1193182 | |
887 | ||
ec844b96 FB |
888 | typedef struct PITState PITState; |
889 | ||
890 | PITState *pit_init(int base, int irq); | |
891 | void pit_set_gate(PITState *pit, int channel, int val); | |
892 | int pit_get_gate(PITState *pit, int channel); | |
fd06c375 FB |
893 | int pit_get_initial_count(PITState *pit, int channel); |
894 | int pit_get_mode(PITState *pit, int channel); | |
ec844b96 | 895 | int pit_get_out(PITState *pit, int channel, int64_t current_time); |
80cabfad | 896 | |
fd06c375 FB |
897 | /* pcspk.c */ |
898 | void pcspk_init(PITState *); | |
899 | int pcspk_audio_init(AudioState *); | |
900 | ||
6515b203 FB |
901 | /* acpi.c */ |
902 | extern int acpi_enabled; | |
502a5395 | 903 | void piix4_pm_init(PCIBus *bus, int devfn); |
6515b203 FB |
904 | void acpi_bios_init(void); |
905 | ||
80cabfad | 906 | /* pc.c */ |
54fa5af5 | 907 | extern QEMUMachine pc_machine; |
3dbbdc25 | 908 | extern QEMUMachine isapc_machine; |
52ca8d6a | 909 | extern int fd_bootchk; |
80cabfad | 910 | |
6a00d601 FB |
911 | void ioport_set_a20(int enable); |
912 | int ioport_get_a20(void); | |
913 | ||
26aa7d72 | 914 | /* ppc.c */ |
54fa5af5 FB |
915 | extern QEMUMachine prep_machine; |
916 | extern QEMUMachine core99_machine; | |
917 | extern QEMUMachine heathrow_machine; | |
918 | ||
6af0bf9c FB |
919 | /* mips_r4k.c */ |
920 | extern QEMUMachine mips_machine; | |
921 | ||
27c7ca7e FB |
922 | /* shix.c */ |
923 | extern QEMUMachine shix_machine; | |
924 | ||
8cc43fef FB |
925 | #ifdef TARGET_PPC |
926 | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); | |
927 | #endif | |
64201201 | 928 | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
77d4bc34 FB |
929 | |
930 | extern CPUWriteMemoryFunc *PPC_io_write[]; | |
931 | extern CPUReadMemoryFunc *PPC_io_read[]; | |
54fa5af5 | 932 | void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
26aa7d72 | 933 | |
e95c8d51 | 934 | /* sun4m.c */ |
54fa5af5 | 935 | extern QEMUMachine sun4m_machine; |
e80cfcfc | 936 | uint32_t iommu_translate(uint32_t addr); |
ba3c64fb | 937 | void pic_set_irq_cpu(int irq, int level, unsigned int cpu); |
e95c8d51 FB |
938 | |
939 | /* iommu.c */ | |
e80cfcfc FB |
940 | void *iommu_init(uint32_t addr); |
941 | uint32_t iommu_translate_local(void *opaque, uint32_t addr); | |
e95c8d51 FB |
942 | |
943 | /* lance.c */ | |
7c9d8e07 | 944 | void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr); |
e95c8d51 FB |
945 | |
946 | /* tcx.c */ | |
95219897 | 947 | void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base, |
6f7e9aec | 948 | unsigned long vram_offset, int vram_size, int width, int height); |
e80cfcfc FB |
949 | |
950 | /* slavio_intctl.c */ | |
951 | void *slavio_intctl_init(); | |
ba3c64fb | 952 | void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env); |
e80cfcfc FB |
953 | void slavio_pic_info(void *opaque); |
954 | void slavio_irq_info(void *opaque); | |
955 | void slavio_pic_set_irq(void *opaque, int irq, int level); | |
ba3c64fb | 956 | void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); |
e95c8d51 | 957 | |
5fe141fd FB |
958 | /* loader.c */ |
959 | int get_image_size(const char *filename); | |
960 | int load_image(const char *filename, uint8_t *addr); | |
9ee3c029 | 961 | int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry); |
e80cfcfc FB |
962 | int load_aout(const char *filename, uint8_t *addr); |
963 | ||
964 | /* slavio_timer.c */ | |
ba3c64fb | 965 | void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu); |
8d5f07fa | 966 | |
e80cfcfc FB |
967 | /* slavio_serial.c */ |
968 | SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); | |
969 | void slavio_serial_ms_kbd_init(int base, int irq); | |
e95c8d51 | 970 | |
3475187d FB |
971 | /* slavio_misc.c */ |
972 | void *slavio_misc_init(uint32_t base, int irq); | |
973 | void slavio_set_power_fail(void *opaque, int power_failing); | |
974 | ||
6f7e9aec FB |
975 | /* esp.c */ |
976 | void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr); | |
977 | ||
3475187d FB |
978 | /* sun4u.c */ |
979 | extern QEMUMachine sun4u_machine; | |
980 | ||
64201201 FB |
981 | /* NVRAM helpers */ |
982 | #include "hw/m48t59.h" | |
983 | ||
984 | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value); | |
985 | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); | |
986 | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value); | |
987 | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); | |
988 | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value); | |
989 | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); | |
990 | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, | |
991 | const unsigned char *str, uint32_t max); | |
992 | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); | |
993 | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr, | |
994 | uint32_t start, uint32_t count); | |
995 | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, | |
996 | const unsigned char *arch, | |
997 | uint32_t RAM_size, int boot_device, | |
998 | uint32_t kernel_image, uint32_t kernel_size, | |
28b9b5af | 999 | const char *cmdline, |
64201201 | 1000 | uint32_t initrd_image, uint32_t initrd_size, |
28b9b5af FB |
1001 | uint32_t NVRAM_image, |
1002 | int width, int height, int depth); | |
64201201 | 1003 | |
63066f4f FB |
1004 | /* adb.c */ |
1005 | ||
1006 | #define MAX_ADB_DEVICES 16 | |
1007 | ||
e2733d20 | 1008 | #define ADB_MAX_OUT_LEN 16 |
63066f4f | 1009 | |
e2733d20 | 1010 | typedef struct ADBDevice ADBDevice; |
63066f4f | 1011 | |
e2733d20 FB |
1012 | /* buf = NULL means polling */ |
1013 | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, | |
1014 | const uint8_t *buf, int len); | |
12c28fed FB |
1015 | typedef int ADBDeviceReset(ADBDevice *d); |
1016 | ||
63066f4f FB |
1017 | struct ADBDevice { |
1018 | struct ADBBusState *bus; | |
1019 | int devaddr; | |
1020 | int handler; | |
e2733d20 | 1021 | ADBDeviceRequest *devreq; |
12c28fed | 1022 | ADBDeviceReset *devreset; |
63066f4f FB |
1023 | void *opaque; |
1024 | }; | |
1025 | ||
1026 | typedef struct ADBBusState { | |
1027 | ADBDevice devices[MAX_ADB_DEVICES]; | |
1028 | int nb_devices; | |
e2733d20 | 1029 | int poll_index; |
63066f4f FB |
1030 | } ADBBusState; |
1031 | ||
e2733d20 FB |
1032 | int adb_request(ADBBusState *s, uint8_t *buf_out, |
1033 | const uint8_t *buf, int len); | |
1034 | int adb_poll(ADBBusState *s, uint8_t *buf_out); | |
63066f4f FB |
1035 | |
1036 | ADBDevice *adb_register_device(ADBBusState *s, int devaddr, | |
e2733d20 | 1037 | ADBDeviceRequest *devreq, |
12c28fed | 1038 | ADBDeviceReset *devreset, |
63066f4f FB |
1039 | void *opaque); |
1040 | void adb_kbd_init(ADBBusState *bus); | |
1041 | void adb_mouse_init(ADBBusState *bus); | |
1042 | ||
1043 | /* cuda.c */ | |
1044 | ||
1045 | extern ADBBusState adb_bus; | |
54fa5af5 | 1046 | int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); |
63066f4f | 1047 | |
bb36d470 FB |
1048 | #include "hw/usb.h" |
1049 | ||
a594cfbf FB |
1050 | /* usb ports of the VM */ |
1051 | ||
0d92ed30 PB |
1052 | void qemu_register_usb_port(USBPort *port, void *opaque, int index, |
1053 | usb_attachfn attach); | |
a594cfbf | 1054 | |
0d92ed30 | 1055 | #define VM_USB_HUB_SIZE 8 |
a594cfbf FB |
1056 | |
1057 | void do_usb_add(const char *devname); | |
1058 | void do_usb_del(const char *devname); | |
1059 | void usb_info(void); | |
1060 | ||
2e5d83bb PB |
1061 | /* scsi-disk.c */ |
1062 | typedef struct SCSIDevice SCSIDevice; | |
1063 | typedef void (*scsi_completionfn)(void *, uint32_t, int); | |
1064 | ||
1065 | SCSIDevice *scsi_disk_init(BlockDriverState *bdrv, | |
1066 | scsi_completionfn completion, | |
1067 | void *opaque); | |
1068 | void scsi_disk_destroy(SCSIDevice *s); | |
1069 | ||
0fc5c15a | 1070 | int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun); |
2e5d83bb PB |
1071 | int scsi_read_data(SCSIDevice *s, uint8_t *data, uint32_t len); |
1072 | int scsi_write_data(SCSIDevice *s, uint8_t *data, uint32_t len); | |
1073 | ||
7d8406be PB |
1074 | /* lsi53c895a.c */ |
1075 | void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id); | |
1076 | void *lsi_scsi_init(PCIBus *bus, int devfn); | |
1077 | ||
b5ff1b31 | 1078 | /* integratorcp.c */ |
40f137e1 PB |
1079 | extern QEMUMachine integratorcp926_machine; |
1080 | extern QEMUMachine integratorcp1026_machine; | |
b5ff1b31 | 1081 | |
cdbdb648 PB |
1082 | /* versatilepb.c */ |
1083 | extern QEMUMachine versatilepb_machine; | |
16406950 | 1084 | extern QEMUMachine versatileab_machine; |
cdbdb648 | 1085 | |
daa57963 FB |
1086 | /* ps2.c */ |
1087 | void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); | |
1088 | void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); | |
1089 | void ps2_write_mouse(void *, int val); | |
1090 | void ps2_write_keyboard(void *, int val); | |
1091 | uint32_t ps2_read_data(void *); | |
1092 | void ps2_queue(void *, int b); | |
f94f5d71 | 1093 | void ps2_keyboard_set_translation(void *opaque, int mode); |
daa57963 | 1094 | |
80337b66 FB |
1095 | /* smc91c111.c */ |
1096 | void smc91c111_init(NICInfo *, uint32_t, void *, int); | |
1097 | ||
bdd5003a | 1098 | /* pl110.c */ |
95219897 | 1099 | void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int); |
bdd5003a | 1100 | |
cdbdb648 PB |
1101 | /* pl011.c */ |
1102 | void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr); | |
1103 | ||
1104 | /* pl050.c */ | |
1105 | void pl050_init(uint32_t base, void *pic, int irq, int is_mouse); | |
1106 | ||
1107 | /* pl080.c */ | |
1108 | void *pl080_init(uint32_t base, void *pic, int irq); | |
1109 | ||
1110 | /* pl190.c */ | |
1111 | void *pl190_init(uint32_t base, void *parent, int irq, int fiq); | |
1112 | ||
1113 | /* arm-timer.c */ | |
1114 | void sp804_init(uint32_t base, void *pic, int irq); | |
1115 | void icp_pit_init(uint32_t base, void *pic, int irq); | |
1116 | ||
16406950 PB |
1117 | /* arm_boot.c */ |
1118 | ||
1119 | void arm_load_kernel(int ram_size, const char *kernel_filename, | |
1120 | const char *kernel_cmdline, const char *initrd_filename, | |
1121 | int board_id); | |
1122 | ||
27c7ca7e FB |
1123 | /* sh7750.c */ |
1124 | struct SH7750State; | |
1125 | ||
008a8818 | 1126 | struct SH7750State *sh7750_init(CPUState * cpu); |
27c7ca7e FB |
1127 | |
1128 | typedef struct { | |
1129 | /* The callback will be triggered if any of the designated lines change */ | |
1130 | uint16_t portamask_trigger; | |
1131 | uint16_t portbmask_trigger; | |
1132 | /* Return 0 if no action was taken */ | |
1133 | int (*port_change_cb) (uint16_t porta, uint16_t portb, | |
1134 | uint16_t * periph_pdtra, | |
1135 | uint16_t * periph_portdira, | |
1136 | uint16_t * periph_pdtrb, | |
1137 | uint16_t * periph_portdirb); | |
1138 | } sh7750_io_device; | |
1139 | ||
1140 | int sh7750_register_io_device(struct SH7750State *s, | |
1141 | sh7750_io_device * device); | |
1142 | /* tc58128.c */ | |
1143 | int tc58128_init(struct SH7750State *s, char *zone1, char *zone2); | |
1144 | ||
29133e9a FB |
1145 | /* NOR flash devices */ |
1146 | typedef struct pflash_t pflash_t; | |
1147 | ||
1148 | pflash_t *pflash_register (target_ulong base, ram_addr_t off, | |
1149 | BlockDriverState *bs, | |
1150 | target_ulong sector_len, int nb_blocs, int width, | |
1151 | uint16_t id0, uint16_t id1, | |
1152 | uint16_t id2, uint16_t id3); | |
1153 | ||
ea2384d3 FB |
1154 | #endif /* defined(QEMU_TOOL) */ |
1155 | ||
c4b1fcc0 | 1156 | /* monitor.c */ |
82c643ff | 1157 | void monitor_init(CharDriverState *hd, int show_banner); |
ea2384d3 FB |
1158 | void term_puts(const char *str); |
1159 | void term_vprintf(const char *fmt, va_list ap); | |
40c3bac3 | 1160 | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
c4b1fcc0 FB |
1161 | void term_flush(void); |
1162 | void term_print_help(void); | |
ea2384d3 FB |
1163 | void monitor_readline(const char *prompt, int is_password, |
1164 | char *buf, int buf_size); | |
1165 | ||
1166 | /* readline.c */ | |
1167 | typedef void ReadLineFunc(void *opaque, const char *str); | |
1168 | ||
1169 | extern int completion_index; | |
1170 | void add_completion(const char *str); | |
1171 | void readline_handle_byte(int ch); | |
1172 | void readline_find_completion(const char *cmdline); | |
1173 | const char *readline_get_history(unsigned int index); | |
1174 | void readline_start(const char *prompt, int is_password, | |
1175 | ReadLineFunc *readline_func, void *opaque); | |
c4b1fcc0 | 1176 | |
5e6ad6f9 FB |
1177 | void kqemu_record_dump(void); |
1178 | ||
fc01f7e7 | 1179 | #endif /* VL_H */ |