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xec_bc mask fix
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1/*
2 * PPC emulation helpers for qemu.
3 *
4 * Copyright (c) 2003 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <math.h>
21#include "exec.h"
22
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23#define MEMSUFFIX _raw
24#include "op_helper_mem.h"
a541f297 25#if !defined(CONFIG_USER_ONLY)
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26#define MEMSUFFIX _user
27#include "op_helper_mem.h"
28#define MEMSUFFIX _kernel
29#include "op_helper_mem.h"
30#endif
31
32/*****************************************************************************/
33/* Exceptions processing helpers */
9fddaa0c 34void cpu_loop_exit(void)
9a64fbe4 35{
9fddaa0c 36 longjmp(env->jmp_env, 1);
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37}
38
9fddaa0c 39void do_raise_exception_err (uint32_t exception, int error_code)
9a64fbe4 40{
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41#if 0
42 printf("Raise exception %3x code : %d\n", exception, error_code);
43#endif
44 switch (exception) {
45 case EXCP_EXTERNAL:
46 case EXCP_DECR:
47 printf("DECREMENTER & EXTERNAL exceptions should be hard interrupts !\n");
48 if (msr_ee == 0)
49 return;
50 break;
51 case EXCP_PROGRAM:
52 if (error_code == EXCP_FP && msr_fe0 == 0 && msr_fe1 == 0)
53 return;
54 break;
55 default:
56 break;
9a64fbe4 57}
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58 env->exception_index = exception;
59 env->error_code = error_code;
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60 cpu_loop_exit();
61 }
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62
63void do_raise_exception (uint32_t exception)
64{
65 do_raise_exception_err(exception, 0);
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66}
67
68/*****************************************************************************/
69/* Helpers for "fat" micro operations */
70/* Special registers load and store */
71void do_load_cr (void)
72{
73 T0 = (env->crf[0] << 28) |
74 (env->crf[1] << 24) |
75 (env->crf[2] << 20) |
76 (env->crf[3] << 16) |
77 (env->crf[4] << 12) |
78 (env->crf[5] << 8) |
79 (env->crf[6] << 4) |
80 (env->crf[7] << 0);
81}
82
83void do_store_cr (uint32_t mask)
84{
85 int i, sh;
86
87 for (i = 0, sh = 7; i < 8; i++, sh --) {
88 if (mask & (1 << sh))
89 env->crf[i] = (T0 >> (sh * 4)) & 0xF;
90 }
91}
92
93void do_load_xer (void)
94{
95 T0 = (xer_so << XER_SO) |
96 (xer_ov << XER_OV) |
97 (xer_ca << XER_CA) |
98 (xer_bc << XER_BC);
99}
100
101void do_store_xer (void)
102{
103 xer_so = (T0 >> XER_SO) & 0x01;
104 xer_ov = (T0 >> XER_OV) & 0x01;
105 xer_ca = (T0 >> XER_CA) & 0x01;
30aec876 106 xer_bc = (T0 >> XER_BC) & 0x3f;
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107}
108
109void do_load_msr (void)
110{
111 T0 = (msr_pow << MSR_POW) |
112 (msr_ile << MSR_ILE) |
113 (msr_ee << MSR_EE) |
114 (msr_pr << MSR_PR) |
115 (msr_fp << MSR_FP) |
116 (msr_me << MSR_ME) |
117 (msr_fe0 << MSR_FE0) |
118 (msr_se << MSR_SE) |
119 (msr_be << MSR_BE) |
120 (msr_fe1 << MSR_FE1) |
121 (msr_ip << MSR_IP) |
122 (msr_ir << MSR_IR) |
123 (msr_dr << MSR_DR) |
124 (msr_ri << MSR_RI) |
125 (msr_le << MSR_LE);
126}
127
128void do_store_msr (void)
129{
4b3686fa 130#if 1 // TRY
9a64fbe4 131 if (((T0 >> MSR_IR) & 0x01) != msr_ir ||
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132 ((T0 >> MSR_DR) & 0x01) != msr_dr ||
133 ((T0 >> MSR_PR) & 0x01) != msr_pr)
134 {
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135 do_tlbia();
136 }
4b3686fa 137#endif
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138 msr_pow = (T0 >> MSR_POW) & 0x03;
139 msr_ile = (T0 >> MSR_ILE) & 0x01;
140 msr_ee = (T0 >> MSR_EE) & 0x01;
141 msr_pr = (T0 >> MSR_PR) & 0x01;
142 msr_fp = (T0 >> MSR_FP) & 0x01;
143 msr_me = (T0 >> MSR_ME) & 0x01;
144 msr_fe0 = (T0 >> MSR_FE0) & 0x01;
145 msr_se = (T0 >> MSR_SE) & 0x01;
146 msr_be = (T0 >> MSR_BE) & 0x01;
147 msr_fe1 = (T0 >> MSR_FE1) & 0x01;
148 msr_ip = (T0 >> MSR_IP) & 0x01;
149 msr_ir = (T0 >> MSR_IR) & 0x01;
150 msr_dr = (T0 >> MSR_DR) & 0x01;
151 msr_ri = (T0 >> MSR_RI) & 0x01;
152 msr_le = (T0 >> MSR_LE) & 0x01;
153}
154
155/* shift right arithmetic helper */
156void do_sraw (void)
157{
158 int32_t ret;
159
160 xer_ca = 0;
161 if (T1 & 0x20) {
162 ret = (-1) * (T0 >> 31);
4b3686fa 163 if (ret < 0 && (T0 & ~0x80000000) != 0)
9a64fbe4 164 xer_ca = 1;
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165#if 1 // TRY
166 } else if (T1 == 0) {
167 ret = T0;
168#endif
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169 } else {
170 ret = (int32_t)T0 >> (T1 & 0x1f);
171 if (ret < 0 && ((int32_t)T0 & ((1 << T1) - 1)) != 0)
172 xer_ca = 1;
173 }
4b3686fa 174 T0 = ret;
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175}
176
177/* Floating point operations helpers */
178void do_load_fpscr (void)
179{
180 /* The 32 MSB of the target fpr are undefined.
181 * They'll be zero...
182 */
183 union {
184 double d;
185 struct {
186 uint32_t u[2];
187 } s;
188 } u;
189 int i;
190
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191#ifdef WORDS_BIGENDIAN
192#define WORD0 0
193#define WORD1 1
194#else
195#define WORD0 1
196#define WORD1 0
197#endif
198 u.s.u[WORD0] = 0;
199 u.s.u[WORD1] = 0;
9a64fbe4 200 for (i = 0; i < 8; i++)
3cc62370 201 u.s.u[WORD1] |= env->fpscr[i] << (4 * i);
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202 FT0 = u.d;
203}
204
205void do_store_fpscr (uint32_t mask)
206{
207 /*
208 * We use only the 32 LSB of the incoming fpr
209 */
210 union {
211 double d;
212 struct {
213 uint32_t u[2];
214 } s;
215 } u;
4ecc3190 216 int i, rnd_type;
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217
218 u.d = FT0;
219 if (mask & 0x80)
3cc62370 220 env->fpscr[0] = (env->fpscr[0] & 0x9) | ((u.s.u[WORD1] >> 28) & ~0x9);
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221 for (i = 1; i < 7; i++) {
222 if (mask & (1 << (7 - i)))
3cc62370 223 env->fpscr[i] = (u.s.u[WORD1] >> (4 * (7 - i))) & 0xF;
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224 }
225 /* TODO: update FEX & VX */
226 /* Set rounding mode */
227 switch (env->fpscr[0] & 0x3) {
228 case 0:
229 /* Best approximation (round to nearest) */
4ecc3190 230 rnd_type = float_round_nearest_even;
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231 break;
232 case 1:
233 /* Smaller magnitude (round toward zero) */
4ecc3190 234 rnd_type = float_round_to_zero;
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235 break;
236 case 2:
237 /* Round toward +infinite */
4ecc3190 238 rnd_type = float_round_up;
9a64fbe4 239 break;
4ecc3190 240 default:
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241 case 3:
242 /* Round toward -infinite */
4ecc3190 243 rnd_type = float_round_down;
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244 break;
245 }
4ecc3190 246 set_float_rounding_mode(rnd_type, &env->fp_status);
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247}
248
249void do_fctiw (void)
250{
251 union {
252 double d;
253 uint64_t i;
4ecc3190 254 } p;
9a64fbe4 255
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256 /* XXX: higher bits are not supposed to be significant.
257 * to make tests easier, return the same as a real PPC 750 (aka G3)
258 */
259 p.i = float64_to_int32(FT0, &env->fp_status);
260 p.i |= 0xFFF80000ULL << 32;
261 FT0 = p.d;
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262}
263
264void do_fctiwz (void)
265{
266 union {
267 double d;
268 uint64_t i;
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269 } p;
270
271 /* XXX: higher bits are not supposed to be significant.
272 * to make tests easier, return the same as a real PPC 750 (aka G3)
273 */
274 p.i = float64_to_int32_round_to_zero(FT0, &env->fp_status);
275 p.i |= 0xFFF80000ULL << 32;
276 FT0 = p.d;
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277}
278
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279void do_fnmadd (void)
280{
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281 FT0 = (FT0 * FT1) + FT2;
282 if (!isnan(FT0))
283 FT0 = -FT0;
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284}
285
286void do_fnmsub (void)
287{
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288 FT0 = (FT0 * FT1) - FT2;
289 if (!isnan(FT0))
290 FT0 = -FT0;
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291}
292
4ecc3190 293void do_fdiv (void)
1ef59d0a 294{
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295 if (FT0 == -0.0 && FT1 == -0.0)
296 FT0 = 0.0 / 0.0;
297 else
298 FT0 /= FT1;
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299}
300
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301void do_fsqrt (void)
302{
303 FT0 = sqrt(FT0);
304}
305
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306void do_fres (void)
307{
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308 union {
309 double d;
310 uint64_t i;
311 } p;
312
313 if (isnormal(FT0)) {
314 FT0 = (float)(1.0 / FT0);
315 } else {
316 p.d = FT0;
317 if (p.i == 0x8000000000000000ULL) {
318 p.i = 0xFFF0000000000000ULL;
319 } else if (p.i == 0x0000000000000000ULL) {
320 p.i = 0x7FF0000000000000ULL;
321 } else if (isnan(FT0)) {
322 p.i = 0x7FF8000000000000ULL;
323 } else if (FT0 < 0.0) {
324 p.i = 0x8000000000000000ULL;
325 } else {
326 p.i = 0x0000000000000000ULL;
327 }
328 FT0 = p.d;
329 }
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330}
331
4ecc3190 332void do_frsqrte (void)
9a64fbe4 333{
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334 union {
335 double d;
336 uint64_t i;
337 } p;
338
339 if (isnormal(FT0) && FT0 > 0.0) {
340 FT0 = (float)(1.0 / sqrt(FT0));
341 } else {
342 p.d = FT0;
343 if (p.i == 0x8000000000000000ULL) {
344 p.i = 0xFFF0000000000000ULL;
345 } else if (p.i == 0x0000000000000000ULL) {
346 p.i = 0x7FF0000000000000ULL;
347 } else if (isnan(FT0)) {
348 if (!(p.i & 0x0008000000000000ULL))
349 p.i |= 0x000FFFFFFFFFFFFFULL;
350 } else if (FT0 < 0) {
351 p.i = 0x7FF8000000000000ULL;
352 } else {
353 p.i = 0x0000000000000000ULL;
354 }
355 FT0 = p.d;
356 }
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357}
358
359void do_fsel (void)
360{
361 if (FT0 >= 0)
9a64fbe4 362 FT0 = FT1;
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363 else
364 FT0 = FT2;
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365}
366
367void do_fcmpu (void)
368{
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369 if (isnan(FT0) || isnan(FT1)) {
370 T0 = 0x01;
371 env->fpscr[4] |= 0x1;
372 env->fpscr[6] |= 0x1;
373 } else if (FT0 < FT1) {
374 T0 = 0x08;
375 } else if (FT0 > FT1) {
376 T0 = 0x04;
377 } else {
378 T0 = 0x02;
379 }
4b3686fa 380 env->fpscr[3] = T0;
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381}
382
383void do_fcmpo (void)
384{
385 env->fpscr[4] &= ~0x1;
386 if (isnan(FT0) || isnan(FT1)) {
387 T0 = 0x01;
388 env->fpscr[4] |= 0x1;
389 /* I don't know how to test "quiet" nan... */
390 if (0 /* || ! quiet_nan(...) */) {
391 env->fpscr[6] |= 0x1;
392 if (!(env->fpscr[1] & 0x8))
393 env->fpscr[4] |= 0x8;
394 } else {
395 env->fpscr[4] |= 0x8;
396 }
397 } else if (FT0 < FT1) {
398 T0 = 0x08;
399 } else if (FT0 > FT1) {
400 T0 = 0x04;
401 } else {
402 T0 = 0x02;
403 }
4b3686fa 404 env->fpscr[3] = T0;
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405}
406
407void do_fabs (void)
408{
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409 union {
410 double d;
411 uint64_t i;
412 } p;
413
414 p.d = FT0;
415 p.i &= ~0x8000000000000000ULL;
416 FT0 = p.d;
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417}
418
419void do_fnabs (void)
420{
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421 union {
422 double d;
423 uint64_t i;
424 } p;
425
426 p.d = FT0;
427 p.i |= 0x8000000000000000ULL;
428 FT0 = p.d;
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429}
430
431/* Instruction cache invalidation helper */
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432#define ICACHE_LINE_SIZE 32
433
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434void do_check_reservation (void)
435{
18fba28c 436 if ((env->reserve & ~0x03) == T0)
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437 env->reserve = -1;
438}
439
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440void do_icbi (void)
441{
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442 /* Invalidate one cache line */
443 T0 &= ~(ICACHE_LINE_SIZE - 1);
444 tb_invalidate_page_range(T0, T0 + ICACHE_LINE_SIZE);
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445}
446
447/* TLB invalidation helpers */
448void do_tlbia (void)
449{
ad081323 450 tlb_flush(env, 1);
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451}
452
453void do_tlbie (void)
454{
455 tlb_flush_page(env, T0);
456}
457
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458void do_store_sr (uint32_t srnum)
459{
460#if defined (DEBUG_OP)
461 dump_store_sr(srnum);
462#endif
463#if 0 // TRY
464 {
465 uint32_t base, page;
466
467 base = srnum << 28;
468 for (page = base; page != base + 0x100000000; page += 0x1000)
469 tlb_flush_page(env, page);
470 }
471#else
472 tlb_flush(env, 1);
473#endif
474 env->sr[srnum] = T0;
475}
476
477/* For BATs, we may not invalidate any TLBs if the change is only on
478 * protection bits for user mode.
479 */
480void do_store_ibat (int ul, int nr)
481{
482#if defined (DEBUG_OP)
483 dump_store_ibat(ul, nr);
484#endif
485#if 0 // TRY
486 {
487 uint32_t base, length, page;
488
489 base = env->IBAT[0][nr];
490 length = (((base >> 2) & 0x000007FF) + 1) << 17;
491 base &= 0xFFFC0000;
492 for (page = base; page != base + length; page += 0x1000)
493 tlb_flush_page(env, page);
494 }
495#else
496 tlb_flush(env, 1);
497#endif
498 env->IBAT[ul][nr] = T0;
499}
500
501void do_store_dbat (int ul, int nr)
502{
503#if defined (DEBUG_OP)
504 dump_store_dbat(ul, nr);
505#endif
506#if 0 // TRY
507 {
508 uint32_t base, length, page;
509 base = env->DBAT[0][nr];
510 length = (((base >> 2) & 0x000007FF) + 1) << 17;
511 base &= 0xFFFC0000;
512 for (page = base; page != base + length; page += 0x1000)
513 tlb_flush_page(env, page);
514 }
515#else
516 tlb_flush(env, 1);
517#endif
518 env->DBAT[ul][nr] = T0;
519}
520
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521/*****************************************************************************/
522/* Special helpers for debug */
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523void dump_state (void)
524{
7fe48483 525 // cpu_dump_state(env, stdout, fprintf, 0);
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526}
527
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528void dump_rfi (void)
529{
530#if 0
4b3686fa 531 printf("Return from interrupt => 0x%08x\n", env->nip);
7fe48483 532 // cpu_dump_state(env, stdout, fprintf, 0);
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533#endif
534}
535
536void dump_store_sr (int srnum)
537{
538#if 0
539 printf("%s: reg=%d 0x%08x\n", __func__, srnum, T0);
540#endif
541}
542
543static void _dump_store_bat (char ID, int ul, int nr)
544{
545 printf("Set %cBAT%d%c to 0x%08x (0x%08x)\n",
546 ID, nr, ul == 0 ? 'u' : 'l', T0, env->nip);
547}
548
549void dump_store_ibat (int ul, int nr)
550{
551 _dump_store_bat('I', ul, nr);
552}
553
554void dump_store_dbat (int ul, int nr)
555{
556 _dump_store_bat('D', ul, nr);
557}
558
559void dump_store_tb (int ul)
560{
561 printf("Set TB%c to 0x%08x\n", ul == 0 ? 'L' : 'U', T0);
562}
563
564void dump_update_tb(uint32_t param)
565{
566#if 0
567 printf("Update TB: 0x%08x + %d => 0x%08x\n", T1, param, T0);
568#endif
569}
570
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