[qemu.git] / target-ppc / op_helper.c

/*
 *  PPC emulation helpers for qemu.
 * 
 *  Copyright (c) 2003 Jocelyn Mayer
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#include <math.h>
#include "exec.h"

#if defined(CONFIG_USER_ONLY)
#define MEMSUFFIX _raw
#include "op_helper_mem.h"
#else
#define MEMSUFFIX _user
#include "op_helper_mem.h"
#define MEMSUFFIX _kernel
#include "op_helper_mem.h"
#endif

/*****************************************************************************/
/* Exceptions processing helpers */
void do_queue_exception_err (uint32_t exception, int error_code)
{
    /* Queue real PPC exceptions */
    if (exception < EXCP_PPC_MAX) {
        env->exceptions |= 1 << exception;
        env->errors[exception] = error_code;
    } else {
        /* Preserve compatibility with qemu core */
        env->exceptions |= 1;
        env->exception_index = exception;
        env->error_code = error_code;
    }
}

void do_queue_exception (uint32_t exception)
{
    do_queue_exception_err(exception, 0);
}

void do_check_exception_state (void)
{
    if ((env->exceptions & 1) == 1 || check_exception_state(env)) {
        env->exceptions &= ~1;
        cpu_loop_exit();
    }
}

/*****************************************************************************/
/* Helpers for "fat" micro operations */
/* Special registers load and store */
void do_load_cr (void)
{
    T0 = (env->crf[0] << 28) |
        (env->crf[1] << 24) |
        (env->crf[2] << 20) |
        (env->crf[3] << 16) |
        (env->crf[4] << 12) |
        (env->crf[5] << 8) |
        (env->crf[6] << 4) |
        (env->crf[7] << 0);
}

void do_store_cr (uint32_t mask)
{
    int i, sh;

    for (i = 0, sh = 7; i < 8; i++, sh --) {
        if (mask & (1 << sh))
            env->crf[i] = (T0 >> (sh * 4)) & 0xF;
    }
}

void do_load_xer (void)
{
    T0 = (xer_so << XER_SO) |
        (xer_ov << XER_OV) |
        (xer_ca << XER_CA) |
        (xer_bc << XER_BC);
}

void do_store_xer (void)
{
    xer_so = (T0 >> XER_SO) & 0x01;
    xer_ov = (T0 >> XER_OV) & 0x01;
    xer_ca = (T0 >> XER_CA) & 0x01;
    xer_bc = (T0 >> XER_BC) & 0x1f;
}

void do_load_msr (void)
{
    T0 = (msr_pow << MSR_POW) |
        (msr_ile << MSR_ILE) |
        (msr_ee << MSR_EE) |
        (msr_pr << MSR_PR) |
        (msr_fp << MSR_FP) |
        (msr_me << MSR_ME) |
        (msr_fe0 << MSR_FE0) |
        (msr_se << MSR_SE) |
        (msr_be << MSR_BE) |
        (msr_fe1 << MSR_FE1) |
        (msr_ip << MSR_IP) |
        (msr_ir << MSR_IR) |
        (msr_dr << MSR_DR) |
        (msr_ri << MSR_RI) |
        (msr_le << MSR_LE);
}

void do_store_msr (void)
{
    if (((T0 >> MSR_IR) & 0x01) != msr_ir ||
        ((T0 >> MSR_DR) & 0x01) != msr_dr ||
        ((T0 >> MSR_PR) & 0x01) != msr_pr) {
        /* Flush all tlb when changing translation mode or privilege level */
        do_tlbia();
    }
#if 0
    if ((T0 >> MSR_IP) & 0x01) {
        printf("Halting CPU. Stop emulation\n");
        do_queue_exception(EXCP_HLT);
        cpu_loop_exit();
    }
#endif
    msr_pow = (T0 >> MSR_POW) & 0x03;
    msr_ile = (T0 >> MSR_ILE) & 0x01;
    msr_ee = (T0 >> MSR_EE) & 0x01;
    msr_pr = (T0 >> MSR_PR) & 0x01;
    msr_fp = (T0 >> MSR_FP) & 0x01;
    msr_me = (T0 >> MSR_ME) & 0x01;
    msr_fe0 = (T0 >> MSR_FE0) & 0x01;
    msr_se = (T0 >> MSR_SE) & 0x01;
    msr_be = (T0 >> MSR_BE) & 0x01;
    msr_fe1 = (T0 >> MSR_FE1) & 0x01;
    msr_ip = (T0 >> MSR_IP) & 0x01;
    msr_ir = (T0 >> MSR_IR) & 0x01;
    msr_dr = (T0 >> MSR_DR) & 0x01;
    msr_ri = (T0 >> MSR_RI) & 0x01;
    msr_le = (T0 >> MSR_LE) & 0x01;
}

/* shift right arithmetic helper */
void do_sraw (void)
{
    int32_t ret;

    xer_ca = 0;
    if (T1 & 0x20) {
        ret = (-1) * (T0 >> 31);
        if (ret < 0)
            xer_ca = 1;
    } else {
        ret = (int32_t)T0 >> (T1 & 0x1f);
        if (ret < 0 && ((int32_t)T0 & ((1 << T1) - 1)) != 0)
            xer_ca = 1;
    }
    (int32_t)T0 = ret;
}

/* Floating point operations helpers */
void do_load_fpscr (void)
{
    /* The 32 MSB of the target fpr are undefined.
     * They'll be zero...
     */
    union {
        double d;
        struct {
            uint32_t u[2];
        } s;
    } u;
    int i;

    u.s.u[0] = 0;
    u.s.u[1] = 0;
    for (i = 0; i < 8; i++)
        u.s.u[1] |= env->fpscr[i] << (4 * i);
    FT0 = u.d;
}

void do_store_fpscr (uint32_t mask)
{
    /*
     * We use only the 32 LSB of the incoming fpr
     */
    union {
        double d;
        struct {
            uint32_t u[2];
        } s;
    } u;
    int i;

    u.d = FT0;
    if (mask & 0x80)
        env->fpscr[0] = (env->fpscr[0] & 0x9) | ((u.s.u[1] >> 28) & ~0x9);
    for (i = 1; i < 7; i++) {
        if (mask & (1 << (7 - i)))
            env->fpscr[i] = (u.s.u[1] >> (4 * (7 - i))) & 0xF;
    }
    /* TODO: update FEX & VX */
    /* Set rounding mode */
    switch (env->fpscr[0] & 0x3) {
    case 0:
        /* Best approximation (round to nearest) */
        fesetround(FE_TONEAREST);
        break;
    case 1:
        /* Smaller magnitude (round toward zero) */
        fesetround(FE_TOWARDZERO);
        break;
    case 2:
        /* Round toward +infinite */
        fesetround(FE_UPWARD);
        break;
    case 3:
        /* Round toward -infinite */
        fesetround(FE_DOWNWARD);
        break;
    }
}

void do_fctiw (void)
{
    union {
        double d;
        uint64_t i;
    } *p = (void *)&FT1;

    if (FT0 > (double)0x7FFFFFFF)
        p->i = 0x7FFFFFFFULL << 32;
    else if (FT0 < -(double)0x80000000)
        p->i = 0x80000000ULL << 32;
    else
        p->i = 0;
    p->i |= (uint32_t)FT0;
    FT0 = p->d;
}

void do_fctiwz (void)
{
    union {
        double d;
        uint64_t i;
    } *p = (void *)&FT1;
    int cround = fegetround();

    fesetround(FE_TOWARDZERO);
    if (FT0 > (double)0x7FFFFFFF)
        p->i = 0x7FFFFFFFULL << 32;
    else if (FT0 < -(double)0x80000000)
        p->i = 0x80000000ULL << 32;
    else
        p->i = 0;
    p->i |= (uint32_t)FT0;
    FT0 = p->d;
    fesetround(cround);
}

void do_fsqrt (void)
{
    FT0 = sqrt(FT0);
}

void do_fsqrts (void)
{
    FT0 = (float)sqrt((float)FT0);
}

void do_fres (void)
{
    FT0 = 1.0 / FT0;
}

void do_fsqrte (void)
{
    FT0 = 1.0 / sqrt(FT0);
}

void do_fsel (void)
{
    if (FT0 >= 0)
        FT0 = FT2;
    else
        FT0 = FT1;
}

void do_fcmpu (void)
{
    env->fpscr[4] &= ~0x1;
    if (isnan(FT0) || isnan(FT1)) {
        T0 = 0x01;
        env->fpscr[4] |= 0x1;
        env->fpscr[6] |= 0x1;
    } else if (FT0 < FT1) {
        T0 = 0x08;
    } else if (FT0 > FT1) {
        T0 = 0x04;
    } else {
        T0 = 0x02;
    }
    env->fpscr[3] |= T0;
}

void do_fcmpo (void)
{
    env->fpscr[4] &= ~0x1;
    if (isnan(FT0) || isnan(FT1)) {
        T0 = 0x01;
        env->fpscr[4] |= 0x1;
        /* I don't know how to test "quiet" nan... */
        if (0 /* || ! quiet_nan(...) */) {
            env->fpscr[6] |= 0x1;
            if (!(env->fpscr[1] & 0x8))
                env->fpscr[4] |= 0x8;
        } else {
            env->fpscr[4] |= 0x8;
        }
    } else if (FT0 < FT1) {
        T0 = 0x08;
    } else if (FT0 > FT1) {
        T0 = 0x04;
    } else {
        T0 = 0x02;
    }
    env->fpscr[3] |= T0;
}

void do_fabs (void)
{
    FT0 = fabsl(FT0);
}

void do_fnabs (void)
{
    FT0 = -fabsl(FT0);
}

/* Instruction cache invalidation helper */
#define ICACHE_LINE_SIZE 32

void do_icbi (void)
{
    /* Invalidate one cache line */
    T0 &= ~(ICACHE_LINE_SIZE - 1);
    tb_invalidate_page_range(T0, T0 + ICACHE_LINE_SIZE);
}

/* TLB invalidation helpers */
void do_tlbia (void)
{
    tlb_flush(env, 1);
}

void do_tlbie (void)
{
    tlb_flush_page(env, T0);
}

/*****************************************************************************/
/* Special helpers for debug */
void dump_rfi (void)
{
#if 0
    printf("Return from interrupt\n");
    printf("nip=0x%08x LR=0x%08x CTR=0x%08x MSR=0x%08x\n",
           env->nip, env->lr, env->ctr,
           (msr_pow << MSR_POW) | (msr_ile << MSR_ILE) | (msr_ee << MSR_EE) |
           (msr_pr  << MSR_PR)  | (msr_fp  << MSR_FP)  | (msr_me << MSR_ME) |
           (msr_fe0 << MSR_FE0) | (msr_se  << MSR_SE)  | (msr_be << MSR_BE) |
           (msr_fe1 << MSR_FE1) | (msr_ip  << MSR_IP)  | (msr_ir << MSR_IR) |
           (msr_dr  << MSR_DR)  | (msr_ri  << MSR_RI)  | (msr_le << MSR_LE));
    {
        int  i;
        for (i = 0; i < 32; i++) {
            if ((i & 7) == 0)
                printf("GPR%02d:", i);
            printf(" %08x", env->gpr[i]);
            if ((i & 7) == 7)
                printf("\n");
        }
        printf("CR: 0x");
        for (i = 0; i < 8; i++)
            printf("%01x", env->crf[i]);
        printf("  [");
        for (i = 0; i < 8; i++) {
            char a = '-';
            if (env->crf[i] & 0x08)
                a = 'L';
            else if (env->crf[i] & 0x04)
                a = 'G';
            else if (env->crf[i] & 0x02)
                a = 'E';
            printf(" %c%c", a, env->crf[i] & 0x01 ? 'O' : ' ');
        }
        printf(" ] ");
    }
    printf("TB: 0x%08x %08x\n", env->tb[1], env->tb[0]);
    printf("SRR0 0x%08x SRR1 0x%08x\n", env->spr[SRR0], env->spr[SRR1]);
#endif
}

void dump_store_sr (int srnum)
{
#if 0
    printf("%s: reg=%d 0x%08x\n", __func__, srnum, T0);
#endif
}

static void _dump_store_bat (char ID, int ul, int nr)
{
    printf("Set %cBAT%d%c to 0x%08x (0x%08x)\n",
           ID, nr, ul == 0 ? 'u' : 'l', T0, env->nip);
}

void dump_store_ibat (int ul, int nr)
{
    _dump_store_bat('I', ul, nr);
}

void dump_store_dbat (int ul, int nr)
{
    _dump_store_bat('D', ul, nr);
}

void dump_store_tb (int ul)
{
    printf("Set TB%c to 0x%08x\n", ul == 0 ? 'L' : 'U', T0);
}

void dump_update_tb(uint32_t param)
{
#if 0
    printf("Update TB: 0x%08x + %d => 0x%08x\n", T1, param, T0);
#endif
}
Commit	Line	Data
9a64fbe4 FB	1	/*
	2	* PPC emulation helpers for qemu.
	3	*
	4	* Copyright (c) 2003 Jocelyn Mayer
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20	#include <math.h>
	21	#include "exec.h"
	22
	23	#if defined(CONFIG_USER_ONLY)
	24	#define MEMSUFFIX _raw
	25	#include "op_helper_mem.h"
	26	#else
	27	#define MEMSUFFIX _user
	28	#include "op_helper_mem.h"
	29	#define MEMSUFFIX _kernel
	30	#include "op_helper_mem.h"
	31	#endif
	32
	33	/*****************************************************************************/
	34	/* Exceptions processing helpers */
	35	void do_queue_exception_err (uint32_t exception, int error_code)
	36	{
	37	/* Queue real PPC exceptions */
	38	if (exception < EXCP_PPC_MAX) {
	39	env->exceptions \|= 1 << exception;
	40	env->errors[exception] = error_code;
	41	} else {
	42	/* Preserve compatibility with qemu core */
	43	env->exceptions \|= 1;
	44	env->exception_index = exception;
	45	env->error_code = error_code;
	46	}
	47	}
	48
	49	void do_queue_exception (uint32_t exception)
	50	{
	51	do_queue_exception_err(exception, 0);
	52	}
	53
	54	void do_check_exception_state (void)
	55	{
	56	if ((env->exceptions & 1) == 1 \|\| check_exception_state(env)) {
	57	env->exceptions &= ~1;
	58	cpu_loop_exit();
	59	}
	60	}
	61
	62	/*****************************************************************************/
	63	/* Helpers for "fat" micro operations */
	64	/* Special registers load and store */
65	void do_load_cr (void)
66	{
67	T0 = (env->crf[0] << 28) \|
68	(env->crf[1] << 24) \|
69	(env->crf[2] << 20) \|
70	(env->crf[3] << 16) \|
71	(env->crf[4] << 12) \|
72	(env->crf[5] << 8) \|
73	(env->crf[6] << 4) \|
74	(env->crf[7] << 0);
75	}
76
77	void do_store_cr (uint32_t mask)
78	{
79	int i, sh;
80
81	for (i = 0, sh = 7; i < 8; i++, sh --) {
82	if (mask & (1 << sh))
83	env->crf[i] = (T0 >> (sh * 4)) & 0xF;
84	}
85	}
86
87	void do_load_xer (void)
88	{
89	T0 = (xer_so << XER_SO) \|
90	(xer_ov << XER_OV) \|
91	(xer_ca << XER_CA) \|
92	(xer_bc << XER_BC);
93	}
94
95	void do_store_xer (void)
96	{
97	xer_so = (T0 >> XER_SO) & 0x01;
98	xer_ov = (T0 >> XER_OV) & 0x01;
99	xer_ca = (T0 >> XER_CA) & 0x01;
100	xer_bc = (T0 >> XER_BC) & 0x1f;
101	}
102
103	void do_load_msr (void)
104	{
105	T0 = (msr_pow << MSR_POW) \|
106	(msr_ile << MSR_ILE) \|
107	(msr_ee << MSR_EE) \|
108	(msr_pr << MSR_PR) \|
109	(msr_fp << MSR_FP) \|
110	(msr_me << MSR_ME) \|
111	(msr_fe0 << MSR_FE0) \|
112	(msr_se << MSR_SE) \|
113	(msr_be << MSR_BE) \|
114	(msr_fe1 << MSR_FE1) \|
115	(msr_ip << MSR_IP) \|
116	(msr_ir << MSR_IR) \|
117	(msr_dr << MSR_DR) \|
118	(msr_ri << MSR_RI) \|
119	(msr_le << MSR_LE);
120	}
121
122	void do_store_msr (void)
123	{
124	if (((T0 >> MSR_IR) & 0x01) != msr_ir \|\|
125	((T0 >> MSR_DR) & 0x01) != msr_dr \|\|
126	((T0 >> MSR_PR) & 0x01) != msr_pr) {
127	/* Flush all tlb when changing translation mode or privilege level */
128	do_tlbia();
129	}
130	#if 0
131	if ((T0 >> MSR_IP) & 0x01) {
132	printf("Halting CPU. Stop emulation\n");
133	do_queue_exception(EXCP_HLT);
134	cpu_loop_exit();
135	}
136	#endif
137	msr_pow = (T0 >> MSR_POW) & 0x03;
138	msr_ile = (T0 >> MSR_ILE) & 0x01;
139	msr_ee = (T0 >> MSR_EE) & 0x01;
140	msr_pr = (T0 >> MSR_PR) & 0x01;
141	msr_fp = (T0 >> MSR_FP) & 0x01;
142	msr_me = (T0 >> MSR_ME) & 0x01;
143	msr_fe0 = (T0 >> MSR_FE0) & 0x01;
144	msr_se = (T0 >> MSR_SE) & 0x01;
145	msr_be = (T0 >> MSR_BE) & 0x01;
146	msr_fe1 = (T0 >> MSR_FE1) & 0x01;
147	msr_ip = (T0 >> MSR_IP) & 0x01;
148	msr_ir = (T0 >> MSR_IR) & 0x01;
149	msr_dr = (T0 >> MSR_DR) & 0x01;
150	msr_ri = (T0 >> MSR_RI) & 0x01;
151	msr_le = (T0 >> MSR_LE) & 0x01;
152	}
153
154	/* shift right arithmetic helper */
155	void do_sraw (void)
156	{
157	int32_t ret;
158
159	xer_ca = 0;
160	if (T1 & 0x20) {
161	ret = (-1) * (T0 >> 31);
162	if (ret < 0)
163	xer_ca = 1;
164	} else {
165	ret = (int32_t)T0 >> (T1 & 0x1f);
166	if (ret < 0 && ((int32_t)T0 & ((1 << T1) - 1)) != 0)
167	xer_ca = 1;
168	}
169	(int32_t)T0 = ret;
170	}
171
172	/* Floating point operations helpers */
173	void do_load_fpscr (void)
174	{
175	/* The 32 MSB of the target fpr are undefined.
176	* They'll be zero...
177	*/
178	union {
179	double d;
180	struct {
181	uint32_t u[2];
182	} s;
183	} u;
184	int i;
185
186	u.s.u[0] = 0;
187	u.s.u[1] = 0;
188	for (i = 0; i < 8; i++)
189	u.s.u[1] \|= env->fpscr[i] << (4 * i);
190	FT0 = u.d;
191	}
192
193	void do_store_fpscr (uint32_t mask)
194	{
195	/*
196	* We use only the 32 LSB of the incoming fpr
197	*/
198	union {
199	double d;
200	struct {
201	uint32_t u[2];
202	} s;
203	} u;
204	int i;
205
206	u.d = FT0;
207	if (mask & 0x80)
208	env->fpscr[0] = (env->fpscr[0] & 0x9) \| ((u.s.u[1] >> 28) & ~0x9);
209	for (i = 1; i < 7; i++) {
210	if (mask & (1 << (7 - i)))
211	env->fpscr[i] = (u.s.u[1] >> (4 * (7 - i))) & 0xF;
212	}
213	/* TODO: update FEX & VX */
214	/* Set rounding mode */
215	switch (env->fpscr[0] & 0x3) {
216	case 0:
217	/* Best approximation (round to nearest) */
218	fesetround(FE_TONEAREST);
219	break;
220	case 1:
221	/* Smaller magnitude (round toward zero) */
222	fesetround(FE_TOWARDZERO);
223	break;
224	case 2:
225	/* Round toward +infinite */
226	fesetround(FE_UPWARD);
227	break;
228	case 3:
229	/* Round toward -infinite */
230	fesetround(FE_DOWNWARD);
231	break;
232	}
233	}
234
235	void do_fctiw (void)
236	{
237	union {
238	double d;
239	uint64_t i;
240	} p = (void )&FT1;
241
242	if (FT0 > (double)0x7FFFFFFF)
243	p->i = 0x7FFFFFFFULL << 32;
244	else if (FT0 < -(double)0x80000000)
245	p->i = 0x80000000ULL << 32;
246	else
247	p->i = 0;
248	p->i \|= (uint32_t)FT0;
249	FT0 = p->d;
250	}
251
252	void do_fctiwz (void)
253	{
254	union {
255	double d;
256	uint64_t i;
257	} p = (void )&FT1;
258	int cround = fegetround();
259
260	fesetround(FE_TOWARDZERO);
261	if (FT0 > (double)0x7FFFFFFF)
262	p->i = 0x7FFFFFFFULL << 32;
263	else if (FT0 < -(double)0x80000000)
264	p->i = 0x80000000ULL << 32;
265	else
266	p->i = 0;
267	p->i \|= (uint32_t)FT0;
268	FT0 = p->d;
269	fesetround(cround);
270	}
271
272	void do_fsqrt (void)
273	{
274	FT0 = sqrt(FT0);
275	}
276
277	void do_fsqrts (void)
278	{
279	FT0 = (float)sqrt((float)FT0);
280	}
281
282	void do_fres (void)
283	{
284	FT0 = 1.0 / FT0;
285	}
286
287	void do_fsqrte (void)
288	{
289	FT0 = 1.0 / sqrt(FT0);
290	}
291
292	void do_fsel (void)
293	{
294	if (FT0 >= 0)
295	FT0 = FT2;
296	else
297	FT0 = FT1;
298	}
299
300	void do_fcmpu (void)
301	{
302	env->fpscr[4] &= ~0x1;
303	if (isnan(FT0) \|\| isnan(FT1)) {
304	T0 = 0x01;
305	env->fpscr[4] \|= 0x1;
306	env->fpscr[6] \|= 0x1;
307	} else if (FT0 < FT1) {
308	T0 = 0x08;
309	} else if (FT0 > FT1) {
310	T0 = 0x04;
311	} else {
312	T0 = 0x02;
313	}
314	env->fpscr[3] \|= T0;
315	}
316
317	void do_fcmpo (void)
318	{
319	env->fpscr[4] &= ~0x1;
320	if (isnan(FT0) \|\| isnan(FT1)) {
321	T0 = 0x01;
322	env->fpscr[4] \|= 0x1;
323	/* I don't know how to test "quiet" nan... */
324	if (0 /* \|\| ! quiet_nan(...) */) {
325	env->fpscr[6] \|= 0x1;
326	if (!(env->fpscr[1] & 0x8))
327	env->fpscr[4] \|= 0x8;
328	} else {
329	env->fpscr[4] \|= 0x8;
330	}
331	} else if (FT0 < FT1) {
332	T0 = 0x08;
333	} else if (FT0 > FT1) {
334	T0 = 0x04;
335	} else {
336	T0 = 0x02;
337	}
338	env->fpscr[3] \|= T0;
339	}
340
341	void do_fabs (void)
342	{
343	FT0 = fabsl(FT0);
344	}
345
346	void do_fnabs (void)
347	{
348	FT0 = -fabsl(FT0);
349	}
350
351	/* Instruction cache invalidation helper */
985a19d6 FB	352	#define ICACHE_LINE_SIZE 32
985a19d6 FB	353
9a64fbe4 FB	354	void do_icbi (void)
9a64fbe4 FB	355	{
985a19d6 FB	356	/* Invalidate one cache line */
	357	T0 &= ~(ICACHE_LINE_SIZE - 1);
	358	tb_invalidate_page_range(T0, T0 + ICACHE_LINE_SIZE);
9a64fbe4 FB	359	}
	360
	361	/* TLB invalidation helpers */
	362	void do_tlbia (void)
	363	{
ad081323	364	tlb_flush(env, 1);
9a64fbe4 FB	365	}
	366
	367	void do_tlbie (void)
	368	{
	369	tlb_flush_page(env, T0);
	370	}
	371
	372	/*****************************************************************************/
	373	/* Special helpers for debug */
	374	void dump_rfi (void)
	375	{
	376	#if 0
	377	printf("Return from interrupt\n");
	378	printf("nip=0x%08x LR=0x%08x CTR=0x%08x MSR=0x%08x\n",
	379	env->nip, env->lr, env->ctr,
	380	(msr_pow << MSR_POW) \| (msr_ile << MSR_ILE) \| (msr_ee << MSR_EE) \|
	381	(msr_pr << MSR_PR) \| (msr_fp << MSR_FP) \| (msr_me << MSR_ME) \|
	382	(msr_fe0 << MSR_FE0) \| (msr_se << MSR_SE) \| (msr_be << MSR_BE) \|
	383	(msr_fe1 << MSR_FE1) \| (msr_ip << MSR_IP) \| (msr_ir << MSR_IR) \|
	384	(msr_dr << MSR_DR) \| (msr_ri << MSR_RI) \| (msr_le << MSR_LE));
	385	{
	386	int i;
	387	for (i = 0; i < 32; i++) {
	388	if ((i & 7) == 0)
	389	printf("GPR%02d:", i);
	390	printf(" %08x", env->gpr[i]);
	391	if ((i & 7) == 7)
	392	printf("\n");
	393	}
	394	printf("CR: 0x");
	395	for (i = 0; i < 8; i++)
	396	printf("%01x", env->crf[i]);
	397	printf(" [");
	398	for (i = 0; i < 8; i++) {
	399	char a = '-';
	400	if (env->crf[i] & 0x08)
	401	a = 'L';
	402	else if (env->crf[i] & 0x04)
	403	a = 'G';
	404	else if (env->crf[i] & 0x02)
	405	a = 'E';
	406	printf(" %c%c", a, env->crf[i] & 0x01 ? 'O' : ' ');
	407	}
	408	printf(" ] ");
	409	}
	410	printf("TB: 0x%08x %08x\n", env->tb[1], env->tb[0]);
	411	printf("SRR0 0x%08x SRR1 0x%08x\n", env->spr[SRR0], env->spr[SRR1]);
	412	#endif
	413	}
	414
	415	void dump_store_sr (int srnum)
	416	{
	417	#if 0
	418	printf("%s: reg=%d 0x%08x\n", __func__, srnum, T0);
	419	#endif
	420	}
	421
	422	static void _dump_store_bat (char ID, int ul, int nr)
	423	{
	424	printf("Set %cBAT%d%c to 0x%08x (0x%08x)\n",
	425	ID, nr, ul == 0 ? 'u' : 'l', T0, env->nip);
	426	}
	427
	428	void dump_store_ibat (int ul, int nr)
429	{
430	_dump_store_bat('I', ul, nr);
431	}
432
433	void dump_store_dbat (int ul, int nr)
434	{
435	_dump_store_bat('D', ul, nr);
436	}
437
438	void dump_store_tb (int ul)
439	{
440	printf("Set TB%c to 0x%08x\n", ul == 0 ? 'L' : 'U', T0);
441	}
442
443	void dump_update_tb(uint32_t param)
444	{
445	#if 0
446	printf("Update TB: 0x%08x + %d => 0x%08x\n", T1, param, T0);
447	#endif
448	}
449