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Commit | Line | Data |
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a19cbfb3 GH |
1 | #include "qemu-common.h" |
2 | ||
3 | #include "console.h" | |
4 | #include "hw.h" | |
a2cb15b0 | 5 | #include "pci/pci.h" |
a19cbfb3 | 6 | #include "vga_int.h" |
691f5c7b | 7 | #include "qemu-thread.h" |
a19cbfb3 GH |
8 | |
9 | #include "ui/qemu-spice.h" | |
10 | #include "ui/spice-display.h" | |
11 | ||
12 | enum qxl_mode { | |
13 | QXL_MODE_UNDEFINED, | |
14 | QXL_MODE_VGA, | |
15 | QXL_MODE_COMPAT, /* spice 0.4.x */ | |
16 | QXL_MODE_NATIVE, | |
17 | }; | |
18 | ||
6f2b175a GH |
19 | #ifndef QXL_VRAM64_RANGE_INDEX |
20 | #define QXL_VRAM64_RANGE_INDEX 4 | |
21 | #endif | |
22 | ||
5ff4e36c AL |
23 | #define QXL_UNDEFINED_IO UINT32_MAX |
24 | ||
81fb6f15 AL |
25 | #define QXL_NUM_DIRTY_RECTS 64 |
26 | ||
a19cbfb3 GH |
27 | typedef struct PCIQXLDevice { |
28 | PCIDevice pci; | |
29 | SimpleSpiceDisplay ssd; | |
30 | int id; | |
31 | uint32_t debug; | |
32 | uint32_t guestdebug; | |
33 | uint32_t cmdlog; | |
087e6a42 AL |
34 | |
35 | uint32_t guest_bug; | |
36 | ||
a19cbfb3 GH |
37 | enum qxl_mode mode; |
38 | uint32_t cmdflags; | |
39 | int generation; | |
40 | uint32_t revision; | |
41 | ||
42 | int32_t num_memslots; | |
a19cbfb3 | 43 | |
5ff4e36c AL |
44 | uint32_t current_async; |
45 | QemuMutex async_lock; | |
46 | ||
a19cbfb3 GH |
47 | struct guest_slots { |
48 | QXLMemSlot slot; | |
49 | void *ptr; | |
50 | uint64_t size; | |
51 | uint64_t delta; | |
52 | uint32_t active; | |
53 | } guest_slots[NUM_MEMSLOTS]; | |
54 | ||
55 | struct guest_primary { | |
56 | QXLSurfaceCreate surface; | |
57 | uint32_t commands; | |
58 | uint32_t resized; | |
0e2487bd GH |
59 | int32_t qxl_stride; |
60 | uint32_t abs_stride; | |
a19cbfb3 GH |
61 | uint32_t bits_pp; |
62 | uint32_t bytes_pp; | |
4c19ebb5 | 63 | uint8_t *data; |
a19cbfb3 GH |
64 | } guest_primary; |
65 | ||
66 | struct surfaces { | |
ddd8fdc7 | 67 | QXLPHYSICAL *cmds; |
a19cbfb3 GH |
68 | uint32_t count; |
69 | uint32_t max; | |
70 | } guest_surfaces; | |
71 | QXLPHYSICAL guest_cursor; | |
72 | ||
020af1c4 AL |
73 | QXLPHYSICAL guest_monitors_config; |
74 | ||
14898cf6 GH |
75 | QemuMutex track_lock; |
76 | ||
a19cbfb3 | 77 | /* thread signaling */ |
691f5c7b | 78 | QemuThread main; |
a19cbfb3 GH |
79 | int pipe[2]; |
80 | ||
81 | /* ram pci bar */ | |
82 | QXLRam *ram; | |
83 | VGACommonState vga; | |
84 | uint32_t num_free_res; | |
85 | QXLReleaseInfo *last_release; | |
86 | uint32_t last_release_offset; | |
87 | uint32_t oom_running; | |
13d1fd44 | 88 | uint32_t vgamem_size; |
a19cbfb3 GH |
89 | |
90 | /* rom pci bar */ | |
91 | QXLRom shadow_rom; | |
92 | QXLRom *rom; | |
93 | QXLModes *modes; | |
94 | uint32_t rom_size; | |
b1950430 | 95 | MemoryRegion rom_bar; |
a19cbfb3 GH |
96 | |
97 | /* vram pci bar */ | |
98 | uint32_t vram_size; | |
b1950430 | 99 | MemoryRegion vram_bar; |
6f2b175a GH |
100 | uint32_t vram32_size; |
101 | MemoryRegion vram32_bar; | |
a19cbfb3 GH |
102 | |
103 | /* io bar */ | |
b1950430 | 104 | MemoryRegion io_bar; |
017438ee GH |
105 | |
106 | /* user-friendly properties (in megabytes) */ | |
107 | uint32_t ram_size_mb; | |
108 | uint32_t vram_size_mb; | |
6f2b175a | 109 | uint32_t vram32_size_mb; |
13d1fd44 | 110 | uint32_t vgamem_size_mb; |
81fb6f15 AL |
111 | |
112 | /* qxl_render_update state */ | |
113 | int render_update_cookie_num; | |
114 | int num_dirty_rects; | |
115 | QXLRect dirty[QXL_NUM_DIRTY_RECTS]; | |
116 | QEMUBH *update_area_bh; | |
a19cbfb3 GH |
117 | } PCIQXLDevice; |
118 | ||
119 | #define PANIC_ON(x) if ((x)) { \ | |
120 | printf("%s: PANIC %s failed\n", __FUNCTION__, #x); \ | |
2bce0400 | 121 | abort(); \ |
a19cbfb3 GH |
122 | } |
123 | ||
124 | #define dprint(_qxl, _level, _fmt, ...) \ | |
125 | do { \ | |
126 | if (_qxl->debug >= _level) { \ | |
127 | fprintf(stderr, "qxl-%d: ", _qxl->id); \ | |
128 | fprintf(stderr, _fmt, ## __VA_ARGS__); \ | |
129 | } \ | |
130 | } while (0) | |
131 | ||
020af1c4 | 132 | #define QXL_DEFAULT_REVISION QXL_REVISION_STABLE_V12 |
9197a7c8 | 133 | |
a19cbfb3 GH |
134 | /* qxl.c */ |
135 | void *qxl_phys2virt(PCIQXLDevice *qxl, QXLPHYSICAL phys, int group_id); | |
0a530548 AL |
136 | void qxl_set_guest_bug(PCIQXLDevice *qxl, const char *msg, ...) |
137 | GCC_FMT_ATTR(2, 3); | |
a19cbfb3 | 138 | |
aee32bf3 GH |
139 | void qxl_spice_update_area(PCIQXLDevice *qxl, uint32_t surface_id, |
140 | struct QXLRect *area, struct QXLRect *dirty_rects, | |
141 | uint32_t num_dirty_rects, | |
5ff4e36c | 142 | uint32_t clear_dirty_region, |
2e1a98c9 | 143 | qxl_async_io async, QXLCookie *cookie); |
aee32bf3 GH |
144 | void qxl_spice_loadvm_commands(PCIQXLDevice *qxl, struct QXLCommandExt *ext, |
145 | uint32_t count); | |
146 | void qxl_spice_oom(PCIQXLDevice *qxl); | |
147 | void qxl_spice_reset_memslots(PCIQXLDevice *qxl); | |
aee32bf3 GH |
148 | void qxl_spice_reset_image_cache(PCIQXLDevice *qxl); |
149 | void qxl_spice_reset_cursor(PCIQXLDevice *qxl); | |
150 | ||
a19cbfb3 | 151 | /* qxl-logger.c */ |
fae2afb1 AL |
152 | int qxl_log_cmd_cursor(PCIQXLDevice *qxl, QXLCursorCmd *cmd, int group_id); |
153 | int qxl_log_command(PCIQXLDevice *qxl, const char *ring, QXLCommandExt *ext); | |
a19cbfb3 GH |
154 | |
155 | /* qxl-render.c */ | |
156 | void qxl_render_resize(PCIQXLDevice *qxl); | |
157 | void qxl_render_update(PCIQXLDevice *qxl); | |
fae2afb1 | 158 | int qxl_render_cursor(PCIQXLDevice *qxl, QXLCommandExt *ext); |
81fb6f15 AL |
159 | void qxl_render_update_area_done(PCIQXLDevice *qxl, QXLCookie *cookie); |
160 | void qxl_render_update_area_bh(void *opaque); |