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8f2e8c07 KB |
1 | /* |
2 | * Optimizations for Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2010 Samsung Electronics. | |
5 | * Contributed by Kirill Batuzov <[email protected]> | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
757e725b | 26 | #include "qemu/osdep.h" |
8f2e8c07 | 27 | #include "qemu-common.h" |
00f6da6a | 28 | #include "exec/cpu-common.h" |
8f2e8c07 KB |
29 | #include "tcg-op.h" |
30 | ||
8f2e8c07 KB |
31 | #define CASE_OP_32_64(x) \ |
32 | glue(glue(case INDEX_op_, x), _i32): \ | |
33 | glue(glue(case INDEX_op_, x), _i64) | |
8f2e8c07 | 34 | |
22613af4 | 35 | struct tcg_temp_info { |
b41059dd | 36 | bool is_const; |
6349039d RH |
37 | TCGTemp *prev_copy; |
38 | TCGTemp *next_copy; | |
22613af4 | 39 | tcg_target_ulong val; |
3a9d8b17 | 40 | tcg_target_ulong mask; |
22613af4 KB |
41 | }; |
42 | ||
6349039d | 43 | static inline struct tcg_temp_info *ts_info(TCGTemp *ts) |
d9c769c6 | 44 | { |
6349039d | 45 | return ts->state_ptr; |
d9c769c6 AJ |
46 | } |
47 | ||
6349039d | 48 | static inline struct tcg_temp_info *arg_info(TCGArg arg) |
d9c769c6 | 49 | { |
6349039d RH |
50 | return ts_info(arg_temp(arg)); |
51 | } | |
52 | ||
53 | static inline bool ts_is_const(TCGTemp *ts) | |
54 | { | |
55 | return ts_info(ts)->is_const; | |
56 | } | |
57 | ||
58 | static inline bool arg_is_const(TCGArg arg) | |
59 | { | |
60 | return ts_is_const(arg_temp(arg)); | |
61 | } | |
62 | ||
63 | static inline bool ts_is_copy(TCGTemp *ts) | |
64 | { | |
65 | return ts_info(ts)->next_copy != ts; | |
d9c769c6 AJ |
66 | } |
67 | ||
b41059dd | 68 | /* Reset TEMP's state, possibly removing the temp for the list of copies. */ |
6349039d RH |
69 | static void reset_ts(TCGTemp *ts) |
70 | { | |
71 | struct tcg_temp_info *ti = ts_info(ts); | |
72 | struct tcg_temp_info *pi = ts_info(ti->prev_copy); | |
73 | struct tcg_temp_info *ni = ts_info(ti->next_copy); | |
74 | ||
75 | ni->prev_copy = ti->prev_copy; | |
76 | pi->next_copy = ti->next_copy; | |
77 | ti->next_copy = ts; | |
78 | ti->prev_copy = ts; | |
79 | ti->is_const = false; | |
80 | ti->mask = -1; | |
81 | } | |
82 | ||
83 | static void reset_temp(TCGArg arg) | |
22613af4 | 84 | { |
6349039d | 85 | reset_ts(arg_temp(arg)); |
22613af4 KB |
86 | } |
87 | ||
1208d7dd | 88 | /* Initialize and activate a temporary. */ |
34184b07 EC |
89 | static void init_ts_info(struct tcg_temp_info *infos, |
90 | TCGTempSet *temps_used, TCGTemp *ts) | |
1208d7dd | 91 | { |
6349039d | 92 | size_t idx = temp_idx(ts); |
34184b07 EC |
93 | if (!test_bit(idx, temps_used->l)) { |
94 | struct tcg_temp_info *ti = &infos[idx]; | |
6349039d RH |
95 | |
96 | ts->state_ptr = ti; | |
97 | ti->next_copy = ts; | |
98 | ti->prev_copy = ts; | |
99 | ti->is_const = false; | |
100 | ti->mask = -1; | |
34184b07 | 101 | set_bit(idx, temps_used->l); |
1208d7dd AJ |
102 | } |
103 | } | |
104 | ||
34184b07 EC |
105 | static void init_arg_info(struct tcg_temp_info *infos, |
106 | TCGTempSet *temps_used, TCGArg arg) | |
6349039d | 107 | { |
34184b07 | 108 | init_ts_info(infos, temps_used, arg_temp(arg)); |
6349039d RH |
109 | } |
110 | ||
fe0de7aa | 111 | static int op_bits(TCGOpcode op) |
22613af4 | 112 | { |
8399ad59 RH |
113 | const TCGOpDef *def = &tcg_op_defs[op]; |
114 | return def->flags & TCG_OPF_64BIT ? 64 : 32; | |
22613af4 KB |
115 | } |
116 | ||
a62f6f56 RH |
117 | static TCGOpcode op_to_mov(TCGOpcode op) |
118 | { | |
119 | switch (op_bits(op)) { | |
120 | case 32: | |
121 | return INDEX_op_mov_i32; | |
122 | case 64: | |
123 | return INDEX_op_mov_i64; | |
124 | default: | |
125 | fprintf(stderr, "op_to_mov: unexpected return value of " | |
126 | "function op_bits.\n"); | |
127 | tcg_abort(); | |
128 | } | |
129 | } | |
130 | ||
fe0de7aa | 131 | static TCGOpcode op_to_movi(TCGOpcode op) |
22613af4 KB |
132 | { |
133 | switch (op_bits(op)) { | |
134 | case 32: | |
135 | return INDEX_op_movi_i32; | |
22613af4 KB |
136 | case 64: |
137 | return INDEX_op_movi_i64; | |
22613af4 KB |
138 | default: |
139 | fprintf(stderr, "op_to_movi: unexpected return value of " | |
140 | "function op_bits.\n"); | |
141 | tcg_abort(); | |
142 | } | |
143 | } | |
144 | ||
6349039d | 145 | static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts) |
e590d4e6 | 146 | { |
6349039d | 147 | TCGTemp *i; |
e590d4e6 AJ |
148 | |
149 | /* If this is already a global, we can't do better. */ | |
fa477d25 | 150 | if (ts->temp_global) { |
6349039d | 151 | return ts; |
e590d4e6 AJ |
152 | } |
153 | ||
154 | /* Search for a global first. */ | |
6349039d RH |
155 | for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) { |
156 | if (i->temp_global) { | |
e590d4e6 AJ |
157 | return i; |
158 | } | |
159 | } | |
160 | ||
161 | /* If it is a temp, search for a temp local. */ | |
fa477d25 | 162 | if (!ts->temp_local) { |
6349039d RH |
163 | for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) { |
164 | if (ts->temp_local) { | |
e590d4e6 AJ |
165 | return i; |
166 | } | |
167 | } | |
168 | } | |
169 | ||
170 | /* Failure to find a better representation, return the same temp. */ | |
6349039d | 171 | return ts; |
e590d4e6 AJ |
172 | } |
173 | ||
6349039d | 174 | static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2) |
e590d4e6 | 175 | { |
6349039d | 176 | TCGTemp *i; |
e590d4e6 | 177 | |
6349039d | 178 | if (ts1 == ts2) { |
e590d4e6 AJ |
179 | return true; |
180 | } | |
181 | ||
6349039d | 182 | if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) { |
e590d4e6 AJ |
183 | return false; |
184 | } | |
185 | ||
6349039d RH |
186 | for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) { |
187 | if (i == ts2) { | |
e590d4e6 AJ |
188 | return true; |
189 | } | |
190 | } | |
191 | ||
192 | return false; | |
193 | } | |
194 | ||
6349039d RH |
195 | static bool args_are_copies(TCGArg arg1, TCGArg arg2) |
196 | { | |
197 | return ts_are_copies(arg_temp(arg1), arg_temp(arg2)); | |
198 | } | |
199 | ||
acd93701 | 200 | static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val) |
97a79eb7 AJ |
201 | { |
202 | TCGOpcode new_op = op_to_movi(op->opc); | |
203 | tcg_target_ulong mask; | |
6349039d | 204 | struct tcg_temp_info *di = arg_info(dst); |
97a79eb7 AJ |
205 | |
206 | op->opc = new_op; | |
207 | ||
208 | reset_temp(dst); | |
6349039d RH |
209 | di->is_const = true; |
210 | di->val = val; | |
97a79eb7 | 211 | mask = val; |
96152126 | 212 | if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) { |
97a79eb7 AJ |
213 | /* High bits of the destination are now garbage. */ |
214 | mask |= ~0xffffffffull; | |
215 | } | |
6349039d | 216 | di->mask = mask; |
97a79eb7 | 217 | |
acd93701 RH |
218 | op->args[0] = dst; |
219 | op->args[1] = val; | |
97a79eb7 AJ |
220 | } |
221 | ||
acd93701 | 222 | static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src) |
22613af4 | 223 | { |
6349039d RH |
224 | TCGTemp *dst_ts = arg_temp(dst); |
225 | TCGTemp *src_ts = arg_temp(src); | |
226 | struct tcg_temp_info *di; | |
227 | struct tcg_temp_info *si; | |
228 | tcg_target_ulong mask; | |
229 | TCGOpcode new_op; | |
230 | ||
231 | if (ts_are_copies(dst_ts, src_ts)) { | |
5365718a AJ |
232 | tcg_op_remove(s, op); |
233 | return; | |
234 | } | |
235 | ||
6349039d RH |
236 | reset_ts(dst_ts); |
237 | di = ts_info(dst_ts); | |
238 | si = ts_info(src_ts); | |
239 | new_op = op_to_mov(op->opc); | |
a62f6f56 | 240 | |
c45cb8bb | 241 | op->opc = new_op; |
6349039d RH |
242 | op->args[0] = dst; |
243 | op->args[1] = src; | |
a62f6f56 | 244 | |
6349039d | 245 | mask = si->mask; |
24666baf RH |
246 | if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) { |
247 | /* High bits of the destination are now garbage. */ | |
248 | mask |= ~0xffffffffull; | |
249 | } | |
6349039d | 250 | di->mask = mask; |
e590d4e6 | 251 | |
6349039d RH |
252 | if (src_ts->type == dst_ts->type) { |
253 | struct tcg_temp_info *ni = ts_info(si->next_copy); | |
254 | ||
255 | di->next_copy = si->next_copy; | |
256 | di->prev_copy = src_ts; | |
257 | ni->prev_copy = dst_ts; | |
258 | si->next_copy = dst_ts; | |
259 | di->is_const = si->is_const; | |
260 | di->val = si->val; | |
261 | } | |
22613af4 KB |
262 | } |
263 | ||
fe0de7aa | 264 | static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) |
53108fb5 | 265 | { |
03271524 RH |
266 | uint64_t l64, h64; |
267 | ||
53108fb5 KB |
268 | switch (op) { |
269 | CASE_OP_32_64(add): | |
270 | return x + y; | |
271 | ||
272 | CASE_OP_32_64(sub): | |
273 | return x - y; | |
274 | ||
275 | CASE_OP_32_64(mul): | |
276 | return x * y; | |
277 | ||
9a81090b KB |
278 | CASE_OP_32_64(and): |
279 | return x & y; | |
280 | ||
281 | CASE_OP_32_64(or): | |
282 | return x | y; | |
283 | ||
284 | CASE_OP_32_64(xor): | |
285 | return x ^ y; | |
286 | ||
55c0975c | 287 | case INDEX_op_shl_i32: |
50c5c4d1 | 288 | return (uint32_t)x << (y & 31); |
55c0975c | 289 | |
55c0975c | 290 | case INDEX_op_shl_i64: |
50c5c4d1 | 291 | return (uint64_t)x << (y & 63); |
55c0975c KB |
292 | |
293 | case INDEX_op_shr_i32: | |
50c5c4d1 | 294 | return (uint32_t)x >> (y & 31); |
55c0975c | 295 | |
55c0975c | 296 | case INDEX_op_shr_i64: |
50c5c4d1 | 297 | return (uint64_t)x >> (y & 63); |
55c0975c KB |
298 | |
299 | case INDEX_op_sar_i32: | |
50c5c4d1 | 300 | return (int32_t)x >> (y & 31); |
55c0975c | 301 | |
55c0975c | 302 | case INDEX_op_sar_i64: |
50c5c4d1 | 303 | return (int64_t)x >> (y & 63); |
55c0975c KB |
304 | |
305 | case INDEX_op_rotr_i32: | |
50c5c4d1 | 306 | return ror32(x, y & 31); |
55c0975c | 307 | |
55c0975c | 308 | case INDEX_op_rotr_i64: |
50c5c4d1 | 309 | return ror64(x, y & 63); |
55c0975c KB |
310 | |
311 | case INDEX_op_rotl_i32: | |
50c5c4d1 | 312 | return rol32(x, y & 31); |
55c0975c | 313 | |
55c0975c | 314 | case INDEX_op_rotl_i64: |
50c5c4d1 | 315 | return rol64(x, y & 63); |
25c4d9cc RH |
316 | |
317 | CASE_OP_32_64(not): | |
a640f031 | 318 | return ~x; |
25c4d9cc | 319 | |
cb25c80a RH |
320 | CASE_OP_32_64(neg): |
321 | return -x; | |
322 | ||
323 | CASE_OP_32_64(andc): | |
324 | return x & ~y; | |
325 | ||
326 | CASE_OP_32_64(orc): | |
327 | return x | ~y; | |
328 | ||
329 | CASE_OP_32_64(eqv): | |
330 | return ~(x ^ y); | |
331 | ||
332 | CASE_OP_32_64(nand): | |
333 | return ~(x & y); | |
334 | ||
335 | CASE_OP_32_64(nor): | |
336 | return ~(x | y); | |
337 | ||
0e28d006 RH |
338 | case INDEX_op_clz_i32: |
339 | return (uint32_t)x ? clz32(x) : y; | |
340 | ||
341 | case INDEX_op_clz_i64: | |
342 | return x ? clz64(x) : y; | |
343 | ||
344 | case INDEX_op_ctz_i32: | |
345 | return (uint32_t)x ? ctz32(x) : y; | |
346 | ||
347 | case INDEX_op_ctz_i64: | |
348 | return x ? ctz64(x) : y; | |
349 | ||
a768e4e9 RH |
350 | case INDEX_op_ctpop_i32: |
351 | return ctpop32(x); | |
352 | ||
353 | case INDEX_op_ctpop_i64: | |
354 | return ctpop64(x); | |
355 | ||
25c4d9cc | 356 | CASE_OP_32_64(ext8s): |
a640f031 | 357 | return (int8_t)x; |
25c4d9cc RH |
358 | |
359 | CASE_OP_32_64(ext16s): | |
a640f031 | 360 | return (int16_t)x; |
25c4d9cc RH |
361 | |
362 | CASE_OP_32_64(ext8u): | |
a640f031 | 363 | return (uint8_t)x; |
25c4d9cc RH |
364 | |
365 | CASE_OP_32_64(ext16u): | |
a640f031 KB |
366 | return (uint16_t)x; |
367 | ||
8bcb5c8f | 368 | case INDEX_op_ext_i32_i64: |
a640f031 KB |
369 | case INDEX_op_ext32s_i64: |
370 | return (int32_t)x; | |
371 | ||
8bcb5c8f | 372 | case INDEX_op_extu_i32_i64: |
609ad705 | 373 | case INDEX_op_extrl_i64_i32: |
a640f031 KB |
374 | case INDEX_op_ext32u_i64: |
375 | return (uint32_t)x; | |
a640f031 | 376 | |
609ad705 RH |
377 | case INDEX_op_extrh_i64_i32: |
378 | return (uint64_t)x >> 32; | |
379 | ||
03271524 RH |
380 | case INDEX_op_muluh_i32: |
381 | return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32; | |
382 | case INDEX_op_mulsh_i32: | |
383 | return ((int64_t)(int32_t)x * (int32_t)y) >> 32; | |
384 | ||
385 | case INDEX_op_muluh_i64: | |
386 | mulu64(&l64, &h64, x, y); | |
387 | return h64; | |
388 | case INDEX_op_mulsh_i64: | |
389 | muls64(&l64, &h64, x, y); | |
390 | return h64; | |
391 | ||
01547f7f RH |
392 | case INDEX_op_div_i32: |
393 | /* Avoid crashing on divide by zero, otherwise undefined. */ | |
394 | return (int32_t)x / ((int32_t)y ? : 1); | |
395 | case INDEX_op_divu_i32: | |
396 | return (uint32_t)x / ((uint32_t)y ? : 1); | |
397 | case INDEX_op_div_i64: | |
398 | return (int64_t)x / ((int64_t)y ? : 1); | |
399 | case INDEX_op_divu_i64: | |
400 | return (uint64_t)x / ((uint64_t)y ? : 1); | |
401 | ||
402 | case INDEX_op_rem_i32: | |
403 | return (int32_t)x % ((int32_t)y ? : 1); | |
404 | case INDEX_op_remu_i32: | |
405 | return (uint32_t)x % ((uint32_t)y ? : 1); | |
406 | case INDEX_op_rem_i64: | |
407 | return (int64_t)x % ((int64_t)y ? : 1); | |
408 | case INDEX_op_remu_i64: | |
409 | return (uint64_t)x % ((uint64_t)y ? : 1); | |
410 | ||
53108fb5 KB |
411 | default: |
412 | fprintf(stderr, | |
413 | "Unrecognized operation %d in do_constant_folding.\n", op); | |
414 | tcg_abort(); | |
415 | } | |
416 | } | |
417 | ||
fe0de7aa | 418 | static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y) |
53108fb5 KB |
419 | { |
420 | TCGArg res = do_constant_folding_2(op, x, y); | |
53108fb5 | 421 | if (op_bits(op) == 32) { |
29f3ff8d | 422 | res = (int32_t)res; |
53108fb5 | 423 | } |
53108fb5 KB |
424 | return res; |
425 | } | |
426 | ||
9519da7e RH |
427 | static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c) |
428 | { | |
429 | switch (c) { | |
430 | case TCG_COND_EQ: | |
431 | return x == y; | |
432 | case TCG_COND_NE: | |
433 | return x != y; | |
434 | case TCG_COND_LT: | |
435 | return (int32_t)x < (int32_t)y; | |
436 | case TCG_COND_GE: | |
437 | return (int32_t)x >= (int32_t)y; | |
438 | case TCG_COND_LE: | |
439 | return (int32_t)x <= (int32_t)y; | |
440 | case TCG_COND_GT: | |
441 | return (int32_t)x > (int32_t)y; | |
442 | case TCG_COND_LTU: | |
443 | return x < y; | |
444 | case TCG_COND_GEU: | |
445 | return x >= y; | |
446 | case TCG_COND_LEU: | |
447 | return x <= y; | |
448 | case TCG_COND_GTU: | |
449 | return x > y; | |
450 | default: | |
451 | tcg_abort(); | |
452 | } | |
453 | } | |
454 | ||
455 | static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c) | |
456 | { | |
457 | switch (c) { | |
458 | case TCG_COND_EQ: | |
459 | return x == y; | |
460 | case TCG_COND_NE: | |
461 | return x != y; | |
462 | case TCG_COND_LT: | |
463 | return (int64_t)x < (int64_t)y; | |
464 | case TCG_COND_GE: | |
465 | return (int64_t)x >= (int64_t)y; | |
466 | case TCG_COND_LE: | |
467 | return (int64_t)x <= (int64_t)y; | |
468 | case TCG_COND_GT: | |
469 | return (int64_t)x > (int64_t)y; | |
470 | case TCG_COND_LTU: | |
471 | return x < y; | |
472 | case TCG_COND_GEU: | |
473 | return x >= y; | |
474 | case TCG_COND_LEU: | |
475 | return x <= y; | |
476 | case TCG_COND_GTU: | |
477 | return x > y; | |
478 | default: | |
479 | tcg_abort(); | |
480 | } | |
481 | } | |
482 | ||
483 | static bool do_constant_folding_cond_eq(TCGCond c) | |
484 | { | |
485 | switch (c) { | |
486 | case TCG_COND_GT: | |
487 | case TCG_COND_LTU: | |
488 | case TCG_COND_LT: | |
489 | case TCG_COND_GTU: | |
490 | case TCG_COND_NE: | |
491 | return 0; | |
492 | case TCG_COND_GE: | |
493 | case TCG_COND_GEU: | |
494 | case TCG_COND_LE: | |
495 | case TCG_COND_LEU: | |
496 | case TCG_COND_EQ: | |
497 | return 1; | |
498 | default: | |
499 | tcg_abort(); | |
500 | } | |
501 | } | |
502 | ||
b336ceb6 AJ |
503 | /* Return 2 if the condition can't be simplified, and the result |
504 | of the condition (0 or 1) if it can */ | |
f8dd19e5 AJ |
505 | static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x, |
506 | TCGArg y, TCGCond c) | |
507 | { | |
6349039d RH |
508 | tcg_target_ulong xv = arg_info(x)->val; |
509 | tcg_target_ulong yv = arg_info(y)->val; | |
510 | if (arg_is_const(x) && arg_is_const(y)) { | |
b336ceb6 AJ |
511 | switch (op_bits(op)) { |
512 | case 32: | |
6349039d | 513 | return do_constant_folding_cond_32(xv, yv, c); |
b336ceb6 | 514 | case 64: |
6349039d | 515 | return do_constant_folding_cond_64(xv, yv, c); |
0aed257f | 516 | default: |
9519da7e | 517 | tcg_abort(); |
b336ceb6 | 518 | } |
6349039d | 519 | } else if (args_are_copies(x, y)) { |
9519da7e | 520 | return do_constant_folding_cond_eq(c); |
6349039d | 521 | } else if (arg_is_const(y) && yv == 0) { |
b336ceb6 | 522 | switch (c) { |
f8dd19e5 | 523 | case TCG_COND_LTU: |
b336ceb6 | 524 | return 0; |
f8dd19e5 | 525 | case TCG_COND_GEU: |
b336ceb6 AJ |
526 | return 1; |
527 | default: | |
528 | return 2; | |
f8dd19e5 | 529 | } |
f8dd19e5 | 530 | } |
550276ae | 531 | return 2; |
f8dd19e5 AJ |
532 | } |
533 | ||
6c4382f8 RH |
534 | /* Return 2 if the condition can't be simplified, and the result |
535 | of the condition (0 or 1) if it can */ | |
536 | static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c) | |
537 | { | |
538 | TCGArg al = p1[0], ah = p1[1]; | |
539 | TCGArg bl = p2[0], bh = p2[1]; | |
540 | ||
6349039d RH |
541 | if (arg_is_const(bl) && arg_is_const(bh)) { |
542 | tcg_target_ulong blv = arg_info(bl)->val; | |
543 | tcg_target_ulong bhv = arg_info(bh)->val; | |
544 | uint64_t b = deposit64(blv, 32, 32, bhv); | |
6c4382f8 | 545 | |
6349039d RH |
546 | if (arg_is_const(al) && arg_is_const(ah)) { |
547 | tcg_target_ulong alv = arg_info(al)->val; | |
548 | tcg_target_ulong ahv = arg_info(ah)->val; | |
549 | uint64_t a = deposit64(alv, 32, 32, ahv); | |
6c4382f8 RH |
550 | return do_constant_folding_cond_64(a, b, c); |
551 | } | |
552 | if (b == 0) { | |
553 | switch (c) { | |
554 | case TCG_COND_LTU: | |
555 | return 0; | |
556 | case TCG_COND_GEU: | |
557 | return 1; | |
558 | default: | |
559 | break; | |
560 | } | |
561 | } | |
562 | } | |
6349039d | 563 | if (args_are_copies(al, bl) && args_are_copies(ah, bh)) { |
6c4382f8 RH |
564 | return do_constant_folding_cond_eq(c); |
565 | } | |
566 | return 2; | |
567 | } | |
568 | ||
24c9ae4e RH |
569 | static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2) |
570 | { | |
571 | TCGArg a1 = *p1, a2 = *p2; | |
572 | int sum = 0; | |
6349039d RH |
573 | sum += arg_is_const(a1); |
574 | sum -= arg_is_const(a2); | |
24c9ae4e RH |
575 | |
576 | /* Prefer the constant in second argument, and then the form | |
577 | op a, a, b, which is better handled on non-RISC hosts. */ | |
578 | if (sum > 0 || (sum == 0 && dest == a2)) { | |
579 | *p1 = a2; | |
580 | *p2 = a1; | |
581 | return true; | |
582 | } | |
583 | return false; | |
584 | } | |
585 | ||
0bfcb865 RH |
586 | static bool swap_commutative2(TCGArg *p1, TCGArg *p2) |
587 | { | |
588 | int sum = 0; | |
6349039d RH |
589 | sum += arg_is_const(p1[0]); |
590 | sum += arg_is_const(p1[1]); | |
591 | sum -= arg_is_const(p2[0]); | |
592 | sum -= arg_is_const(p2[1]); | |
0bfcb865 RH |
593 | if (sum > 0) { |
594 | TCGArg t; | |
595 | t = p1[0], p1[0] = p2[0], p2[0] = t; | |
596 | t = p1[1], p1[1] = p2[1], p2[1] = t; | |
597 | return true; | |
598 | } | |
599 | return false; | |
600 | } | |
601 | ||
22613af4 | 602 | /* Propagate constants and copies, fold constant expressions. */ |
36e60ef6 | 603 | void tcg_optimize(TCGContext *s) |
8f2e8c07 | 604 | { |
15fa08f8 RH |
605 | int nb_temps, nb_globals; |
606 | TCGOp *op, *op_next, *prev_mb = NULL; | |
34184b07 EC |
607 | struct tcg_temp_info *infos; |
608 | TCGTempSet temps_used; | |
5d8f5363 | 609 | |
22613af4 KB |
610 | /* Array VALS has an element for each temp. |
611 | If this temp holds a constant then its value is kept in VALS' element. | |
e590d4e6 AJ |
612 | If this temp is a copy of other ones then the other copies are |
613 | available through the doubly linked circular list. */ | |
8f2e8c07 KB |
614 | |
615 | nb_temps = s->nb_temps; | |
616 | nb_globals = s->nb_globals; | |
34184b07 EC |
617 | bitmap_zero(temps_used.l, nb_temps); |
618 | infos = tcg_malloc(sizeof(struct tcg_temp_info) * nb_temps); | |
8f2e8c07 | 619 | |
15fa08f8 | 620 | QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) { |
24666baf | 621 | tcg_target_ulong mask, partmask, affected; |
c45cb8bb | 622 | int nb_oargs, nb_iargs, i; |
cf066674 | 623 | TCGArg tmp; |
c45cb8bb RH |
624 | TCGOpcode opc = op->opc; |
625 | const TCGOpDef *def = &tcg_op_defs[opc]; | |
626 | ||
1208d7dd AJ |
627 | /* Count the arguments, and initialize the temps that are |
628 | going to be used */ | |
c45cb8bb | 629 | if (opc == INDEX_op_call) { |
cd9090aa RH |
630 | nb_oargs = TCGOP_CALLO(op); |
631 | nb_iargs = TCGOP_CALLI(op); | |
1208d7dd | 632 | for (i = 0; i < nb_oargs + nb_iargs; i++) { |
6349039d RH |
633 | TCGTemp *ts = arg_temp(op->args[i]); |
634 | if (ts) { | |
34184b07 | 635 | init_ts_info(infos, &temps_used, ts); |
1208d7dd AJ |
636 | } |
637 | } | |
1ff8c541 | 638 | } else { |
cf066674 RH |
639 | nb_oargs = def->nb_oargs; |
640 | nb_iargs = def->nb_iargs; | |
1208d7dd | 641 | for (i = 0; i < nb_oargs + nb_iargs; i++) { |
34184b07 | 642 | init_arg_info(infos, &temps_used, op->args[i]); |
1208d7dd | 643 | } |
cf066674 RH |
644 | } |
645 | ||
646 | /* Do copy propagation */ | |
647 | for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { | |
6349039d RH |
648 | TCGTemp *ts = arg_temp(op->args[i]); |
649 | if (ts && ts_is_copy(ts)) { | |
650 | op->args[i] = temp_arg(find_better_copy(s, ts)); | |
22613af4 KB |
651 | } |
652 | } | |
653 | ||
53108fb5 | 654 | /* For commutative operations make constant second argument */ |
c45cb8bb | 655 | switch (opc) { |
53108fb5 KB |
656 | CASE_OP_32_64(add): |
657 | CASE_OP_32_64(mul): | |
9a81090b KB |
658 | CASE_OP_32_64(and): |
659 | CASE_OP_32_64(or): | |
660 | CASE_OP_32_64(xor): | |
cb25c80a RH |
661 | CASE_OP_32_64(eqv): |
662 | CASE_OP_32_64(nand): | |
663 | CASE_OP_32_64(nor): | |
03271524 RH |
664 | CASE_OP_32_64(muluh): |
665 | CASE_OP_32_64(mulsh): | |
acd93701 | 666 | swap_commutative(op->args[0], &op->args[1], &op->args[2]); |
53108fb5 | 667 | break; |
65a7cce1 | 668 | CASE_OP_32_64(brcond): |
acd93701 RH |
669 | if (swap_commutative(-1, &op->args[0], &op->args[1])) { |
670 | op->args[2] = tcg_swap_cond(op->args[2]); | |
65a7cce1 AJ |
671 | } |
672 | break; | |
673 | CASE_OP_32_64(setcond): | |
acd93701 RH |
674 | if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) { |
675 | op->args[3] = tcg_swap_cond(op->args[3]); | |
65a7cce1 AJ |
676 | } |
677 | break; | |
fa01a208 | 678 | CASE_OP_32_64(movcond): |
acd93701 RH |
679 | if (swap_commutative(-1, &op->args[1], &op->args[2])) { |
680 | op->args[5] = tcg_swap_cond(op->args[5]); | |
5d8f5363 RH |
681 | } |
682 | /* For movcond, we canonicalize the "false" input reg to match | |
683 | the destination reg so that the tcg backend can implement | |
684 | a "move if true" operation. */ | |
acd93701 RH |
685 | if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) { |
686 | op->args[5] = tcg_invert_cond(op->args[5]); | |
fa01a208 | 687 | } |
1e484e61 | 688 | break; |
d7156f7c | 689 | CASE_OP_32_64(add2): |
acd93701 RH |
690 | swap_commutative(op->args[0], &op->args[2], &op->args[4]); |
691 | swap_commutative(op->args[1], &op->args[3], &op->args[5]); | |
1e484e61 | 692 | break; |
d7156f7c | 693 | CASE_OP_32_64(mulu2): |
4d3203fd | 694 | CASE_OP_32_64(muls2): |
acd93701 | 695 | swap_commutative(op->args[0], &op->args[2], &op->args[3]); |
1414968a | 696 | break; |
0bfcb865 | 697 | case INDEX_op_brcond2_i32: |
acd93701 RH |
698 | if (swap_commutative2(&op->args[0], &op->args[2])) { |
699 | op->args[4] = tcg_swap_cond(op->args[4]); | |
0bfcb865 RH |
700 | } |
701 | break; | |
702 | case INDEX_op_setcond2_i32: | |
acd93701 RH |
703 | if (swap_commutative2(&op->args[1], &op->args[3])) { |
704 | op->args[5] = tcg_swap_cond(op->args[5]); | |
0bfcb865 RH |
705 | } |
706 | break; | |
53108fb5 KB |
707 | default: |
708 | break; | |
709 | } | |
710 | ||
2d497542 RH |
711 | /* Simplify expressions for "shift/rot r, 0, a => movi r, 0", |
712 | and "sub r, 0, a => neg r, a" case. */ | |
c45cb8bb | 713 | switch (opc) { |
01ee5282 AJ |
714 | CASE_OP_32_64(shl): |
715 | CASE_OP_32_64(shr): | |
716 | CASE_OP_32_64(sar): | |
717 | CASE_OP_32_64(rotl): | |
718 | CASE_OP_32_64(rotr): | |
6349039d RH |
719 | if (arg_is_const(op->args[1]) |
720 | && arg_info(op->args[1])->val == 0) { | |
acd93701 | 721 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
01ee5282 AJ |
722 | continue; |
723 | } | |
724 | break; | |
2d497542 RH |
725 | CASE_OP_32_64(sub): |
726 | { | |
727 | TCGOpcode neg_op; | |
728 | bool have_neg; | |
729 | ||
6349039d | 730 | if (arg_is_const(op->args[2])) { |
2d497542 RH |
731 | /* Proceed with possible constant folding. */ |
732 | break; | |
733 | } | |
c45cb8bb | 734 | if (opc == INDEX_op_sub_i32) { |
2d497542 RH |
735 | neg_op = INDEX_op_neg_i32; |
736 | have_neg = TCG_TARGET_HAS_neg_i32; | |
737 | } else { | |
738 | neg_op = INDEX_op_neg_i64; | |
739 | have_neg = TCG_TARGET_HAS_neg_i64; | |
740 | } | |
741 | if (!have_neg) { | |
742 | break; | |
743 | } | |
6349039d RH |
744 | if (arg_is_const(op->args[1]) |
745 | && arg_info(op->args[1])->val == 0) { | |
c45cb8bb | 746 | op->opc = neg_op; |
acd93701 RH |
747 | reset_temp(op->args[0]); |
748 | op->args[1] = op->args[2]; | |
2d497542 RH |
749 | continue; |
750 | } | |
751 | } | |
752 | break; | |
e201b564 RH |
753 | CASE_OP_32_64(xor): |
754 | CASE_OP_32_64(nand): | |
6349039d RH |
755 | if (!arg_is_const(op->args[1]) |
756 | && arg_is_const(op->args[2]) | |
757 | && arg_info(op->args[2])->val == -1) { | |
e201b564 RH |
758 | i = 1; |
759 | goto try_not; | |
760 | } | |
761 | break; | |
762 | CASE_OP_32_64(nor): | |
6349039d RH |
763 | if (!arg_is_const(op->args[1]) |
764 | && arg_is_const(op->args[2]) | |
765 | && arg_info(op->args[2])->val == 0) { | |
e201b564 RH |
766 | i = 1; |
767 | goto try_not; | |
768 | } | |
769 | break; | |
770 | CASE_OP_32_64(andc): | |
6349039d RH |
771 | if (!arg_is_const(op->args[2]) |
772 | && arg_is_const(op->args[1]) | |
773 | && arg_info(op->args[1])->val == -1) { | |
e201b564 RH |
774 | i = 2; |
775 | goto try_not; | |
776 | } | |
777 | break; | |
778 | CASE_OP_32_64(orc): | |
779 | CASE_OP_32_64(eqv): | |
6349039d RH |
780 | if (!arg_is_const(op->args[2]) |
781 | && arg_is_const(op->args[1]) | |
782 | && arg_info(op->args[1])->val == 0) { | |
e201b564 RH |
783 | i = 2; |
784 | goto try_not; | |
785 | } | |
786 | break; | |
787 | try_not: | |
788 | { | |
789 | TCGOpcode not_op; | |
790 | bool have_not; | |
791 | ||
792 | if (def->flags & TCG_OPF_64BIT) { | |
793 | not_op = INDEX_op_not_i64; | |
794 | have_not = TCG_TARGET_HAS_not_i64; | |
795 | } else { | |
796 | not_op = INDEX_op_not_i32; | |
797 | have_not = TCG_TARGET_HAS_not_i32; | |
798 | } | |
799 | if (!have_not) { | |
800 | break; | |
801 | } | |
c45cb8bb | 802 | op->opc = not_op; |
acd93701 RH |
803 | reset_temp(op->args[0]); |
804 | op->args[1] = op->args[i]; | |
e201b564 RH |
805 | continue; |
806 | } | |
01ee5282 AJ |
807 | default: |
808 | break; | |
809 | } | |
810 | ||
464a1441 | 811 | /* Simplify expression for "op r, a, const => mov r, a" cases */ |
c45cb8bb | 812 | switch (opc) { |
53108fb5 KB |
813 | CASE_OP_32_64(add): |
814 | CASE_OP_32_64(sub): | |
55c0975c KB |
815 | CASE_OP_32_64(shl): |
816 | CASE_OP_32_64(shr): | |
817 | CASE_OP_32_64(sar): | |
25c4d9cc RH |
818 | CASE_OP_32_64(rotl): |
819 | CASE_OP_32_64(rotr): | |
38ee188b AJ |
820 | CASE_OP_32_64(or): |
821 | CASE_OP_32_64(xor): | |
464a1441 | 822 | CASE_OP_32_64(andc): |
6349039d RH |
823 | if (!arg_is_const(op->args[1]) |
824 | && arg_is_const(op->args[2]) | |
825 | && arg_info(op->args[2])->val == 0) { | |
acd93701 | 826 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
97a79eb7 | 827 | continue; |
53108fb5 KB |
828 | } |
829 | break; | |
464a1441 RH |
830 | CASE_OP_32_64(and): |
831 | CASE_OP_32_64(orc): | |
832 | CASE_OP_32_64(eqv): | |
6349039d RH |
833 | if (!arg_is_const(op->args[1]) |
834 | && arg_is_const(op->args[2]) | |
835 | && arg_info(op->args[2])->val == -1) { | |
acd93701 | 836 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
97a79eb7 | 837 | continue; |
464a1441 RH |
838 | } |
839 | break; | |
56e49438 AJ |
840 | default: |
841 | break; | |
842 | } | |
843 | ||
3031244b AJ |
844 | /* Simplify using known-zero bits. Currently only ops with a single |
845 | output argument is supported. */ | |
3a9d8b17 | 846 | mask = -1; |
633f6502 | 847 | affected = -1; |
c45cb8bb | 848 | switch (opc) { |
3a9d8b17 | 849 | CASE_OP_32_64(ext8s): |
6349039d | 850 | if ((arg_info(op->args[1])->mask & 0x80) != 0) { |
3a9d8b17 PB |
851 | break; |
852 | } | |
853 | CASE_OP_32_64(ext8u): | |
854 | mask = 0xff; | |
855 | goto and_const; | |
856 | CASE_OP_32_64(ext16s): | |
6349039d | 857 | if ((arg_info(op->args[1])->mask & 0x8000) != 0) { |
3a9d8b17 PB |
858 | break; |
859 | } | |
860 | CASE_OP_32_64(ext16u): | |
861 | mask = 0xffff; | |
862 | goto and_const; | |
863 | case INDEX_op_ext32s_i64: | |
6349039d | 864 | if ((arg_info(op->args[1])->mask & 0x80000000) != 0) { |
3a9d8b17 PB |
865 | break; |
866 | } | |
867 | case INDEX_op_ext32u_i64: | |
868 | mask = 0xffffffffU; | |
869 | goto and_const; | |
870 | ||
871 | CASE_OP_32_64(and): | |
6349039d RH |
872 | mask = arg_info(op->args[2])->mask; |
873 | if (arg_is_const(op->args[2])) { | |
3a9d8b17 | 874 | and_const: |
6349039d | 875 | affected = arg_info(op->args[1])->mask & ~mask; |
3a9d8b17 | 876 | } |
6349039d | 877 | mask = arg_info(op->args[1])->mask & mask; |
3a9d8b17 PB |
878 | break; |
879 | ||
8bcb5c8f | 880 | case INDEX_op_ext_i32_i64: |
6349039d | 881 | if ((arg_info(op->args[1])->mask & 0x80000000) != 0) { |
8bcb5c8f AJ |
882 | break; |
883 | } | |
884 | case INDEX_op_extu_i32_i64: | |
885 | /* We do not compute affected as it is a size changing op. */ | |
6349039d | 886 | mask = (uint32_t)arg_info(op->args[1])->mask; |
8bcb5c8f AJ |
887 | break; |
888 | ||
23ec69ed RH |
889 | CASE_OP_32_64(andc): |
890 | /* Known-zeros does not imply known-ones. Therefore unless | |
acd93701 | 891 | op->args[2] is constant, we can't infer anything from it. */ |
6349039d RH |
892 | if (arg_is_const(op->args[2])) { |
893 | mask = ~arg_info(op->args[2])->mask; | |
23ec69ed RH |
894 | goto and_const; |
895 | } | |
6349039d RH |
896 | /* But we certainly know nothing outside args[1] may be set. */ |
897 | mask = arg_info(op->args[1])->mask; | |
23ec69ed RH |
898 | break; |
899 | ||
e46b225a | 900 | case INDEX_op_sar_i32: |
6349039d RH |
901 | if (arg_is_const(op->args[2])) { |
902 | tmp = arg_info(op->args[2])->val & 31; | |
903 | mask = (int32_t)arg_info(op->args[1])->mask >> tmp; | |
e46b225a AJ |
904 | } |
905 | break; | |
906 | case INDEX_op_sar_i64: | |
6349039d RH |
907 | if (arg_is_const(op->args[2])) { |
908 | tmp = arg_info(op->args[2])->val & 63; | |
909 | mask = (int64_t)arg_info(op->args[1])->mask >> tmp; | |
3a9d8b17 PB |
910 | } |
911 | break; | |
912 | ||
e46b225a | 913 | case INDEX_op_shr_i32: |
6349039d RH |
914 | if (arg_is_const(op->args[2])) { |
915 | tmp = arg_info(op->args[2])->val & 31; | |
916 | mask = (uint32_t)arg_info(op->args[1])->mask >> tmp; | |
e46b225a AJ |
917 | } |
918 | break; | |
919 | case INDEX_op_shr_i64: | |
6349039d RH |
920 | if (arg_is_const(op->args[2])) { |
921 | tmp = arg_info(op->args[2])->val & 63; | |
922 | mask = (uint64_t)arg_info(op->args[1])->mask >> tmp; | |
3a9d8b17 PB |
923 | } |
924 | break; | |
925 | ||
609ad705 | 926 | case INDEX_op_extrl_i64_i32: |
6349039d | 927 | mask = (uint32_t)arg_info(op->args[1])->mask; |
609ad705 RH |
928 | break; |
929 | case INDEX_op_extrh_i64_i32: | |
6349039d | 930 | mask = (uint64_t)arg_info(op->args[1])->mask >> 32; |
4bb7a41e RH |
931 | break; |
932 | ||
3a9d8b17 | 933 | CASE_OP_32_64(shl): |
6349039d RH |
934 | if (arg_is_const(op->args[2])) { |
935 | tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1); | |
936 | mask = arg_info(op->args[1])->mask << tmp; | |
3a9d8b17 PB |
937 | } |
938 | break; | |
939 | ||
940 | CASE_OP_32_64(neg): | |
941 | /* Set to 1 all bits to the left of the rightmost. */ | |
6349039d RH |
942 | mask = -(arg_info(op->args[1])->mask |
943 | & -arg_info(op->args[1])->mask); | |
3a9d8b17 PB |
944 | break; |
945 | ||
946 | CASE_OP_32_64(deposit): | |
6349039d RH |
947 | mask = deposit64(arg_info(op->args[1])->mask, |
948 | op->args[3], op->args[4], | |
949 | arg_info(op->args[2])->mask); | |
3a9d8b17 PB |
950 | break; |
951 | ||
7ec8bab3 | 952 | CASE_OP_32_64(extract): |
6349039d RH |
953 | mask = extract64(arg_info(op->args[1])->mask, |
954 | op->args[2], op->args[3]); | |
acd93701 | 955 | if (op->args[2] == 0) { |
6349039d | 956 | affected = arg_info(op->args[1])->mask & ~mask; |
7ec8bab3 RH |
957 | } |
958 | break; | |
959 | CASE_OP_32_64(sextract): | |
6349039d | 960 | mask = sextract64(arg_info(op->args[1])->mask, |
acd93701 RH |
961 | op->args[2], op->args[3]); |
962 | if (op->args[2] == 0 && (tcg_target_long)mask >= 0) { | |
6349039d | 963 | affected = arg_info(op->args[1])->mask & ~mask; |
7ec8bab3 RH |
964 | } |
965 | break; | |
966 | ||
3a9d8b17 PB |
967 | CASE_OP_32_64(or): |
968 | CASE_OP_32_64(xor): | |
6349039d | 969 | mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask; |
3a9d8b17 PB |
970 | break; |
971 | ||
0e28d006 RH |
972 | case INDEX_op_clz_i32: |
973 | case INDEX_op_ctz_i32: | |
6349039d | 974 | mask = arg_info(op->args[2])->mask | 31; |
0e28d006 RH |
975 | break; |
976 | ||
977 | case INDEX_op_clz_i64: | |
978 | case INDEX_op_ctz_i64: | |
6349039d | 979 | mask = arg_info(op->args[2])->mask | 63; |
0e28d006 RH |
980 | break; |
981 | ||
a768e4e9 RH |
982 | case INDEX_op_ctpop_i32: |
983 | mask = 32 | 31; | |
984 | break; | |
985 | case INDEX_op_ctpop_i64: | |
986 | mask = 64 | 63; | |
987 | break; | |
988 | ||
3a9d8b17 | 989 | CASE_OP_32_64(setcond): |
a763551a | 990 | case INDEX_op_setcond2_i32: |
3a9d8b17 PB |
991 | mask = 1; |
992 | break; | |
993 | ||
994 | CASE_OP_32_64(movcond): | |
6349039d | 995 | mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask; |
3a9d8b17 PB |
996 | break; |
997 | ||
c8d70272 | 998 | CASE_OP_32_64(ld8u): |
c8d70272 AJ |
999 | mask = 0xff; |
1000 | break; | |
1001 | CASE_OP_32_64(ld16u): | |
c8d70272 AJ |
1002 | mask = 0xffff; |
1003 | break; | |
1004 | case INDEX_op_ld32u_i64: | |
c8d70272 AJ |
1005 | mask = 0xffffffffu; |
1006 | break; | |
1007 | ||
1008 | CASE_OP_32_64(qemu_ld): | |
1009 | { | |
acd93701 | 1010 | TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs]; |
59227d5d | 1011 | TCGMemOp mop = get_memop(oi); |
c8d70272 AJ |
1012 | if (!(mop & MO_SIGN)) { |
1013 | mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1; | |
1014 | } | |
1015 | } | |
1016 | break; | |
1017 | ||
3a9d8b17 PB |
1018 | default: |
1019 | break; | |
1020 | } | |
1021 | ||
bc8d688f RH |
1022 | /* 32-bit ops generate 32-bit results. For the result is zero test |
1023 | below, we can ignore high bits, but for further optimizations we | |
1024 | need to record that the high bits contain garbage. */ | |
24666baf | 1025 | partmask = mask; |
bc8d688f | 1026 | if (!(def->flags & TCG_OPF_64BIT)) { |
24666baf RH |
1027 | mask |= ~(tcg_target_ulong)0xffffffffu; |
1028 | partmask &= 0xffffffffu; | |
1029 | affected &= 0xffffffffu; | |
f096dc96 AJ |
1030 | } |
1031 | ||
24666baf | 1032 | if (partmask == 0) { |
eabb7b91 | 1033 | tcg_debug_assert(nb_oargs == 1); |
acd93701 | 1034 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
633f6502 PB |
1035 | continue; |
1036 | } | |
1037 | if (affected == 0) { | |
eabb7b91 | 1038 | tcg_debug_assert(nb_oargs == 1); |
acd93701 | 1039 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
633f6502 PB |
1040 | continue; |
1041 | } | |
1042 | ||
56e49438 | 1043 | /* Simplify expression for "op r, a, 0 => movi r, 0" cases */ |
c45cb8bb | 1044 | switch (opc) { |
61251c0c | 1045 | CASE_OP_32_64(and): |
53108fb5 | 1046 | CASE_OP_32_64(mul): |
03271524 RH |
1047 | CASE_OP_32_64(muluh): |
1048 | CASE_OP_32_64(mulsh): | |
6349039d RH |
1049 | if (arg_is_const(op->args[2]) |
1050 | && arg_info(op->args[2])->val == 0) { | |
acd93701 | 1051 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
53108fb5 KB |
1052 | continue; |
1053 | } | |
1054 | break; | |
56e49438 AJ |
1055 | default: |
1056 | break; | |
1057 | } | |
1058 | ||
1059 | /* Simplify expression for "op r, a, a => mov r, a" cases */ | |
c45cb8bb | 1060 | switch (opc) { |
9a81090b KB |
1061 | CASE_OP_32_64(or): |
1062 | CASE_OP_32_64(and): | |
6349039d | 1063 | if (args_are_copies(op->args[1], op->args[2])) { |
acd93701 | 1064 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
9a81090b KB |
1065 | continue; |
1066 | } | |
1067 | break; | |
fe0de7aa BS |
1068 | default: |
1069 | break; | |
53108fb5 KB |
1070 | } |
1071 | ||
3c94193e | 1072 | /* Simplify expression for "op r, a, a => movi r, 0" cases */ |
c45cb8bb | 1073 | switch (opc) { |
e64e958e | 1074 | CASE_OP_32_64(andc): |
3c94193e AJ |
1075 | CASE_OP_32_64(sub): |
1076 | CASE_OP_32_64(xor): | |
6349039d | 1077 | if (args_are_copies(op->args[1], op->args[2])) { |
acd93701 | 1078 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
3c94193e AJ |
1079 | continue; |
1080 | } | |
1081 | break; | |
1082 | default: | |
1083 | break; | |
1084 | } | |
1085 | ||
22613af4 KB |
1086 | /* Propagate constants through copy operations and do constant |
1087 | folding. Constants will be substituted to arguments by register | |
1088 | allocator where needed and possible. Also detect copies. */ | |
c45cb8bb | 1089 | switch (opc) { |
22613af4 | 1090 | CASE_OP_32_64(mov): |
acd93701 | 1091 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
97a79eb7 | 1092 | break; |
22613af4 | 1093 | CASE_OP_32_64(movi): |
acd93701 | 1094 | tcg_opt_gen_movi(s, op, op->args[0], op->args[1]); |
22613af4 | 1095 | break; |
6e14e91b | 1096 | |
a640f031 | 1097 | CASE_OP_32_64(not): |
cb25c80a | 1098 | CASE_OP_32_64(neg): |
25c4d9cc RH |
1099 | CASE_OP_32_64(ext8s): |
1100 | CASE_OP_32_64(ext8u): | |
1101 | CASE_OP_32_64(ext16s): | |
1102 | CASE_OP_32_64(ext16u): | |
a768e4e9 | 1103 | CASE_OP_32_64(ctpop): |
a640f031 KB |
1104 | case INDEX_op_ext32s_i64: |
1105 | case INDEX_op_ext32u_i64: | |
8bcb5c8f AJ |
1106 | case INDEX_op_ext_i32_i64: |
1107 | case INDEX_op_extu_i32_i64: | |
609ad705 RH |
1108 | case INDEX_op_extrl_i64_i32: |
1109 | case INDEX_op_extrh_i64_i32: | |
6349039d RH |
1110 | if (arg_is_const(op->args[1])) { |
1111 | tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0); | |
acd93701 | 1112 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
6e14e91b | 1113 | break; |
a640f031 | 1114 | } |
6e14e91b RH |
1115 | goto do_default; |
1116 | ||
53108fb5 KB |
1117 | CASE_OP_32_64(add): |
1118 | CASE_OP_32_64(sub): | |
1119 | CASE_OP_32_64(mul): | |
9a81090b KB |
1120 | CASE_OP_32_64(or): |
1121 | CASE_OP_32_64(and): | |
1122 | CASE_OP_32_64(xor): | |
55c0975c KB |
1123 | CASE_OP_32_64(shl): |
1124 | CASE_OP_32_64(shr): | |
1125 | CASE_OP_32_64(sar): | |
25c4d9cc RH |
1126 | CASE_OP_32_64(rotl): |
1127 | CASE_OP_32_64(rotr): | |
cb25c80a RH |
1128 | CASE_OP_32_64(andc): |
1129 | CASE_OP_32_64(orc): | |
1130 | CASE_OP_32_64(eqv): | |
1131 | CASE_OP_32_64(nand): | |
1132 | CASE_OP_32_64(nor): | |
03271524 RH |
1133 | CASE_OP_32_64(muluh): |
1134 | CASE_OP_32_64(mulsh): | |
01547f7f RH |
1135 | CASE_OP_32_64(div): |
1136 | CASE_OP_32_64(divu): | |
1137 | CASE_OP_32_64(rem): | |
1138 | CASE_OP_32_64(remu): | |
6349039d RH |
1139 | if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { |
1140 | tmp = do_constant_folding(opc, arg_info(op->args[1])->val, | |
1141 | arg_info(op->args[2])->val); | |
acd93701 | 1142 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
6e14e91b | 1143 | break; |
53108fb5 | 1144 | } |
6e14e91b RH |
1145 | goto do_default; |
1146 | ||
0e28d006 RH |
1147 | CASE_OP_32_64(clz): |
1148 | CASE_OP_32_64(ctz): | |
6349039d RH |
1149 | if (arg_is_const(op->args[1])) { |
1150 | TCGArg v = arg_info(op->args[1])->val; | |
0e28d006 RH |
1151 | if (v != 0) { |
1152 | tmp = do_constant_folding(opc, v, 0); | |
acd93701 | 1153 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
0e28d006 | 1154 | } else { |
acd93701 | 1155 | tcg_opt_gen_mov(s, op, op->args[0], op->args[2]); |
0e28d006 RH |
1156 | } |
1157 | break; | |
1158 | } | |
1159 | goto do_default; | |
1160 | ||
7ef55fc9 | 1161 | CASE_OP_32_64(deposit): |
6349039d RH |
1162 | if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { |
1163 | tmp = deposit64(arg_info(op->args[1])->val, | |
1164 | op->args[3], op->args[4], | |
1165 | arg_info(op->args[2])->val); | |
acd93701 | 1166 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
6e14e91b | 1167 | break; |
7ef55fc9 | 1168 | } |
6e14e91b RH |
1169 | goto do_default; |
1170 | ||
7ec8bab3 | 1171 | CASE_OP_32_64(extract): |
6349039d RH |
1172 | if (arg_is_const(op->args[1])) { |
1173 | tmp = extract64(arg_info(op->args[1])->val, | |
acd93701 RH |
1174 | op->args[2], op->args[3]); |
1175 | tcg_opt_gen_movi(s, op, op->args[0], tmp); | |
7ec8bab3 RH |
1176 | break; |
1177 | } | |
1178 | goto do_default; | |
1179 | ||
1180 | CASE_OP_32_64(sextract): | |
6349039d RH |
1181 | if (arg_is_const(op->args[1])) { |
1182 | tmp = sextract64(arg_info(op->args[1])->val, | |
acd93701 RH |
1183 | op->args[2], op->args[3]); |
1184 | tcg_opt_gen_movi(s, op, op->args[0], tmp); | |
7ec8bab3 RH |
1185 | break; |
1186 | } | |
1187 | goto do_default; | |
1188 | ||
f8dd19e5 | 1189 | CASE_OP_32_64(setcond): |
acd93701 RH |
1190 | tmp = do_constant_folding_cond(opc, op->args[1], |
1191 | op->args[2], op->args[3]); | |
b336ceb6 | 1192 | if (tmp != 2) { |
acd93701 | 1193 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
6e14e91b | 1194 | break; |
f8dd19e5 | 1195 | } |
6e14e91b RH |
1196 | goto do_default; |
1197 | ||
fbeaa26c | 1198 | CASE_OP_32_64(brcond): |
acd93701 RH |
1199 | tmp = do_constant_folding_cond(opc, op->args[0], |
1200 | op->args[1], op->args[2]); | |
b336ceb6 AJ |
1201 | if (tmp != 2) { |
1202 | if (tmp) { | |
34184b07 | 1203 | bitmap_zero(temps_used.l, nb_temps); |
c45cb8bb | 1204 | op->opc = INDEX_op_br; |
acd93701 | 1205 | op->args[0] = op->args[3]; |
fbeaa26c | 1206 | } else { |
0c627cdc | 1207 | tcg_op_remove(s, op); |
fbeaa26c | 1208 | } |
6e14e91b | 1209 | break; |
fbeaa26c | 1210 | } |
6e14e91b RH |
1211 | goto do_default; |
1212 | ||
fa01a208 | 1213 | CASE_OP_32_64(movcond): |
acd93701 RH |
1214 | tmp = do_constant_folding_cond(opc, op->args[1], |
1215 | op->args[2], op->args[5]); | |
b336ceb6 | 1216 | if (tmp != 2) { |
acd93701 | 1217 | tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]); |
6e14e91b | 1218 | break; |
fa01a208 | 1219 | } |
6349039d RH |
1220 | if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) { |
1221 | tcg_target_ulong tv = arg_info(op->args[3])->val; | |
1222 | tcg_target_ulong fv = arg_info(op->args[4])->val; | |
acd93701 | 1223 | TCGCond cond = op->args[5]; |
333b21b8 RH |
1224 | if (fv == 1 && tv == 0) { |
1225 | cond = tcg_invert_cond(cond); | |
1226 | } else if (!(tv == 1 && fv == 0)) { | |
1227 | goto do_default; | |
1228 | } | |
acd93701 | 1229 | op->args[3] = cond; |
333b21b8 RH |
1230 | op->opc = opc = (opc == INDEX_op_movcond_i32 |
1231 | ? INDEX_op_setcond_i32 | |
1232 | : INDEX_op_setcond_i64); | |
1233 | nb_iargs = 2; | |
1234 | } | |
6e14e91b | 1235 | goto do_default; |
212c328d RH |
1236 | |
1237 | case INDEX_op_add2_i32: | |
1238 | case INDEX_op_sub2_i32: | |
6349039d RH |
1239 | if (arg_is_const(op->args[2]) && arg_is_const(op->args[3]) |
1240 | && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) { | |
1241 | uint32_t al = arg_info(op->args[2])->val; | |
1242 | uint32_t ah = arg_info(op->args[3])->val; | |
1243 | uint32_t bl = arg_info(op->args[4])->val; | |
1244 | uint32_t bh = arg_info(op->args[5])->val; | |
212c328d RH |
1245 | uint64_t a = ((uint64_t)ah << 32) | al; |
1246 | uint64_t b = ((uint64_t)bh << 32) | bl; | |
1247 | TCGArg rl, rh; | |
5a18407f | 1248 | TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2); |
212c328d | 1249 | |
c45cb8bb | 1250 | if (opc == INDEX_op_add2_i32) { |
212c328d RH |
1251 | a += b; |
1252 | } else { | |
1253 | a -= b; | |
1254 | } | |
1255 | ||
acd93701 RH |
1256 | rl = op->args[0]; |
1257 | rh = op->args[1]; | |
1258 | tcg_opt_gen_movi(s, op, rl, (int32_t)a); | |
1259 | tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32)); | |
212c328d RH |
1260 | break; |
1261 | } | |
1262 | goto do_default; | |
1414968a RH |
1263 | |
1264 | case INDEX_op_mulu2_i32: | |
6349039d RH |
1265 | if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) { |
1266 | uint32_t a = arg_info(op->args[2])->val; | |
1267 | uint32_t b = arg_info(op->args[3])->val; | |
1414968a RH |
1268 | uint64_t r = (uint64_t)a * b; |
1269 | TCGArg rl, rh; | |
5a18407f | 1270 | TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2); |
1414968a | 1271 | |
acd93701 RH |
1272 | rl = op->args[0]; |
1273 | rh = op->args[1]; | |
1274 | tcg_opt_gen_movi(s, op, rl, (int32_t)r); | |
1275 | tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32)); | |
1414968a RH |
1276 | break; |
1277 | } | |
1278 | goto do_default; | |
6e14e91b | 1279 | |
bc1473ef | 1280 | case INDEX_op_brcond2_i32: |
acd93701 RH |
1281 | tmp = do_constant_folding_cond2(&op->args[0], &op->args[2], |
1282 | op->args[4]); | |
6c4382f8 RH |
1283 | if (tmp != 2) { |
1284 | if (tmp) { | |
a763551a | 1285 | do_brcond_true: |
34184b07 | 1286 | bitmap_zero(temps_used.l, nb_temps); |
c45cb8bb | 1287 | op->opc = INDEX_op_br; |
acd93701 | 1288 | op->args[0] = op->args[5]; |
6c4382f8 | 1289 | } else { |
a763551a | 1290 | do_brcond_false: |
0c627cdc | 1291 | tcg_op_remove(s, op); |
6c4382f8 | 1292 | } |
acd93701 RH |
1293 | } else if ((op->args[4] == TCG_COND_LT |
1294 | || op->args[4] == TCG_COND_GE) | |
6349039d RH |
1295 | && arg_is_const(op->args[2]) |
1296 | && arg_info(op->args[2])->val == 0 | |
1297 | && arg_is_const(op->args[3]) | |
1298 | && arg_info(op->args[3])->val == 0) { | |
6c4382f8 RH |
1299 | /* Simplify LT/GE comparisons vs zero to a single compare |
1300 | vs the high word of the input. */ | |
a763551a | 1301 | do_brcond_high: |
34184b07 | 1302 | bitmap_zero(temps_used.l, nb_temps); |
c45cb8bb | 1303 | op->opc = INDEX_op_brcond_i32; |
acd93701 RH |
1304 | op->args[0] = op->args[1]; |
1305 | op->args[1] = op->args[3]; | |
1306 | op->args[2] = op->args[4]; | |
1307 | op->args[3] = op->args[5]; | |
1308 | } else if (op->args[4] == TCG_COND_EQ) { | |
a763551a RH |
1309 | /* Simplify EQ comparisons where one of the pairs |
1310 | can be simplified. */ | |
1311 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
acd93701 RH |
1312 | op->args[0], op->args[2], |
1313 | TCG_COND_EQ); | |
a763551a RH |
1314 | if (tmp == 0) { |
1315 | goto do_brcond_false; | |
1316 | } else if (tmp == 1) { | |
1317 | goto do_brcond_high; | |
1318 | } | |
1319 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
acd93701 RH |
1320 | op->args[1], op->args[3], |
1321 | TCG_COND_EQ); | |
a763551a RH |
1322 | if (tmp == 0) { |
1323 | goto do_brcond_false; | |
1324 | } else if (tmp != 1) { | |
1325 | goto do_default; | |
1326 | } | |
1327 | do_brcond_low: | |
34184b07 | 1328 | bitmap_zero(temps_used.l, nb_temps); |
c45cb8bb | 1329 | op->opc = INDEX_op_brcond_i32; |
acd93701 RH |
1330 | op->args[1] = op->args[2]; |
1331 | op->args[2] = op->args[4]; | |
1332 | op->args[3] = op->args[5]; | |
1333 | } else if (op->args[4] == TCG_COND_NE) { | |
a763551a RH |
1334 | /* Simplify NE comparisons where one of the pairs |
1335 | can be simplified. */ | |
1336 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
acd93701 RH |
1337 | op->args[0], op->args[2], |
1338 | TCG_COND_NE); | |
a763551a RH |
1339 | if (tmp == 0) { |
1340 | goto do_brcond_high; | |
1341 | } else if (tmp == 1) { | |
1342 | goto do_brcond_true; | |
1343 | } | |
1344 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
acd93701 RH |
1345 | op->args[1], op->args[3], |
1346 | TCG_COND_NE); | |
a763551a RH |
1347 | if (tmp == 0) { |
1348 | goto do_brcond_low; | |
1349 | } else if (tmp == 1) { | |
1350 | goto do_brcond_true; | |
1351 | } | |
1352 | goto do_default; | |
6c4382f8 RH |
1353 | } else { |
1354 | goto do_default; | |
bc1473ef | 1355 | } |
6c4382f8 | 1356 | break; |
bc1473ef RH |
1357 | |
1358 | case INDEX_op_setcond2_i32: | |
acd93701 RH |
1359 | tmp = do_constant_folding_cond2(&op->args[1], &op->args[3], |
1360 | op->args[5]); | |
6c4382f8 | 1361 | if (tmp != 2) { |
a763551a | 1362 | do_setcond_const: |
acd93701 RH |
1363 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
1364 | } else if ((op->args[5] == TCG_COND_LT | |
1365 | || op->args[5] == TCG_COND_GE) | |
6349039d RH |
1366 | && arg_is_const(op->args[3]) |
1367 | && arg_info(op->args[3])->val == 0 | |
1368 | && arg_is_const(op->args[4]) | |
1369 | && arg_info(op->args[4])->val == 0) { | |
6c4382f8 RH |
1370 | /* Simplify LT/GE comparisons vs zero to a single compare |
1371 | vs the high word of the input. */ | |
a763551a | 1372 | do_setcond_high: |
acd93701 | 1373 | reset_temp(op->args[0]); |
6349039d | 1374 | arg_info(op->args[0])->mask = 1; |
c45cb8bb | 1375 | op->opc = INDEX_op_setcond_i32; |
acd93701 RH |
1376 | op->args[1] = op->args[2]; |
1377 | op->args[2] = op->args[4]; | |
1378 | op->args[3] = op->args[5]; | |
1379 | } else if (op->args[5] == TCG_COND_EQ) { | |
a763551a RH |
1380 | /* Simplify EQ comparisons where one of the pairs |
1381 | can be simplified. */ | |
1382 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
acd93701 RH |
1383 | op->args[1], op->args[3], |
1384 | TCG_COND_EQ); | |
a763551a RH |
1385 | if (tmp == 0) { |
1386 | goto do_setcond_const; | |
1387 | } else if (tmp == 1) { | |
1388 | goto do_setcond_high; | |
1389 | } | |
1390 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
acd93701 RH |
1391 | op->args[2], op->args[4], |
1392 | TCG_COND_EQ); | |
a763551a RH |
1393 | if (tmp == 0) { |
1394 | goto do_setcond_high; | |
1395 | } else if (tmp != 1) { | |
1396 | goto do_default; | |
1397 | } | |
1398 | do_setcond_low: | |
acd93701 | 1399 | reset_temp(op->args[0]); |
6349039d | 1400 | arg_info(op->args[0])->mask = 1; |
c45cb8bb | 1401 | op->opc = INDEX_op_setcond_i32; |
acd93701 RH |
1402 | op->args[2] = op->args[3]; |
1403 | op->args[3] = op->args[5]; | |
1404 | } else if (op->args[5] == TCG_COND_NE) { | |
a763551a RH |
1405 | /* Simplify NE comparisons where one of the pairs |
1406 | can be simplified. */ | |
1407 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
acd93701 RH |
1408 | op->args[1], op->args[3], |
1409 | TCG_COND_NE); | |
a763551a RH |
1410 | if (tmp == 0) { |
1411 | goto do_setcond_high; | |
1412 | } else if (tmp == 1) { | |
1413 | goto do_setcond_const; | |
1414 | } | |
1415 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
acd93701 RH |
1416 | op->args[2], op->args[4], |
1417 | TCG_COND_NE); | |
a763551a RH |
1418 | if (tmp == 0) { |
1419 | goto do_setcond_low; | |
1420 | } else if (tmp == 1) { | |
1421 | goto do_setcond_const; | |
1422 | } | |
1423 | goto do_default; | |
6c4382f8 RH |
1424 | } else { |
1425 | goto do_default; | |
bc1473ef | 1426 | } |
6c4382f8 | 1427 | break; |
bc1473ef | 1428 | |
8f2e8c07 | 1429 | case INDEX_op_call: |
acd93701 | 1430 | if (!(op->args[nb_oargs + nb_iargs + 1] |
cf066674 | 1431 | & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) { |
22613af4 | 1432 | for (i = 0; i < nb_globals; i++) { |
1208d7dd | 1433 | if (test_bit(i, temps_used.l)) { |
6349039d | 1434 | reset_ts(&s->temps[i]); |
1208d7dd | 1435 | } |
22613af4 KB |
1436 | } |
1437 | } | |
cf066674 | 1438 | goto do_reset_output; |
6e14e91b | 1439 | |
8f2e8c07 | 1440 | default: |
6e14e91b RH |
1441 | do_default: |
1442 | /* Default case: we know nothing about operation (or were unable | |
1443 | to compute the operation result) so no propagation is done. | |
1444 | We trash everything if the operation is the end of a basic | |
3a9d8b17 PB |
1445 | block, otherwise we only trash the output args. "mask" is |
1446 | the non-zero bits mask for the first output arg. */ | |
a2550660 | 1447 | if (def->flags & TCG_OPF_BB_END) { |
34184b07 | 1448 | bitmap_zero(temps_used.l, nb_temps); |
a2550660 | 1449 | } else { |
cf066674 RH |
1450 | do_reset_output: |
1451 | for (i = 0; i < nb_oargs; i++) { | |
acd93701 | 1452 | reset_temp(op->args[i]); |
3031244b AJ |
1453 | /* Save the corresponding known-zero bits mask for the |
1454 | first output argument (only one supported so far). */ | |
1455 | if (i == 0) { | |
6349039d | 1456 | arg_info(op->args[i])->mask = mask; |
3031244b | 1457 | } |
a2550660 | 1458 | } |
22613af4 | 1459 | } |
8f2e8c07 KB |
1460 | break; |
1461 | } | |
34f93921 PK |
1462 | |
1463 | /* Eliminate duplicate and redundant fence instructions. */ | |
acd93701 | 1464 | if (prev_mb) { |
34f93921 PK |
1465 | switch (opc) { |
1466 | case INDEX_op_mb: | |
1467 | /* Merge two barriers of the same type into one, | |
1468 | * or a weaker barrier into a stronger one, | |
1469 | * or two weaker barriers into a stronger one. | |
1470 | * mb X; mb Y => mb X|Y | |
1471 | * mb; strl => mb; st | |
1472 | * ldaq; mb => ld; mb | |
1473 | * ldaq; strl => ld; mb; st | |
1474 | * Other combinations are also merged into a strong | |
1475 | * barrier. This is stricter than specified but for | |
1476 | * the purposes of TCG is better than not optimizing. | |
1477 | */ | |
acd93701 | 1478 | prev_mb->args[0] |= op->args[0]; |
34f93921 PK |
1479 | tcg_op_remove(s, op); |
1480 | break; | |
1481 | ||
1482 | default: | |
1483 | /* Opcodes that end the block stop the optimization. */ | |
1484 | if ((def->flags & TCG_OPF_BB_END) == 0) { | |
1485 | break; | |
1486 | } | |
1487 | /* fallthru */ | |
1488 | case INDEX_op_qemu_ld_i32: | |
1489 | case INDEX_op_qemu_ld_i64: | |
1490 | case INDEX_op_qemu_st_i32: | |
1491 | case INDEX_op_qemu_st_i64: | |
1492 | case INDEX_op_call: | |
1493 | /* Opcodes that touch guest memory stop the optimization. */ | |
acd93701 | 1494 | prev_mb = NULL; |
34f93921 PK |
1495 | break; |
1496 | } | |
1497 | } else if (opc == INDEX_op_mb) { | |
acd93701 | 1498 | prev_mb = op; |
34f93921 | 1499 | } |
8f2e8c07 | 1500 | } |
8f2e8c07 | 1501 | } |