]> Git Repo - qemu.git/blame - hw/virtio-pci.c
virtio-balloon: add the virtio-balloon device.
[qemu.git] / hw / virtio-pci.c
CommitLineData
53c25cea
PB
1/*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <[email protected]>
9 * Paul Brook <[email protected]>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
6b620ca3
PB
14 * Contributions after 2012-01-13 are licensed under the terms of the
15 * GNU GPL, version 2 or (at your option) any later version.
53c25cea
PB
16 */
17
18#include <inttypes.h>
19
83c9f4ca
PB
20#include "hw/virtio.h"
21#include "hw/virtio-blk.h"
22#include "hw/virtio-net.h"
23#include "hw/virtio-serial.h"
24#include "hw/virtio-scsi.h"
25#include "hw/pci/pci.h"
1de7afc9 26#include "qemu/error-report.h"
83c9f4ca
PB
27#include "hw/pci/msi.h"
28#include "hw/pci/msix.h"
29#include "hw/loader.h"
9c17d615
PB
30#include "sysemu/kvm.h"
31#include "sysemu/blockdev.h"
83c9f4ca 32#include "hw/virtio-pci.h"
1de7afc9 33#include "qemu/range.h"
83c9f4ca 34#include "hw/virtio-bus.h"
53c25cea
PB
35
36/* from Linux's linux/virtio_pci.h */
37
38/* A 32-bit r/o bitmask of the features supported by the host */
39#define VIRTIO_PCI_HOST_FEATURES 0
40
41/* A 32-bit r/w bitmask of features activated by the guest */
42#define VIRTIO_PCI_GUEST_FEATURES 4
43
44/* A 32-bit r/w PFN for the currently selected queue */
45#define VIRTIO_PCI_QUEUE_PFN 8
46
47/* A 16-bit r/o queue size for the currently selected queue */
48#define VIRTIO_PCI_QUEUE_NUM 12
49
50/* A 16-bit r/w queue selector */
51#define VIRTIO_PCI_QUEUE_SEL 14
52
53/* A 16-bit r/w queue notifier */
54#define VIRTIO_PCI_QUEUE_NOTIFY 16
55
56/* An 8-bit device status register. */
57#define VIRTIO_PCI_STATUS 18
58
59/* An 8-bit r/o interrupt status register. Reading the value will return the
60 * current contents of the ISR and will also clear it. This is effectively
61 * a read-and-acknowledge. */
62#define VIRTIO_PCI_ISR 19
63
aba800a3
MT
64/* MSI-X registers: only enabled if MSI-X is enabled. */
65/* A 16-bit vector for configuration changes. */
66#define VIRTIO_MSI_CONFIG_VECTOR 20
67/* A 16-bit vector for selected queue notifications. */
68#define VIRTIO_MSI_QUEUE_VECTOR 22
69
70/* Config space size */
71#define VIRTIO_PCI_CONFIG_NOMSI 20
72#define VIRTIO_PCI_CONFIG_MSI 24
73#define VIRTIO_PCI_REGION_SIZE(dev) (msix_present(dev) ? \
74 VIRTIO_PCI_CONFIG_MSI : \
75 VIRTIO_PCI_CONFIG_NOMSI)
76
77/* The remaining space is defined by each driver as the per-driver
78 * configuration space */
79#define VIRTIO_PCI_CONFIG(dev) (msix_enabled(dev) ? \
80 VIRTIO_PCI_CONFIG_MSI : \
81 VIRTIO_PCI_CONFIG_NOMSI)
53c25cea 82
53c25cea
PB
83/* How many bits to shift physical queue address written to QUEUE_PFN.
84 * 12 is historical, and due to x86 page size. */
85#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
86
3dbca8e6
SH
87/* Flags track per-device state like workarounds for quirks in older guests. */
88#define VIRTIO_PCI_FLAG_BUS_MASTER_BUG (1 << 0)
c81131db 89
53c25cea
PB
90/* QEMU doesn't strictly need write barriers since everything runs in
91 * lock-step. We'll leave the calls to wmb() in though to make it obvious for
92 * KVM or if kqemu gets SMP support.
93 */
94#define wmb() do { } while (0)
95
8e4a424b
BS
96/* HACK for virtio to determine if it's running a big endian guest */
97bool virtio_is_big_endian(void);
98
53c25cea 99/* virtio device */
d2a0ccc6
MT
100/* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */
101static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d)
102{
103 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
104}
53c25cea 105
d2a0ccc6
MT
106/* DeviceState to VirtIOPCIProxy. Note: used on datapath,
107 * be careful and test performance if you change this.
108 */
109static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d)
53c25cea 110{
d2a0ccc6
MT
111 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
112}
113
114static void virtio_pci_notify(DeviceState *d, uint16_t vector)
115{
116 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d);
aba800a3
MT
117 if (msix_enabled(&proxy->pci_dev))
118 msix_notify(&proxy->pci_dev, vector);
119 else
120 qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
53c25cea
PB
121}
122
d2a0ccc6 123static void virtio_pci_save_config(DeviceState *d, QEMUFile *f)
ff24bd58 124{
d2a0ccc6 125 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
ff24bd58
MT
126 pci_device_save(&proxy->pci_dev, f);
127 msix_save(&proxy->pci_dev, f);
128 if (msix_present(&proxy->pci_dev))
129 qemu_put_be16(f, proxy->vdev->config_vector);
130}
131
d2a0ccc6 132static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f)
ff24bd58 133{
d2a0ccc6 134 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
ff24bd58
MT
135 if (msix_present(&proxy->pci_dev))
136 qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
137}
138
d2a0ccc6 139static int virtio_pci_load_config(DeviceState *d, QEMUFile *f)
ff24bd58 140{
d2a0ccc6 141 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
ff24bd58
MT
142 int ret;
143 ret = pci_device_load(&proxy->pci_dev, f);
e6da7680 144 if (ret) {
ff24bd58 145 return ret;
e6da7680 146 }
3cac001e 147 msix_unuse_all_vectors(&proxy->pci_dev);
ff24bd58 148 msix_load(&proxy->pci_dev, f);
e6da7680 149 if (msix_present(&proxy->pci_dev)) {
ff24bd58 150 qemu_get_be16s(f, &proxy->vdev->config_vector);
e6da7680
MT
151 } else {
152 proxy->vdev->config_vector = VIRTIO_NO_VECTOR;
153 }
154 if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) {
155 return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector);
156 }
ff24bd58
MT
157 return 0;
158}
159
d2a0ccc6 160static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f)
ff24bd58 161{
d2a0ccc6 162 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
ff24bd58 163 uint16_t vector;
e6da7680
MT
164 if (msix_present(&proxy->pci_dev)) {
165 qemu_get_be16s(f, &vector);
166 } else {
167 vector = VIRTIO_NO_VECTOR;
168 }
ff24bd58 169 virtio_queue_set_vector(proxy->vdev, n, vector);
e6da7680
MT
170 if (vector != VIRTIO_NO_VECTOR) {
171 return msix_vector_use(&proxy->pci_dev, vector);
172 }
ff24bd58
MT
173 return 0;
174}
175
25db9ebe 176static int virtio_pci_set_host_notifier_internal(VirtIOPCIProxy *proxy,
26b9b5fe 177 int n, bool assign, bool set_handler)
25db9ebe
SH
178{
179 VirtQueue *vq = virtio_get_queue(proxy->vdev, n);
180 EventNotifier *notifier = virtio_queue_get_host_notifier(vq);
da146d0a
AK
181 int r = 0;
182
25db9ebe
SH
183 if (assign) {
184 r = event_notifier_init(notifier, 1);
185 if (r < 0) {
b36e3914
MT
186 error_report("%s: unable to init event notifier: %d",
187 __func__, r);
25db9ebe
SH
188 return r;
189 }
26b9b5fe 190 virtio_queue_set_host_notifier_fd_handler(vq, true, set_handler);
da146d0a 191 memory_region_add_eventfd(&proxy->bar, VIRTIO_PCI_QUEUE_NOTIFY, 2,
753d5e14 192 true, n, notifier);
25db9ebe 193 } else {
da146d0a 194 memory_region_del_eventfd(&proxy->bar, VIRTIO_PCI_QUEUE_NOTIFY, 2,
753d5e14 195 true, n, notifier);
26b9b5fe 196 virtio_queue_set_host_notifier_fd_handler(vq, false, false);
25db9ebe
SH
197 event_notifier_cleanup(notifier);
198 }
199 return r;
200}
201
b36e3914 202static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy)
25db9ebe
SH
203{
204 int n, r;
205
206 if (!(proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) ||
207 proxy->ioeventfd_disabled ||
208 proxy->ioeventfd_started) {
b36e3914 209 return;
25db9ebe
SH
210 }
211
212 for (n = 0; n < VIRTIO_PCI_QUEUE_MAX; n++) {
213 if (!virtio_queue_get_num(proxy->vdev, n)) {
214 continue;
215 }
216
26b9b5fe 217 r = virtio_pci_set_host_notifier_internal(proxy, n, true, true);
25db9ebe
SH
218 if (r < 0) {
219 goto assign_error;
220 }
25db9ebe
SH
221 }
222 proxy->ioeventfd_started = true;
b36e3914 223 return;
25db9ebe
SH
224
225assign_error:
226 while (--n >= 0) {
227 if (!virtio_queue_get_num(proxy->vdev, n)) {
228 continue;
229 }
230
26b9b5fe 231 r = virtio_pci_set_host_notifier_internal(proxy, n, false, false);
b36e3914 232 assert(r >= 0);
25db9ebe
SH
233 }
234 proxy->ioeventfd_started = false;
b36e3914 235 error_report("%s: failed. Fallback to a userspace (slower).", __func__);
25db9ebe
SH
236}
237
b36e3914 238static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy)
25db9ebe 239{
b36e3914 240 int r;
25db9ebe
SH
241 int n;
242
243 if (!proxy->ioeventfd_started) {
b36e3914 244 return;
25db9ebe
SH
245 }
246
247 for (n = 0; n < VIRTIO_PCI_QUEUE_MAX; n++) {
248 if (!virtio_queue_get_num(proxy->vdev, n)) {
249 continue;
250 }
251
26b9b5fe 252 r = virtio_pci_set_host_notifier_internal(proxy, n, false, false);
b36e3914 253 assert(r >= 0);
25db9ebe
SH
254 }
255 proxy->ioeventfd_started = false;
25db9ebe
SH
256}
257
60653b28 258static void virtio_pci_reset(DeviceState *d)
7055e687 259{
d2a0ccc6 260 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
25db9ebe 261 virtio_pci_stop_ioeventfd(proxy);
7055e687 262 virtio_reset(proxy->vdev);
3cac001e 263 msix_unuse_all_vectors(&proxy->pci_dev);
25db9ebe 264 proxy->flags &= ~VIRTIO_PCI_FLAG_BUS_MASTER_BUG;
7055e687
MT
265}
266
53c25cea
PB
267static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
268{
269 VirtIOPCIProxy *proxy = opaque;
270 VirtIODevice *vdev = proxy->vdev;
a8170e5e 271 hwaddr pa;
53c25cea 272
53c25cea
PB
273 switch (addr) {
274 case VIRTIO_PCI_GUEST_FEATURES:
275 /* Guest does not negotiate properly? We have to assume nothing. */
276 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
ad0c9332 277 val = vdev->bad_features ? vdev->bad_features(vdev) : 0;
53c25cea 278 }
ad0c9332 279 virtio_set_features(vdev, val);
53c25cea
PB
280 break;
281 case VIRTIO_PCI_QUEUE_PFN:
a8170e5e 282 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
1b8e9b27 283 if (pa == 0) {
25db9ebe 284 virtio_pci_stop_ioeventfd(proxy);
1b8e9b27
MT
285 virtio_reset(proxy->vdev);
286 msix_unuse_all_vectors(&proxy->pci_dev);
287 }
7055e687
MT
288 else
289 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
53c25cea
PB
290 break;
291 case VIRTIO_PCI_QUEUE_SEL:
292 if (val < VIRTIO_PCI_QUEUE_MAX)
293 vdev->queue_sel = val;
294 break;
295 case VIRTIO_PCI_QUEUE_NOTIFY:
7157e2e2
SH
296 if (val < VIRTIO_PCI_QUEUE_MAX) {
297 virtio_queue_notify(vdev, val);
298 }
53c25cea
PB
299 break;
300 case VIRTIO_PCI_STATUS:
25db9ebe
SH
301 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
302 virtio_pci_stop_ioeventfd(proxy);
303 }
304
3e607cb5 305 virtio_set_status(vdev, val & 0xFF);
25db9ebe
SH
306
307 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
308 virtio_pci_start_ioeventfd(proxy);
309 }
310
1b8e9b27
MT
311 if (vdev->status == 0) {
312 virtio_reset(proxy->vdev);
313 msix_unuse_all_vectors(&proxy->pci_dev);
314 }
c81131db
AG
315
316 /* Linux before 2.6.34 sets the device as OK without enabling
317 the PCI device bus master bit. In this case we need to disable
318 some safety checks. */
319 if ((val & VIRTIO_CONFIG_S_DRIVER_OK) &&
320 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
3dbca8e6 321 proxy->flags |= VIRTIO_PCI_FLAG_BUS_MASTER_BUG;
c81131db 322 }
53c25cea 323 break;
aba800a3
MT
324 case VIRTIO_MSI_CONFIG_VECTOR:
325 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
326 /* Make it possible for guest to discover an error took place. */
327 if (msix_vector_use(&proxy->pci_dev, val) < 0)
328 val = VIRTIO_NO_VECTOR;
329 vdev->config_vector = val;
330 break;
331 case VIRTIO_MSI_QUEUE_VECTOR:
332 msix_vector_unuse(&proxy->pci_dev,
333 virtio_queue_vector(vdev, vdev->queue_sel));
334 /* Make it possible for guest to discover an error took place. */
335 if (msix_vector_use(&proxy->pci_dev, val) < 0)
336 val = VIRTIO_NO_VECTOR;
337 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
338 break;
339 default:
4e02d460
SH
340 error_report("%s: unexpected address 0x%x value 0x%x",
341 __func__, addr, val);
aba800a3 342 break;
53c25cea
PB
343 }
344}
345
aba800a3 346static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
53c25cea 347{
53c25cea
PB
348 VirtIODevice *vdev = proxy->vdev;
349 uint32_t ret = 0xFFFFFFFF;
350
53c25cea
PB
351 switch (addr) {
352 case VIRTIO_PCI_HOST_FEATURES:
8172539d 353 ret = proxy->host_features;
53c25cea
PB
354 break;
355 case VIRTIO_PCI_GUEST_FEATURES:
704a76fc 356 ret = vdev->guest_features;
53c25cea
PB
357 break;
358 case VIRTIO_PCI_QUEUE_PFN:
359 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
360 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
361 break;
362 case VIRTIO_PCI_QUEUE_NUM:
363 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
364 break;
365 case VIRTIO_PCI_QUEUE_SEL:
366 ret = vdev->queue_sel;
367 break;
368 case VIRTIO_PCI_STATUS:
369 ret = vdev->status;
370 break;
371 case VIRTIO_PCI_ISR:
372 /* reading from the ISR also clears it. */
373 ret = vdev->isr;
374 vdev->isr = 0;
7055e687 375 qemu_set_irq(proxy->pci_dev.irq[0], 0);
53c25cea 376 break;
aba800a3
MT
377 case VIRTIO_MSI_CONFIG_VECTOR:
378 ret = vdev->config_vector;
379 break;
380 case VIRTIO_MSI_QUEUE_VECTOR:
381 ret = virtio_queue_vector(vdev, vdev->queue_sel);
382 break;
53c25cea
PB
383 default:
384 break;
385 }
386
387 return ret;
388}
389
df6db5b3
AG
390static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr,
391 unsigned size)
53c25cea
PB
392{
393 VirtIOPCIProxy *proxy = opaque;
aba800a3 394 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
df6db5b3 395 uint64_t val = 0;
aba800a3 396 if (addr < config) {
df6db5b3 397 return virtio_ioport_read(proxy, addr);
aba800a3
MT
398 }
399 addr -= config;
53c25cea 400
df6db5b3
AG
401 switch (size) {
402 case 1:
403 val = virtio_config_readb(proxy->vdev, addr);
404 break;
405 case 2:
406 val = virtio_config_readw(proxy->vdev, addr);
8e4a424b
BS
407 if (virtio_is_big_endian()) {
408 val = bswap16(val);
409 }
df6db5b3
AG
410 break;
411 case 4:
412 val = virtio_config_readl(proxy->vdev, addr);
8e4a424b
BS
413 if (virtio_is_big_endian()) {
414 val = bswap32(val);
415 }
df6db5b3 416 break;
82afa586 417 }
df6db5b3 418 return val;
53c25cea
PB
419}
420
df6db5b3
AG
421static void virtio_pci_config_write(void *opaque, hwaddr addr,
422 uint64_t val, unsigned size)
53c25cea
PB
423{
424 VirtIOPCIProxy *proxy = opaque;
aba800a3 425 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
aba800a3
MT
426 if (addr < config) {
427 virtio_ioport_write(proxy, addr, val);
428 return;
429 }
430 addr -= config;
df6db5b3
AG
431 /*
432 * Virtio-PCI is odd. Ioports are LE but config space is target native
433 * endian.
434 */
435 switch (size) {
436 case 1:
437 virtio_config_writeb(proxy->vdev, addr, val);
438 break;
439 case 2:
8e4a424b
BS
440 if (virtio_is_big_endian()) {
441 val = bswap16(val);
442 }
df6db5b3
AG
443 virtio_config_writew(proxy->vdev, addr, val);
444 break;
445 case 4:
8e4a424b
BS
446 if (virtio_is_big_endian()) {
447 val = bswap32(val);
448 }
df6db5b3
AG
449 virtio_config_writel(proxy->vdev, addr, val);
450 break;
82afa586 451 }
53c25cea
PB
452}
453
da146d0a 454static const MemoryRegionOps virtio_pci_config_ops = {
df6db5b3
AG
455 .read = virtio_pci_config_read,
456 .write = virtio_pci_config_write,
457 .impl = {
458 .min_access_size = 1,
459 .max_access_size = 4,
460 },
8e4a424b 461 .endianness = DEVICE_LITTLE_ENDIAN,
da146d0a 462};
aba800a3
MT
463
464static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
465 uint32_t val, int len)
466{
ed757e14
YV
467 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
468
1129714f
MT
469 pci_default_write_config(pci_dev, address, val, len);
470
471 if (range_covers_byte(address, len, PCI_COMMAND) &&
472 !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER) &&
473 !(proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG)) {
474 virtio_pci_stop_ioeventfd(proxy);
475 virtio_set_status(proxy->vdev,
476 proxy->vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
ed757e14 477 }
53c25cea
PB
478}
479
d2a0ccc6 480static unsigned virtio_pci_get_features(DeviceState *d)
6d74ca5a 481{
d2a0ccc6 482 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
8172539d 483 return proxy->host_features;
6d74ca5a
MT
484}
485
7d37d351
JK
486static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy,
487 unsigned int queue_no,
488 unsigned int vector,
489 MSIMessage msg)
490{
7d37d351 491 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
15b2bd18 492 int ret;
7d37d351
JK
493
494 if (irqfd->users == 0) {
495 ret = kvm_irqchip_add_msi_route(kvm_state, msg);
496 if (ret < 0) {
497 return ret;
498 }
499 irqfd->virq = ret;
500 }
501 irqfd->users++;
7d37d351
JK
502 return 0;
503}
504
505static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy,
7d37d351 506 unsigned int vector)
774345f9
MT
507{
508 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
509 if (--irqfd->users == 0) {
510 kvm_irqchip_release_virq(kvm_state, irqfd->virq);
511 }
512}
513
f1d0f15a
MT
514static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy,
515 unsigned int queue_no,
516 unsigned int vector)
517{
518 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
519 VirtQueue *vq = virtio_get_queue(proxy->vdev, queue_no);
520 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
521 int ret;
522 ret = kvm_irqchip_add_irqfd_notifier(kvm_state, n, irqfd->virq);
523 return ret;
524}
525
526static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy,
527 unsigned int queue_no,
528 unsigned int vector)
7d37d351
JK
529{
530 VirtQueue *vq = virtio_get_queue(proxy->vdev, queue_no);
15b2bd18 531 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
7d37d351 532 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
15b2bd18 533 int ret;
7d37d351 534
b131c74a 535 ret = kvm_irqchip_remove_irqfd_notifier(kvm_state, n, irqfd->virq);
7d37d351 536 assert(ret == 0);
f1d0f15a 537}
7d37d351 538
774345f9
MT
539static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs)
540{
541 PCIDevice *dev = &proxy->pci_dev;
542 VirtIODevice *vdev = proxy->vdev;
543 unsigned int vector;
544 int ret, queue_no;
545 MSIMessage msg;
546
547 for (queue_no = 0; queue_no < nvqs; queue_no++) {
548 if (!virtio_queue_get_num(vdev, queue_no)) {
549 break;
550 }
551 vector = virtio_queue_vector(vdev, queue_no);
552 if (vector >= msix_nr_vectors_allocated(dev)) {
553 continue;
554 }
555 msg = msix_get_message(dev, vector);
556 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector, msg);
557 if (ret < 0) {
558 goto undo;
7d37d351 559 }
f1d0f15a
MT
560 /* If guest supports masking, set up irqfd now.
561 * Otherwise, delay until unmasked in the frontend.
562 */
563 if (proxy->vdev->guest_notifier_mask) {
564 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
565 if (ret < 0) {
566 kvm_virtio_pci_vq_vector_release(proxy, vector);
567 goto undo;
568 }
569 }
7d37d351 570 }
7d37d351 571 return 0;
774345f9
MT
572
573undo:
574 while (--queue_no >= 0) {
575 vector = virtio_queue_vector(vdev, queue_no);
576 if (vector >= msix_nr_vectors_allocated(dev)) {
577 continue;
578 }
f1d0f15a 579 if (proxy->vdev->guest_notifier_mask) {
e387f99e 580 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 581 }
774345f9
MT
582 kvm_virtio_pci_vq_vector_release(proxy, vector);
583 }
584 return ret;
7d37d351
JK
585}
586
774345f9
MT
587static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs)
588{
589 PCIDevice *dev = &proxy->pci_dev;
590 VirtIODevice *vdev = proxy->vdev;
591 unsigned int vector;
592 int queue_no;
593
594 for (queue_no = 0; queue_no < nvqs; queue_no++) {
595 if (!virtio_queue_get_num(vdev, queue_no)) {
596 break;
597 }
598 vector = virtio_queue_vector(vdev, queue_no);
599 if (vector >= msix_nr_vectors_allocated(dev)) {
600 continue;
601 }
f1d0f15a
MT
602 /* If guest supports masking, clean up irqfd now.
603 * Otherwise, it was cleaned when masked in the frontend.
604 */
605 if (proxy->vdev->guest_notifier_mask) {
e387f99e 606 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 607 }
774345f9
MT
608 kvm_virtio_pci_vq_vector_release(proxy, vector);
609 }
610}
611
a38b2c49
MT
612static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy,
613 unsigned int queue_no,
614 unsigned int vector,
615 MSIMessage msg)
774345f9
MT
616{
617 VirtQueue *vq = virtio_get_queue(proxy->vdev, queue_no);
618 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
a38b2c49 619 VirtIOIRQFD *irqfd;
53510bfc 620 int ret = 0;
774345f9 621
a38b2c49
MT
622 if (proxy->vector_irqfd) {
623 irqfd = &proxy->vector_irqfd[vector];
624 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) {
625 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg);
626 if (ret < 0) {
627 return ret;
628 }
774345f9
MT
629 }
630 }
631
f1d0f15a
MT
632 /* If guest supports masking, irqfd is already setup, unmask it.
633 * Otherwise, set it up now.
634 */
635 if (proxy->vdev->guest_notifier_mask) {
636 proxy->vdev->guest_notifier_mask(proxy->vdev, queue_no, false);
637 /* Test after unmasking to avoid losing events. */
638 if (proxy->vdev->guest_notifier_pending &&
639 proxy->vdev->guest_notifier_pending(proxy->vdev, queue_no)) {
640 event_notifier_set(n);
641 }
642 } else {
643 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
7d37d351 644 }
774345f9 645 return ret;
7d37d351
JK
646}
647
a38b2c49 648static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy,
7d37d351
JK
649 unsigned int queue_no,
650 unsigned int vector)
651{
f1d0f15a
MT
652 /* If guest supports masking, keep irqfd but mask it.
653 * Otherwise, clean it up now.
654 */
655 if (proxy->vdev->guest_notifier_mask) {
656 proxy->vdev->guest_notifier_mask(proxy->vdev, queue_no, true);
657 } else {
e387f99e 658 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 659 }
7d37d351
JK
660}
661
a38b2c49
MT
662static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector,
663 MSIMessage msg)
7d37d351
JK
664{
665 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
666 VirtIODevice *vdev = proxy->vdev;
667 int ret, queue_no;
668
2d620f59 669 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
7d37d351
JK
670 if (!virtio_queue_get_num(vdev, queue_no)) {
671 break;
672 }
673 if (virtio_queue_vector(vdev, queue_no) != vector) {
674 continue;
675 }
a38b2c49 676 ret = virtio_pci_vq_vector_unmask(proxy, queue_no, vector, msg);
7d37d351
JK
677 if (ret < 0) {
678 goto undo;
679 }
680 }
681 return 0;
682
683undo:
684 while (--queue_no >= 0) {
685 if (virtio_queue_vector(vdev, queue_no) != vector) {
686 continue;
687 }
a38b2c49 688 virtio_pci_vq_vector_mask(proxy, queue_no, vector);
7d37d351
JK
689 }
690 return ret;
691}
692
a38b2c49 693static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector)
7d37d351
JK
694{
695 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
696 VirtIODevice *vdev = proxy->vdev;
697 int queue_no;
698
2d620f59 699 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
7d37d351
JK
700 if (!virtio_queue_get_num(vdev, queue_no)) {
701 break;
702 }
703 if (virtio_queue_vector(vdev, queue_no) != vector) {
704 continue;
705 }
a38b2c49 706 virtio_pci_vq_vector_mask(proxy, queue_no, vector);
7d37d351
JK
707 }
708}
709
a38b2c49
MT
710static void virtio_pci_vector_poll(PCIDevice *dev,
711 unsigned int vector_start,
712 unsigned int vector_end)
89d62be9
MT
713{
714 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
715 VirtIODevice *vdev = proxy->vdev;
716 int queue_no;
717 unsigned int vector;
718 EventNotifier *notifier;
719 VirtQueue *vq;
720
2d620f59 721 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
89d62be9
MT
722 if (!virtio_queue_get_num(vdev, queue_no)) {
723 break;
724 }
725 vector = virtio_queue_vector(vdev, queue_no);
726 if (vector < vector_start || vector >= vector_end ||
727 !msix_is_masked(dev, vector)) {
728 continue;
729 }
730 vq = virtio_get_queue(vdev, queue_no);
731 notifier = virtio_queue_get_guest_notifier(vq);
f1d0f15a
MT
732 if (vdev->guest_notifier_pending) {
733 if (vdev->guest_notifier_pending(vdev, queue_no)) {
734 msix_set_pending(dev, vector);
735 }
736 } else if (event_notifier_test_and_clear(notifier)) {
89d62be9
MT
737 msix_set_pending(dev, vector);
738 }
739 }
740}
741
742static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign,
743 bool with_irqfd)
ade80dc8 744{
d2a0ccc6 745 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
ade80dc8
MT
746 VirtQueue *vq = virtio_get_queue(proxy->vdev, n);
747 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq);
748
749 if (assign) {
750 int r = event_notifier_init(notifier, 0);
751 if (r < 0) {
752 return r;
753 }
89d62be9 754 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd);
ade80dc8 755 } else {
89d62be9 756 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd);
ade80dc8
MT
757 event_notifier_cleanup(notifier);
758 }
759
760 return 0;
761}
762
d2a0ccc6 763static bool virtio_pci_query_guest_notifiers(DeviceState *d)
5430a28f 764{
d2a0ccc6 765 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
5430a28f
MT
766 return msix_enabled(&proxy->pci_dev);
767}
768
2d620f59 769static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign)
54dd9321 770{
d2a0ccc6 771 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
54dd9321
MT
772 VirtIODevice *vdev = proxy->vdev;
773 int r, n;
89d62be9
MT
774 bool with_irqfd = msix_enabled(&proxy->pci_dev) &&
775 kvm_msi_via_irqfd_enabled();
54dd9321 776
2d620f59
MT
777 nvqs = MIN(nvqs, VIRTIO_PCI_QUEUE_MAX);
778
779 /* When deassigning, pass a consistent nvqs value
780 * to avoid leaking notifiers.
781 */
782 assert(assign || nvqs == proxy->nvqs_with_notifiers);
783
784 proxy->nvqs_with_notifiers = nvqs;
785
7d37d351 786 /* Must unset vector notifier while guest notifier is still assigned */
a38b2c49 787 if ((proxy->vector_irqfd || vdev->guest_notifier_mask) && !assign) {
7d37d351 788 msix_unset_vector_notifiers(&proxy->pci_dev);
a38b2c49
MT
789 if (proxy->vector_irqfd) {
790 kvm_virtio_pci_vector_release(proxy, nvqs);
791 g_free(proxy->vector_irqfd);
792 proxy->vector_irqfd = NULL;
793 }
7d37d351
JK
794 }
795
2d620f59 796 for (n = 0; n < nvqs; n++) {
54dd9321
MT
797 if (!virtio_queue_get_num(vdev, n)) {
798 break;
799 }
800
89d62be9
MT
801 r = virtio_pci_set_guest_notifier(d, n, assign,
802 kvm_msi_via_irqfd_enabled());
54dd9321
MT
803 if (r < 0) {
804 goto assign_error;
805 }
806 }
807
7d37d351 808 /* Must set vector notifier after guest notifier has been assigned */
a38b2c49
MT
809 if ((with_irqfd || vdev->guest_notifier_mask) && assign) {
810 if (with_irqfd) {
811 proxy->vector_irqfd =
812 g_malloc0(sizeof(*proxy->vector_irqfd) *
813 msix_nr_vectors_allocated(&proxy->pci_dev));
814 r = kvm_virtio_pci_vector_use(proxy, nvqs);
815 if (r < 0) {
816 goto assign_error;
817 }
774345f9 818 }
7d37d351 819 r = msix_set_vector_notifiers(&proxy->pci_dev,
a38b2c49
MT
820 virtio_pci_vector_unmask,
821 virtio_pci_vector_mask,
822 virtio_pci_vector_poll);
7d37d351 823 if (r < 0) {
774345f9 824 goto notifiers_error;
7d37d351
JK
825 }
826 }
827
54dd9321
MT
828 return 0;
829
774345f9 830notifiers_error:
a38b2c49
MT
831 if (with_irqfd) {
832 assert(assign);
833 kvm_virtio_pci_vector_release(proxy, nvqs);
834 }
774345f9 835
54dd9321
MT
836assign_error:
837 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */
7d37d351 838 assert(assign);
54dd9321 839 while (--n >= 0) {
89d62be9 840 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd);
54dd9321
MT
841 }
842 return r;
843}
844
d2a0ccc6 845static int virtio_pci_set_host_notifier(DeviceState *d, int n, bool assign)
ade80dc8 846{
d2a0ccc6 847 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
25db9ebe
SH
848
849 /* Stop using ioeventfd for virtqueue kick if the device starts using host
850 * notifiers. This makes it easy to avoid stepping on each others' toes.
851 */
852 proxy->ioeventfd_disabled = assign;
ade80dc8 853 if (assign) {
25db9ebe
SH
854 virtio_pci_stop_ioeventfd(proxy);
855 }
856 /* We don't need to start here: it's not needed because backend
857 * currently only stops on status change away from ok,
858 * reset, vmstop and such. If we do add code to start here,
859 * need to check vmstate, device state etc. */
26b9b5fe 860 return virtio_pci_set_host_notifier_internal(proxy, n, assign, false);
25db9ebe
SH
861}
862
d2a0ccc6 863static void virtio_pci_vmstate_change(DeviceState *d, bool running)
25db9ebe 864{
d2a0ccc6 865 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
25db9ebe
SH
866
867 if (running) {
89c473fd
MT
868 /* Try to find out if the guest has bus master disabled, but is
869 in ready state. Then we have a buggy guest OS. */
870 if ((proxy->vdev->status & VIRTIO_CONFIG_S_DRIVER_OK) &&
871 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
872 proxy->flags |= VIRTIO_PCI_FLAG_BUS_MASTER_BUG;
873 }
25db9ebe 874 virtio_pci_start_ioeventfd(proxy);
ade80dc8 875 } else {
25db9ebe 876 virtio_pci_stop_ioeventfd(proxy);
ade80dc8 877 }
ade80dc8
MT
878}
879
53c25cea 880static const VirtIOBindings virtio_pci_bindings = {
ff24bd58
MT
881 .notify = virtio_pci_notify,
882 .save_config = virtio_pci_save_config,
883 .load_config = virtio_pci_load_config,
884 .save_queue = virtio_pci_save_queue,
885 .load_queue = virtio_pci_load_queue,
6d74ca5a 886 .get_features = virtio_pci_get_features,
5430a28f 887 .query_guest_notifiers = virtio_pci_query_guest_notifiers,
ade80dc8 888 .set_host_notifier = virtio_pci_set_host_notifier,
54dd9321 889 .set_guest_notifiers = virtio_pci_set_guest_notifiers,
25db9ebe 890 .vmstate_change = virtio_pci_vmstate_change,
53c25cea
PB
891};
892
befeac45 893void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev)
53c25cea
PB
894{
895 uint8_t *config;
896 uint32_t size;
897
898 proxy->vdev = vdev;
899
900 config = proxy->pci_dev.config;
53c25cea 901
e75ccf2c
IY
902 if (proxy->class_code) {
903 pci_config_set_class(config, proxy->class_code);
904 }
ad3d11e6
HKR
905 pci_set_word(config + PCI_SUBSYSTEM_VENDOR_ID,
906 pci_get_word(config + PCI_VENDOR_ID));
907 pci_set_word(config + PCI_SUBSYSTEM_ID, vdev->device_id);
908 config[PCI_INTERRUPT_PIN] = 1;
53c25cea 909
b2357c48
AW
910 if (vdev->nvectors &&
911 msix_init_exclusive_bar(&proxy->pci_dev, vdev->nvectors, 1)) {
aba800a3 912 vdev->nvectors = 0;
b2357c48 913 }
aba800a3 914
ed757e14
YV
915 proxy->pci_dev.config_write = virtio_write_config;
916
aba800a3 917 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
53c25cea
PB
918 if (size & (size-1))
919 size = 1 << qemu_fls(size);
920
da146d0a
AK
921 memory_region_init_io(&proxy->bar, &virtio_pci_config_ops, proxy,
922 "virtio-pci", size);
e824b2cc
AK
923 pci_register_bar(&proxy->pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO,
924 &proxy->bar);
53c25cea 925
25db9ebe
SH
926 if (!kvm_has_many_ioeventfds()) {
927 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
928 }
929
d2a0ccc6 930 virtio_bind_device(vdev, &virtio_pci_bindings, DEVICE(proxy));
8172539d
MT
931 proxy->host_features |= 0x1 << VIRTIO_F_NOTIFY_ON_EMPTY;
932 proxy->host_features |= 0x1 << VIRTIO_F_BAD_FEATURE;
933 proxy->host_features = vdev->get_features(vdev, proxy->host_features);
53c25cea
PB
934}
935
f90c2bcd 936static void virtio_exit_pci(PCIDevice *pci_dev)
0f457d91 937{
da146d0a
AK
938 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
939
940 memory_region_destroy(&proxy->bar);
b2357c48 941 msix_uninit_exclusive_bar(pci_dev);
0f457d91
MT
942}
943
98b19252 944static int virtio_serial_init_pci(PCIDevice *pci_dev)
21d58b57 945{
d6beee99 946 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
85c2c735
MM
947 VirtIODevice *vdev;
948
d6beee99
GH
949 if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
950 proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
951 proxy->class_code != PCI_CLASS_OTHERS) /* qemu-kvm */
952 proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER;
953
6b331efb 954 vdev = virtio_serial_init(&pci_dev->qdev, &proxy->serial);
25fe3654
AS
955 if (!vdev) {
956 return -1;
957 }
554f1997
GH
958
959 /* backwards-compatibility with machines that were created with
960 DEV_NVECTORS_UNSPECIFIED */
573fb60c 961 vdev->nvectors = proxy->nvectors == DEV_NVECTORS_UNSPECIFIED
6b331efb 962 ? proxy->serial.max_virtserial_ports + 1
573fb60c 963 : proxy->nvectors;
e75ccf2c 964 virtio_init_pci(proxy, vdev);
a1829205 965 proxy->nvectors = vdev->nvectors;
81a322d4 966 return 0;
53c25cea
PB
967}
968
f90c2bcd 969static void virtio_serial_exit_pci(PCIDevice *pci_dev)
8b53a865
AS
970{
971 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
972
32059220 973 virtio_pci_stop_ioeventfd(proxy);
8b53a865 974 virtio_serial_exit(proxy->vdev);
f90c2bcd 975 virtio_exit_pci(pci_dev);
8b53a865
AS
976}
977
81a322d4 978static int virtio_net_init_pci(PCIDevice *pci_dev)
53c25cea
PB
979{
980 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
981 VirtIODevice *vdev;
982
1e89ad5b
AL
983 vdev = virtio_net_init(&pci_dev->qdev, &proxy->nic, &proxy->net,
984 proxy->host_features);
a1e0fea5 985
97b15621 986 vdev->nvectors = proxy->nvectors;
e75ccf2c 987 virtio_init_pci(proxy, vdev);
a1e0fea5
GH
988
989 /* make the actual value visible */
990 proxy->nvectors = vdev->nvectors;
81a322d4 991 return 0;
53c25cea
PB
992}
993
f90c2bcd 994static void virtio_net_exit_pci(PCIDevice *pci_dev)
97b15621
GH
995{
996 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
997
25db9ebe 998 virtio_pci_stop_ioeventfd(proxy);
97b15621 999 virtio_net_exit(proxy->vdev);
f90c2bcd 1000 virtio_exit_pci(pci_dev);
97b15621
GH
1001}
1002
81a322d4 1003static int virtio_balloon_init_pci(PCIDevice *pci_dev)
53c25cea
PB
1004{
1005 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
1006 VirtIODevice *vdev;
1007
2ba1d381
DG
1008 if (proxy->class_code != PCI_CLASS_OTHERS &&
1009 proxy->class_code != PCI_CLASS_MEMORY_RAM) { /* qemu < 1.1 */
1010 proxy->class_code = PCI_CLASS_OTHERS;
1011 }
1012
53c25cea 1013 vdev = virtio_balloon_init(&pci_dev->qdev);
f76f6655
AS
1014 if (!vdev) {
1015 return -1;
1016 }
e75ccf2c 1017 virtio_init_pci(proxy, vdev);
81a322d4 1018 return 0;
53c25cea
PB
1019}
1020
f90c2bcd 1021static void virtio_balloon_exit_pci(PCIDevice *pci_dev)
855d7e25
AS
1022{
1023 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
1024
1025 virtio_pci_stop_ioeventfd(proxy);
1026 virtio_balloon_exit(proxy->vdev);
f90c2bcd 1027 virtio_exit_pci(pci_dev);
855d7e25
AS
1028}
1029
16c915ba
AS
1030static int virtio_rng_init_pci(PCIDevice *pci_dev)
1031{
1032 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
1033 VirtIODevice *vdev;
1034
500054f1
AL
1035 if (proxy->rng.rng == NULL) {
1036 proxy->rng.default_backend = RNG_RANDOM(object_new(TYPE_RNG_RANDOM));
1037
1038 object_property_add_child(OBJECT(pci_dev),
1039 "default-backend",
1040 OBJECT(proxy->rng.default_backend),
1041 NULL);
1042
1043 object_property_set_link(OBJECT(pci_dev),
1044 OBJECT(proxy->rng.default_backend),
1045 "rng", NULL);
1046 }
1047
16c915ba
AS
1048 vdev = virtio_rng_init(&pci_dev->qdev, &proxy->rng);
1049 if (!vdev) {
1050 return -1;
1051 }
1052 virtio_init_pci(proxy, vdev);
1053 return 0;
1054}
1055
1056static void virtio_rng_exit_pci(PCIDevice *pci_dev)
1057{
1058 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
1059
1060 virtio_pci_stop_ioeventfd(proxy);
1061 virtio_rng_exit(proxy->vdev);
1062 virtio_exit_pci(pci_dev);
1063}
1064
40021f08
AL
1065static Property virtio_net_properties[] = {
1066 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false),
1067 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
1068 DEFINE_VIRTIO_NET_FEATURES(VirtIOPCIProxy, host_features),
1069 DEFINE_NIC_PROPERTIES(VirtIOPCIProxy, nic),
1070 DEFINE_PROP_UINT32("x-txtimer", VirtIOPCIProxy, net.txtimer, TX_TIMER_INTERVAL),
1071 DEFINE_PROP_INT32("x-txburst", VirtIOPCIProxy, net.txburst, TX_BURST),
1072 DEFINE_PROP_STRING("tx", VirtIOPCIProxy, net.tx),
1073 DEFINE_PROP_END_OF_LIST(),
1074};
1075
1076static void virtio_net_class_init(ObjectClass *klass, void *data)
1077{
39bffca2 1078 DeviceClass *dc = DEVICE_CLASS(klass);
40021f08
AL
1079 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1080
1081 k->init = virtio_net_init_pci;
1082 k->exit = virtio_net_exit_pci;
c45e5b5b 1083 k->romfile = "efi-virtio.rom";
40021f08
AL
1084 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1085 k->device_id = PCI_DEVICE_ID_VIRTIO_NET;
1086 k->revision = VIRTIO_PCI_ABI_VERSION;
1087 k->class_id = PCI_CLASS_NETWORK_ETHERNET;
39bffca2
AL
1088 dc->reset = virtio_pci_reset;
1089 dc->props = virtio_net_properties;
40021f08
AL
1090}
1091
8c43a6f0 1092static const TypeInfo virtio_net_info = {
39bffca2
AL
1093 .name = "virtio-net-pci",
1094 .parent = TYPE_PCI_DEVICE,
1095 .instance_size = sizeof(VirtIOPCIProxy),
1096 .class_init = virtio_net_class_init,
e855761c
AL
1097};
1098
40021f08
AL
1099static Property virtio_serial_properties[] = {
1100 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
554f1997 1101 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
40021f08
AL
1102 DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
1103 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
1104 DEFINE_PROP_UINT32("max_ports", VirtIOPCIProxy, serial.max_virtserial_ports, 31),
1105 DEFINE_PROP_END_OF_LIST(),
e855761c
AL
1106};
1107
40021f08
AL
1108static void virtio_serial_class_init(ObjectClass *klass, void *data)
1109{
39bffca2 1110 DeviceClass *dc = DEVICE_CLASS(klass);
40021f08
AL
1111 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1112
1113 k->init = virtio_serial_init_pci;
1114 k->exit = virtio_serial_exit_pci;
1115 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1116 k->device_id = PCI_DEVICE_ID_VIRTIO_CONSOLE;
1117 k->revision = VIRTIO_PCI_ABI_VERSION;
1118 k->class_id = PCI_CLASS_COMMUNICATION_OTHER;
39bffca2
AL
1119 dc->reset = virtio_pci_reset;
1120 dc->props = virtio_serial_properties;
40021f08
AL
1121}
1122
8c43a6f0 1123static const TypeInfo virtio_serial_info = {
39bffca2
AL
1124 .name = "virtio-serial-pci",
1125 .parent = TYPE_PCI_DEVICE,
1126 .instance_size = sizeof(VirtIOPCIProxy),
1127 .class_init = virtio_serial_class_init,
40021f08
AL
1128};
1129
1130static Property virtio_balloon_properties[] = {
1131 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
2ba1d381 1132 DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
40021f08
AL
1133 DEFINE_PROP_END_OF_LIST(),
1134};
1135
1136static void virtio_balloon_class_init(ObjectClass *klass, void *data)
1137{
39bffca2 1138 DeviceClass *dc = DEVICE_CLASS(klass);
40021f08
AL
1139 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1140
1141 k->init = virtio_balloon_init_pci;
1142 k->exit = virtio_balloon_exit_pci;
1143 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1144 k->device_id = PCI_DEVICE_ID_VIRTIO_BALLOON;
1145 k->revision = VIRTIO_PCI_ABI_VERSION;
2ba1d381 1146 k->class_id = PCI_CLASS_OTHERS;
39bffca2
AL
1147 dc->reset = virtio_pci_reset;
1148 dc->props = virtio_balloon_properties;
40021f08
AL
1149}
1150
8c43a6f0 1151static const TypeInfo virtio_balloon_info = {
39bffca2
AL
1152 .name = "virtio-balloon-pci",
1153 .parent = TYPE_PCI_DEVICE,
1154 .instance_size = sizeof(VirtIOPCIProxy),
1155 .class_init = virtio_balloon_class_init,
0aab0d3a
GH
1156};
1157
16c915ba
AS
1158static void virtio_rng_initfn(Object *obj)
1159{
1160 PCIDevice *pci_dev = PCI_DEVICE(obj);
1161 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
1162
1163 object_property_add_link(obj, "rng", TYPE_RNG_BACKEND,
1164 (Object **)&proxy->rng.rng, NULL);
1165}
1166
1167static Property virtio_rng_properties[] = {
1168 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
904d6f58
AL
1169 /* Set a default rate limit of 2^47 bytes per minute or roughly 2TB/s. If
1170 you have an entropy source capable of generating more entropy than this
1171 and you can pass it through via virtio-rng, then hats off to you. Until
1172 then, this is unlimited for all practical purposes.
1173 */
1174 DEFINE_PROP_UINT64("max-bytes", VirtIOPCIProxy, rng.max_bytes, INT64_MAX),
1175 DEFINE_PROP_UINT32("period", VirtIOPCIProxy, rng.period_ms, 1 << 16),
16c915ba
AS
1176 DEFINE_PROP_END_OF_LIST(),
1177};
1178
1179static void virtio_rng_class_init(ObjectClass *klass, void *data)
1180{
1181 DeviceClass *dc = DEVICE_CLASS(klass);
1182 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1183
1184 k->init = virtio_rng_init_pci;
1185 k->exit = virtio_rng_exit_pci;
1186 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1187 k->device_id = PCI_DEVICE_ID_VIRTIO_RNG;
1188 k->revision = VIRTIO_PCI_ABI_VERSION;
1189 k->class_id = PCI_CLASS_OTHERS;
1190 dc->reset = virtio_pci_reset;
1191 dc->props = virtio_rng_properties;
1192}
1193
8c43a6f0 1194static const TypeInfo virtio_rng_info = {
16c915ba
AS
1195 .name = "virtio-rng-pci",
1196 .parent = TYPE_PCI_DEVICE,
1197 .instance_size = sizeof(VirtIOPCIProxy),
1198 .instance_init = virtio_rng_initfn,
1199 .class_init = virtio_rng_class_init,
1200};
1201
60653b28
PB
1202#ifdef CONFIG_VIRTFS
1203static int virtio_9p_init_pci(PCIDevice *pci_dev)
1204{
1205 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
1206 VirtIODevice *vdev;
1207
1208 vdev = virtio_9p_init(&pci_dev->qdev, &proxy->fsconf);
1209 vdev->nvectors = proxy->nvectors;
1210 virtio_init_pci(proxy, vdev);
1211 /* make the actual value visible */
1212 proxy->nvectors = vdev->nvectors;
1213 return 0;
1214}
1215
1216static Property virtio_9p_properties[] = {
1217 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1218 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
1219 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
1220 DEFINE_PROP_STRING("mount_tag", VirtIOPCIProxy, fsconf.tag),
1221 DEFINE_PROP_STRING("fsdev", VirtIOPCIProxy, fsconf.fsdev_id),
1222 DEFINE_PROP_END_OF_LIST(),
1223};
1224
1225static void virtio_9p_class_init(ObjectClass *klass, void *data)
1226{
1227 DeviceClass *dc = DEVICE_CLASS(klass);
1228 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1229
1230 k->init = virtio_9p_init_pci;
1231 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1232 k->device_id = PCI_DEVICE_ID_VIRTIO_9P;
1233 k->revision = VIRTIO_PCI_ABI_VERSION;
1234 k->class_id = 0x2;
1235 dc->props = virtio_9p_properties;
1236 dc->reset = virtio_pci_reset;
1237}
1238
1239static const TypeInfo virtio_9p_info = {
1240 .name = "virtio-9p-pci",
1241 .parent = TYPE_PCI_DEVICE,
1242 .instance_size = sizeof(VirtIOPCIProxy),
1243 .class_init = virtio_9p_class_init,
1244};
1245#endif
1246
085bccb7
FK
1247/*
1248 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus.
1249 */
1250
1251/* This is called by virtio-bus just after the device is plugged. */
1252static void virtio_pci_device_plugged(DeviceState *d)
1253{
1254 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1255 VirtioBusState *bus = &proxy->bus;
1256 uint8_t *config;
1257 uint32_t size;
1258
1259 proxy->vdev = bus->vdev;
1260
1261 config = proxy->pci_dev.config;
1262 if (proxy->class_code) {
1263 pci_config_set_class(config, proxy->class_code);
1264 }
1265 pci_set_word(config + PCI_SUBSYSTEM_VENDOR_ID,
1266 pci_get_word(config + PCI_VENDOR_ID));
1267 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus));
1268 config[PCI_INTERRUPT_PIN] = 1;
1269
1270 if (proxy->nvectors &&
1271 msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors, 1)) {
1272 proxy->nvectors = 0;
1273 }
1274
1275 proxy->pci_dev.config_write = virtio_write_config;
1276
1277 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev)
1278 + virtio_bus_get_vdev_config_len(bus);
1279 if (size & (size - 1)) {
1280 size = 1 << qemu_fls(size);
1281 }
1282
1283 memory_region_init_io(&proxy->bar, &virtio_pci_config_ops, proxy,
1284 "virtio-pci", size);
1285 pci_register_bar(&proxy->pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO,
1286 &proxy->bar);
1287
1288 if (!kvm_has_many_ioeventfds()) {
1289 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
1290 }
1291
1292 proxy->host_features |= 0x1 << VIRTIO_F_NOTIFY_ON_EMPTY;
1293 proxy->host_features |= 0x1 << VIRTIO_F_BAD_FEATURE;
1294 proxy->host_features = virtio_bus_get_vdev_features(bus,
1295 proxy->host_features);
1296}
1297
085bccb7
FK
1298static int virtio_pci_init(PCIDevice *pci_dev)
1299{
1300 VirtIOPCIProxy *dev = VIRTIO_PCI(pci_dev);
1301 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
1302 virtio_pci_bus_new(&dev->bus, dev);
1303 if (k->init != NULL) {
1304 return k->init(dev);
1305 }
1306 return 0;
1307}
1308
1309static void virtio_pci_exit(PCIDevice *pci_dev)
1310{
1311 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
10479a80 1312 virtio_pci_stop_ioeventfd(proxy);
085bccb7
FK
1313 virtio_exit_pci(pci_dev);
1314}
1315
1316/*
1317 * This will be renamed virtio_pci_reset at the end of the series.
1318 * virtio_pci_reset is still in use at this moment.
1319 */
1320static void virtio_pci_rst(DeviceState *qdev)
1321{
1322 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1323 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
1324 virtio_pci_stop_ioeventfd(proxy);
1325 virtio_bus_reset(bus);
1326 msix_unuse_all_vectors(&proxy->pci_dev);
1327 proxy->flags &= ~VIRTIO_PCI_FLAG_BUS_MASTER_BUG;
1328}
1329
1330static void virtio_pci_class_init(ObjectClass *klass, void *data)
1331{
1332 DeviceClass *dc = DEVICE_CLASS(klass);
1333 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1334
1335 k->init = virtio_pci_init;
1336 k->exit = virtio_pci_exit;
1337 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1338 k->revision = VIRTIO_PCI_ABI_VERSION;
1339 k->class_id = PCI_CLASS_OTHERS;
1340 dc->reset = virtio_pci_rst;
1341}
1342
1343static const TypeInfo virtio_pci_info = {
1344 .name = TYPE_VIRTIO_PCI,
1345 .parent = TYPE_PCI_DEVICE,
1346 .instance_size = sizeof(VirtIOPCIProxy),
1347 .class_init = virtio_pci_class_init,
1348 .class_size = sizeof(VirtioPCIClass),
1349 .abstract = true,
1350};
1351
653ced07
FK
1352/* virtio-blk-pci */
1353
1354static Property virtio_blk_pci_properties[] = {
1355 DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
1356 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1357 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1358 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
1359#ifdef CONFIG_VIRTIO_BLK_DATA_PLANE
1360 DEFINE_PROP_BIT("x-data-plane", VirtIOBlkPCI, blk.data_plane, 0, false),
1361#endif
1362 DEFINE_VIRTIO_BLK_FEATURES(VirtIOPCIProxy, host_features),
1363 DEFINE_VIRTIO_BLK_PROPERTIES(VirtIOBlkPCI, blk),
1364 DEFINE_PROP_END_OF_LIST(),
1365};
1366
1367static int virtio_blk_pci_init(VirtIOPCIProxy *vpci_dev)
1368{
1369 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(vpci_dev);
1370 DeviceState *vdev = DEVICE(&dev->vdev);
1371 virtio_blk_set_conf(vdev, &(dev->blk));
1372 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
1373 if (qdev_init(vdev) < 0) {
1374 return -1;
1375 }
1376 return 0;
1377}
1378
1379static void virtio_blk_pci_class_init(ObjectClass *klass, void *data)
1380{
1381 DeviceClass *dc = DEVICE_CLASS(klass);
1382 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
1383 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
1384
1385 dc->props = virtio_blk_pci_properties;
1386 k->init = virtio_blk_pci_init;
1387 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1388 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BLOCK;
1389 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
1390 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
1391}
1392
1393static void virtio_blk_pci_instance_init(Object *obj)
1394{
1395 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(obj);
1396 object_initialize(OBJECT(&dev->vdev), TYPE_VIRTIO_BLK);
1397 object_property_add_child(obj, "virtio-backend", OBJECT(&dev->vdev), NULL);
1398}
1399
1400static const TypeInfo virtio_blk_pci_info = {
1401 .name = TYPE_VIRTIO_BLK_PCI,
1402 .parent = TYPE_VIRTIO_PCI,
1403 .instance_size = sizeof(VirtIOBlkPCI),
1404 .instance_init = virtio_blk_pci_instance_init,
1405 .class_init = virtio_blk_pci_class_init,
1406};
1407
bc7b90a0
FK
1408/* virtio-scsi-pci */
1409
1410static Property virtio_scsi_pci_properties[] = {
1411 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1412 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1413 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
1414 DEV_NVECTORS_UNSPECIFIED),
1415 DEFINE_VIRTIO_SCSI_FEATURES(VirtIOPCIProxy, host_features),
1416 DEFINE_VIRTIO_SCSI_PROPERTIES(VirtIOSCSIPCI, vdev.conf),
1417 DEFINE_PROP_END_OF_LIST(),
1418};
1419
1420static int virtio_scsi_pci_init_pci(VirtIOPCIProxy *vpci_dev)
1421{
1422 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(vpci_dev);
1423 DeviceState *vdev = DEVICE(&dev->vdev);
1424
1425 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
1426 vpci_dev->nvectors = dev->vdev.conf.num_queues + 3;
1427 }
1428
1429 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
1430 if (qdev_init(vdev) < 0) {
1431 return -1;
1432 }
1433 return 0;
1434}
1435
1436static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data)
1437{
1438 DeviceClass *dc = DEVICE_CLASS(klass);
1439 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
1440 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
1441 k->init = virtio_scsi_pci_init_pci;
1442 dc->props = virtio_scsi_pci_properties;
1443 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1444 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI;
1445 pcidev_k->revision = 0x00;
1446 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
1447}
1448
1449static void virtio_scsi_pci_instance_init(Object *obj)
1450{
1451 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(obj);
1452 object_initialize(OBJECT(&dev->vdev), TYPE_VIRTIO_SCSI);
1453 object_property_add_child(obj, "virtio-backend", OBJECT(&dev->vdev), NULL);
1454}
1455
1456static const TypeInfo virtio_scsi_pci_info = {
1457 .name = TYPE_VIRTIO_SCSI_PCI,
1458 .parent = TYPE_VIRTIO_PCI,
1459 .instance_size = sizeof(VirtIOSCSIPCI),
1460 .instance_init = virtio_scsi_pci_instance_init,
1461 .class_init = virtio_scsi_pci_class_init,
1462};
1463
0a2acf5e
FK
1464/* virtio-pci-bus */
1465
1466void virtio_pci_bus_new(VirtioBusState *bus, VirtIOPCIProxy *dev)
1467{
1468 DeviceState *qdev = DEVICE(dev);
1469 BusState *qbus;
1470 qbus_create_inplace((BusState *)bus, TYPE_VIRTIO_PCI_BUS, qdev, NULL);
1471 qbus = BUS(bus);
cbd19063 1472 qbus->allow_hotplug = 1;
0a2acf5e
FK
1473}
1474
1475static void virtio_pci_bus_class_init(ObjectClass *klass, void *data)
1476{
1477 BusClass *bus_class = BUS_CLASS(klass);
1478 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass);
1479 bus_class->max_dev = 1;
1480 k->notify = virtio_pci_notify;
1481 k->save_config = virtio_pci_save_config;
1482 k->load_config = virtio_pci_load_config;
1483 k->save_queue = virtio_pci_save_queue;
1484 k->load_queue = virtio_pci_load_queue;
1485 k->get_features = virtio_pci_get_features;
1486 k->query_guest_notifiers = virtio_pci_query_guest_notifiers;
1487 k->set_host_notifier = virtio_pci_set_host_notifier;
1488 k->set_guest_notifiers = virtio_pci_set_guest_notifiers;
1489 k->vmstate_change = virtio_pci_vmstate_change;
085bccb7 1490 k->device_plugged = virtio_pci_device_plugged;
0a2acf5e
FK
1491}
1492
1493static const TypeInfo virtio_pci_bus_info = {
1494 .name = TYPE_VIRTIO_PCI_BUS,
1495 .parent = TYPE_VIRTIO_BUS,
1496 .instance_size = sizeof(VirtioPCIBusState),
1497 .class_init = virtio_pci_bus_class_init,
1498};
1499
83f7d43a 1500static void virtio_pci_register_types(void)
53c25cea 1501{
39bffca2 1502 type_register_static(&virtio_net_info);
39bffca2 1503 type_register_static(&virtio_serial_info);
39bffca2 1504 type_register_static(&virtio_balloon_info);
16c915ba 1505 type_register_static(&virtio_rng_info);
0a2acf5e 1506 type_register_static(&virtio_pci_bus_info);
085bccb7 1507 type_register_static(&virtio_pci_info);
60653b28
PB
1508#ifdef CONFIG_VIRTFS
1509 type_register_static(&virtio_9p_info);
1510#endif
653ced07 1511 type_register_static(&virtio_blk_pci_info);
bc7b90a0 1512 type_register_static(&virtio_scsi_pci_info);
53c25cea
PB
1513}
1514
83f7d43a 1515type_init(virtio_pci_register_types)
This page took 0.818722 seconds and 4 git commands to generate.