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53c25cea PB |
1 | /* |
2 | * Virtio PCI Bindings | |
3 | * | |
4 | * Copyright IBM, Corp. 2007 | |
5 | * Copyright (c) 2009 CodeSourcery | |
6 | * | |
7 | * Authors: | |
8 | * Anthony Liguori <[email protected]> | |
9 | * Paul Brook <[email protected]> | |
10 | * | |
11 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
12 | * the COPYING file in the top-level directory. | |
13 | * | |
14 | */ | |
15 | ||
16 | #include <inttypes.h> | |
17 | ||
18 | #include "virtio.h" | |
8172539d MT |
19 | #include "virtio-blk.h" |
20 | #include "virtio-net.h" | |
53c25cea | 21 | #include "pci.h" |
2f792016 | 22 | #include "qemu-error.h" |
aba800a3 | 23 | #include "msix.h" |
a1e0fea5 | 24 | #include "net.h" |
428c149b | 25 | #include "block_int.h" |
97b15621 | 26 | #include "loader.h" |
53c25cea PB |
27 | |
28 | /* from Linux's linux/virtio_pci.h */ | |
29 | ||
30 | /* A 32-bit r/o bitmask of the features supported by the host */ | |
31 | #define VIRTIO_PCI_HOST_FEATURES 0 | |
32 | ||
33 | /* A 32-bit r/w bitmask of features activated by the guest */ | |
34 | #define VIRTIO_PCI_GUEST_FEATURES 4 | |
35 | ||
36 | /* A 32-bit r/w PFN for the currently selected queue */ | |
37 | #define VIRTIO_PCI_QUEUE_PFN 8 | |
38 | ||
39 | /* A 16-bit r/o queue size for the currently selected queue */ | |
40 | #define VIRTIO_PCI_QUEUE_NUM 12 | |
41 | ||
42 | /* A 16-bit r/w queue selector */ | |
43 | #define VIRTIO_PCI_QUEUE_SEL 14 | |
44 | ||
45 | /* A 16-bit r/w queue notifier */ | |
46 | #define VIRTIO_PCI_QUEUE_NOTIFY 16 | |
47 | ||
48 | /* An 8-bit device status register. */ | |
49 | #define VIRTIO_PCI_STATUS 18 | |
50 | ||
51 | /* An 8-bit r/o interrupt status register. Reading the value will return the | |
52 | * current contents of the ISR and will also clear it. This is effectively | |
53 | * a read-and-acknowledge. */ | |
54 | #define VIRTIO_PCI_ISR 19 | |
55 | ||
aba800a3 MT |
56 | /* MSI-X registers: only enabled if MSI-X is enabled. */ |
57 | /* A 16-bit vector for configuration changes. */ | |
58 | #define VIRTIO_MSI_CONFIG_VECTOR 20 | |
59 | /* A 16-bit vector for selected queue notifications. */ | |
60 | #define VIRTIO_MSI_QUEUE_VECTOR 22 | |
61 | ||
62 | /* Config space size */ | |
63 | #define VIRTIO_PCI_CONFIG_NOMSI 20 | |
64 | #define VIRTIO_PCI_CONFIG_MSI 24 | |
65 | #define VIRTIO_PCI_REGION_SIZE(dev) (msix_present(dev) ? \ | |
66 | VIRTIO_PCI_CONFIG_MSI : \ | |
67 | VIRTIO_PCI_CONFIG_NOMSI) | |
68 | ||
69 | /* The remaining space is defined by each driver as the per-driver | |
70 | * configuration space */ | |
71 | #define VIRTIO_PCI_CONFIG(dev) (msix_enabled(dev) ? \ | |
72 | VIRTIO_PCI_CONFIG_MSI : \ | |
73 | VIRTIO_PCI_CONFIG_NOMSI) | |
53c25cea PB |
74 | |
75 | /* Virtio ABI version, if we increment this, we break the guest driver. */ | |
76 | #define VIRTIO_PCI_ABI_VERSION 0 | |
77 | ||
78 | /* How many bits to shift physical queue address written to QUEUE_PFN. | |
79 | * 12 is historical, and due to x86 page size. */ | |
80 | #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12 | |
81 | ||
c81131db AG |
82 | /* We can catch some guest bugs inside here so we continue supporting older |
83 | guests. */ | |
84 | #define VIRTIO_PCI_BUG_BUS_MASTER (1 << 0) | |
85 | ||
53c25cea PB |
86 | /* QEMU doesn't strictly need write barriers since everything runs in |
87 | * lock-step. We'll leave the calls to wmb() in though to make it obvious for | |
88 | * KVM or if kqemu gets SMP support. | |
89 | */ | |
90 | #define wmb() do { } while (0) | |
91 | ||
92 | /* PCI bindings. */ | |
93 | ||
94 | typedef struct { | |
95 | PCIDevice pci_dev; | |
96 | VirtIODevice *vdev; | |
c81131db | 97 | uint32_t bugs; |
53c25cea | 98 | uint32_t addr; |
ab73ff29 | 99 | uint32_t class_code; |
a1e0fea5 | 100 | uint32_t nvectors; |
428c149b | 101 | BlockConf block; |
97b15621 | 102 | NICConf nic; |
8172539d | 103 | uint32_t host_features; |
98b19252 AS |
104 | /* Max. number of ports we can have for a the virtio-serial device */ |
105 | uint32_t max_virtserial_ports; | |
53c25cea PB |
106 | } VirtIOPCIProxy; |
107 | ||
108 | /* virtio device */ | |
109 | ||
7055e687 | 110 | static void virtio_pci_notify(void *opaque, uint16_t vector) |
53c25cea PB |
111 | { |
112 | VirtIOPCIProxy *proxy = opaque; | |
aba800a3 MT |
113 | if (msix_enabled(&proxy->pci_dev)) |
114 | msix_notify(&proxy->pci_dev, vector); | |
115 | else | |
116 | qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1); | |
53c25cea PB |
117 | } |
118 | ||
ff24bd58 MT |
119 | static void virtio_pci_save_config(void * opaque, QEMUFile *f) |
120 | { | |
121 | VirtIOPCIProxy *proxy = opaque; | |
122 | pci_device_save(&proxy->pci_dev, f); | |
123 | msix_save(&proxy->pci_dev, f); | |
124 | if (msix_present(&proxy->pci_dev)) | |
125 | qemu_put_be16(f, proxy->vdev->config_vector); | |
126 | } | |
127 | ||
128 | static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f) | |
129 | { | |
130 | VirtIOPCIProxy *proxy = opaque; | |
131 | if (msix_present(&proxy->pci_dev)) | |
132 | qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n)); | |
133 | } | |
134 | ||
135 | static int virtio_pci_load_config(void * opaque, QEMUFile *f) | |
136 | { | |
137 | VirtIOPCIProxy *proxy = opaque; | |
138 | int ret; | |
139 | ret = pci_device_load(&proxy->pci_dev, f); | |
e6da7680 | 140 | if (ret) { |
ff24bd58 | 141 | return ret; |
e6da7680 | 142 | } |
ff24bd58 | 143 | msix_load(&proxy->pci_dev, f); |
e6da7680 | 144 | if (msix_present(&proxy->pci_dev)) { |
ff24bd58 | 145 | qemu_get_be16s(f, &proxy->vdev->config_vector); |
e6da7680 MT |
146 | } else { |
147 | proxy->vdev->config_vector = VIRTIO_NO_VECTOR; | |
148 | } | |
149 | if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) { | |
150 | return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector); | |
151 | } | |
c81131db AG |
152 | |
153 | /* Try to find out if the guest has bus master disabled, but is | |
154 | in ready state. Then we have a buggy guest OS. */ | |
155 | if (!(proxy->vdev->status & VIRTIO_CONFIG_S_DRIVER_OK) && | |
156 | !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { | |
157 | proxy->bugs |= VIRTIO_PCI_BUG_BUS_MASTER; | |
158 | } | |
ff24bd58 MT |
159 | return 0; |
160 | } | |
161 | ||
162 | static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f) | |
163 | { | |
164 | VirtIOPCIProxy *proxy = opaque; | |
165 | uint16_t vector; | |
e6da7680 MT |
166 | if (msix_present(&proxy->pci_dev)) { |
167 | qemu_get_be16s(f, &vector); | |
168 | } else { | |
169 | vector = VIRTIO_NO_VECTOR; | |
170 | } | |
ff24bd58 | 171 | virtio_queue_set_vector(proxy->vdev, n, vector); |
e6da7680 MT |
172 | if (vector != VIRTIO_NO_VECTOR) { |
173 | return msix_vector_use(&proxy->pci_dev, vector); | |
174 | } | |
ff24bd58 MT |
175 | return 0; |
176 | } | |
177 | ||
e489030d | 178 | static void virtio_pci_reset(DeviceState *d) |
7055e687 | 179 | { |
e489030d | 180 | VirtIOPCIProxy *proxy = container_of(d, VirtIOPCIProxy, pci_dev.qdev); |
7055e687 | 181 | virtio_reset(proxy->vdev); |
aba800a3 | 182 | msix_reset(&proxy->pci_dev); |
c81131db | 183 | proxy->bugs = 0; |
7055e687 MT |
184 | } |
185 | ||
53c25cea PB |
186 | static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val) |
187 | { | |
188 | VirtIOPCIProxy *proxy = opaque; | |
189 | VirtIODevice *vdev = proxy->vdev; | |
c227f099 | 190 | target_phys_addr_t pa; |
53c25cea | 191 | |
53c25cea PB |
192 | switch (addr) { |
193 | case VIRTIO_PCI_GUEST_FEATURES: | |
194 | /* Guest does not negotiate properly? We have to assume nothing. */ | |
195 | if (val & (1 << VIRTIO_F_BAD_FEATURE)) { | |
196 | if (vdev->bad_features) | |
8172539d | 197 | val = proxy->host_features & vdev->bad_features(vdev); |
53c25cea PB |
198 | else |
199 | val = 0; | |
200 | } | |
201 | if (vdev->set_features) | |
202 | vdev->set_features(vdev, val); | |
704a76fc | 203 | vdev->guest_features = val; |
53c25cea PB |
204 | break; |
205 | case VIRTIO_PCI_QUEUE_PFN: | |
c227f099 | 206 | pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT; |
1b8e9b27 MT |
207 | if (pa == 0) { |
208 | virtio_reset(proxy->vdev); | |
209 | msix_unuse_all_vectors(&proxy->pci_dev); | |
210 | } | |
7055e687 MT |
211 | else |
212 | virtio_queue_set_addr(vdev, vdev->queue_sel, pa); | |
53c25cea PB |
213 | break; |
214 | case VIRTIO_PCI_QUEUE_SEL: | |
215 | if (val < VIRTIO_PCI_QUEUE_MAX) | |
216 | vdev->queue_sel = val; | |
217 | break; | |
218 | case VIRTIO_PCI_QUEUE_NOTIFY: | |
219 | virtio_queue_notify(vdev, val); | |
220 | break; | |
221 | case VIRTIO_PCI_STATUS: | |
222 | vdev->status = val & 0xFF; | |
1b8e9b27 MT |
223 | if (vdev->status == 0) { |
224 | virtio_reset(proxy->vdev); | |
225 | msix_unuse_all_vectors(&proxy->pci_dev); | |
226 | } | |
c81131db AG |
227 | |
228 | /* Linux before 2.6.34 sets the device as OK without enabling | |
229 | the PCI device bus master bit. In this case we need to disable | |
230 | some safety checks. */ | |
231 | if ((val & VIRTIO_CONFIG_S_DRIVER_OK) && | |
232 | !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { | |
233 | proxy->bugs |= VIRTIO_PCI_BUG_BUS_MASTER; | |
234 | } | |
53c25cea | 235 | break; |
aba800a3 MT |
236 | case VIRTIO_MSI_CONFIG_VECTOR: |
237 | msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); | |
238 | /* Make it possible for guest to discover an error took place. */ | |
239 | if (msix_vector_use(&proxy->pci_dev, val) < 0) | |
240 | val = VIRTIO_NO_VECTOR; | |
241 | vdev->config_vector = val; | |
242 | break; | |
243 | case VIRTIO_MSI_QUEUE_VECTOR: | |
244 | msix_vector_unuse(&proxy->pci_dev, | |
245 | virtio_queue_vector(vdev, vdev->queue_sel)); | |
246 | /* Make it possible for guest to discover an error took place. */ | |
247 | if (msix_vector_use(&proxy->pci_dev, val) < 0) | |
248 | val = VIRTIO_NO_VECTOR; | |
249 | virtio_queue_set_vector(vdev, vdev->queue_sel, val); | |
250 | break; | |
251 | default: | |
252 | fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n", | |
253 | __func__, addr, val); | |
254 | break; | |
53c25cea PB |
255 | } |
256 | } | |
257 | ||
aba800a3 | 258 | static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr) |
53c25cea | 259 | { |
53c25cea PB |
260 | VirtIODevice *vdev = proxy->vdev; |
261 | uint32_t ret = 0xFFFFFFFF; | |
262 | ||
53c25cea PB |
263 | switch (addr) { |
264 | case VIRTIO_PCI_HOST_FEATURES: | |
8172539d | 265 | ret = proxy->host_features; |
53c25cea PB |
266 | break; |
267 | case VIRTIO_PCI_GUEST_FEATURES: | |
704a76fc | 268 | ret = vdev->guest_features; |
53c25cea PB |
269 | break; |
270 | case VIRTIO_PCI_QUEUE_PFN: | |
271 | ret = virtio_queue_get_addr(vdev, vdev->queue_sel) | |
272 | >> VIRTIO_PCI_QUEUE_ADDR_SHIFT; | |
273 | break; | |
274 | case VIRTIO_PCI_QUEUE_NUM: | |
275 | ret = virtio_queue_get_num(vdev, vdev->queue_sel); | |
276 | break; | |
277 | case VIRTIO_PCI_QUEUE_SEL: | |
278 | ret = vdev->queue_sel; | |
279 | break; | |
280 | case VIRTIO_PCI_STATUS: | |
281 | ret = vdev->status; | |
282 | break; | |
283 | case VIRTIO_PCI_ISR: | |
284 | /* reading from the ISR also clears it. */ | |
285 | ret = vdev->isr; | |
286 | vdev->isr = 0; | |
7055e687 | 287 | qemu_set_irq(proxy->pci_dev.irq[0], 0); |
53c25cea | 288 | break; |
aba800a3 MT |
289 | case VIRTIO_MSI_CONFIG_VECTOR: |
290 | ret = vdev->config_vector; | |
291 | break; | |
292 | case VIRTIO_MSI_QUEUE_VECTOR: | |
293 | ret = virtio_queue_vector(vdev, vdev->queue_sel); | |
294 | break; | |
53c25cea PB |
295 | default: |
296 | break; | |
297 | } | |
298 | ||
299 | return ret; | |
300 | } | |
301 | ||
302 | static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr) | |
303 | { | |
304 | VirtIOPCIProxy *proxy = opaque; | |
aba800a3 MT |
305 | uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev); |
306 | addr -= proxy->addr; | |
307 | if (addr < config) | |
308 | return virtio_ioport_read(proxy, addr); | |
309 | addr -= config; | |
53c25cea PB |
310 | return virtio_config_readb(proxy->vdev, addr); |
311 | } | |
312 | ||
313 | static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr) | |
314 | { | |
315 | VirtIOPCIProxy *proxy = opaque; | |
aba800a3 MT |
316 | uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev); |
317 | addr -= proxy->addr; | |
318 | if (addr < config) | |
319 | return virtio_ioport_read(proxy, addr); | |
320 | addr -= config; | |
53c25cea PB |
321 | return virtio_config_readw(proxy->vdev, addr); |
322 | } | |
323 | ||
324 | static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr) | |
325 | { | |
326 | VirtIOPCIProxy *proxy = opaque; | |
aba800a3 MT |
327 | uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev); |
328 | addr -= proxy->addr; | |
329 | if (addr < config) | |
330 | return virtio_ioport_read(proxy, addr); | |
331 | addr -= config; | |
53c25cea PB |
332 | return virtio_config_readl(proxy->vdev, addr); |
333 | } | |
334 | ||
335 | static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val) | |
336 | { | |
337 | VirtIOPCIProxy *proxy = opaque; | |
aba800a3 MT |
338 | uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev); |
339 | addr -= proxy->addr; | |
340 | if (addr < config) { | |
341 | virtio_ioport_write(proxy, addr, val); | |
342 | return; | |
343 | } | |
344 | addr -= config; | |
53c25cea PB |
345 | virtio_config_writeb(proxy->vdev, addr, val); |
346 | } | |
347 | ||
348 | static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val) | |
349 | { | |
350 | VirtIOPCIProxy *proxy = opaque; | |
aba800a3 MT |
351 | uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev); |
352 | addr -= proxy->addr; | |
353 | if (addr < config) { | |
354 | virtio_ioport_write(proxy, addr, val); | |
355 | return; | |
356 | } | |
357 | addr -= config; | |
53c25cea PB |
358 | virtio_config_writew(proxy->vdev, addr, val); |
359 | } | |
360 | ||
361 | static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val) | |
362 | { | |
363 | VirtIOPCIProxy *proxy = opaque; | |
aba800a3 MT |
364 | uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev); |
365 | addr -= proxy->addr; | |
366 | if (addr < config) { | |
367 | virtio_ioport_write(proxy, addr, val); | |
368 | return; | |
369 | } | |
370 | addr -= config; | |
53c25cea PB |
371 | virtio_config_writel(proxy->vdev, addr, val); |
372 | } | |
373 | ||
374 | static void virtio_map(PCIDevice *pci_dev, int region_num, | |
6e355d90 | 375 | pcibus_t addr, pcibus_t size, int type) |
53c25cea PB |
376 | { |
377 | VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev); | |
378 | VirtIODevice *vdev = proxy->vdev; | |
aba800a3 | 379 | unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len; |
53c25cea PB |
380 | |
381 | proxy->addr = addr; | |
53c25cea | 382 | |
aba800a3 MT |
383 | register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy); |
384 | register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy); | |
385 | register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy); | |
386 | register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy); | |
387 | register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy); | |
388 | register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy); | |
53c25cea | 389 | |
aba800a3 | 390 | if (vdev->config_len) |
53c25cea | 391 | vdev->get_config(vdev, vdev->config); |
aba800a3 MT |
392 | } |
393 | ||
394 | static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, | |
395 | uint32_t val, int len) | |
396 | { | |
ed757e14 YV |
397 | VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); |
398 | ||
399 | if (PCI_COMMAND == address) { | |
400 | if (!(val & PCI_COMMAND_MASTER)) { | |
c81131db AG |
401 | if (!(proxy->bugs & VIRTIO_PCI_BUG_BUS_MASTER)) { |
402 | proxy->vdev->status &= ~VIRTIO_CONFIG_S_DRIVER_OK; | |
403 | } | |
ed757e14 YV |
404 | } |
405 | } | |
406 | ||
aba800a3 | 407 | pci_default_write_config(pci_dev, address, val, len); |
85352471 | 408 | msix_write_config(pci_dev, address, val, len); |
53c25cea PB |
409 | } |
410 | ||
6d74ca5a MT |
411 | static unsigned virtio_pci_get_features(void *opaque) |
412 | { | |
8172539d MT |
413 | VirtIOPCIProxy *proxy = opaque; |
414 | return proxy->host_features; | |
6d74ca5a MT |
415 | } |
416 | ||
53c25cea | 417 | static const VirtIOBindings virtio_pci_bindings = { |
ff24bd58 MT |
418 | .notify = virtio_pci_notify, |
419 | .save_config = virtio_pci_save_config, | |
420 | .load_config = virtio_pci_load_config, | |
421 | .save_queue = virtio_pci_save_queue, | |
422 | .load_queue = virtio_pci_load_queue, | |
6d74ca5a | 423 | .get_features = virtio_pci_get_features, |
53c25cea PB |
424 | }; |
425 | ||
426 | static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev, | |
427 | uint16_t vendor, uint16_t device, | |
428 | uint16_t class_code, uint8_t pif) | |
429 | { | |
430 | uint8_t *config; | |
431 | uint32_t size; | |
432 | ||
433 | proxy->vdev = vdev; | |
434 | ||
435 | config = proxy->pci_dev.config; | |
436 | pci_config_set_vendor_id(config, vendor); | |
437 | pci_config_set_device_id(config, device); | |
438 | ||
439 | config[0x08] = VIRTIO_PCI_ABI_VERSION; | |
440 | ||
441 | config[0x09] = pif; | |
442 | pci_config_set_class(config, class_code); | |
443 | config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; | |
444 | ||
445 | config[0x2c] = vendor & 0xFF; | |
446 | config[0x2d] = (vendor >> 8) & 0xFF; | |
447 | config[0x2e] = vdev->device_id & 0xFF; | |
448 | config[0x2f] = (vdev->device_id >> 8) & 0xFF; | |
449 | ||
450 | config[0x3d] = 1; | |
451 | ||
5a1fc5e8 | 452 | if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) { |
aba800a3 MT |
453 | pci_register_bar(&proxy->pci_dev, 1, |
454 | msix_bar_size(&proxy->pci_dev), | |
0392a017 | 455 | PCI_BASE_ADDRESS_SPACE_MEMORY, |
aba800a3 | 456 | msix_mmio_map); |
aba800a3 MT |
457 | } else |
458 | vdev->nvectors = 0; | |
459 | ||
ed757e14 YV |
460 | proxy->pci_dev.config_write = virtio_write_config; |
461 | ||
aba800a3 | 462 | size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len; |
53c25cea PB |
463 | if (size & (size-1)) |
464 | size = 1 << qemu_fls(size); | |
465 | ||
0392a017 | 466 | pci_register_bar(&proxy->pci_dev, 0, size, PCI_BASE_ADDRESS_SPACE_IO, |
53c25cea PB |
467 | virtio_map); |
468 | ||
469 | virtio_bind_device(vdev, &virtio_pci_bindings, proxy); | |
8172539d MT |
470 | proxy->host_features |= 0x1 << VIRTIO_F_NOTIFY_ON_EMPTY; |
471 | proxy->host_features |= 0x1 << VIRTIO_F_BAD_FEATURE; | |
472 | proxy->host_features = vdev->get_features(vdev, proxy->host_features); | |
53c25cea PB |
473 | } |
474 | ||
81a322d4 | 475 | static int virtio_blk_init_pci(PCIDevice *pci_dev) |
53c25cea PB |
476 | { |
477 | VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); | |
478 | VirtIODevice *vdev; | |
479 | ||
ab73ff29 GH |
480 | if (proxy->class_code != PCI_CLASS_STORAGE_SCSI && |
481 | proxy->class_code != PCI_CLASS_STORAGE_OTHER) | |
482 | proxy->class_code = PCI_CLASS_STORAGE_SCSI; | |
53c25cea | 483 | |
428c149b | 484 | if (!proxy->block.dinfo) { |
1ecda02b | 485 | error_report("virtio-blk-pci: drive property not set"); |
81a322d4 | 486 | return -1; |
d176c495 | 487 | } |
428c149b | 488 | vdev = virtio_blk_init(&pci_dev->qdev, &proxy->block); |
177539e0 | 489 | vdev->nvectors = proxy->nvectors; |
53c25cea PB |
490 | virtio_init_pci(proxy, vdev, |
491 | PCI_VENDOR_ID_REDHAT_QUMRANET, | |
85c2c735 MM |
492 | PCI_DEVICE_ID_VIRTIO_BLOCK, |
493 | proxy->class_code, 0x00); | |
177539e0 GH |
494 | /* make the actual value visible */ |
495 | proxy->nvectors = vdev->nvectors; | |
81a322d4 | 496 | return 0; |
21d58b57 MM |
497 | } |
498 | ||
0f457d91 MT |
499 | static int virtio_exit_pci(PCIDevice *pci_dev) |
500 | { | |
501 | return msix_uninit(pci_dev); | |
502 | } | |
503 | ||
56a14938 GH |
504 | static int virtio_blk_exit_pci(PCIDevice *pci_dev) |
505 | { | |
506 | VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); | |
507 | ||
428c149b | 508 | drive_uninit(proxy->block.dinfo); |
0f457d91 | 509 | return virtio_exit_pci(pci_dev); |
56a14938 GH |
510 | } |
511 | ||
98b19252 | 512 | static int virtio_serial_init_pci(PCIDevice *pci_dev) |
21d58b57 | 513 | { |
d6beee99 | 514 | VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); |
85c2c735 MM |
515 | VirtIODevice *vdev; |
516 | ||
d6beee99 GH |
517 | if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER && |
518 | proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */ | |
519 | proxy->class_code != PCI_CLASS_OTHERS) /* qemu-kvm */ | |
520 | proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER; | |
521 | ||
98b19252 | 522 | vdev = virtio_serial_init(&pci_dev->qdev, proxy->max_virtserial_ports); |
25fe3654 AS |
523 | if (!vdev) { |
524 | return -1; | |
525 | } | |
573fb60c AS |
526 | vdev->nvectors = proxy->nvectors == DEV_NVECTORS_UNSPECIFIED |
527 | ? proxy->max_virtserial_ports + 1 | |
528 | : proxy->nvectors; | |
85c2c735 MM |
529 | virtio_init_pci(proxy, vdev, |
530 | PCI_VENDOR_ID_REDHAT_QUMRANET, | |
531 | PCI_DEVICE_ID_VIRTIO_CONSOLE, | |
532 | proxy->class_code, 0x00); | |
a1829205 | 533 | proxy->nvectors = vdev->nvectors; |
81a322d4 | 534 | return 0; |
53c25cea PB |
535 | } |
536 | ||
81a322d4 | 537 | static int virtio_net_init_pci(PCIDevice *pci_dev) |
53c25cea PB |
538 | { |
539 | VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); | |
540 | VirtIODevice *vdev; | |
541 | ||
97b15621 | 542 | vdev = virtio_net_init(&pci_dev->qdev, &proxy->nic); |
a1e0fea5 | 543 | |
97b15621 | 544 | vdev->nvectors = proxy->nvectors; |
53c25cea PB |
545 | virtio_init_pci(proxy, vdev, |
546 | PCI_VENDOR_ID_REDHAT_QUMRANET, | |
547 | PCI_DEVICE_ID_VIRTIO_NET, | |
548 | PCI_CLASS_NETWORK_ETHERNET, | |
549 | 0x00); | |
a1e0fea5 GH |
550 | |
551 | /* make the actual value visible */ | |
552 | proxy->nvectors = vdev->nvectors; | |
81a322d4 | 553 | return 0; |
53c25cea PB |
554 | } |
555 | ||
97b15621 GH |
556 | static int virtio_net_exit_pci(PCIDevice *pci_dev) |
557 | { | |
558 | VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); | |
559 | ||
560 | virtio_net_exit(proxy->vdev); | |
561 | return virtio_exit_pci(pci_dev); | |
562 | } | |
563 | ||
81a322d4 | 564 | static int virtio_balloon_init_pci(PCIDevice *pci_dev) |
53c25cea PB |
565 | { |
566 | VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); | |
567 | VirtIODevice *vdev; | |
568 | ||
569 | vdev = virtio_balloon_init(&pci_dev->qdev); | |
570 | virtio_init_pci(proxy, vdev, | |
571 | PCI_VENDOR_ID_REDHAT_QUMRANET, | |
572 | PCI_DEVICE_ID_VIRTIO_BALLOON, | |
573 | PCI_CLASS_MEMORY_RAM, | |
574 | 0x00); | |
81a322d4 | 575 | return 0; |
53c25cea PB |
576 | } |
577 | ||
0aab0d3a GH |
578 | static PCIDeviceInfo virtio_info[] = { |
579 | { | |
580 | .qdev.name = "virtio-blk-pci", | |
581 | .qdev.size = sizeof(VirtIOPCIProxy), | |
582 | .init = virtio_blk_init_pci, | |
56a14938 | 583 | .exit = virtio_blk_exit_pci, |
ab73ff29 | 584 | .qdev.props = (Property[]) { |
72c61d0b | 585 | DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0), |
428c149b | 586 | DEFINE_BLOCK_PROPERTIES(VirtIOPCIProxy, block), |
177539e0 | 587 | DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), |
8172539d | 588 | DEFINE_VIRTIO_BLK_FEATURES(VirtIOPCIProxy, host_features), |
72c61d0b | 589 | DEFINE_PROP_END_OF_LIST(), |
ab73ff29 | 590 | }, |
e489030d | 591 | .qdev.reset = virtio_pci_reset, |
0aab0d3a | 592 | },{ |
a1e0fea5 GH |
593 | .qdev.name = "virtio-net-pci", |
594 | .qdev.size = sizeof(VirtIOPCIProxy), | |
595 | .init = virtio_net_init_pci, | |
97b15621 | 596 | .exit = virtio_net_exit_pci, |
8c52c8f3 | 597 | .romfile = "pxe-virtio.bin", |
a1e0fea5 | 598 | .qdev.props = (Property[]) { |
97b15621 | 599 | DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3), |
8172539d | 600 | DEFINE_VIRTIO_NET_FEATURES(VirtIOPCIProxy, host_features), |
97b15621 | 601 | DEFINE_NIC_PROPERTIES(VirtIOPCIProxy, nic), |
72c61d0b | 602 | DEFINE_PROP_END_OF_LIST(), |
a1e0fea5 | 603 | }, |
e489030d | 604 | .qdev.reset = virtio_pci_reset, |
0aab0d3a | 605 | },{ |
98b19252 AS |
606 | .qdev.name = "virtio-serial-pci", |
607 | .qdev.alias = "virtio-serial", | |
0aab0d3a | 608 | .qdev.size = sizeof(VirtIOPCIProxy), |
98b19252 | 609 | .init = virtio_serial_init_pci, |
0f457d91 | 610 | .exit = virtio_exit_pci, |
d6beee99 | 611 | .qdev.props = (Property[]) { |
573fb60c AS |
612 | DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, |
613 | DEV_NVECTORS_UNSPECIFIED), | |
72c61d0b | 614 | DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0), |
8172539d | 615 | DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features), |
98b19252 AS |
616 | DEFINE_PROP_UINT32("max_ports", VirtIOPCIProxy, max_virtserial_ports, |
617 | 31), | |
72c61d0b | 618 | DEFINE_PROP_END_OF_LIST(), |
d6beee99 | 619 | }, |
e489030d | 620 | .qdev.reset = virtio_pci_reset, |
0aab0d3a GH |
621 | },{ |
622 | .qdev.name = "virtio-balloon-pci", | |
623 | .qdev.size = sizeof(VirtIOPCIProxy), | |
624 | .init = virtio_balloon_init_pci, | |
0f457d91 | 625 | .exit = virtio_exit_pci, |
8172539d MT |
626 | .qdev.props = (Property[]) { |
627 | DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features), | |
628 | DEFINE_PROP_END_OF_LIST(), | |
629 | }, | |
e489030d | 630 | .qdev.reset = virtio_pci_reset, |
0aab0d3a GH |
631 | },{ |
632 | /* end of list */ | |
633 | } | |
634 | }; | |
635 | ||
53c25cea PB |
636 | static void virtio_pci_register_devices(void) |
637 | { | |
0aab0d3a | 638 | pci_qdev_register_many(virtio_info); |
53c25cea PB |
639 | } |
640 | ||
641 | device_init(virtio_pci_register_devices) |