[qemu.git] / hw / ppc_newworld.c

/*
 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "hw.h"
#include "ppc.h"
#include "ppc_mac.h"
#include "mac_dbdma.h"
#include "nvram.h"
#include "pc.h"
#include "pci.h"
#include "net.h"
#include "sysemu.h"
#include "boards.h"
#include "fw_cfg.h"
#include "escc.h"
#include "openpic.h"
#include "ide.h"
#include "loader.h"
#include "elf.h"

#define MAX_IDE_BUS 2
#define VGA_BIOS_SIZE 65536
#define CFG_ADDR 0xf0000510

/* debug UniNorth */
//#define DEBUG_UNIN

#ifdef DEBUG_UNIN
#define UNIN_DPRINTF(fmt, ...)                                  \
    do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
#else
#define UNIN_DPRINTF(fmt, ...)
#endif

/* UniN device */
static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
{
    UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
}

static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
{
    uint32_t value;

    value = 0;
    UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);

    return value;
}

static CPUWriteMemoryFunc * const unin_write[] = {
    &unin_writel,
    &unin_writel,
    &unin_writel,
};

static CPUReadMemoryFunc * const unin_read[] = {
    &unin_readl,
    &unin_readl,
    &unin_readl,
};

static int fw_cfg_boot_set(void *opaque, const char *boot_device)
{
    fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
    return 0;
}

/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size,
                             const char *boot_device,
                             const char *kernel_filename,
                             const char *kernel_cmdline,
                             const char *initrd_filename,
                             const char *cpu_model)
{
    CPUState *env = NULL, *envs[MAX_CPUS];
    char *filename;
    qemu_irq *pic, **openpic_irqs;
    int unin_memory;
    int linux_boot, i;
    ram_addr_t ram_offset, bios_offset, vga_bios_offset;
    uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
    PCIBus *pci_bus;
    MacIONVRAMState *nvr;
    int nvram_mem_index;
    int vga_bios_size, bios_size;
    qemu_irq *dummy_irq;
    int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
    int ppc_boot_device;
    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
    void *fw_cfg;
    void *dbdma;
    uint8_t *vga_bios_ptr;

    linux_boot = (kernel_filename != NULL);

    /* init CPUs */
    if (cpu_model == NULL)
        cpu_model = "G4";
    for (i = 0; i < smp_cpus; i++) {
        env = cpu_init(cpu_model);
        if (!env) {
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
            exit(1);
        }
        /* Set time-base frequency to 100 Mhz */
        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
#if 0
        env->osi_call = vga_osi_call;
#endif
        qemu_register_reset(&cpu_ppc_reset, env);
        envs[i] = env;
    }

    /* allocate RAM */
    ram_offset = qemu_ram_alloc(ram_size);
    cpu_register_physical_memory(0, ram_size, ram_offset);

    /* allocate and load BIOS */
    bios_offset = qemu_ram_alloc(BIOS_SIZE);
    if (bios_name == NULL)
        bios_name = PROM_FILENAME;
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
    cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);

    /* Load OpenBIOS (ELF) */
    if (filename) {
        bios_size = load_elf(filename, 0, NULL, NULL, NULL, 1, ELF_MACHINE, 0);

        qemu_free(filename);
    } else {
        bios_size = -1;
    }
    if (bios_size < 0 || bios_size > BIOS_SIZE) {
        hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
        exit(1);
    }

    /* allocate and load VGA BIOS */
    vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
    vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
    if (filename) {
        vga_bios_size = load_image(filename, vga_bios_ptr + 8);
        qemu_free(filename);
    } else {
        vga_bios_size = -1;
    }
    if (vga_bios_size < 0) {
        /* if no bios is present, we can still work */
        fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
                VGABIOS_FILENAME);
        vga_bios_size = 0;
    } else {
        /* set a specific header (XXX: find real Apple format for NDRV
           drivers) */
        vga_bios_ptr[0] = 'N';
        vga_bios_ptr[1] = 'D';
        vga_bios_ptr[2] = 'R';
        vga_bios_ptr[3] = 'V';
        cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
        vga_bios_size += 8;

        /* Round to page boundary */
        vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) &
            TARGET_PAGE_MASK;
    }

    if (linux_boot) {
        uint64_t lowaddr = 0;
        int bswap_needed;

#ifdef BSWAP_NEEDED
        bswap_needed = 1;
#else
        bswap_needed = 0;
#endif
        kernel_base = KERNEL_LOAD_ADDR;

        /* Now we can load the kernel. The first step tries to load the kernel
           supposing PhysAddr = 0x00000000. If that was wrong the kernel is
           loaded again, the new PhysAddr being computed from lowaddr. */
        kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL,
                               1, ELF_MACHINE, 0);
        if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
            kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
                                   NULL, NULL, NULL, 1, ELF_MACHINE, 0);
        }
        if (kernel_size < 0)
            kernel_size = load_aout(kernel_filename, kernel_base,
                                    ram_size - kernel_base, bswap_needed,
                                    TARGET_PAGE_SIZE);
        if (kernel_size < 0)
            kernel_size = load_image_targphys(kernel_filename,
                                              kernel_base,
                                              ram_size - kernel_base);
        if (kernel_size < 0) {
            hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
            exit(1);
        }
        /* load initrd */
        if (initrd_filename) {
            initrd_base = INITRD_LOAD_ADDR;
            initrd_size = load_image_targphys(initrd_filename, initrd_base,
                                              ram_size - initrd_base);
            if (initrd_size < 0) {
                hw_error("qemu: could not load initial ram disk '%s'\n",
                         initrd_filename);
                exit(1);
            }
        } else {
            initrd_base = 0;
            initrd_size = 0;
        }
        ppc_boot_device = 'm';
    } else {
        kernel_base = 0;
        kernel_size = 0;
        initrd_base = 0;
        initrd_size = 0;
        ppc_boot_device = '\0';
        /* We consider that NewWorld PowerMac never have any floppy drive
         * For now, OHW cannot boot from the network.
         */
        for (i = 0; boot_device[i] != '\0'; i++) {
            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
                ppc_boot_device = boot_device[i];
                break;
            }
        }
        if (ppc_boot_device == '\0') {
            fprintf(stderr, "No valid boot device for Mac99 machine\n");
            exit(1);
        }
    }

    isa_mem_base = 0x80000000;

    /* Register 8 MB of ISA IO space */
    isa_mmio_init(0xf2000000, 0x00800000);

    /* UniN init */
    unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
    cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);

    openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
    openpic_irqs[0] =
        qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
    for (i = 0; i < smp_cpus; i++) {
        /* Mac99 IRQ connection between OpenPIC outputs pins
         * and PowerPC input pins
         */
        switch (PPC_INPUT(env)) {
        case PPC_FLAGS_INPUT_6xx:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
            break;
#if defined(TARGET_PPC64)
        case PPC_FLAGS_INPUT_970:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
            break;
#endif /* defined(TARGET_PPC64) */
        default:
            hw_error("Bus model not supported on mac99 machine\n");
            exit(1);
        }
    }
    pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
    pci_bus = pci_pmac_init(pic);
    /* init basic PC hardware */
    pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);

    /* XXX: suppress that */
    dummy_irq = i8259_init(NULL);

    escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
                               serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);

    for(i = 0; i < nb_nics; i++)
        pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);

    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
        fprintf(stderr, "qemu: too many IDE bus\n");
        exit(1);
    }
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
        hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
    }
    dbdma = DBDMA_init(&dbdma_mem_index);
    pci_cmd646_ide_init(pci_bus, hd, 0);

    /* cuda also initialize ADB */
    cuda_init(&cuda_mem_index, pic[0x19]);

    adb_kbd_init(&adb_bus);
    adb_mouse_init(&adb_bus);


    macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
               dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
               escc_mem_index);

    if (usb_enabled) {
        usb_ohci_init_pci(pci_bus, -1);
    }

    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
        graphic_depth = 15;

    /* The NewWorld NVRAM is not located in the MacIO device */
    nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
    pmac_format_nvram_partition(nvr, 0x2000);
    macio_nvram_map(nvr, 0xFFF04000);
    /* No PCI init: the BIOS will do it */

    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
    if (kernel_cmdline) {
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
        pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
    } else {
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
    }
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);

    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);

    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}

static QEMUMachine core99_machine = {
    .name = "mac99",
    .desc = "Mac99 based PowerMAC",
    .init = ppc_core99_init,
    .max_cpus = MAX_CPUS,
};

static void core99_machine_init(void)
{
    qemu_register_machine(&core99_machine);
}

machine_init(core99_machine_init);
Commit	Line	Data
64201201	1	/*
3cbee15b	2	* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
5fafdf24	3	*
47103572	4	* Copyright (c) 2004-2007 Fabrice Bellard
3cbee15b	5	* Copyright (c) 2007 Jocelyn Mayer
5fafdf24	6	*
64201201 FB	7	* Permission is hereby granted, free of charge, to any person obtaining a copy
	8	* of this software and associated documentation files (the "Software"), to deal
	9	* in the Software without restriction, including without limitation the rights
	10	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	11	* copies of the Software, and to permit persons to whom the Software is
	12	* furnished to do so, subject to the following conditions:
	13	*
	14	* The above copyright notice and this permission notice shall be included in
	15	* all copies or substantial portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	22	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	23	* THE SOFTWARE.
	24	*/
87ecb68b PB	25	#include "hw.h"
87ecb68b PB	26	#include "ppc.h"
3cbee15b	27	#include "ppc_mac.h"
28ce5ce6	28	#include "mac_dbdma.h"
87ecb68b PB	29	#include "nvram.h"
	30	#include "pc.h"
	31	#include "pci.h"
	32	#include "net.h"
	33	#include "sysemu.h"
	34	#include "boards.h"
006f3a48	35	#include "fw_cfg.h"
7fa9ae1a	36	#include "escc.h"
b7169916	37	#include "openpic.h"
977e1244	38	#include "ide.h"
ca20cf32 BS	39	#include "loader.h"
ca20cf32 BS	40	#include "elf.h"
267002cd	41
e4bcb14c	42	#define MAX_IDE_BUS 2
864c136a	43	#define VGA_BIOS_SIZE 65536
006f3a48	44	#define CFG_ADDR 0xf0000510
e4bcb14c	45
f3902383 BS	46	/* debug UniNorth */
	47	//#define DEBUG_UNIN
	48
	49	#ifdef DEBUG_UNIN
001faf32 BS	50	#define UNIN_DPRINTF(fmt, ...) \
001faf32 BS	51	do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
f3902383	52	#else
001faf32	53	#define UNIN_DPRINTF(fmt, ...)
f3902383 BS	54	#endif
f3902383 BS	55
0aa6a4a2	56	/* UniN device */
c227f099	57	static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
0aa6a4a2	58	{
f3902383	59	UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
0aa6a4a2 FB	60	}
0aa6a4a2 FB	61
c227f099	62	static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
0aa6a4a2	63	{
f3902383 BS	64	uint32_t value;
	65
	66	value = 0;
	67	UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
	68
	69	return value;
0aa6a4a2 FB	70	}
0aa6a4a2 FB	71
d60efc6b	72	static CPUWriteMemoryFunc * const unin_write[] = {
0aa6a4a2 FB	73	&unin_writel,
	74	&unin_writel,
	75	&unin_writel,
	76	};
	77
d60efc6b	78	static CPUReadMemoryFunc * const unin_read[] = {
0aa6a4a2 FB	79	&unin_readl,
	80	&unin_readl,
	81	&unin_readl,
	82	};
	83
513f789f BS	84	static int fw_cfg_boot_set(void opaque, const char boot_device)
	85	{
	86	fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
	87	return 0;
	88	}
	89
3cbee15b	90	/* PowerPC Mac99 hardware initialisation */
c227f099	91	static void ppc_core99_init (ram_addr_t ram_size,
3023f332	92	const char *boot_device,
3cbee15b JM	93	const char *kernel_filename,
	94	const char *kernel_cmdline,
	95	const char *initrd_filename,
	96	const char *cpu_model)
64201201	97	{
aaed909a	98	CPUState env = NULL, envs[MAX_CPUS];
5cea8590	99	char *filename;
e9df014c	100	qemu_irq pic, *openpic_irqs;
aef445bd	101	int unin_memory;
d5295253	102	int linux_boot, i;
c227f099	103	ram_addr_t ram_offset, bios_offset, vga_bios_offset;
b6b8bd18	104	uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
46e50e9d	105	PCIBus *pci_bus;
3cbee15b JM	106	MacIONVRAMState *nvr;
3cbee15b JM	107	int nvram_mem_index;
d5295253	108	int vga_bios_size, bios_size;
d537cf6c	109	qemu_irq *dummy_irq;
7fa9ae1a	110	int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
28c5af54	111	int ppc_boot_device;
f455e98c	112	DriveInfo hd[MAX_IDE_BUS MAX_IDE_DEVS];
006f3a48	113	void *fw_cfg;
28ce5ce6	114	void *dbdma;
44654490	115	uint8_t *vga_bios_ptr;
46e50e9d	116
64201201 FB	117	linux_boot = (kernel_filename != NULL);
64201201 FB	118
c68ea704	119	/* init CPUs */
94fc95cd	120	if (cpu_model == NULL)
e6bd862b	121	cpu_model = "G4";
e9df014c	122	for (i = 0; i < smp_cpus; i++) {
aaed909a FB	123	env = cpu_init(cpu_model);
	124	if (!env) {
	125	fprintf(stderr, "Unable to find PowerPC CPU definition\n");
	126	exit(1);
	127	}
e9df014c JM	128	/* Set time-base frequency to 100 Mhz */
e9df014c JM	129	cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
3cbee15b	130	#if 0
e9df014c	131	env->osi_call = vga_osi_call;
3cbee15b	132	#endif
a08d4367	133	qemu_register_reset(&cpu_ppc_reset, env);
e9df014c JM	134	envs[i] = env;
e9df014c JM	135	}
c68ea704	136
64201201	137	/* allocate RAM */
864c136a BS	138	ram_offset = qemu_ram_alloc(ram_size);
	139	cpu_register_physical_memory(0, ram_size, ram_offset);
	140
64201201	141	/* allocate and load BIOS */
864c136a	142	bios_offset = qemu_ram_alloc(BIOS_SIZE);
1192dad8	143	if (bios_name == NULL)
006f3a48	144	bios_name = PROM_FILENAME;
5cea8590	145	filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
006f3a48 BS	146	cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset \| IO_MEM_ROM);
	147
	148	/* Load OpenBIOS (ELF) */
5cea8590	149	if (filename) {
ca20cf32 BS	150	bios_size = load_elf(filename, 0, NULL, NULL, NULL, 1, ELF_MACHINE, 0);
ca20cf32 BS	151
5cea8590 PB	152	qemu_free(filename);
	153	} else {
	154	bios_size = -1;
	155	}
d5295253	156	if (bios_size < 0 \|\| bios_size > BIOS_SIZE) {
5cea8590	157	hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
64201201 FB	158	exit(1);
64201201 FB	159	}
3b46e624	160
d5295253	161	/* allocate and load VGA BIOS */
864c136a	162	vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
44654490	163	vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
5cea8590 PB	164	filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
	165	if (filename) {
	166	vga_bios_size = load_image(filename, vga_bios_ptr + 8);
	167	qemu_free(filename);
	168	} else {
	169	vga_bios_size = -1;
	170	}
d5295253 FB	171	if (vga_bios_size < 0) {
d5295253 FB	172	/* if no bios is present, we can still work */
5cea8590 PB	173	fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
5cea8590 PB	174	VGABIOS_FILENAME);
d5295253 FB	175	vga_bios_size = 0;
	176	} else {
	177	/* set a specific header (XXX: find real Apple format for NDRV
	178	drivers) */
44654490 PB	179	vga_bios_ptr[0] = 'N';
	180	vga_bios_ptr[1] = 'D';
	181	vga_bios_ptr[2] = 'R';
	182	vga_bios_ptr[3] = 'V';
	183	cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
d5295253	184	vga_bios_size += 8;
a7b022e0 AG	185
	186	/* Round to page boundary */
	187	vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) &
	188	TARGET_PAGE_MASK;
d5295253	189	}
3b46e624	190
b6b8bd18	191	if (linux_boot) {
513f789f	192	uint64_t lowaddr = 0;
ca20cf32 BS	193	int bswap_needed;
	194
	195	#ifdef BSWAP_NEEDED
	196	bswap_needed = 1;
	197	#else
	198	bswap_needed = 0;
	199	#endif
b6b8bd18	200	kernel_base = KERNEL_LOAD_ADDR;
513f789f BS	201
	202	/* Now we can load the kernel. The first step tries to load the kernel
	203	supposing PhysAddr = 0x00000000. If that was wrong the kernel is
	204	loaded again, the new PhysAddr being computed from lowaddr. */
ca20cf32 BS	205	kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL,
ca20cf32 BS	206	1, ELF_MACHINE, 0);
513f789f BS	207	if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
513f789f BS	208	kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
ca20cf32	209	NULL, NULL, NULL, 1, ELF_MACHINE, 0);
513f789f BS	210	}
	211	if (kernel_size < 0)
	212	kernel_size = load_aout(kernel_filename, kernel_base,
ca20cf32 BS	213	ram_size - kernel_base, bswap_needed,
ca20cf32 BS	214	TARGET_PAGE_SIZE);
513f789f BS	215	if (kernel_size < 0)
	216	kernel_size = load_image_targphys(kernel_filename,
	217	kernel_base,
	218	ram_size - kernel_base);
b6b8bd18	219	if (kernel_size < 0) {
2ac71179	220	hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
b6b8bd18 FB	221	exit(1);
	222	}
	223	/* load initrd */
	224	if (initrd_filename) {
	225	initrd_base = INITRD_LOAD_ADDR;
44654490 PB	226	initrd_size = load_image_targphys(initrd_filename, initrd_base,
44654490 PB	227	ram_size - initrd_base);
b6b8bd18	228	if (initrd_size < 0) {
2ac71179 PB	229	hw_error("qemu: could not load initial ram disk '%s'\n",
2ac71179 PB	230	initrd_filename);
b6b8bd18 FB	231	exit(1);
	232	}
	233	} else {
	234	initrd_base = 0;
	235	initrd_size = 0;
	236	}
6ac0e82d	237	ppc_boot_device = 'm';
b6b8bd18 FB	238	} else {
	239	kernel_base = 0;
	240	kernel_size = 0;
	241	initrd_base = 0;
	242	initrd_size = 0;
28c5af54 JM	243	ppc_boot_device = '\0';
	244	/* We consider that NewWorld PowerMac never have any floppy drive
	245	* For now, OHW cannot boot from the network.
	246	*/
0d913fdb JM	247	for (i = 0; boot_device[i] != '\0'; i++) {
	248	if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
	249	ppc_boot_device = boot_device[i];
28c5af54	250	break;
0d913fdb	251	}
28c5af54 JM	252	}
	253	if (ppc_boot_device == '\0') {
	254	fprintf(stderr, "No valid boot device for Mac99 machine\n");
	255	exit(1);
	256	}
b6b8bd18	257	}
0aa6a4a2	258
3cbee15b	259	isa_mem_base = 0x80000000;
aef445bd	260
3cbee15b JM	261	/* Register 8 MB of ISA IO space */
3cbee15b JM	262	isa_mmio_init(0xf2000000, 0x00800000);
3b46e624	263
3cbee15b	264	/* UniN init */
1eed09cb	265	unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
3cbee15b	266	cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
47103572	267
3cbee15b JM	268	openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
	269	openpic_irqs[0] =
	270	qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
	271	for (i = 0; i < smp_cpus; i++) {
	272	/* Mac99 IRQ connection between OpenPIC outputs pins
	273	* and PowerPC input pins
	274	*/
	275	switch (PPC_INPUT(env)) {
	276	case PPC_FLAGS_INPUT_6xx:
	277	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	278	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	279	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	280	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	281	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	282	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	283	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
	284	/* Not connected ? */
	285	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	286	/* Check this */
	287	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	288	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
	289	break;
00af685f	290	#if defined(TARGET_PPC64)
3cbee15b JM	291	case PPC_FLAGS_INPUT_970:
	292	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	293	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	294	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	295	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	296	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	297	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	298	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
	299	/* Not connected ? */
	300	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	301	/* Check this */
	302	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	303	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
	304	break;
00af685f	305	#endif /* defined(TARGET_PPC64) */
3cbee15b	306	default:
2ac71179	307	hw_error("Bus model not supported on mac99 machine\n");
3cbee15b	308	exit(1);
0aa6a4a2	309	}
3cbee15b JM	310	}
	311	pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
	312	pci_bus = pci_pmac_init(pic);
	313	/* init basic PC hardware */
fbe1b595	314	pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
aae9366a	315
3cbee15b JM	316	/* XXX: suppress that */
	317	dummy_irq = i8259_init(NULL);
	318
aeeb69c7 AJ	319	escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
aeeb69c7 AJ	320	serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
cb457d76 AL	321
cb457d76 AL	322	for(i = 0; i < nb_nics; i++)
07caea31	323	pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
cb457d76	324
e4bcb14c TS	325	if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
	326	fprintf(stderr, "qemu: too many IDE bus\n");
	327	exit(1);
	328	}
	329	for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
f455e98c	330	hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
e4bcb14c	331	}
28ce5ce6	332	dbdma = DBDMA_init(&dbdma_mem_index);
77f0435e BS	333	pci_cmd646_ide_init(pci_bus, hd, 0);
77f0435e BS	334
3cbee15b JM	335	/* cuda also initialize ADB */
3cbee15b JM	336	cuda_init(&cuda_mem_index, pic[0x19]);
aae9366a	337
3cbee15b JM	338	adb_kbd_init(&adb_bus);
3cbee15b JM	339	adb_mouse_init(&adb_bus);
3b46e624	340
3b46e624	341
4ebcf884	342	macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
77f0435e	343	dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
4ebcf884	344	escc_mem_index);
0d92ed30 PB	345
0d92ed30 PB	346	if (usb_enabled) {
5b19d9a2	347	usb_ohci_init_pci(pci_bus, -1);
0d92ed30 PB	348	}
0d92ed30 PB	349
b6b8bd18 FB	350	if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
b6b8bd18 FB	351	graphic_depth = 15;
4f3f238b	352
3cbee15b	353	/* The NewWorld NVRAM is not located in the MacIO device */
68af3f24	354	nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
3cbee15b	355	pmac_format_nvram_partition(nvr, 0x2000);
74e91155	356	macio_nvram_map(nvr, 0xFFF04000);
b6b8bd18	357	/* No PCI init: the BIOS will do it */
0aa6a4a2	358
006f3a48 BS	359	fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
	360	fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
	361	fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
	362	fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
513f789f BS	363	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
	364	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
	365	if (kernel_cmdline) {
	366	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
3c178e72	367	pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
513f789f BS	368	} else {
	369	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
	370	}
	371	fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
	372	fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
	373	fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
10696b4f BS	374
	375	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
	376	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
	377	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
	378
513f789f	379	qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
aae9366a	380	}
0aa6a4a2	381
f80f9ec9	382	static QEMUMachine core99_machine = {
4b32e168 AL	383	.name = "mac99",
	384	.desc = "Mac99 based PowerMAC",
	385	.init = ppc_core99_init,
3d878caa	386	.max_cpus = MAX_CPUS,
0aa6a4a2	387	};
f80f9ec9 AL	388
	389	static void core99_machine_init(void)
	390	{
	391	qemu_register_machine(&core99_machine);
	392	}
	393
	394	machine_init(core99_machine_init);