1 <!-- HTML header for doxygen 1.8.20-->
2 <!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
3 <html xmlns="http://www.w3.org/1999/xhtml">
5 <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
6 <meta http-equiv="X-UA-Compatible" content="IE=9"/>
7 <meta name="generator" content="Doxygen 1.9.4"/>
8 <meta name="viewport" content="width=device-width, initial-scale=1"/>
9 <title>Raspberry Pi Pico SDK: i2c_hw_t Struct Reference</title>
10 <!-- <link href="tabs.css" rel="stylesheet" type="text/css"/> -->
11 <script type="text/javascript" src="jquery.js"></script>
12 <script type="text/javascript" src="dynsections.js"></script>
13 <link href="navtree.css" rel="stylesheet" type="text/css"/>
14 <script type="text/javascript" src="resize.js"></script>
15 <script type="text/javascript" src="navtreedata.js"></script>
16 <script type="text/javascript" src="navtree.js"></script>
17 <link href="search/search.css" rel="stylesheet" type="text/css"/>
18 <script type="text/javascript" src="search/searchdata.js"></script>
19 <script type="text/javascript" src="search/search.js"></script>
20 <link href="https://fonts.googleapis.com/css2?family=Roboto:wght@300;400;500&display=swap" rel="stylesheet">
21 <link href="doxygen.css" rel="stylesheet" type="text/css" />
22 <link href="normalise.css" rel="stylesheet" type="text/css"/>
23 <link href="main.css" rel="stylesheet" type="text/css"/>
24 <link href="styles.css" rel="stylesheet" type="text/css"/>
27 <div class="navigation-mobile">
28 <div class="logo--mobile">
29 <a href="/"><img src="logo-mobile.svg" alt="Raspberry Pi"></a>
31 <div class="navigation-toggle">
32 <span class="line-1"></span>
36 <span class="line-3"></span>
39 <div id="top"><!-- do not remove this div, it is closed by doxygen! -->
41 <a href="index.html"> <img src="logo.svg" alt="Raspberry Pi"></a>
42 <span style="display: inline-block; margin-top: 10px;">
46 <div class="navigation-footer">
47 <img src="logo-mobile.svg" alt="Raspberry Pi">
48 <a href="https://www.raspberrypi.com/" target="_blank">By Raspberry Pi Ltd</a>
50 <!-- <div class="search">
52 <input type="search" name="search" id="search" placeholder="Search">
53 <input type="submit" value="Search">
56 <!-- Generated by Doxygen 1.9.4 -->
57 <script type="text/javascript">
58 /* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&dn=expat.txt MIT */
59 var searchBox = new SearchBox("searchBox", "search",'Search','.html');
62 <script type="text/javascript" src="menudata.js"></script>
63 <script type="text/javascript" src="menu.js"></script>
64 <script type="text/javascript">
65 /* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&dn=expat.txt MIT */
67 initMenu('',true,false,'search.php','Search');
68 $(document).ready(function() { init_search(); });
72 <div id="main-nav"></div>
74 <div id="side-nav" class="ui-resizable side-nav-resizable">
76 <div id="nav-tree-contents">
77 <div id="nav-sync" class="sync"></div>
80 <div id="splitbar" style="-moz-user-select:none;"
81 class="ui-resizable-handle">
84 <script type="text/javascript">
85 /* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&dn=expat.txt MIT */
86 $(document).ready(function(){initNavTree('structi2c__hw__t.html',''); initResizable(); });
89 <div id="doc-content">
90 <!-- window showing the filter options -->
91 <div id="MSearchSelectWindow"
92 onmouseover="return searchBox.OnSearchSelectShow()"
93 onmouseout="return searchBox.OnSearchSelectHide()"
94 onkeydown="return searchBox.OnSearchSelectKey(event)">
97 <!-- iframe showing the search results (closed by default) -->
98 <div id="MSearchResultsWindow">
99 <iframe src="javascript:void(0)" frameborder="0"
100 name="MSearchResults" id="MSearchResults">
105 <div class="summary">
106 <a href="#pub-methods">Public Member Functions</a> |
107 <a href="#pub-attribs">Data Fields</a> </div>
108 <div class="headertitle"><div class="title">i2c_hw_t Struct Reference</div></div>
110 <div class="contents">
111 <table class="memberdecls">
112 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="pub-methods" name="pub-methods"></a>
113 Public Member Functions</h2></td></tr>
114 <tr class="memitem:a1cc72a3737ef0918484d978b1fcb2d09"><td class="memItemLeft" align="right" valign="top"><a id="a1cc72a3737ef0918484d978b1fcb2d09" name="a1cc72a3737ef0918484d978b1fcb2d09"></a>
115  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CON_OFFSET) io_rw_32 con</td></tr>
116 <tr class="separator:a1cc72a3737ef0918484d978b1fcb2d09"><td class="memSeparator" colspan="2"> </td></tr>
117 <tr class="memitem:a7d32d4f82fe4587718740ee6986732bb"><td class="memItemLeft" align="right" valign="top"><a id="a7d32d4f82fe4587718740ee6986732bb" name="a7d32d4f82fe4587718740ee6986732bb"></a>
118  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_TAR_OFFSET) io_rw_32 tar</td></tr>
119 <tr class="separator:a7d32d4f82fe4587718740ee6986732bb"><td class="memSeparator" colspan="2"> </td></tr>
120 <tr class="memitem:a3a45ff62515114b46c529c4415afefe2"><td class="memItemLeft" align="right" valign="top"><a id="a3a45ff62515114b46c529c4415afefe2" name="a3a45ff62515114b46c529c4415afefe2"></a>
121  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SAR_OFFSET) io_rw_32 sar</td></tr>
122 <tr class="separator:a3a45ff62515114b46c529c4415afefe2"><td class="memSeparator" colspan="2"> </td></tr>
123 <tr class="memitem:a817258cdba6f6d110072950796bd649b"><td class="memItemLeft" align="right" valign="top"><a id="a817258cdba6f6d110072950796bd649b" name="a817258cdba6f6d110072950796bd649b"></a>
124  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_DATA_CMD_OFFSET) io_rw_32 data_cmd</td></tr>
125 <tr class="separator:a817258cdba6f6d110072950796bd649b"><td class="memSeparator" colspan="2"> </td></tr>
126 <tr class="memitem:a43401d40883b58dda8a4f805f823a7ec"><td class="memItemLeft" align="right" valign="top"><a id="a43401d40883b58dda8a4f805f823a7ec" name="a43401d40883b58dda8a4f805f823a7ec"></a>
127  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SS_SCL_HCNT_OFFSET) io_rw_32 ss_scl_hcnt</td></tr>
128 <tr class="separator:a43401d40883b58dda8a4f805f823a7ec"><td class="memSeparator" colspan="2"> </td></tr>
129 <tr class="memitem:a7c2444903176ca70b2c4b657539c8c12"><td class="memItemLeft" align="right" valign="top"><a id="a7c2444903176ca70b2c4b657539c8c12" name="a7c2444903176ca70b2c4b657539c8c12"></a>
130  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SS_SCL_LCNT_OFFSET) io_rw_32 ss_scl_lcnt</td></tr>
131 <tr class="separator:a7c2444903176ca70b2c4b657539c8c12"><td class="memSeparator" colspan="2"> </td></tr>
132 <tr class="memitem:ae7c3e40468f70058504bd3d0951ef945"><td class="memItemLeft" align="right" valign="top"><a id="ae7c3e40468f70058504bd3d0951ef945" name="ae7c3e40468f70058504bd3d0951ef945"></a>
133  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_FS_SCL_HCNT_OFFSET) io_rw_32 fs_scl_hcnt</td></tr>
134 <tr class="separator:ae7c3e40468f70058504bd3d0951ef945"><td class="memSeparator" colspan="2"> </td></tr>
135 <tr class="memitem:aacb75a564b4411677027396411d9c24e"><td class="memItemLeft" align="right" valign="top"><a id="aacb75a564b4411677027396411d9c24e" name="aacb75a564b4411677027396411d9c24e"></a>
136  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_FS_SCL_LCNT_OFFSET) io_rw_32 fs_scl_lcnt</td></tr>
137 <tr class="separator:aacb75a564b4411677027396411d9c24e"><td class="memSeparator" colspan="2"> </td></tr>
138 <tr class="memitem:a83878573c3fbfdec120021dc6960229c"><td class="memItemLeft" align="right" valign="top"><a id="a83878573c3fbfdec120021dc6960229c" name="a83878573c3fbfdec120021dc6960229c"></a>
139  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_INTR_STAT_OFFSET) io_ro_32 intr_stat</td></tr>
140 <tr class="separator:a83878573c3fbfdec120021dc6960229c"><td class="memSeparator" colspan="2"> </td></tr>
141 <tr class="memitem:a2422e58ab67040b55385eee8563c4126"><td class="memItemLeft" align="right" valign="top"><a id="a2422e58ab67040b55385eee8563c4126" name="a2422e58ab67040b55385eee8563c4126"></a>
142  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_INTR_MASK_OFFSET) io_rw_32 intr_mask</td></tr>
143 <tr class="separator:a2422e58ab67040b55385eee8563c4126"><td class="memSeparator" colspan="2"> </td></tr>
144 <tr class="memitem:a94818f18df7569c74307cfb7169eebd9"><td class="memItemLeft" align="right" valign="top"><a id="a94818f18df7569c74307cfb7169eebd9" name="a94818f18df7569c74307cfb7169eebd9"></a>
145  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_RAW_INTR_STAT_OFFSET) io_ro_32 raw_intr_stat</td></tr>
146 <tr class="separator:a94818f18df7569c74307cfb7169eebd9"><td class="memSeparator" colspan="2"> </td></tr>
147 <tr class="memitem:a40e4a288bb0bb38ad3a110e0e8bbf19b"><td class="memItemLeft" align="right" valign="top"><a id="a40e4a288bb0bb38ad3a110e0e8bbf19b" name="a40e4a288bb0bb38ad3a110e0e8bbf19b"></a>
148  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_RX_TL_OFFSET) io_rw_32 rx_tl</td></tr>
149 <tr class="separator:a40e4a288bb0bb38ad3a110e0e8bbf19b"><td class="memSeparator" colspan="2"> </td></tr>
150 <tr class="memitem:a2934e0059fabf2ea99d13e9417a4ab1e"><td class="memItemLeft" align="right" valign="top"><a id="a2934e0059fabf2ea99d13e9417a4ab1e" name="a2934e0059fabf2ea99d13e9417a4ab1e"></a>
151  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_TX_TL_OFFSET) io_rw_32 tx_tl</td></tr>
152 <tr class="separator:a2934e0059fabf2ea99d13e9417a4ab1e"><td class="memSeparator" colspan="2"> </td></tr>
153 <tr class="memitem:adfbdf7979b5eaea782b8a985a4141391"><td class="memItemLeft" align="right" valign="top"><a id="adfbdf7979b5eaea782b8a985a4141391" name="adfbdf7979b5eaea782b8a985a4141391"></a>
154  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_INTR_OFFSET) io_ro_32 clr_intr</td></tr>
155 <tr class="separator:adfbdf7979b5eaea782b8a985a4141391"><td class="memSeparator" colspan="2"> </td></tr>
156 <tr class="memitem:ad163145760c0dd2fafcbf7f7a6b88237"><td class="memItemLeft" align="right" valign="top"><a id="ad163145760c0dd2fafcbf7f7a6b88237" name="ad163145760c0dd2fafcbf7f7a6b88237"></a>
157  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_RX_UNDER_OFFSET) io_ro_32 clr_rx_under</td></tr>
158 <tr class="separator:ad163145760c0dd2fafcbf7f7a6b88237"><td class="memSeparator" colspan="2"> </td></tr>
159 <tr class="memitem:a3f1f9feac5e8b1ec4e91f9c02fc42b6e"><td class="memItemLeft" align="right" valign="top"><a id="a3f1f9feac5e8b1ec4e91f9c02fc42b6e" name="a3f1f9feac5e8b1ec4e91f9c02fc42b6e"></a>
160  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_RX_OVER_OFFSET) io_ro_32 clr_rx_over</td></tr>
161 <tr class="separator:a3f1f9feac5e8b1ec4e91f9c02fc42b6e"><td class="memSeparator" colspan="2"> </td></tr>
162 <tr class="memitem:acd304e36cebd9b9587414e560cb45649"><td class="memItemLeft" align="right" valign="top"><a id="acd304e36cebd9b9587414e560cb45649" name="acd304e36cebd9b9587414e560cb45649"></a>
163  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_TX_OVER_OFFSET) io_ro_32 clr_tx_over</td></tr>
164 <tr class="separator:acd304e36cebd9b9587414e560cb45649"><td class="memSeparator" colspan="2"> </td></tr>
165 <tr class="memitem:a3b7cd220954a4da3939b29e28b15f7b1"><td class="memItemLeft" align="right" valign="top"><a id="a3b7cd220954a4da3939b29e28b15f7b1" name="a3b7cd220954a4da3939b29e28b15f7b1"></a>
166  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_RD_REQ_OFFSET) io_ro_32 clr_rd_req</td></tr>
167 <tr class="separator:a3b7cd220954a4da3939b29e28b15f7b1"><td class="memSeparator" colspan="2"> </td></tr>
168 <tr class="memitem:aa76e65572def0881e7262422e1b6cea4"><td class="memItemLeft" align="right" valign="top"><a id="aa76e65572def0881e7262422e1b6cea4" name="aa76e65572def0881e7262422e1b6cea4"></a>
169  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_TX_ABRT_OFFSET) io_ro_32 clr_tx_abrt</td></tr>
170 <tr class="separator:aa76e65572def0881e7262422e1b6cea4"><td class="memSeparator" colspan="2"> </td></tr>
171 <tr class="memitem:a0bec2de84b61ed8d5c620baed3c394ae"><td class="memItemLeft" align="right" valign="top"><a id="a0bec2de84b61ed8d5c620baed3c394ae" name="a0bec2de84b61ed8d5c620baed3c394ae"></a>
172  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_RX_DONE_OFFSET) io_ro_32 clr_rx_done</td></tr>
173 <tr class="separator:a0bec2de84b61ed8d5c620baed3c394ae"><td class="memSeparator" colspan="2"> </td></tr>
174 <tr class="memitem:aeb9c7fb477bb5f9c6571e3ef1e6951b3"><td class="memItemLeft" align="right" valign="top"><a id="aeb9c7fb477bb5f9c6571e3ef1e6951b3" name="aeb9c7fb477bb5f9c6571e3ef1e6951b3"></a>
175  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_ACTIVITY_OFFSET) io_ro_32 clr_activity</td></tr>
176 <tr class="separator:aeb9c7fb477bb5f9c6571e3ef1e6951b3"><td class="memSeparator" colspan="2"> </td></tr>
177 <tr class="memitem:a901f28c43ab08af573b66c294d62ede1"><td class="memItemLeft" align="right" valign="top"><a id="a901f28c43ab08af573b66c294d62ede1" name="a901f28c43ab08af573b66c294d62ede1"></a>
178  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_STOP_DET_OFFSET) io_ro_32 clr_stop_det</td></tr>
179 <tr class="separator:a901f28c43ab08af573b66c294d62ede1"><td class="memSeparator" colspan="2"> </td></tr>
180 <tr class="memitem:a10fc84d602b407d1ecb736cd7010f7f2"><td class="memItemLeft" align="right" valign="top"><a id="a10fc84d602b407d1ecb736cd7010f7f2" name="a10fc84d602b407d1ecb736cd7010f7f2"></a>
181  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_START_DET_OFFSET) io_ro_32 clr_start_det</td></tr>
182 <tr class="separator:a10fc84d602b407d1ecb736cd7010f7f2"><td class="memSeparator" colspan="2"> </td></tr>
183 <tr class="memitem:ae7d770b8cc6231a8944720c7062e466e"><td class="memItemLeft" align="right" valign="top"><a id="ae7d770b8cc6231a8944720c7062e466e" name="ae7d770b8cc6231a8944720c7062e466e"></a>
184  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_GEN_CALL_OFFSET) io_ro_32 clr_gen_call</td></tr>
185 <tr class="separator:ae7d770b8cc6231a8944720c7062e466e"><td class="memSeparator" colspan="2"> </td></tr>
186 <tr class="memitem:af7a06d25c45c183f6d38bff87d372ee8"><td class="memItemLeft" align="right" valign="top"><a id="af7a06d25c45c183f6d38bff87d372ee8" name="af7a06d25c45c183f6d38bff87d372ee8"></a>
187  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_ENABLE_OFFSET) io_rw_32 enable</td></tr>
188 <tr class="separator:af7a06d25c45c183f6d38bff87d372ee8"><td class="memSeparator" colspan="2"> </td></tr>
189 <tr class="memitem:a02dfc56ff80c84c937ced93792f746a6"><td class="memItemLeft" align="right" valign="top"><a id="a02dfc56ff80c84c937ced93792f746a6" name="a02dfc56ff80c84c937ced93792f746a6"></a>
190  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_STATUS_OFFSET) io_ro_32 status</td></tr>
191 <tr class="separator:a02dfc56ff80c84c937ced93792f746a6"><td class="memSeparator" colspan="2"> </td></tr>
192 <tr class="memitem:a673c4616f8a25b37858fb20211d160d7"><td class="memItemLeft" align="right" valign="top"><a id="a673c4616f8a25b37858fb20211d160d7" name="a673c4616f8a25b37858fb20211d160d7"></a>
193  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_TXFLR_OFFSET) io_ro_32 txflr</td></tr>
194 <tr class="separator:a673c4616f8a25b37858fb20211d160d7"><td class="memSeparator" colspan="2"> </td></tr>
195 <tr class="memitem:ad3b0506c99f5dae90ee20669c3d6991b"><td class="memItemLeft" align="right" valign="top"><a id="ad3b0506c99f5dae90ee20669c3d6991b" name="ad3b0506c99f5dae90ee20669c3d6991b"></a>
196  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_RXFLR_OFFSET) io_ro_32 rxflr</td></tr>
197 <tr class="separator:ad3b0506c99f5dae90ee20669c3d6991b"><td class="memSeparator" colspan="2"> </td></tr>
198 <tr class="memitem:ab3157770afce237bb7f8f66ceabf5ab1"><td class="memItemLeft" align="right" valign="top"><a id="ab3157770afce237bb7f8f66ceabf5ab1" name="ab3157770afce237bb7f8f66ceabf5ab1"></a>
199  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SDA_HOLD_OFFSET) io_rw_32 sda_hold</td></tr>
200 <tr class="separator:ab3157770afce237bb7f8f66ceabf5ab1"><td class="memSeparator" colspan="2"> </td></tr>
201 <tr class="memitem:a78fd2d8ecefd278263258fb374967e19"><td class="memItemLeft" align="right" valign="top"><a id="a78fd2d8ecefd278263258fb374967e19" name="a78fd2d8ecefd278263258fb374967e19"></a>
202  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_TX_ABRT_SOURCE_OFFSET) io_ro_32 tx_abrt_source</td></tr>
203 <tr class="separator:a78fd2d8ecefd278263258fb374967e19"><td class="memSeparator" colspan="2"> </td></tr>
204 <tr class="memitem:aec03edeea3a8c5a400c887041d8c87c5"><td class="memItemLeft" align="right" valign="top"><a id="aec03edeea3a8c5a400c887041d8c87c5" name="aec03edeea3a8c5a400c887041d8c87c5"></a>
205  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SLV_DATA_NACK_ONLY_OFFSET) io_rw_32 slv_data_nack_only</td></tr>
206 <tr class="separator:aec03edeea3a8c5a400c887041d8c87c5"><td class="memSeparator" colspan="2"> </td></tr>
207 <tr class="memitem:af7e8845b1f8e919deaa10f7c2a731c4c"><td class="memItemLeft" align="right" valign="top"><a id="af7e8845b1f8e919deaa10f7c2a731c4c" name="af7e8845b1f8e919deaa10f7c2a731c4c"></a>
208  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_DMA_CR_OFFSET) io_rw_32 dma_cr</td></tr>
209 <tr class="separator:af7e8845b1f8e919deaa10f7c2a731c4c"><td class="memSeparator" colspan="2"> </td></tr>
210 <tr class="memitem:a1f59481358f42d9a10c1511528ed757b"><td class="memItemLeft" align="right" valign="top"><a id="a1f59481358f42d9a10c1511528ed757b" name="a1f59481358f42d9a10c1511528ed757b"></a>
211  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_DMA_TDLR_OFFSET) io_rw_32 dma_tdlr</td></tr>
212 <tr class="separator:a1f59481358f42d9a10c1511528ed757b"><td class="memSeparator" colspan="2"> </td></tr>
213 <tr class="memitem:a80cb0a8cb3fa653f7d723f129a2412c5"><td class="memItemLeft" align="right" valign="top"><a id="a80cb0a8cb3fa653f7d723f129a2412c5" name="a80cb0a8cb3fa653f7d723f129a2412c5"></a>
214  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_DMA_RDLR_OFFSET) io_rw_32 dma_rdlr</td></tr>
215 <tr class="separator:a80cb0a8cb3fa653f7d723f129a2412c5"><td class="memSeparator" colspan="2"> </td></tr>
216 <tr class="memitem:a7607e403e2ea4bfc5907fccca7dacde2"><td class="memItemLeft" align="right" valign="top"><a id="a7607e403e2ea4bfc5907fccca7dacde2" name="a7607e403e2ea4bfc5907fccca7dacde2"></a>
217  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SDA_SETUP_OFFSET) io_rw_32 sda_setup</td></tr>
218 <tr class="separator:a7607e403e2ea4bfc5907fccca7dacde2"><td class="memSeparator" colspan="2"> </td></tr>
219 <tr class="memitem:ab611875d43e747db7da24f1d643677d3"><td class="memItemLeft" align="right" valign="top"><a id="ab611875d43e747db7da24f1d643677d3" name="ab611875d43e747db7da24f1d643677d3"></a>
220  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_ACK_GENERAL_CALL_OFFSET) io_rw_32 ack_general_call</td></tr>
221 <tr class="separator:ab611875d43e747db7da24f1d643677d3"><td class="memSeparator" colspan="2"> </td></tr>
222 <tr class="memitem:a336024d9ffa41dd73d79d9f67c84dfe9"><td class="memItemLeft" align="right" valign="top"><a id="a336024d9ffa41dd73d79d9f67c84dfe9" name="a336024d9ffa41dd73d79d9f67c84dfe9"></a>
223  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_ENABLE_STATUS_OFFSET) io_ro_32 enable_status</td></tr>
224 <tr class="separator:a336024d9ffa41dd73d79d9f67c84dfe9"><td class="memSeparator" colspan="2"> </td></tr>
225 <tr class="memitem:a63815cd0bf3ac284e042b7446dd9e6d7"><td class="memItemLeft" align="right" valign="top"><a id="a63815cd0bf3ac284e042b7446dd9e6d7" name="a63815cd0bf3ac284e042b7446dd9e6d7"></a>
226  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_FS_SPKLEN_OFFSET) io_rw_32 fs_spklen</td></tr>
227 <tr class="separator:a63815cd0bf3ac284e042b7446dd9e6d7"><td class="memSeparator" colspan="2"> </td></tr>
228 <tr class="memitem:a390370cd343cec01572cf225693b8573"><td class="memItemLeft" align="right" valign="top"><a id="a390370cd343cec01572cf225693b8573" name="a390370cd343cec01572cf225693b8573"></a>
229  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_RESTART_DET_OFFSET) io_ro_32 clr_restart_det</td></tr>
230 <tr class="separator:a390370cd343cec01572cf225693b8573"><td class="memSeparator" colspan="2"> </td></tr>
231 <tr class="memitem:a100d6b930ef48b90961cf6d4cc9e5079"><td class="memItemLeft" align="right" valign="top"><a id="a100d6b930ef48b90961cf6d4cc9e5079" name="a100d6b930ef48b90961cf6d4cc9e5079"></a>
232  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_COMP_PARAM_1_OFFSET) io_ro_32 comp_param_1</td></tr>
233 <tr class="separator:a100d6b930ef48b90961cf6d4cc9e5079"><td class="memSeparator" colspan="2"> </td></tr>
234 <tr class="memitem:a4e417ff4cf68ce7da6478043cf2a2550"><td class="memItemLeft" align="right" valign="top"><a id="a4e417ff4cf68ce7da6478043cf2a2550" name="a4e417ff4cf68ce7da6478043cf2a2550"></a>
235  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_COMP_VERSION_OFFSET) io_ro_32 comp_version</td></tr>
236 <tr class="separator:a4e417ff4cf68ce7da6478043cf2a2550"><td class="memSeparator" colspan="2"> </td></tr>
237 <tr class="memitem:ab49121630d916d020066724472abca9e"><td class="memItemLeft" align="right" valign="top"><a id="ab49121630d916d020066724472abca9e" name="ab49121630d916d020066724472abca9e"></a>
238  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_COMP_TYPE_OFFSET) io_ro_32 comp_type</td></tr>
239 <tr class="separator:ab49121630d916d020066724472abca9e"><td class="memSeparator" colspan="2"> </td></tr>
240 <tr class="memitem:a1cc72a3737ef0918484d978b1fcb2d09"><td class="memItemLeft" align="right" valign="top"><a id="a1cc72a3737ef0918484d978b1fcb2d09" name="a1cc72a3737ef0918484d978b1fcb2d09"></a>
241  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CON_OFFSET) io_rw_32 con</td></tr>
242 <tr class="separator:a1cc72a3737ef0918484d978b1fcb2d09"><td class="memSeparator" colspan="2"> </td></tr>
243 <tr class="memitem:a7d32d4f82fe4587718740ee6986732bb"><td class="memItemLeft" align="right" valign="top"><a id="a7d32d4f82fe4587718740ee6986732bb" name="a7d32d4f82fe4587718740ee6986732bb"></a>
244  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_TAR_OFFSET) io_rw_32 tar</td></tr>
245 <tr class="separator:a7d32d4f82fe4587718740ee6986732bb"><td class="memSeparator" colspan="2"> </td></tr>
246 <tr class="memitem:a3a45ff62515114b46c529c4415afefe2"><td class="memItemLeft" align="right" valign="top"><a id="a3a45ff62515114b46c529c4415afefe2" name="a3a45ff62515114b46c529c4415afefe2"></a>
247  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SAR_OFFSET) io_rw_32 sar</td></tr>
248 <tr class="separator:a3a45ff62515114b46c529c4415afefe2"><td class="memSeparator" colspan="2"> </td></tr>
249 <tr class="memitem:a817258cdba6f6d110072950796bd649b"><td class="memItemLeft" align="right" valign="top"><a id="a817258cdba6f6d110072950796bd649b" name="a817258cdba6f6d110072950796bd649b"></a>
250  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_DATA_CMD_OFFSET) io_rw_32 data_cmd</td></tr>
251 <tr class="separator:a817258cdba6f6d110072950796bd649b"><td class="memSeparator" colspan="2"> </td></tr>
252 <tr class="memitem:a43401d40883b58dda8a4f805f823a7ec"><td class="memItemLeft" align="right" valign="top"><a id="a43401d40883b58dda8a4f805f823a7ec" name="a43401d40883b58dda8a4f805f823a7ec"></a>
253  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SS_SCL_HCNT_OFFSET) io_rw_32 ss_scl_hcnt</td></tr>
254 <tr class="separator:a43401d40883b58dda8a4f805f823a7ec"><td class="memSeparator" colspan="2"> </td></tr>
255 <tr class="memitem:a7c2444903176ca70b2c4b657539c8c12"><td class="memItemLeft" align="right" valign="top"><a id="a7c2444903176ca70b2c4b657539c8c12" name="a7c2444903176ca70b2c4b657539c8c12"></a>
256  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SS_SCL_LCNT_OFFSET) io_rw_32 ss_scl_lcnt</td></tr>
257 <tr class="separator:a7c2444903176ca70b2c4b657539c8c12"><td class="memSeparator" colspan="2"> </td></tr>
258 <tr class="memitem:ae7c3e40468f70058504bd3d0951ef945"><td class="memItemLeft" align="right" valign="top"><a id="ae7c3e40468f70058504bd3d0951ef945" name="ae7c3e40468f70058504bd3d0951ef945"></a>
259  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_FS_SCL_HCNT_OFFSET) io_rw_32 fs_scl_hcnt</td></tr>
260 <tr class="separator:ae7c3e40468f70058504bd3d0951ef945"><td class="memSeparator" colspan="2"> </td></tr>
261 <tr class="memitem:aacb75a564b4411677027396411d9c24e"><td class="memItemLeft" align="right" valign="top"><a id="aacb75a564b4411677027396411d9c24e" name="aacb75a564b4411677027396411d9c24e"></a>
262  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_FS_SCL_LCNT_OFFSET) io_rw_32 fs_scl_lcnt</td></tr>
263 <tr class="separator:aacb75a564b4411677027396411d9c24e"><td class="memSeparator" colspan="2"> </td></tr>
264 <tr class="memitem:a83878573c3fbfdec120021dc6960229c"><td class="memItemLeft" align="right" valign="top"><a id="a83878573c3fbfdec120021dc6960229c" name="a83878573c3fbfdec120021dc6960229c"></a>
265  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_INTR_STAT_OFFSET) io_ro_32 intr_stat</td></tr>
266 <tr class="separator:a83878573c3fbfdec120021dc6960229c"><td class="memSeparator" colspan="2"> </td></tr>
267 <tr class="memitem:a2422e58ab67040b55385eee8563c4126"><td class="memItemLeft" align="right" valign="top"><a id="a2422e58ab67040b55385eee8563c4126" name="a2422e58ab67040b55385eee8563c4126"></a>
268  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_INTR_MASK_OFFSET) io_rw_32 intr_mask</td></tr>
269 <tr class="separator:a2422e58ab67040b55385eee8563c4126"><td class="memSeparator" colspan="2"> </td></tr>
270 <tr class="memitem:a94818f18df7569c74307cfb7169eebd9"><td class="memItemLeft" align="right" valign="top"><a id="a94818f18df7569c74307cfb7169eebd9" name="a94818f18df7569c74307cfb7169eebd9"></a>
271  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_RAW_INTR_STAT_OFFSET) io_ro_32 raw_intr_stat</td></tr>
272 <tr class="separator:a94818f18df7569c74307cfb7169eebd9"><td class="memSeparator" colspan="2"> </td></tr>
273 <tr class="memitem:a40e4a288bb0bb38ad3a110e0e8bbf19b"><td class="memItemLeft" align="right" valign="top"><a id="a40e4a288bb0bb38ad3a110e0e8bbf19b" name="a40e4a288bb0bb38ad3a110e0e8bbf19b"></a>
274  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_RX_TL_OFFSET) io_rw_32 rx_tl</td></tr>
275 <tr class="separator:a40e4a288bb0bb38ad3a110e0e8bbf19b"><td class="memSeparator" colspan="2"> </td></tr>
276 <tr class="memitem:a2934e0059fabf2ea99d13e9417a4ab1e"><td class="memItemLeft" align="right" valign="top"><a id="a2934e0059fabf2ea99d13e9417a4ab1e" name="a2934e0059fabf2ea99d13e9417a4ab1e"></a>
277  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_TX_TL_OFFSET) io_rw_32 tx_tl</td></tr>
278 <tr class="separator:a2934e0059fabf2ea99d13e9417a4ab1e"><td class="memSeparator" colspan="2"> </td></tr>
279 <tr class="memitem:adfbdf7979b5eaea782b8a985a4141391"><td class="memItemLeft" align="right" valign="top"><a id="adfbdf7979b5eaea782b8a985a4141391" name="adfbdf7979b5eaea782b8a985a4141391"></a>
280  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_INTR_OFFSET) io_ro_32 clr_intr</td></tr>
281 <tr class="separator:adfbdf7979b5eaea782b8a985a4141391"><td class="memSeparator" colspan="2"> </td></tr>
282 <tr class="memitem:ad163145760c0dd2fafcbf7f7a6b88237"><td class="memItemLeft" align="right" valign="top"><a id="ad163145760c0dd2fafcbf7f7a6b88237" name="ad163145760c0dd2fafcbf7f7a6b88237"></a>
283  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_RX_UNDER_OFFSET) io_ro_32 clr_rx_under</td></tr>
284 <tr class="separator:ad163145760c0dd2fafcbf7f7a6b88237"><td class="memSeparator" colspan="2"> </td></tr>
285 <tr class="memitem:a3f1f9feac5e8b1ec4e91f9c02fc42b6e"><td class="memItemLeft" align="right" valign="top"><a id="a3f1f9feac5e8b1ec4e91f9c02fc42b6e" name="a3f1f9feac5e8b1ec4e91f9c02fc42b6e"></a>
286  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_RX_OVER_OFFSET) io_ro_32 clr_rx_over</td></tr>
287 <tr class="separator:a3f1f9feac5e8b1ec4e91f9c02fc42b6e"><td class="memSeparator" colspan="2"> </td></tr>
288 <tr class="memitem:acd304e36cebd9b9587414e560cb45649"><td class="memItemLeft" align="right" valign="top"><a id="acd304e36cebd9b9587414e560cb45649" name="acd304e36cebd9b9587414e560cb45649"></a>
289  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_TX_OVER_OFFSET) io_ro_32 clr_tx_over</td></tr>
290 <tr class="separator:acd304e36cebd9b9587414e560cb45649"><td class="memSeparator" colspan="2"> </td></tr>
291 <tr class="memitem:a3b7cd220954a4da3939b29e28b15f7b1"><td class="memItemLeft" align="right" valign="top"><a id="a3b7cd220954a4da3939b29e28b15f7b1" name="a3b7cd220954a4da3939b29e28b15f7b1"></a>
292  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_RD_REQ_OFFSET) io_ro_32 clr_rd_req</td></tr>
293 <tr class="separator:a3b7cd220954a4da3939b29e28b15f7b1"><td class="memSeparator" colspan="2"> </td></tr>
294 <tr class="memitem:aa76e65572def0881e7262422e1b6cea4"><td class="memItemLeft" align="right" valign="top"><a id="aa76e65572def0881e7262422e1b6cea4" name="aa76e65572def0881e7262422e1b6cea4"></a>
295  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_TX_ABRT_OFFSET) io_ro_32 clr_tx_abrt</td></tr>
296 <tr class="separator:aa76e65572def0881e7262422e1b6cea4"><td class="memSeparator" colspan="2"> </td></tr>
297 <tr class="memitem:a0bec2de84b61ed8d5c620baed3c394ae"><td class="memItemLeft" align="right" valign="top"><a id="a0bec2de84b61ed8d5c620baed3c394ae" name="a0bec2de84b61ed8d5c620baed3c394ae"></a>
298  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_RX_DONE_OFFSET) io_ro_32 clr_rx_done</td></tr>
299 <tr class="separator:a0bec2de84b61ed8d5c620baed3c394ae"><td class="memSeparator" colspan="2"> </td></tr>
300 <tr class="memitem:aeb9c7fb477bb5f9c6571e3ef1e6951b3"><td class="memItemLeft" align="right" valign="top"><a id="aeb9c7fb477bb5f9c6571e3ef1e6951b3" name="aeb9c7fb477bb5f9c6571e3ef1e6951b3"></a>
301  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_ACTIVITY_OFFSET) io_ro_32 clr_activity</td></tr>
302 <tr class="separator:aeb9c7fb477bb5f9c6571e3ef1e6951b3"><td class="memSeparator" colspan="2"> </td></tr>
303 <tr class="memitem:a901f28c43ab08af573b66c294d62ede1"><td class="memItemLeft" align="right" valign="top"><a id="a901f28c43ab08af573b66c294d62ede1" name="a901f28c43ab08af573b66c294d62ede1"></a>
304  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_STOP_DET_OFFSET) io_ro_32 clr_stop_det</td></tr>
305 <tr class="separator:a901f28c43ab08af573b66c294d62ede1"><td class="memSeparator" colspan="2"> </td></tr>
306 <tr class="memitem:a10fc84d602b407d1ecb736cd7010f7f2"><td class="memItemLeft" align="right" valign="top"><a id="a10fc84d602b407d1ecb736cd7010f7f2" name="a10fc84d602b407d1ecb736cd7010f7f2"></a>
307  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_START_DET_OFFSET) io_ro_32 clr_start_det</td></tr>
308 <tr class="separator:a10fc84d602b407d1ecb736cd7010f7f2"><td class="memSeparator" colspan="2"> </td></tr>
309 <tr class="memitem:ae7d770b8cc6231a8944720c7062e466e"><td class="memItemLeft" align="right" valign="top"><a id="ae7d770b8cc6231a8944720c7062e466e" name="ae7d770b8cc6231a8944720c7062e466e"></a>
310  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_GEN_CALL_OFFSET) io_ro_32 clr_gen_call</td></tr>
311 <tr class="separator:ae7d770b8cc6231a8944720c7062e466e"><td class="memSeparator" colspan="2"> </td></tr>
312 <tr class="memitem:af7a06d25c45c183f6d38bff87d372ee8"><td class="memItemLeft" align="right" valign="top"><a id="af7a06d25c45c183f6d38bff87d372ee8" name="af7a06d25c45c183f6d38bff87d372ee8"></a>
313  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_ENABLE_OFFSET) io_rw_32 enable</td></tr>
314 <tr class="separator:af7a06d25c45c183f6d38bff87d372ee8"><td class="memSeparator" colspan="2"> </td></tr>
315 <tr class="memitem:a02dfc56ff80c84c937ced93792f746a6"><td class="memItemLeft" align="right" valign="top"><a id="a02dfc56ff80c84c937ced93792f746a6" name="a02dfc56ff80c84c937ced93792f746a6"></a>
316  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_STATUS_OFFSET) io_ro_32 status</td></tr>
317 <tr class="separator:a02dfc56ff80c84c937ced93792f746a6"><td class="memSeparator" colspan="2"> </td></tr>
318 <tr class="memitem:a673c4616f8a25b37858fb20211d160d7"><td class="memItemLeft" align="right" valign="top"><a id="a673c4616f8a25b37858fb20211d160d7" name="a673c4616f8a25b37858fb20211d160d7"></a>
319  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_TXFLR_OFFSET) io_ro_32 txflr</td></tr>
320 <tr class="separator:a673c4616f8a25b37858fb20211d160d7"><td class="memSeparator" colspan="2"> </td></tr>
321 <tr class="memitem:ad3b0506c99f5dae90ee20669c3d6991b"><td class="memItemLeft" align="right" valign="top"><a id="ad3b0506c99f5dae90ee20669c3d6991b" name="ad3b0506c99f5dae90ee20669c3d6991b"></a>
322  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_RXFLR_OFFSET) io_ro_32 rxflr</td></tr>
323 <tr class="separator:ad3b0506c99f5dae90ee20669c3d6991b"><td class="memSeparator" colspan="2"> </td></tr>
324 <tr class="memitem:ab3157770afce237bb7f8f66ceabf5ab1"><td class="memItemLeft" align="right" valign="top"><a id="ab3157770afce237bb7f8f66ceabf5ab1" name="ab3157770afce237bb7f8f66ceabf5ab1"></a>
325  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SDA_HOLD_OFFSET) io_rw_32 sda_hold</td></tr>
326 <tr class="separator:ab3157770afce237bb7f8f66ceabf5ab1"><td class="memSeparator" colspan="2"> </td></tr>
327 <tr class="memitem:a78fd2d8ecefd278263258fb374967e19"><td class="memItemLeft" align="right" valign="top"><a id="a78fd2d8ecefd278263258fb374967e19" name="a78fd2d8ecefd278263258fb374967e19"></a>
328  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_TX_ABRT_SOURCE_OFFSET) io_ro_32 tx_abrt_source</td></tr>
329 <tr class="separator:a78fd2d8ecefd278263258fb374967e19"><td class="memSeparator" colspan="2"> </td></tr>
330 <tr class="memitem:aec03edeea3a8c5a400c887041d8c87c5"><td class="memItemLeft" align="right" valign="top"><a id="aec03edeea3a8c5a400c887041d8c87c5" name="aec03edeea3a8c5a400c887041d8c87c5"></a>
331  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SLV_DATA_NACK_ONLY_OFFSET) io_rw_32 slv_data_nack_only</td></tr>
332 <tr class="separator:aec03edeea3a8c5a400c887041d8c87c5"><td class="memSeparator" colspan="2"> </td></tr>
333 <tr class="memitem:af7e8845b1f8e919deaa10f7c2a731c4c"><td class="memItemLeft" align="right" valign="top"><a id="af7e8845b1f8e919deaa10f7c2a731c4c" name="af7e8845b1f8e919deaa10f7c2a731c4c"></a>
334  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_DMA_CR_OFFSET) io_rw_32 dma_cr</td></tr>
335 <tr class="separator:af7e8845b1f8e919deaa10f7c2a731c4c"><td class="memSeparator" colspan="2"> </td></tr>
336 <tr class="memitem:a1f59481358f42d9a10c1511528ed757b"><td class="memItemLeft" align="right" valign="top"><a id="a1f59481358f42d9a10c1511528ed757b" name="a1f59481358f42d9a10c1511528ed757b"></a>
337  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_DMA_TDLR_OFFSET) io_rw_32 dma_tdlr</td></tr>
338 <tr class="separator:a1f59481358f42d9a10c1511528ed757b"><td class="memSeparator" colspan="2"> </td></tr>
339 <tr class="memitem:a80cb0a8cb3fa653f7d723f129a2412c5"><td class="memItemLeft" align="right" valign="top"><a id="a80cb0a8cb3fa653f7d723f129a2412c5" name="a80cb0a8cb3fa653f7d723f129a2412c5"></a>
340  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_DMA_RDLR_OFFSET) io_rw_32 dma_rdlr</td></tr>
341 <tr class="separator:a80cb0a8cb3fa653f7d723f129a2412c5"><td class="memSeparator" colspan="2"> </td></tr>
342 <tr class="memitem:a7607e403e2ea4bfc5907fccca7dacde2"><td class="memItemLeft" align="right" valign="top"><a id="a7607e403e2ea4bfc5907fccca7dacde2" name="a7607e403e2ea4bfc5907fccca7dacde2"></a>
343  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_SDA_SETUP_OFFSET) io_rw_32 sda_setup</td></tr>
344 <tr class="separator:a7607e403e2ea4bfc5907fccca7dacde2"><td class="memSeparator" colspan="2"> </td></tr>
345 <tr class="memitem:ab611875d43e747db7da24f1d643677d3"><td class="memItemLeft" align="right" valign="top"><a id="ab611875d43e747db7da24f1d643677d3" name="ab611875d43e747db7da24f1d643677d3"></a>
346  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_ACK_GENERAL_CALL_OFFSET) io_rw_32 ack_general_call</td></tr>
347 <tr class="separator:ab611875d43e747db7da24f1d643677d3"><td class="memSeparator" colspan="2"> </td></tr>
348 <tr class="memitem:a336024d9ffa41dd73d79d9f67c84dfe9"><td class="memItemLeft" align="right" valign="top"><a id="a336024d9ffa41dd73d79d9f67c84dfe9" name="a336024d9ffa41dd73d79d9f67c84dfe9"></a>
349  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_ENABLE_STATUS_OFFSET) io_ro_32 enable_status</td></tr>
350 <tr class="separator:a336024d9ffa41dd73d79d9f67c84dfe9"><td class="memSeparator" colspan="2"> </td></tr>
351 <tr class="memitem:a63815cd0bf3ac284e042b7446dd9e6d7"><td class="memItemLeft" align="right" valign="top"><a id="a63815cd0bf3ac284e042b7446dd9e6d7" name="a63815cd0bf3ac284e042b7446dd9e6d7"></a>
352  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_FS_SPKLEN_OFFSET) io_rw_32 fs_spklen</td></tr>
353 <tr class="separator:a63815cd0bf3ac284e042b7446dd9e6d7"><td class="memSeparator" colspan="2"> </td></tr>
354 <tr class="memitem:a390370cd343cec01572cf225693b8573"><td class="memItemLeft" align="right" valign="top"><a id="a390370cd343cec01572cf225693b8573" name="a390370cd343cec01572cf225693b8573"></a>
355  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_CLR_RESTART_DET_OFFSET) io_ro_32 clr_restart_det</td></tr>
356 <tr class="separator:a390370cd343cec01572cf225693b8573"><td class="memSeparator" colspan="2"> </td></tr>
357 <tr class="memitem:a100d6b930ef48b90961cf6d4cc9e5079"><td class="memItemLeft" align="right" valign="top"><a id="a100d6b930ef48b90961cf6d4cc9e5079" name="a100d6b930ef48b90961cf6d4cc9e5079"></a>
358  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_COMP_PARAM_1_OFFSET) io_ro_32 comp_param_1</td></tr>
359 <tr class="separator:a100d6b930ef48b90961cf6d4cc9e5079"><td class="memSeparator" colspan="2"> </td></tr>
360 <tr class="memitem:a4e417ff4cf68ce7da6478043cf2a2550"><td class="memItemLeft" align="right" valign="top"><a id="a4e417ff4cf68ce7da6478043cf2a2550" name="a4e417ff4cf68ce7da6478043cf2a2550"></a>
361  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_COMP_VERSION_OFFSET) io_ro_32 comp_version</td></tr>
362 <tr class="separator:a4e417ff4cf68ce7da6478043cf2a2550"><td class="memSeparator" colspan="2"> </td></tr>
363 <tr class="memitem:ab49121630d916d020066724472abca9e"><td class="memItemLeft" align="right" valign="top"><a id="ab49121630d916d020066724472abca9e" name="ab49121630d916d020066724472abca9e"></a>
364  </td><td class="memItemRight" valign="bottom"><b>_REG_</b> (I2C_IC_COMP_TYPE_OFFSET) io_ro_32 comp_type</td></tr>
365 <tr class="separator:ab49121630d916d020066724472abca9e"><td class="memSeparator" colspan="2"> </td></tr>
366 </table><table class="memberdecls">
367 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
368 Data Fields</h2></td></tr>
369 <tr class="memitem:ae056e1acee848ae4a59d328583a95e69"><td class="memItemLeft" align="right" valign="top"><a id="ae056e1acee848ae4a59d328583a95e69" name="ae056e1acee848ae4a59d328583a95e69"></a>
370 uint32_t </td><td class="memItemRight" valign="bottom"><b>_pad0</b></td></tr>
371 <tr class="separator:ae056e1acee848ae4a59d328583a95e69"><td class="memSeparator" colspan="2"> </td></tr>
372 <tr class="memitem:a82b9d76a6e3ae245f5946fd3a8226803"><td class="memItemLeft" align="right" valign="top"><a id="a82b9d76a6e3ae245f5946fd3a8226803" name="a82b9d76a6e3ae245f5946fd3a8226803"></a>
373 uint32_t </td><td class="memItemRight" valign="bottom"><b>_pad1</b> [2]</td></tr>
374 <tr class="separator:a82b9d76a6e3ae245f5946fd3a8226803"><td class="memSeparator" colspan="2"> </td></tr>
375 <tr class="memitem:a4916c1cfbb6cc2f71f2b5995c1996e84"><td class="memItemLeft" align="right" valign="top"><a id="a4916c1cfbb6cc2f71f2b5995c1996e84" name="a4916c1cfbb6cc2f71f2b5995c1996e84"></a>
376 uint32_t </td><td class="memItemRight" valign="bottom"><b>_pad2</b></td></tr>
377 <tr class="separator:a4916c1cfbb6cc2f71f2b5995c1996e84"><td class="memSeparator" colspan="2"> </td></tr>
378 <tr class="memitem:af35e9c3876a76376b3e25af538d3c73e"><td class="memItemLeft" align="right" valign="top"><a id="af35e9c3876a76376b3e25af538d3c73e" name="af35e9c3876a76376b3e25af538d3c73e"></a>
379 uint32_t </td><td class="memItemRight" valign="bottom"><b>_pad3</b> [18]</td></tr>
380 <tr class="separator:af35e9c3876a76376b3e25af538d3c73e"><td class="memSeparator" colspan="2"> </td></tr>
382 <hr/>The documentation for this struct was generated from the following files:<ul>
383 <li>include/hardware/structs/<a class="el" href="rp2040_2hardware__structs_2include_2hardware_2structs_2i2c_8h_source.html">i2c.h</a></li>
384 <li>include/hardware/structs/<a class="el" href="rp2350_2hardware__structs_2include_2hardware_2structs_2i2c_8h_source.html">i2c.h</a></li>
386 </div><!-- contents -->
387 </div><!-- doc-content -->
389 <script src="main.js"></script>