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 104 <div class="header">
 105   <div class="summary">
 106 <a href="#func-members">Functions</a>  </div>
 107   <div class="headertitle"><div class="title">riscv_platform_timer.h File Reference</div></div>
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 109 <div class="contents">
 110 <div class="textblock"><code>#include &quot;<a class="el" href="pico_8h_source.html">pico.h</a>&quot;</code><br />
 111 <code>#include &quot;hardware/structs/sio.h&quot;</code><br />
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 113 Include dependency graph for riscv_platform_timer.h:</div>
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 139 <p><a href="riscv__platform__timer_8h_source.html">Go to the source code of this file.</a></p>
 140 <table class="memberdecls">
 141 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 142 Functions</h2></td></tr>
 143 <tr class="memitem:ga2afc7ae3feafc019abd3883a3f2fe04f"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__riscv__platform__timer.html#ga2afc7ae3feafc019abd3883a3f2fe04f">riscv_timer_set_enabled</a> (bool enabled)</td></tr>
 144 <tr class="memdesc:ga2afc7ae3feafc019abd3883a3f2fe04f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable or disable the RISC-V platform timer.  <a href="group__hardware__riscv__platform__timer.html#ga2afc7ae3feafc019abd3883a3f2fe04f">More...</a><br /></td></tr>
 145 <tr class="separator:ga2afc7ae3feafc019abd3883a3f2fe04f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 146 <tr class="memitem:gacdd646c3b36c51473a16c07a799f9eec"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__riscv__platform__timer.html#gacdd646c3b36c51473a16c07a799f9eec">riscv_timer_set_fullspeed</a> (bool fullspeed)</td></tr>
 147 <tr class="memdesc:gacdd646c3b36c51473a16c07a799f9eec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure the RISC-V platform timer to run at full system clock speed.  <a href="group__hardware__riscv__platform__timer.html#gacdd646c3b36c51473a16c07a799f9eec">More...</a><br /></td></tr>
 148 <tr class="separator:gacdd646c3b36c51473a16c07a799f9eec"><td class="memSeparator" colspan="2">&#160;</td></tr>
 149 <tr class="memitem:gab016600bb8fc7553da83a90501371693"><td class="memItemLeft" align="right" valign="top">static uint64_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__riscv__platform__timer.html#gab016600bb8fc7553da83a90501371693">riscv_timer_get_mtime</a> (void)</td></tr>
 150 <tr class="memdesc:gab016600bb8fc7553da83a90501371693"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the RISC-V platform timer.  <a href="group__hardware__riscv__platform__timer.html#gab016600bb8fc7553da83a90501371693">More...</a><br /></td></tr>
 151 <tr class="separator:gab016600bb8fc7553da83a90501371693"><td class="memSeparator" colspan="2">&#160;</td></tr>
 152 <tr class="memitem:ga96285c497dceb9126e6ea3130be72bcb"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__riscv__platform__timer.html#ga96285c497dceb9126e6ea3130be72bcb">riscv_timer_set_mtime</a> (uint64_t mtime)</td></tr>
 153 <tr class="memdesc:ga96285c497dceb9126e6ea3130be72bcb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Update the RISC-V platform timer.  <a href="group__hardware__riscv__platform__timer.html#ga96285c497dceb9126e6ea3130be72bcb">More...</a><br /></td></tr>
 154 <tr class="separator:ga96285c497dceb9126e6ea3130be72bcb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 155 <tr class="memitem:ga148695c3ff3dce3222934040cfc77d91"><td class="memItemLeft" align="right" valign="top">static uint64_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__riscv__platform__timer.html#ga148695c3ff3dce3222934040cfc77d91">riscv_timer_get_mtimecmp</a> (void)</td></tr>
 156 <tr class="memdesc:ga148695c3ff3dce3222934040cfc77d91"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the current RISC-V platform timer mtimecmp value for this core.  <a href="group__hardware__riscv__platform__timer.html#ga148695c3ff3dce3222934040cfc77d91">More...</a><br /></td></tr>
 157 <tr class="separator:ga148695c3ff3dce3222934040cfc77d91"><td class="memSeparator" colspan="2">&#160;</td></tr>
 158 <tr class="memitem:ga7003005e0d2142e95ce53f2ceee29fdd"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__riscv__platform__timer.html#ga7003005e0d2142e95ce53f2ceee29fdd">riscv_timer_set_mtimecmp</a> (uint64_t mtimecmp)</td></tr>
 159 <tr class="memdesc:ga7003005e0d2142e95ce53f2ceee29fdd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set a new RISC-V platform timer interrupt comparison value (mtimecmp) for this core.  <a href="group__hardware__riscv__platform__timer.html#ga7003005e0d2142e95ce53f2ceee29fdd">More...</a><br /></td></tr>
 160 <tr class="separator:ga7003005e0d2142e95ce53f2ceee29fdd"><td class="memSeparator" colspan="2">&#160;</td></tr>
 161 </table>
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