Yihan Zhu [Mon, 7 Oct 2024 18:32:59 +0000 (14:32 -0400)]
drm/amd/display: w/a to program DISPCLK_R_GATE_DISABLE DCN35
[WHY & HOW]
Cursor corruption observed on USBC display with specific system setup with a
reboot. Cursor memory might still in the lightsleep state due to voltage
issue, we need program DISPCLK_R_GATE_DISABLE to avoid this issue only on
DCN35.
drm/amd/display: temp w/a for dGPU to enter idle optimizations
[Why&How]
vblank immediate disable currently does not work for all asics. On
DCN401, the vblank interrupts never stop coming, and hence we never
get a chance to trigger idle optimizations.
Add a workaround to enable immediate disable only on APUs for now. This
adds a 2-frame delay for triggering idle optimization, which is a
negligible overhead.
Fixes: 58a261bfc967 ("drm/amd/display: use a more lax vblank enable policy for older ASICs") Fixes: e45b6716de4b ("drm/amd/display: use a more lax vblank enable policy for DCN35+") Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Add hpd_source index check for dcn401 link encoder setup
This patch adds a boundary check for the hpd_source index during the
link encoder creation process for all dcn401 ip. The check ensures that the
index is within the valid range of the link_enc_hpd_regs array to
prevent out-of-bounds access.
drm/amd/display: Add hpd_source index check for dcn10 link encoder setup
This patch adds a boundary check for the hpd_source index during the
link encoder creation process for all dcn10 ip. The check ensures that the
index is within the valid range of the link_enc_hpd_regs array to
prevent out-of-bounds access.
drm/amd/display: Add hpd_source index check for DCE60/80/100/110/112/120 link encoders
This patch adds a boundary check for the hpd_source index during the
link encoder creation process for all DCExxx IP's. The check ensures
that the index is within the valid range of the link_enc_hpd_regs array
to prevent out-of-bounds access.
Lijo Lazar [Mon, 14 Oct 2024 07:40:13 +0000 (13:10 +0530)]
drm/amdgpu: Use SPX as default in partition config
In certain cases - ex: when a reset is required on initialization - XCP
manager won't have a valid partition mode. In such cases, use SPX as the
default selected mode for which partition configuration details are
populated.
drm/amd/display: Ensure HPD source index is valid for dcn20/dcn201 link encoders
This patch adds a boundary check for the hpd_source index during the
link encoder creation process for dcn20/dcn201 IP's. The check ensures
that the index is within the valid range of the link_enc_hpd_regs array
to prevent out-of-bounds access.
Alex Deucher [Tue, 1 Oct 2024 14:31:26 +0000 (10:31 -0400)]
drm/amdgpu/swsmu: add automatic parameter to set_soft_freq_range
On chips that support it, you can specificy 0 and 0xffff for
min and max and the PMFW will use that to determine the optimal
min and max. This enables optimal performance when the
user manually switches between performance levels using sysfs.
Previously we'd set soft min/max which could limit performance.
Alex Deucher [Thu, 3 Oct 2024 13:57:38 +0000 (09:57 -0400)]
drm/amdgpu/swsmu: default to fullscreen 3D profile for dGPUs
This uses more aggressive hueristics than the the bootup default
profile. On windows the OS has a special fullscreen 3D mode
where this is used. Since we don't have the equivalent on Linux
default to this profile for dGPUs.
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3618 Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/1500 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3131 Fixes: c50fe289ed72 ("drm/amdgpu/swsmu: always force a state reprogram on init") Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Ville Syrjälä [Mon, 14 Oct 2024 16:09:36 +0000 (19:09 +0300)]
drm/radeon: Fix encoder->possible_clones
Include the encoder itself in its possible_clones bitmask.
In the past nothing validated that drivers were populating
possible_clones correctly, but that changed in commit 74d2aacbe840 ("drm: Validate encoder->possible_clones").
Looks like radeon never got the memo and is still not
following the rules 100% correctly.
This results in some warnings during driver initialization:
Bogus possible_clones: [ENCODER:46:TV-46] possible_clones=0x4 (full encoder mask=0x7)
WARNING: CPU: 0 PID: 170 at drivers/gpu/drm/drm_mode_config.c:615 drm_mode_config_validate+0x113/0x39c
...
Joshua Aberback [Thu, 3 Oct 2024 21:28:11 +0000 (17:28 -0400)]
drm/amd/display: Clear pipe pointers on pipe reset
[Why]
We want to clean up unnecessary asserts, one of which is an assert in
resource_is_pipe_type that fires if a pipe has no stream and still has
pointers to other pipes ("dangling state"). This gets hit because pipes
are not properly cleaned up in reset_back_end_for_pipe. When resetting a
pipe, the existing MPCC / ODM combine pointers are no longer valid,
especially when we put ODM in bypass.
[How]
- reset pipe pointers in reset_back_end_for_pipe
- remove useless code to avoid confusion
(a long time ago it had a reason to be there, not anymore)
Leo Chen [Thu, 3 Oct 2024 16:20:23 +0000 (12:20 -0400)]
drm/amd/display: Full exit out of IPS2 when all allow signals have been cleared
[Why]
A race condition occurs between cursor movement and vertical interrupt control
thread from OS, with both threads trying to exit IPS2.
Vertical interrupt control thread clears the prev driver allow signal while not fully
finishing the IPS2 exit process.
[How]
We want to detect all the allow signals have been cleared before we perform the full exit.
[Why]
There is a known HW bug that causes the internal 3DLUT fetch signal to
be lost at VREADY, regardless of whether the OTG lock is being held or
not. A workaround is necessary to make sure that this internal signal
stays up after OTG unlock.
[How]
Set the 3DLUT_ENABLE bit immediately before and after the unlock. Also
use VUPDATE_KEEPOUT to prevent lock transition in the region between
VSTARTUP and VREADY, which could cause issues with this WA sequence.
Also including misc. 3DLUT DMA-related sequence fixes to address a few
regressions causing corruption.
Roman Li [Mon, 30 Sep 2024 22:18:35 +0000 (18:18 -0400)]
drm/amd/display: Add check for headless for idle optimization
[Why]
Currently idle worker thread that checks for HPD while system is in IPS2
only supports headless and static screen use-cases.
In other display-off scenarios hotplug may not work.
[How]
For display-off only allow idle optimization when no display is connected.
Alex Hung [Mon, 30 Sep 2024 17:45:12 +0000 (11:45 -0600)]
drm/amd/display: Check status from dpcd_get_tunneling_device_data
[WHAT & HOW]
dpcd_get_tunneling_device_data calls core_link_read_dpcd which can
fail. The status from core_link_read_dpcd should be checked and error
messages is printed in case of failures.
This fixes 1 UNUSED_VALUE issue reported by Coverity.
Lijo Lazar [Mon, 7 Oct 2024 08:19:45 +0000 (13:49 +0530)]
drm/amdgpu: Wait for reset on init completion
When reset on initialization is requested, wait for the reset to finish.
In cases where module is loaded after boot, this makes sure all
initialization work is done after a successful return of modprobe.
Philip Yang [Fri, 4 Oct 2024 20:28:07 +0000 (16:28 -0400)]
drm/amdkfd: Accounting pdd vram_usage for svm
Process device data pdd->vram_usage is read by rocm-smi via sysfs, this
is currently missing the svm_bo usage accounting, so "rocm-smi
--showpids" per process VRAM usage report is incorrect.
Add pdd->vram_usage accounting when svm_bo allocation and release,
change to atomic64_t type because it is updated outside process mutex
now.
drm/amd/amdgpu: Fix double unlock in amdgpu_mes_add_ring
This patch addresses a double unlock issue in the amdgpu_mes_add_ring
function. The mutex was being unlocked twice under certain error
conditions, which could lead to undefined behavior.
The fix ensures that the mutex is unlocked only once before jumping to
the clean_up_memory label. The unlock operation is moved to just before
the goto statement within the conditional block that checks the return
value of amdgpu_ring_init. This prevents the second unlock attempt after
the clean_up_memory label, which is no longer necessary as the mutex is
already unlocked by this point in the code flow.
This change resolves the potential double unlock and maintains the
correct mutex handling throughout the function.
Fixes below:
Commit d0c423b64765 ("drm/amdgpu/mes: use ring for kernel queue
submission"), leads to the following Smatch static checker warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c:1240 amdgpu_mes_add_ring()
warn: double unlock '&adev->mes.mutex_hidden' (orig line 1213)
drm/amd/display: Add hpd_source index out-of-bounds check for dcn3x link encoder creation
This patch adds a boundary check for the hpd_source index during the
link encoder creation process for dcn3x IP's. The check ensures that the
index is within the valid range of the link_enc_hpd_regs array to
prevent out-of-bounds access.
Mohammed Anees [Wed, 9 Oct 2024 12:28:31 +0000 (17:58 +0530)]
drm/amdgpu: prevent BO_HANDLES error from being overwritten
Before this patch, if multiple BO_HANDLES chunks were submitted,
the error -EINVAL would be correctly set but could be overwritten
by the return value from amdgpu_cs_p1_bo_handles(). This patch
ensures that if there are multiple BO_HANDLES, we stop.
Fixes: fec5f8e8c6bc ("drm/amdgpu: disallow multiple BO_HANDLES chunks in one submit") Signed-off-by: Mohammed Anees <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Pierre-Eric Pelloux-Prayer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Add dynamic NPS switch support for GC 9.4.3 variants. Only GC v9.4.3 and
GC v9.4.4 currently support this. NPS switch is only supported if an SOC
supports multiple NPS modes.
drm/amdgpu/gfx12: Apply Isolation Enforcement to GFX & Compute rings
This commit applies isolation enforcement to the GFX and Compute rings
in the gfx_v12_0 module.
The commit sets `amdgpu_gfx_enforce_isolation_ring_begin_use` and
`amdgpu_gfx_enforce_isolation_ring_end_use` as the functions to be
called when a ring begins and ends its use, respectively.
`amdgpu_gfx_enforce_isolation_ring_begin_use` is called when a ring
begins its use. This function cancels any scheduled
`enforce_isolation_work` and, if necessary, signals the Kernel Fusion
Driver (KFD) to stop the runqueue.
`amdgpu_gfx_enforce_isolation_ring_end_use` is called when a ring ends
its use. This function schedules `enforce_isolation_work` to be run
after a delay.
These functions are part of the Enforce Isolation Handler, which
enforces shader isolation on AMD GPUs to prevent data leakage between
different processes.
Optimize gfx_v9_4_3_ring_insert_nop() to call
optimized version of amdgpu_ring_insert_nop
instead of calling amdgpu_ring_write for number
of nop times.
Sunil Khatri [Tue, 8 Oct 2024 13:02:16 +0000 (18:32 +0530)]
drm/amdgpu: optimize insert_nop using multi dwords
Optimize the ring_insert_nop fn for n dwords in one
step rather then call to amdgpu_ring_write for each
nop packet. This avoid function call for each nop
packet and also wptr is updated once only.
drm/amdgpu: Check gmc requirement for reset on init
Add a callback to check if there is any condition detected by GMC block
for reset on init. One case is if a pending NPS change request is
detected. If reset is done because of NPS switch, refresh NPS info from
discovery table.
If a user has requested NPS mode switch, place the request through PSP
during unload of the driver. For devices which are part of a hive, all
requests are placed together. If one of them fails, revert back to the
current NPS mode.
Christian König [Mon, 7 Oct 2024 18:30:19 +0000 (20:30 +0200)]
drm/radeon: always set GEM function pointer
Make sure to always set the GEM function pointer even for in kernel
allocations. This fixes a NULL pointer deref caused by switching to GEM
references.
Sunil Khatri [Tue, 8 Oct 2024 03:53:12 +0000 (09:23 +0530)]
drm/amdgpu: fix dm_suspend/resume arguments to ip_block
"build failure after merge of the amdgpu tree"
dm_suspend/dm_resume functions argument mismatch
not caught in validation as it was under config
CONFIG_DEBUG_KERNEL_DC which wasnt enabled by
default.
Change argument from adev to ip_block.
Fixes: 982d7f9bfe4a ("drm/amdgpu: update the handle ptr in suspend") Fixes: 7feb4f3ad8be ("drm/amdgpu: update the handle ptr in resume") Reported-by: Stephen Rothwell <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Sunil Khatri [Thu, 3 Oct 2024 07:57:08 +0000 (13:27 +0530)]
drm/amdgpu: move error log from ring write to commit
Move the error message from ring write as an optimization
to avoid printing that message on every write instead
print once during commit if it exceeds write the allocated
size i.e ring->count_dw.
Also we do not want to log the error message in between a
ring write and complete the write as its mostly not harmful
as it will overwrite stale data only as GPU read from ring
is faster than CPU write to ring.
This reduces the size of amdgpu.ko module by around
600 Kb as write is very often used function and hence
the print.
drm/amdgpu: Remove the while loop from amdgpu_job_prepare_job
While loop makes it sound like amdgpu_vmid_grab() potentially needs to be
called multiple times to produce a fence, while in reality all code paths
either return an error, assign a valid job->vmid or assign a vmid which
will be valid once the returned fence signals.
Therefore we can remove the loop to make it clear the call does not need
to be repeated.
Alex Deucher [Fri, 4 Oct 2024 13:34:24 +0000 (09:34 -0400)]
drm/amd/display: disable SG displays on cyan skillfish
These parts were mainly for compute workloads, but they have
a display that was available for the console. These chips
should support SG display, but I don't know that the support
was ever validated on Linux so disable it by default. It can
still be enabled by setting sg_display=1 for those that
want to play with it. These systems also generally had large
carve outs so SG display was less of a factor.
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3356 Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Tvrtko Ursulin [Mon, 20 May 2024 11:13:38 +0000 (12:13 +0100)]
drm/amdgpu: Use drm_print_memory_stats helper from fdinfo
Convert fdinfo memory stats to use the common drm_print_memory_stats
helper.
This achieves alignment with the common keys as documented in
drm-usage-stats.rst, adding specifically drm-total- key the driver was
missing until now.
Additionally I made the code stop skipping total size for objects which
currently do not have a backing store, and I added resident, active and
purgeable reporting.
Legacy keys have been preserved, with the outlook of only potentially
removing only the drm-memory- when the time gets right.
Tvrtko Ursulin [Tue, 13 Aug 2024 13:57:11 +0000 (14:57 +0100)]
Documentation/gpu: Document the situation with unqualified drm-memory-
Currently it is not well defined what is drm-memory- compared to other
categories.
In practice the only driver which emits these keys is amdgpu and in them
exposes the current resident buffer object memory (including shared).
To prevent any confusion, document that drm-memory- is deprecated and an
alias for drm-resident-memory-.
While at it also clarify that the reserved sub-string 'memory' refers to
the memory region component, and also clarify the intended semantics of
other memory categories.
v2:
* Also mark drm-memory- as deprecated.
* Add some more text describing memory categories. (Alex)
v3:
* Semantics of the amdgpu drm-memory is actually as drm-resident.
Make the current_memory_partition sysfs node read/write for requesting a
new NPS mode. The request is only cached and at a later point a driver
unload/reload is required to switch to the new NPS mode.
drm/amdgpu/gfx10: Apply Isolation Enforcement to GFX & Compute rings
This commit applies isolation enforcement to the GFX and Compute rings
in the gfx_v10_0 module.
The commit sets `amdgpu_gfx_enforce_isolation_ring_begin_use` and
`amdgpu_gfx_enforce_isolation_ring_end_use` as the functions to be
called when a ring begins and ends its use, respectively.
`amdgpu_gfx_enforce_isolation_ring_begin_use` is called when a ring
begins its use. This function cancels any scheduled
`enforce_isolation_work` and, if necessary, signals the Kernel Fusion
Driver (KFD) to stop the runqueue.
`amdgpu_gfx_enforce_isolation_ring_end_use` is called when a ring ends
its use. This function schedules `enforce_isolation_work` to be run
after a delay.
These functions are part of the Enforce Isolation Handler, which
enforces shader isolation on AMD GPUs to prevent data leakage between
different processes.
Hamza Mahfooz [Fri, 4 Oct 2024 19:22:57 +0000 (15:22 -0400)]
drm/amd/display: fix hibernate entry for DCN35+
Since, two suspend-resume cycles are required to enter hibernate and,
since we only need to enable idle optimizations in the first cycle
(which is pretty much equivalent to s2idle). We can check in_s0ix, to
prevent the system from entering idle optimizations before it actually
enters hibernate (from display's perspective). Also, call
dc_set_power_state() before dc_allow_idle_optimizations(), since it's
safer to do so because dc_set_power_state() writes to DMUB.
drm/amd/display: Fetch the EDID from _DDC if available for eDP
Some manufacturers have intentionally put an EDID that differs from
the EDID on the internal panel on laptops.
Attempt to fetch this EDID if it exists and prefer it over the EDID
that is provided by the panel. If a user prefers to use the EDID from
the panel, offer a DC debugging parameter that would disable this.
drm/amd/display: remove redundant freesync parser for DP
When updating connector under drm_edid infrastructure, many calculations
and validations are already done and become redundant inside AMD driver.
Remove those driver-specific code in favor of the DRM common code.
drm/amd/display: switch amdgpu_dm_connector to use struct drm_edid
Replace raw edid handling (struct edid) with the opaque EDID type
(struct drm_edid) on amdgpu_dm_connector for consistency. It may also
prevent mismatch of approaches in different parts of the driver code.
drm/amd/display: Initialize new backlight_level_params structure
[Why]
Initialize the new backlight_level_params structure as part of the ABC
framework, the information in this structure is needed to be passed down
to the DMCUB to identify the backlight control type, to adjust the
backlight of the panel and to perform any required conversions from PWM
to nits or vice versa.
[How]
Created initial framework of the backlight_level_params struct and
modified existing functions to include the new structure.
Alex Hung [Mon, 23 Sep 2024 23:48:47 +0000 (17:48 -0600)]
drm/amd/display: Remove redundant assignments
[WHAT & HOW]
log2_blk_height and log2_blk_width are assigned to 0 and then
immediately are updated to other values. The assignments to zero are
redudant and removed.
This fixes 18 UNUSED_VALUE issues reported by Coverity.
Alex Hung [Mon, 23 Sep 2024 20:24:49 +0000 (14:24 -0600)]
drm/amd/display: Remove unnecessary assignments
[WHAT & HOW]
TimeForFetchingMetaPTE, TimeForFetchingRowInVBlank and
LinesToRequestPrefetchPixelData are local variables. They
are freed when CalculatePrefetchSchedule() ends and need
not clearing explicitly.
This fixes 21 UNUSED_VALUE issues reported by Coverity.
drm/amd/display: Update Interface to Check UCLK DPM
[Why]
Videos using YUV420 format may result in high power being used.
Disabling MPO may result in lower power usage.
Update interface that can be used to check power profile of a dc_state.
[How]
Add helper functions that can be used to determine power level:
- get power profile after a dc_state has undergone full validation
Roman Li [Thu, 26 Sep 2024 20:36:15 +0000 (16:36 -0400)]
drm/amd/display: Align static screen idle worker with IPX mode
[Why]
Idle worker thread serves for periodic detection of HPD while system is in IPS2.
Currently it is used in headless and static screen scenarios.
IPX can be configured not to execute IPS2 for static screen.
In this case idle worker is redundant.
[How]
Only use periodic detection for static screen if IPS is fully enabled.
drm/amd/display: calculate final viewport before TAP optimization
Viewport size excess surface size observed sometime with some timings or
resizing the MPO video window to cause MPO unsupported. Calculate final
viewport size first with a 100x100 dummy viewport to get the max TAP
support and then re-run final viewport calculation if TAP value changed.
Removed obsolete preliminary viewport calculation for TAP validation.
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