drm/amd/display: resolve correct MALL size for dcn401

drm/amd/display: resolve correct MALL size for dcn401

[WHY]
Code for dcn401 to calculate available MALL size for display was shared
with dcn32 and did not provide the correct result for all ASICs.

[HOW]
Add dcn401 specific function to properly calculate the available MALL
for display.

Reviewed-by: Chris Park <[email protected]>
Signed-off-by: Dillon Varone <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>