]> Git Repo - linux.git/commitdiff
Merge tag 'pinctrl-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw...
authorLinus Torvalds <[email protected]>
Wed, 16 Dec 2020 23:02:49 +0000 (15:02 -0800)
committerLinus Torvalds <[email protected]>
Wed, 16 Dec 2020 23:02:49 +0000 (15:02 -0800)
Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.11 kernel.

  Drivers, drivers and drivers. Not a single core change.

  Some new stuff, especially a bunch of new Intel, Qualcomm and Ocelot
  SoCs.

  As part of the modularization attempt, I applied one patch affecting
  the firmware subsystem as a functional (not syntactic/semantic)
  dependency and then it blew up in our face, so I had to revert it,
  bummer. It will come in later, through that subsystem, I guess.

  New drivers:

   - New driver for the Microchip Serial GPIO "SGPIO".

   - Qualcomm SM8250 LPASS (Low Power Audio Subsystem) GPIO driver.

  New subdrivers:

   - Intel Lakefield subdriver.

   - Intel Elkhart Lake subdriver.

   - Intel Alder Lake-S subdriver.

   - Qualcomm MSM8953 subdriver.

   - Qualcomm SDX55 subdriver.

   - Qualcomm SDX55 PMIC subdriver.

   - Ocelot Luton SoC subdriver.

   - Ocelot Serval SoC subdriver.

  Modularization:

   - The Meson driver can now be built as modules.

   - The Qualcomm driver(s) can now be built as modules.

  Incremental improvements:

   - The Intel driver now supports pin configuration for GPIO-related
     configurations.

   - A bunch of Renesas PFC drivers have been augmented with support for
     QSPI pins, groups and functions.

   - Non-critical fixes to the irq handling in the Allwinner Sunxi
     driver"

* tag 'pinctrl-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (80 commits)
  pinctrl/spear: simplify the return expression of spear300_pinctrl_probe()
  pinctrl: mediatek: simplify the return expression of mtk_pinconf_bias_disable_set_rev1()
  dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add irq support
  pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)
  pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver
  dt-bindings: pinctrl: qcom: Add sm8250 lpass lpi pinctrl bindings
  pinctrl: qcom-pmic-gpio: Add support for pmx55
  dt-bindings: pinctrl: qcom-pmic-gpio: Add pmx55 support
  pinctrl: pinctrl-microchip-sgpio: Mark some symbols with static keyword
  pinctrl: at91-pio4: Make PINCTRL_AT91PIO4 depend on HAS_IOMEM to fix build error
  pinctrl: mtk: Fix low level output voltage issue
  pinctrl: falcon: add missing put_device() call in pinctrl_falcon_probe()
  pinctrl: actions: pinctrl-s500: Constify s500_padinfo[]
  pinctrl: pinctrl-microchip-sgpio: Add OF config dependency
  pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO
  dt-bindings: pinctrl: Add bindings for pinctrl-microchip-sgpio driver
  pinctrl: at91-pio4: add support for fewer lines on last PIO bank
  pinctrl: sunxi: Always call chained_irq_{enter, exit} in sunxi_pinctrl_irq_handler
  pinctrl: sunxi: Mark the irq bank not found in sunxi_pinctrl_irq_handler() with WARN_ON
  pinctrl: sunxi: fix irq bank map for the Allwinner A100 pin controller
  ...

1  2 
MAINTAINERS
arch/arm64/configs/defconfig
drivers/pinctrl/Kconfig
drivers/pinctrl/Makefile
drivers/pinctrl/pinctrl-amd.c
drivers/pinctrl/pinctrl-ingenic.c
drivers/pinctrl/qcom/pinctrl-msm.c

diff --combined MAINTAINERS
index 8c1c5f9830c389785f4fe6c1bffa5b1b73921711,75a00dfa824ac28ba9015b88574bf2f20395a32b..800e88c8d382c6b4c203243bad30a7619bc632ae
@@@ -929,18 -929,12 +929,18 @@@ L:      [email protected]
  S:    Maintained
  F:    drivers/i2c/busses/i2c-amd-mp2*
  
 +AMD PMC DRIVER
 +M:    Shyam Sundar S K <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/platform/x86/amd-pmc.*
 +
  AMD POWERPLAY
  M:    Evan Quan <[email protected]>
  L:    [email protected]
  S:    Supported
  T:    git git://people.freedesktop.org/~agd5f/linux
 -F:    drivers/gpu/drm/amd/powerplay/
 +F:    drivers/gpu/drm/amd/pm/powerplay/
  
  AMD SEATTLE DEVICE TREE SUPPORT
  M:    Brijesh Singh <[email protected]>
@@@ -984,7 -978,7 +984,7 @@@ M: Michael Hennerich <Michael.Hennerich
  L:    [email protected]
  S:    Supported
  W:    http://ez.analog.com/community/linux-device-drivers
 -F:    Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.txt
 +F:    Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml
  F:    drivers/iio/adc/ad7768-1.c
  
  ANALOG DEVICES INC AD7780 DRIVER
@@@ -1079,7 -1073,6 +1079,7 @@@ M:      Hans Verkuil <hverkuil-cisco@xs4all.
  L:    [email protected]
  S:    Maintained
  F:    drivers/media/i2c/adv7604*
 +F:    Documentation/devicetree/bindings/media/i2c/adv7604.yaml
  
  ANALOG DEVICES INC ADV7842 DRIVER
  M:    Hans Verkuil <[email protected]>
@@@ -1180,6 -1173,16 +1180,6 @@@ S:     Supporte
  F:    Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt
  F:    drivers/rtc/rtc-goldfish.c
  
 -ANDROID ION DRIVER
 -M:    Laura Abbott <[email protected]>
 -M:    Sumit Semwal <[email protected]>
 -L:    [email protected]
 -L:    [email protected]
 -L:    [email protected] (moderated for non-subscribers)
 -S:    Supported
 -F:    drivers/staging/android/ion
 -F:    drivers/staging/android/uapi/ion.h
 -
  AOA (Apple Onboard Audio) ALSA DRIVER
  M:    Johannes Berg <[email protected]>
  L:    [email protected]
@@@ -1276,7 -1279,7 +1276,7 @@@ M:      Igor Russkikh <[email protected]
  L:    [email protected]
  S:    Supported
  W:    https://www.marvell.com/
 -Q:    http://patchwork.ozlabs.org/project/netdev/list/
 +Q:    https://patchwork.kernel.org/project/netdevbpf/list/
  F:    Documentation/networking/device_drivers/ethernet/aquantia/atlantic.rst
  F:    drivers/net/ethernet/aquantia/atlantic/
  
@@@ -1483,20 -1486,10 +1483,20 @@@ F:   Documentation/devicetree/bindings/io
  F:    drivers/iommu/arm/
  F:    drivers/iommu/io-pgtable-arm*
  
 +ARM AND ARM64 SoC SUB-ARCHITECTURES (COMMON PARTS)
 +M:    Arnd Bergmann <[email protected]>
 +M:    Olof Johansson <[email protected]>
 +M:    [email protected]
 +L:    [email protected] (moderated for non-subscribers)
 +S:    Maintained
 +T:    git git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git
 +F:    arch/arm/boot/dts/Makefile
 +F:    arch/arm64/boot/dts/Makefile
 +
  ARM SUB-ARCHITECTURES
  L:    [email protected] (moderated for non-subscribers)
  S:    Maintained
 -T:    git git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git
 +T:    git git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git
  F:    arch/arm/mach-*/
  F:    arch/arm/plat-*/
  
@@@ -1508,7 -1501,7 +1508,7 @@@ S:      Maintaine
  F:    Documentation/devicetree/bindings/arm/actions.yaml
  F:    Documentation/devicetree/bindings/clock/actions,owl-cmu.txt
  F:    Documentation/devicetree/bindings/dma/owl-dma.yaml
 -F:    Documentation/devicetree/bindings/i2c/i2c-owl.txt
 +F:    Documentation/devicetree/bindings/i2c/i2c-owl.yaml
  F:    Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml
  F:    Documentation/devicetree/bindings/mmc/owl-mmc.yaml
  F:    Documentation/devicetree/bindings/pinctrl/actions,*
@@@ -1553,7 -1546,6 +1553,7 @@@ F:      drivers/clk/sunxi
  ARM/Allwinner sunXi SoC support
  M:    Maxime Ripard <[email protected]>
  M:    Chen-Yu Tsai <[email protected]>
 +R:    Jernej Skrabec <[email protected]>
  L:    [email protected] (moderated for non-subscribers)
  S:    Maintained
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git
@@@ -1731,13 -1723,11 +1731,13 @@@ F:   arch/arm/mach-ep93xx/micro9.
  
  ARM/CORESIGHT FRAMEWORK AND DRIVERS
  M:    Mathieu Poirier <[email protected]>
 -R:    Suzuki K Poulose <[email protected]>
 +M:    Suzuki K Poulose <[email protected]>
  R:    Mike Leach <[email protected]>
 +R:    Leo Yan <[email protected]>
  L:    [email protected] (moderated for non-subscribers)
  L:    [email protected] (moderated for non-subscribers)
  S:    Maintained
 +T:    git git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git
  F:    Documentation/ABI/testing/sysfs-bus-coresight-devices-*
  F:    Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt
  F:    Documentation/devicetree/bindings/arm/coresight-cti.yaml
@@@ -1799,6 -1789,14 +1799,6 @@@ F:     drivers/firmware/turris-mox-rwtm.
  F:    drivers/gpio/gpio-moxtet.c
  F:    include/linux/moxtet.h
  
 -ARM/EBSA110 MACHINE SUPPORT
 -M:    Russell King <[email protected]>
 -L:    [email protected] (moderated for non-subscribers)
 -S:    Maintained
 -W:    http://www.armlinux.org.uk/
 -F:    arch/arm/mach-ebsa110/
 -F:    drivers/net/ethernet/amd/am79c961a.*
 -
  ARM/ENERGY MICRO (SILICON LABS) EFM32 SUPPORT
  M:    Uwe Kleine-König <[email protected]>
  R:    Pengutronix Kernel Team <[email protected]>
@@@ -1996,6 -1994,7 +1996,6 @@@ N:      lpc18x
  
  ARM/LPC32XX SOC SUPPORT
  M:    Vladimir Zapolskiy <[email protected]>
 -M:    Sylvain Lemieux <[email protected]>
  L:    [email protected] (moderated for non-subscribers)
  S:    Maintained
  T:    git git://github.com/vzapolskiy/linux-lpc32xx.git
@@@ -2013,6 -2012,7 +2013,6 @@@ M:      Philipp Zabel <[email protected]
  S:    Maintained
  
  ARM/Marvell Dove/MV78xx0/Orion SOC support
 -M:    Jason Cooper <[email protected]>
  M:    Andrew Lunn <[email protected]>
  M:    Sebastian Hesselbarth <[email protected]>
  M:    Gregory Clement <[email protected]>
@@@ -2029,6 -2029,7 +2029,6 @@@ F:      arch/arm/plat-orion
  F:    drivers/soc/dove/
  
  ARM/Marvell Kirkwood and Armada 370, 375, 38x, 39x, XP, 3700, 7K/8K, CN9130 SOC support
 -M:    Jason Cooper <[email protected]>
  M:    Andrew Lunn <[email protected]>
  M:    Gregory Clement <[email protected]>
  M:    Sebastian Hesselbarth <[email protected]>
  S:    Supported
  T:    git git://github.com/microchip-ung/linux-upstream.git
  F:    arch/arm64/boot/dts/microchip/
+ F:    drivers/pinctrl/pinctrl-microchip-sgpio.c
  N:    sparx5
  
 +Microchip Timer Counter Block (TCB) Capture Driver
 +M:    Kamel Bouhara <[email protected]>
 +L:    [email protected] (moderated for non-subscribers)
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/counter/microchip-tcb-capture.c
 +
  ARM/MIOA701 MACHINE SUPPORT
  M:    Robert Jarzmik <[email protected]>
  L:    [email protected] (moderated for non-subscribers)
@@@ -2380,7 -2375,8 +2381,7 @@@ F:      drivers/i2c/busses/i2c-rk3x.
  F:    sound/soc/rockchip/
  N:    rockchip
  
 -ARM/SAMSUNG EXYNOS ARM ARCHITECTURES
 -M:    Kukjin Kim <[email protected]>
 +ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES
  M:    Krzysztof Kozlowski <[email protected]>
  L:    [email protected] (moderated for non-subscribers)
  L:    [email protected]
@@@ -2409,7 -2405,15 +2410,7 @@@ N:     s3c241
  N:    s3c64xx
  N:    s5pv210
  
 -ARM/SAMSUNG MOBILE MACHINE SUPPORT
 -M:    Kyungmin Park <[email protected]>
 -L:    [email protected] (moderated for non-subscribers)
 -S:    Maintained
 -F:    arch/arm/mach-s5pv210/
 -
  ARM/SAMSUNG S5P SERIES 2D GRAPHICS ACCELERATION (G2D) SUPPORT
 -M:    Kyungmin Park <[email protected]>
 -M:    Kamil Debski <[email protected]>
  M:    Andrzej Hajda <[email protected]>
  L:    [email protected]
  L:    [email protected]
@@@ -2434,6 -2438,9 +2435,6 @@@ S:      Maintaine
  F:    drivers/media/platform/s5p-jpeg/
  
  ARM/SAMSUNG S5P SERIES Multi Format Codec (MFC) SUPPORT
 -M:    Kyungmin Park <[email protected]>
 -M:    Kamil Debski <[email protected]>
 -M:    Jeongtae Park <[email protected]>
  M:    Andrzej Hajda <[email protected]>
  L:    [email protected]
  L:    [email protected]
@@@ -2480,7 -2487,7 +2481,7 @@@ F:      drivers/clk/socfpga
  ARM/SOCFPGA EDAC SUPPORT
  M:    Dinh Nguyen <[email protected]>
  S:    Maintained
 -F:    drivers/edac/altera_edac.
 +F:    drivers/edac/altera_edac.[ch]
  
  ARM/SPREADTRUM SoC SUPPORT
  M:    Orson Zhai <[email protected]>
@@@ -2636,8 -2643,10 +2637,8 @@@ F:     drivers/pinctrl/visconti
  N:    visconti
  
  ARM/UNIPHIER ARCHITECTURE
 -M:    Masahiro Yamada <[email protected]>
  L:    [email protected] (moderated for non-subscribers)
 -S:    Maintained
 -T:    git git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
 +S:    Orphan
  F:    Documentation/devicetree/bindings/arm/socionext/uniphier.yaml
  F:    Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml
  F:    Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml
@@@ -2958,7 -2967,7 +2959,7 @@@ ATMEL MAXTOUCH DRIVE
  M:    Nick Dyer <[email protected]>
  S:    Maintained
  T:    git git://github.com/ndyer/linux.git
 -F:    Documentation/devicetree/bindings/input/atmel,maxtouch.txt
 +F:    Documentation/devicetree/bindings/input/atmel,maxtouch.yaml
  F:    drivers/input/touchscreen/atmel_mxt_ts.c
  
  ATMEL WIRELESS DRIVER
@@@ -2977,8 -2986,6 +2978,8 @@@ L:      [email protected]
  S:    Maintained
  F:    arch/*/include/asm/atomic*.h
  F:    include/*/atomic*.h
 +F:    include/linux/refcount.h
 +F:    Documentation/atomic_*.txt
  F:    scripts/atomic/
  
  ATTO EXPRESSSAS SAS/SATA RAID SCSI DRIVER
@@@ -3117,6 -3124,8 +3118,6 @@@ Q:      https://patchwork.open-mesh.org/proj
  B:    https://www.open-mesh.org/projects/batman-adv/issues
  C:    irc://chat.freenode.net/batman
  T:    git https://git.open-mesh.org/linux-merge.git
 -F:    Documentation/ABI/obsolete/sysfs-class-net-batman-adv
 -F:    Documentation/ABI/obsolete/sysfs-class-net-mesh
  F:    Documentation/networking/batman-adv.rst
  F:    include/uapi/linux/batadv_packet.h
  F:    include/uapi/linux/batman_adv.h
@@@ -3200,9 -3209,8 +3201,9 @@@ F:      drivers/mtd/devices/block2mtd.
  BLUETOOTH DRIVERS
  M:    Marcel Holtmann <[email protected]>
  M:    Johan Hedberg <[email protected]>
 +M:    Luiz Augusto von Dentz <[email protected]>
  L:    [email protected]
 -S:    Maintained
 +S:    Supported
  W:    http://www.bluez.org/
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth.git
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth-next.git
@@@ -3211,9 -3219,8 +3212,9 @@@ F:      drivers/bluetooth
  BLUETOOTH SUBSYSTEM
  M:    Marcel Holtmann <[email protected]>
  M:    Johan Hedberg <[email protected]>
 +M:    Luiz Augusto von Dentz <[email protected]>
  L:    [email protected]
 -S:    Maintained
 +S:    Supported
  W:    http://www.bluez.org/
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth.git
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth-next.git
@@@ -3240,12 -3247,12 +3241,12 @@@ F:   drivers/iio/accel/bma400
  BPF (Safe dynamic programs and tools)
  M:    Alexei Starovoitov <[email protected]>
  M:    Daniel Borkmann <[email protected]>
 +M:    Andrii Nakryiko <[email protected]>
  R:    Martin KaFai Lau <[email protected]>
  R:    Song Liu <[email protected]>
  R:    Yonghong Song <[email protected]>
 -R:    Andrii Nakryiko <[email protected]>
  R:    John Fastabend <[email protected]>
 -R:    KP Singh <kpsingh@chromium.org>
 +R:    KP Singh <kpsingh@kernel.org>
  L:    [email protected]
  L:    [email protected]
  S:    Supported
@@@ -3363,17 -3370,6 +3364,17 @@@ S:    Supporte
  F:    arch/x86/net/
  X:    arch/x86/net/bpf_jit_comp32.c
  
 +BPF LSM (Security Audit and Enforcement using BPF)
 +M:    KP Singh <[email protected]>
 +R:    Florent Revest <[email protected]>
 +R:    Brendan Jackman <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/bpf/bpf_lsm.rst
 +F:    include/linux/bpf_lsm.h
 +F:    kernel/bpf/bpf_lsm.c
 +F:    security/bpf/
 +
  BROADCOM B44 10/100 ETHERNET DRIVER
  M:    Michael Chan <[email protected]>
  L:    [email protected]
@@@ -3546,12 -3542,11 +3547,12 @@@ BROADCOM BRCM80211 IEEE802.11n WIRELES
  M:    Arend van Spriel <[email protected]>
  M:    Franky Lin <[email protected]>
  M:    Hante Meuleman <[email protected]>
 -M:    Chi-Hsien Lin <[email protected]>
 -M:    Wright Feng <[email protected]>
 +M:    Chi-hsien Lin <[email protected]>
 +M:    Wright Feng <[email protected]>
 +M:    Chung-hsien Hsu <[email protected]>
  L:    [email protected]
  L:    [email protected]
 -L:    brcm80211-dev-list@cypress.com
 +L:    SHA-cyfmac-dev-list@infineon.com
  S:    Supported
  F:    drivers/net/wireless/broadcom/brcm80211/
  
@@@ -3578,14 -3573,6 +3579,14 @@@ S:    Maintaine
  F:    Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml
  F:    drivers/usb/host/ehci-brcm.*
  
 +BROADCOM BRCMSTB USB PIN MAP DRIVER
 +M:    Al Cooper <[email protected]>
 +L:    [email protected]
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml
 +F:    drivers/usb/misc/brcmstb-usb-pinmap.c
 +
  BROADCOM BRCMSTB USB2 and USB3 PHY DRIVER
  M:    Al Cooper <[email protected]>
  L:    [email protected]
@@@ -3871,11 -3858,10 +3872,11 @@@ CADENCE USB3 DRD IP DRIVE
  M:    Peter Chen <[email protected]>
  M:    Pawel Laszczak <[email protected]>
  M:    Roger Quadros <[email protected]>
 +R:    Aswath Govindraju <[email protected]>
  L:    [email protected]
  S:    Maintained
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git
 -F:    Documentation/devicetree/bindings/usb/cdns-usb3.txt
 +F:    Documentation/devicetree/bindings/usb/cdns,usb3.yaml
  F:    drivers/usb/cdns3/
  
  CADET FM/AM RADIO RECEIVER DRIVER
@@@ -3887,8 -3873,9 +3888,8 @@@ T:      git git://linuxtv.org/media_tree.gi
  F:    drivers/media/radio/radio-cadet*
  
  CAFE CMOS INTEGRATED CAMERA CONTROLLER DRIVER
 -M:    Jonathan Corbet <[email protected]>
  L:    [email protected]
 -S:    Maintained
 +S:    Orphan
  T:    git git://linuxtv.org/media_tree.git
  F:    Documentation/admin-guide/media/cafe_ccic*
  F:    drivers/media/platform/marvell-ccic/
@@@ -4301,7 -4288,6 +4302,7 @@@ B:      https://github.com/ClangBuiltLinux/l
  C:    irc://chat.freenode.net/clangbuiltlinux
  F:    Documentation/kbuild/llvm.rst
  F:    scripts/clang-tools/
 +F:    scripts/lld-version.sh
  K:    \b(?i:clang|llvm)\b
  
  CLEANCACHE API
@@@ -4369,7 -4355,7 +4370,7 @@@ CODA V4L2 MEM2MEM DRIVE
  M:    Philipp Zabel <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    Documentation/devicetree/bindings/media/coda.txt
 +F:    Documentation/devicetree/bindings/media/coda.yaml
  F:    drivers/media/platform/coda/
  
  CODE OF CONDUCT
  S:    Maintained
  F:    drivers/hwmon/corsair-cpro.c
  
 +CORSAIR-PSU HARDWARE MONITOR DRIVER
 +M:    Wilken Gottwalt <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/hwmon/corsair-psu.rst
 +F:    drivers/hwmon/corsair-psu.c
 +
  COSA/SRP SYNC SERIAL DRIVER
  M:    Jan "Yenya" Kasprzak <[email protected]>
  S:    Maintained
@@@ -4735,7 -4714,7 +4736,7 @@@ T:      git git://linuxtv.org/anttip/media_t
  F:    drivers/media/dvb-frontends/cxd2820r*
  
  CXGB3 ETHERNET DRIVER (CXGB3)
 -M:    Vishal Kulkarni <vishal@chelsio.com>
 +M:    Raju Rangoju <rajur@chelsio.com>
  L:    [email protected]
  S:    Supported
  W:    http://www.chelsio.com
@@@ -4767,7 -4746,7 +4768,7 @@@ W:      http://www.chelsio.co
  F:    drivers/net/ethernet/chelsio/inline_crypto/
  
  CXGB4 ETHERNET DRIVER (CXGB4)
 -M:    Vishal Kulkarni <vishal@chelsio.com>
 +M:    Raju Rangoju <rajur@chelsio.com>
  L:    [email protected]
  S:    Supported
  W:    http://www.chelsio.com
@@@ -4789,7 -4768,7 +4790,7 @@@ F:      drivers/infiniband/hw/cxgb4
  F:    include/uapi/rdma/cxgb4-abi.h
  
  CXGB4VF ETHERNET DRIVER (CXGB4VF)
 -M:    Vishal Kulkarni <vishal@gmail.com>
 +M:    Raju Rangoju <rajur@chelsio.com>
  L:    [email protected]
  S:    Supported
  W:    http://www.chelsio.com
@@@ -5013,15 -4992,6 +5014,15 @@@ M:    Mario Limonciello <mario.limonciello
  S:    Maintained
  F:    drivers/platform/x86/dell-wmi-descriptor.c
  
 +DELL WMI SYSMAN DRIVER
 +M:    Divya Bharathi <[email protected]>
 +M:    Mario Limonciello <[email protected]>
 +M:    Prasanth Ksr <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/ABI/testing/sysfs-class-firmware-attributes
 +F:    drivers/platform/x86/dell-wmi-sysman/
 +
  DELL WMI NOTIFICATIONS DRIVER
  M:    Matthew Garrett <[email protected]>
  M:    Pali Rohár <[email protected]>
@@@ -5037,8 -5007,9 +5038,8 @@@ T:      git git://linuxtv.org/media_tree.gi
  F:    drivers/media/platform/sti/delta
  
  DENALI NAND DRIVER
 -M:    Masahiro Yamada <[email protected]>
  L:    [email protected]
 -S:    Supported
 +S:    Orphan
  F:    drivers/mtd/nand/raw/denali*
  
  DESIGNWARE EDMA CORE IP DRIVER
@@@ -5151,9 -5122,7 +5152,9 @@@ M:      Support Opensource <support.opensour
  S:    Supported
  W:    http://www.dialog-semiconductor.com/products
  F:    Documentation/devicetree/bindings/input/da90??-onkey.txt
 +F:    Documentation/devicetree/bindings/input/dlg,da72??.txt
  F:    Documentation/devicetree/bindings/mfd/da90*.txt
 +F:    Documentation/devicetree/bindings/regulator/dlg,da9*.yaml
  F:    Documentation/devicetree/bindings/regulator/da92*.txt
  F:    Documentation/devicetree/bindings/regulator/slg51000.txt
  F:    Documentation/devicetree/bindings/sound/da[79]*.txt
@@@ -5163,7 -5132,6 +5164,7 @@@ F:      Documentation/hwmon/da90??.rs
  F:    drivers/gpio/gpio-da90??.c
  F:    drivers/hwmon/da90??-hwmon.c
  F:    drivers/iio/adc/da91??-*.c
 +F:    drivers/input/misc/da72??.[ch]
  F:    drivers/input/misc/da90??_onkey.c
  F:    drivers/input/touchscreen/da9052_tsi.c
  F:    drivers/leds/leds-da90??.c
@@@ -5179,7 -5147,6 +5180,7 @@@ F:      drivers/rtc/rtc-da90??.
  F:    drivers/thermal/da90??-thermal.c
  F:    drivers/video/backlight/da90??_bl.c
  F:    drivers/watchdog/da90??_wdt.c
 +F:    include/dt-bindings/regulator/dlg,da9*-regulator.h
  F:    include/linux/mfd/da903x.h
  F:    include/linux/mfd/da9052/
  F:    include/linux/mfd/da9055/
@@@ -5614,13 -5581,6 +5615,13 @@@ T:    git git://anongit.freedesktop.org/dr
  F:    Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml
  F:    drivers/gpu/drm/panel/panel-novatek-nt35510.c
  
 +DRM DRIVER FOR NOVATEK NT36672A PANELS
 +M:    Sumit Semwal <[email protected]>
 +S:    Maintained
 +T:    git git://anongit.freedesktop.org/drm/drm-misc
 +F:    Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
 +F:    drivers/gpu/drm/panel/panel-novatek-nt36672a.c
 +
  DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS
  M:    Ben Skeggs <[email protected]>
  L:    [email protected]
@@@ -5908,7 -5868,6 +5909,7 @@@ S:      Supporte
  F:    Documentation/devicetree/bindings/display/mediatek/
  F:    drivers/gpu/drm/mediatek/
  F:    drivers/phy/mediatek/phy-mtk-hdmi*
 +F:    drivers/phy/mediatek/phy-mtk-mipi*
  
  DRM DRIVERS FOR NVIDIA TEGRA
  M:    Thierry Reding <[email protected]>
@@@ -6001,7 -5960,6 +6002,7 @@@ F:      include/uapi/drm/v3d_drm.
  
  DRM DRIVERS FOR VC4
  M:    Eric Anholt <[email protected]>
 +M:    Maxime Ripard <[email protected]>
  S:    Supported
  T:    git git://github.com/anholt/linux
  T:    git git://anongit.freedesktop.org/drm/drm-misc
  S:    Maintained
  F:    drivers/edac/ie31200_edac.c
  
 +EDAC-IGEN6
 +M:    Tony Luck <[email protected]>
 +R:    Qiuxu Zhuo <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/edac/igen6_edac.c
 +
  EDAC-MPC85XX
  M:    Johannes Thumshirn <[email protected]>
  L:    [email protected]
@@@ -6452,7 -6403,7 +6453,7 @@@ EDAC-SKYLAK
  M:    Tony Luck <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    drivers/edac/skx_*.c
 +F:    drivers/edac/skx_*.[ch]
  
  EDAC-TI
  M:    Tero Kristo <[email protected]>
@@@ -6668,7 -6619,6 +6669,7 @@@ Q:      http://patchwork.ozlabs.org/project/
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4.git
  F:    Documentation/filesystems/ext4/
  F:    fs/ext4/
 +F:    include/trace/events/ext4.h
  
  Extended Verification Module (EVM)
  M:    Mimi Zohar <[email protected]>
@@@ -6959,10 -6909,17 +6960,10 @@@ S:   Maintaine
  W:    http://floatingpoint.sourceforge.net/emulator/index.html
  F:    arch/x86/math-emu/
  
 -FRAME RELAY DLCI/FRAD (Sangoma drivers too)
 -L:    [email protected]
 -S:    Orphan
 -F:    drivers/net/wan/dlci.c
 -F:    drivers/net/wan/sdla.c
 -
  FRAMEBUFFER LAYER
 -M:    Bartlomiej Zolnierkiewicz <[email protected]>
  L:    [email protected]
  L:    [email protected]
 -S:    Maintained
 +S:    Orphan
  Q:    http://patchwork.kernel.org/project/linux-fbdev/list/
  T:    git git://anongit.freedesktop.org/drm/drm-misc
  F:    Documentation/fb/
@@@ -7339,6 -7296,7 +7340,6 @@@ F:      drivers/staging/gasket
  
  GCC PLUGINS
  M:    Kees Cook <[email protected]>
 -R:    Emese Revfy <[email protected]>
  L:    [email protected]
  S:    Maintained
  F:    Documentation/kbuild/gcc-plugins.rst
@@@ -7380,17 -7338,6 +7381,17 @@@ S:    Maintaine
  F:    drivers/base/arch_topology.c
  F:    include/linux/arch_topology.h
  
 +GENERIC ENTRY CODE
 +M:    Thomas Gleixner <[email protected]>
 +M:    Peter Zijlstra <[email protected]>
 +M:    Andy Lutomirski <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +T:    git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git core/entry
 +F:    include/linux/entry-common.h
 +F:    include/linux/entry-kvm.h
 +F:    kernel/entry/
 +
  GENERIC GPIO I2C DRIVER
  M:    Wolfram Sang <[email protected]>
  S:    Supported
@@@ -7755,9 -7702,9 +7756,9 @@@ F:      drivers/clocksource/h8300_*.
  F:    drivers/irqchip/irq-renesas-h8*.c
  
  HABANALABS PCI DRIVER
 -M:    Oded Gabbay <o[email protected]>
 +M:    Oded Gabbay <o[email protected]>
  S:    Supported
 -T:    git https://github.com/HabanaAI/linux.git
 +T:    git https://git.kernel.org/pub/scm/linux/kernel/git/ogabbay/linux.git
  F:    Documentation/ABI/testing/debugfs-driver-habanalabs
  F:    Documentation/ABI/testing/sysfs-driver-habanalabs
  F:    drivers/misc/habanalabs/
@@@ -7955,15 -7902,6 +7956,15 @@@ F:    include/linux/hippidevice.
  F:    include/uapi/linux/if_hippi.h
  F:    net/802/hippi.c
  
 +HIRSCHMANN HELLCREEK ETHERNET SWITCH DRIVER
 +M:    Kurt Kanzenbach <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml
 +F:    drivers/net/dsa/hirschmann/*
 +F:    include/linux/platform_data/hirschmann-hellcreek.h
 +F:    net/dsa/tag_hellcreek.c
 +
  HISILICON DMA DRIVER
  M:    Zhou Wang <[email protected]>
  L:    [email protected]
@@@ -7983,7 -7921,7 +7984,7 @@@ HISILICON LPC BUS DRIVE
  M:    [email protected]
  S:    Maintained
  W:    http://www.hisilicon.com
 -F:    Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt
 +F:    Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml
  F:    drivers/bus/hisi_lpc.c
  
  HISILICON NETWORK SUBSYSTEM 3 DRIVER (HNS3)
@@@ -8062,7 -8000,7 +8063,7 @@@ F:      drivers/staging/hikey9xx
  HISILICON TRUE RANDOM NUMBER GENERATOR V2 SUPPORT
  M:    Zaibo Xu <[email protected]>
  S:    Maintained
 -F:    drivers/char/hw_random/hisi-trng-v2.c
 +F:    drivers/crypto/hisilicon/trng/trng.c
  
  HISILICON V3XX SPI NOR FLASH Controller Driver
  M:    John Garry <[email protected]>
@@@ -8690,7 -8628,7 +8691,7 @@@ INA209 HARDWARE MONITOR DRIVE
  M:    Guenter Roeck <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    Documentation/devicetree/bindings/hwmon/ina2xx.txt
 +F:    Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
  F:    Documentation/hwmon/ina209.rst
  F:    drivers/hwmon/ina209.c
  
@@@ -8736,16 -8674,19 +8737,16 @@@ F:   include/uapi/rdma
  F:    samples/bpf/ibumad_kern.c
  F:    samples/bpf/ibumad_user.c
  
 -INGENIC JZ4780 DMA Driver
 -M:    Zubair Lutfullah Kakakhel <[email protected]>
 -S:    Maintained
 -F:    drivers/dma/dma-jz4780.c
 -
  INGENIC JZ4780 NAND DRIVER
  M:    Harvey Hunt <[email protected]>
  L:    [email protected]
 +L:    [email protected]
  S:    Maintained
  F:    drivers/mtd/nand/raw/ingenic/
  
  INGENIC JZ47xx SoCs
  M:    Paul Cercueil <[email protected]>
 +L:    [email protected]
  S:    Maintained
  F:    arch/mips/boot/dts/ingenic/
  F:    arch/mips/generic/board-ingenic.c
@@@ -8893,8 -8834,8 +8894,8 @@@ S:      Supporte
  W:    http://www.intel.com/support/feedback.htm
  W:    http://e1000.sourceforge.net/
  Q:    http://patchwork.ozlabs.org/project/intel-wired-lan/list/
 -T:    git git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-queue.git
 -T:    git git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue.git
 +T:    git git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue.git
 +T:    git git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue.git
  F:    Documentation/networking/device_drivers/ethernet/intel/
  F:    drivers/net/ethernet/intel/
  F:    drivers/net/ethernet/intel/*/
@@@ -9018,23 -8959,6 +9019,23 @@@ M:    Deepak Saxena <[email protected]
  S:    Maintained
  F:    drivers/char/hw_random/ixp4xx-rng.c
  
 +INTEL KEEM BAY DRM DRIVER
 +M:    Anitha Chrisanthus <[email protected]>
 +M:    Edmund Dea <[email protected]>
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/display/intel,kmb_display.yaml
 +F:    drivers/gpu/drm/kmb/
 +
 +INTEL KEEM BAY OCS AES/SM4 CRYPTO DRIVER
 +M:    Daniele Alessandrelli <[email protected]>
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml
 +F:    drivers/crypto/keembay/Kconfig
 +F:    drivers/crypto/keembay/Makefile
 +F:    drivers/crypto/keembay/keembay-ocs-aes-core.c
 +F:    drivers/crypto/keembay/ocs-aes.c
 +F:    drivers/crypto/keembay/ocs-aes.h
 +
  INTEL MANAGEMENT ENGINE (mei)
  M:    Tomas Winkler <[email protected]>
  L:    [email protected]
@@@ -9053,6 -8977,22 +9054,6 @@@ S:     Supporte
  W:    https://01.org/linux-acpi
  F:    drivers/platform/x86/intel_menlow.c
  
 -INTEL MIC DRIVERS (mic)
 -M:    Sudeep Dutt <[email protected]>
 -M:    Ashutosh Dixit <[email protected]>
 -S:    Supported
 -W:    https://github.com/sudeepdutt/mic
 -W:    http://software.intel.com/en-us/mic-developer
 -F:    Documentation/misc-devices/mic/
 -F:    drivers/dma/mic_x100_dma.c
 -F:    drivers/dma/mic_x100_dma.h
 -F:    drivers/misc/mic/
 -F:    include/linux/mic_bus.h
 -F:    include/linux/scif.h
 -F:    include/uapi/linux/mic_common.h
 -F:    include/uapi/linux/mic_ioctl.h
 -F:    include/uapi/linux/scif_ioctl.h
 -
  INTEL P-Unit IPC DRIVER
  M:    Zha Qipeng <[email protected]>
  L:    [email protected]
@@@ -9082,12 -9022,6 +9083,12 @@@ F:    drivers/mfd/intel_soc_pmic
  F:    include/linux/mfd/intel_msic.h
  F:    include/linux/mfd/intel_soc_pmic*
  
 +INTEL PMT DRIVER
 +M:    "David E. Box" <[email protected]>
 +S:    Maintained
 +F:    drivers/mfd/intel_pmt.c
 +F:    drivers/platform/x86/intel_pmt_*
 +
  INTEL PRO/WIRELESS 2100, 2200BG, 2915ABG NETWORK CONNECTION SUPPORT
  M:    Stanislav Yakovlev <[email protected]>
  L:    [email protected]
@@@ -9163,13 -9097,26 +9164,13 @@@ S:   Supporte
  F:    drivers/net/wireless/intel/iwlegacy/
  
  INTEL WIRELESS WIFI LINK (iwlwifi)
 -M:    Johannes Berg <[email protected]>
 -M:    Emmanuel Grumbach <[email protected]>
  M:    Luca Coelho <[email protected]>
 -M:    Intel Linux Wireless <[email protected]>
  L:    [email protected]
  S:    Supported
  W:    https://wireless.wiki.kernel.org/en/users/drivers/iwlwifi
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi.git
  F:    drivers/net/wireless/intel/iwlwifi/
  
 -INTEL WIRELESS WIMAX CONNECTION 2400
 -M:    Inaky Perez-Gonzalez <[email protected]>
 -M:    [email protected]
 -L:    [email protected] (subscribers-only)
 -S:    Supported
 -W:    http://linuxwimax.org
 -F:    Documentation/admin-guide/wimax/i2400m.rst
 -F:    drivers/net/wimax/i2400m/
 -F:    include/uapi/linux/wimax/i2400m.h
 -
  INTEL WMI SLIM BOOTLOADER (SBL) FIRMWARE UPDATE DRIVER
  M:    Jithu Joseph <[email protected]>
  R:    Maurice Ma <[email protected]>
@@@ -9199,19 -9146,6 +9200,19 @@@ F:    Documentation/x86/intel_txt.rs
  F:    arch/x86/kernel/tboot.c
  F:    include/linux/tboot.h
  
 +INTEL SGX
 +M:    Jarkko Sakkinen <[email protected]>
 +L:    [email protected]
 +S:    Supported
 +Q:    https://patchwork.kernel.org/project/intel-sgx/list/
 +T:    git git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-sgx.git
 +F:    Documentation/x86/sgx.rst
 +F:    arch/x86/entry/vdso/vsgx.S
 +F:    arch/x86/include/uapi/asm/sgx.h
 +F:    arch/x86/kernel/cpu/sgx/*
 +F:    tools/testing/selftests/sgx/*
 +K:    \bSGX_
 +
  INTERCONNECT API
  M:    Georgi Djakov <[email protected]>
  L:    [email protected]
@@@ -9227,7 -9161,7 +9228,7 @@@ INVENSENSE ICM-426xx IMU DRIVE
  M:    Jean-Baptiste Maneyrol <[email protected]>
  L:    [email protected]
  S:    Maintained
 -W     https://invensense.tdk.com/
 +W:    https://invensense.tdk.com/
  F:    Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml
  F:    drivers/iio/imu/inv_icm42600/
  
@@@ -9258,7 -9192,6 +9259,7 @@@ F:      include/linux/iomap.
  
  IOMMU DRIVERS
  M:    Joerg Roedel <[email protected]>
 +M:    Will Deacon <[email protected]>
  L:    [email protected]
  S:    Maintained
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
@@@ -9342,6 -9275,7 +9343,6 @@@ F:      kernel/irq
  
  IRQCHIP DRIVERS
  M:    Thomas Gleixner <[email protected]>
 -M:    Jason Cooper <[email protected]>
  M:    Marc Zyngier <[email protected]>
  L:    [email protected]
  S:    Maintained
@@@ -9707,7 -9641,7 +9708,7 @@@ F:      arch/arm64/kvm
  F:    include/kvm/arm_*
  
  KERNEL VIRTUAL MACHINE FOR MIPS (KVM/mips)
 -M:    Huacai Chen <chenh[email protected]>
 +M:    Huacai Chen <chenh[email protected]>
  M:    Aleksandar Markovic <[email protected]>
  L:    [email protected]
  L:    [email protected]
@@@ -9741,7 -9675,6 +9742,7 @@@ F:      Documentation/virt/kvm/s390
  F:    arch/s390/include/asm/gmap.h
  F:    arch/s390/include/asm/kvm*
  F:    arch/s390/include/uapi/asm/kvm*
 +F:    arch/s390/kernel/uv.c
  F:    arch/s390/kvm/
  F:    arch/s390/mm/gmap.c
  F:    tools/testing/selftests/kvm/*/s390x/
@@@ -9930,6 -9863,13 +9931,6 @@@ S:     Maintaine
  F:    arch/mips/lantiq
  F:    drivers/soc/lantiq
  
 -LAPB module
 -L:    [email protected]
 -S:    Orphan
 -F:    Documentation/networking/lapb-module.rst
 -F:    include/*/lapb.h
 -F:    net/lapb/
 -
  LASI 53c700 driver for PARISC
  M:    "James E.J. Bottomley" <[email protected]>
  L:    [email protected]
  S:    Maintained
  W:    http://www.mac.linux-m68k.org/
  F:    arch/m68k/mac/
 +F:    drivers/macintosh/adb-iop.c
 +F:    drivers/macintosh/via-macii.c
  
  M68K ON HP9000/300
  M:    Philip Blundell <[email protected]>
@@@ -10559,7 -10497,6 +10560,7 @@@ M:   Srujana Challa <[email protected]
  L:    [email protected]
  S:    Maintained
  F:    drivers/crypto/marvell/
 +F:    include/linux/soc/marvell/octeontx2/
  
  MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2)
  M:    Mirko Lindner <[email protected]>
  S:    Maintained
  F:    drivers/net/ethernet/marvell/mvneta.*
  
 +MARVELL MVPP2 ETHERNET DRIVER
 +M:    Marcin Wojtas <[email protected]>
 +M:    Russell King <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/net/marvell-pp2.txt
 +F:    drivers/net/ethernet/marvell/mvpp2/
 +
  MARVELL MWIFIEX WIRELESS DRIVER
  M:    Amitkumar Karwar <[email protected]>
  M:    Ganapathi Bhat <[email protected]>
@@@ -10640,7 -10569,6 +10641,7 @@@ M:   hariprasad <[email protected]
  L:    [email protected]
  S:    Supported
  F:    drivers/net/ethernet/marvell/octeontx2/nic/
 +F:    include/linux/soc/marvell/octeontx2/
  
  MARVELL OCTEONTX2 RVU ADMIN FUNCTION DRIVER
  M:    Sunil Goutham <[email protected]>
@@@ -10652,13 -10580,6 +10653,13 @@@ S: Supporte
  F:    Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst
  F:    drivers/net/ethernet/marvell/octeontx2/af/
  
 +MARVELL PRESTERA ETHERNET SWITCH DRIVER
 +M:    Vadym Kochan <[email protected]>
 +M:    Taras Chornyi <[email protected]>
 +S:    Supported
 +W:    https://github.com/Marvell-switching/switchdev-prestera
 +F:    drivers/net/ethernet/marvell/prestera/
 +
  MARVELL SOC MMC/SD/SDIO CONTROLLER DRIVER
  M:    Nicolas Pitre <[email protected]>
  S:    Odd Fixes
  S:    Maintained
  T:    git git://linuxtv.org/media_tree.git
  F:    Documentation/admin-guide/media/imx7.rst
 -F:    Documentation/devicetree/bindings/media/imx7-csi.txt
 -F:    Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt
 +F:    Documentation/devicetree/bindings/media/nxp,imx7-csi.yaml
 +F:    Documentation/devicetree/bindings/media/nxp,imx7-mipi-csi2.yaml
  F:    drivers/staging/media/imx/imx7-media-csi.c
  F:    drivers/staging/media/imx/imx7-mipi-csis.c
  
@@@ -11188,12 -11109,6 +11189,12 @@@ S: Maintaine
  F:    Documentation/devicetree/bindings/i2c/i2c-mt7621.txt
  F:    drivers/i2c/busses/i2c-mt7621.c
  
 +MEDIATEK MT7621 PHY PCI DRIVER
 +M:    Sergio Paracuellos <[email protected]>
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml
 +F:    drivers/phy/ralink/phy-mt7621-pci.c
 +
  MEDIATEK NAND CONTROLLER DRIVER
  L:    [email protected]
  S:    Orphan
@@@ -11269,10 -11184,9 +11270,10 @@@ F: Documentation/devicetree/bindings/in
  F:    drivers/input/touchscreen/melfas_mip4.c
  
  MELLANOX BLUEFIELD I2C DRIVER
 -M:    Khalil Blaiech <kblaiech@mellanox.com>
 +M:    Khalil Blaiech <kblaiech@nvidia.com>
  L:    [email protected]
  S:    Supported
 +F:    Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml
  F:    drivers/i2c/busses/i2c-mlxbf.c
  
  MELLANOX ETHERNET DRIVER (mlx4_en)
@@@ -11280,7 -11194,7 +11281,7 @@@ M:   Tariq Toukan <[email protected]
  L:    [email protected]
  S:    Supported
  W:    http://www.mellanox.com
 -Q:    http://patchwork.ozlabs.org/project/netdev/list/
 +Q:    https://patchwork.kernel.org/project/netdevbpf/list/
  F:    drivers/net/ethernet/mellanox/mlx4/en_*
  
  MELLANOX ETHERNET DRIVER (mlx5e)
@@@ -11288,7 -11202,7 +11289,7 @@@ M:   Saeed Mahameed <[email protected]
  L:    [email protected]
  S:    Supported
  W:    http://www.mellanox.com
 -Q:    http://patchwork.ozlabs.org/project/netdev/list/
 +Q:    https://patchwork.kernel.org/project/netdevbpf/list/
  F:    drivers/net/ethernet/mellanox/mlx5/core/en_*
  
  MELLANOX ETHERNET INNOVA DRIVERS
@@@ -11296,7 -11210,7 +11297,7 @@@ R:   Boris Pismenny <[email protected]
  L:    [email protected]
  S:    Supported
  W:    http://www.mellanox.com
 -Q:    http://patchwork.ozlabs.org/project/netdev/list/
 +Q:    https://patchwork.kernel.org/project/netdevbpf/list/
  F:    drivers/net/ethernet/mellanox/mlx5/core/accel/*
  F:    drivers/net/ethernet/mellanox/mlx5/core/en_accel/*
  F:    drivers/net/ethernet/mellanox/mlx5/core/fpga/*
@@@ -11308,7 -11222,7 +11309,7 @@@ M:   Ido Schimmel <[email protected]
  L:    [email protected]
  S:    Supported
  W:    http://www.mellanox.com
 -Q:    http://patchwork.ozlabs.org/project/netdev/list/
 +Q:    https://patchwork.kernel.org/project/netdevbpf/list/
  F:    drivers/net/ethernet/mellanox/mlxsw/
  F:    tools/testing/selftests/drivers/net/mlxsw/
  
  L:    [email protected]
  S:    Supported
  W:    http://www.mellanox.com
 -Q:    http://patchwork.ozlabs.org/project/netdev/list/
 +Q:    https://patchwork.kernel.org/project/netdevbpf/list/
  F:    drivers/net/ethernet/mellanox/mlxfw/
  
  MELLANOX HARDWARE PLATFORM SUPPORT
  L:    [email protected]
  S:    Supported
  W:    http://www.mellanox.com
 -Q:    http://patchwork.ozlabs.org/project/netdev/list/
 +Q:    https://patchwork.kernel.org/project/netdevbpf/list/
  F:    drivers/net/ethernet/mellanox/mlx4/
  F:    include/linux/mlx4/
  
  L:    [email protected]
  S:    Supported
  W:    http://www.mellanox.com
 -Q:    http://patchwork.ozlabs.org/project/netdev/list/
 +Q:    https://patchwork.kernel.org/project/netdevbpf/list/
  F:    Documentation/networking/device_drivers/ethernet/mellanox/
  F:    drivers/net/ethernet/mellanox/mlx5/core/
  F:    include/linux/mlx5/
  L:    [email protected]
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux.git
  S:    Maintained
 -F:    drivers/devfreq/tegra20-devfreq.c
  F:    drivers/devfreq/tegra30-devfreq.c
  
  MEMORY MANAGEMENT
@@@ -11498,15 -11413,6 +11499,15 @@@ F: Documentation/devicetree/bindings/me
  F:    drivers/media/cec/platform/meson/ao-cec-g12a.c
  F:    drivers/media/cec/platform/meson/ao-cec.c
  
 +MESON GE2D DRIVER FOR AMLOGIC SOCS
 +M:    Neil Armstrong <[email protected]>
 +L:    [email protected]
 +L:    [email protected]
 +S:    Supported
 +T:    git git://linuxtv.org/media_tree.git
 +F:    Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml
 +F:    drivers/media/meson/ge2d/
 +
  MESON NAND CONTROLLER DRIVER FOR AMLOGIC SOCS
  M:    Liang Yang <[email protected]>
  L:    [email protected]
@@@ -11623,7 -11529,7 +11624,7 @@@ M:   Woojung Huh <[email protected]
  M:    Microchip Linux Driver Support <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    Documentation/devicetree/bindings/net/dsa/ksz.txt
 +F:    Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
  F:    drivers/net/dsa/microchip/*
  F:    include/linux/platform_data/microchip-ksz.h
  F:    net/dsa/tag_ksz.c
@@@ -11745,43 -11651,17 +11746,43 @@@ F:        drivers/scsi/smartpqi/smartpqi*.[ch
  F:    include/linux/cciss*.h
  F:    include/uapi/linux/cciss*.h
  
 +MICROSOFT SURFACE GPE LID SUPPORT DRIVER
 +M:    Maximilian Luz <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/platform/surface/surface_gpe.c
 +
 +MICROSOFT SURFACE HARDWARE PLATFORM SUPPORT
 +M:    Hans de Goede <[email protected]>
 +M:    Mark Gross <[email protected]>
 +M:    Maximilian Luz <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +T:    git git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git
 +F:    drivers/platform/surface/
 +
  MICROSOFT SURFACE PRO 3 BUTTON DRIVER
  M:    Chen Yu <[email protected]>
  L:    [email protected]
  S:    Supported
 -F:    drivers/platform/x86/surfacepro3_button.c
 +F:    drivers/platform/surface/surfacepro3_button.c
  
  MICROTEK X6 SCANNER
  M:    Oliver Neukum <[email protected]>
  S:    Maintained
  F:    drivers/usb/image/microtek.*
  
 +MIPI CCS, SMIA AND SMIA++ IMAGE SENSOR DRIVER
 +M:    Sakari Ailus <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml
 +F:    Documentation/driver-api/media/drivers/ccs/
 +F:    drivers/media/i2c/ccs-pll.c
 +F:    drivers/media/i2c/ccs-pll.h
 +F:    drivers/media/i2c/ccs/
 +F:    include/uapi/linux/smiapp.h
 +
  MIPS
  M:    Thomas Bogendoerfer <[email protected]>
  L:    [email protected]
@@@ -11849,7 -11729,7 +11850,7 @@@ F:   drivers/*/*/*loongson2
  F:    drivers/*/*loongson2*
  
  MIPS/LOONGSON64 ARCHITECTURE
 -M:    Huacai Chen <chenh[email protected]>
 +M:    Huacai Chen <chenh[email protected]>
  M:    Jiaxun Yang <[email protected]>
  L:    [email protected]
  S:    Maintained
@@@ -12052,7 -11932,7 +12053,7 @@@ M:   Jacopo Mondi <[email protected]
  L:    [email protected]
  S:    Maintained
  T:    git git://linuxtv.org/media_tree.git
 -F:    Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.txt
 +F:    Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml
  F:    drivers/media/i2c/mt9v111.c
  
  MULTIFUNCTION DEVICES (MFD)
@@@ -12271,7 -12151,7 +12272,7 @@@ M:   Jakub Kicinski <[email protected]
  L:    [email protected]
  S:    Maintained
  W:    http://www.linuxfoundation.org/en/Net
 -Q:    http://patchwork.ozlabs.org/project/netdev/list/
 +Q:    https://patchwork.kernel.org/project/netdevbpf/list/
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git
  F:    Documentation/devicetree/bindings/net/
@@@ -12316,7 -12196,7 +12317,7 @@@ M:   Jakub Kicinski <[email protected]
  L:    [email protected]
  S:    Maintained
  W:    http://www.linuxfoundation.org/en/Net
 -Q:    http://patchwork.ozlabs.org/project/netdev/list/
 +Q:    https://patchwork.kernel.org/project/netdevbpf/list/
  B:    mailto:[email protected]
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git
  S:    Maintained
  W:    https://github.com/multipath-tcp/mptcp_net-next/wiki
  B:    https://github.com/multipath-tcp/mptcp_net-next/issues
 +F:    Documentation/networking/mptcp-sysctl.rst
  F:    include/net/mptcp.h
  F:    include/uapi/linux/mptcp.h
  F:    net/mptcp/
@@@ -12687,7 -12566,7 +12688,7 @@@ NXP FXAS21002C DRIVE
  M:    Rui Miguel Silva <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.txt
 +F:    Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml
  F:    drivers/iio/gyro/fxas21002c.h
  F:    drivers/iio/gyro/fxas21002c_core.c
  F:    drivers/iio/gyro/fxas21002c_i2c.c
@@@ -12701,12 -12580,6 +12702,12 @@@ S: Maintaine
  F:    Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
  F:    drivers/gpu/drm/imx/dcss/
  
 +NXP PF8100/PF8121A/PF8200 PMIC REGULATOR DEVICE DRIVER
 +M:    Jagan Teki <[email protected]>
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml
 +F:    drivers/regulator/pf8x00-regulator.c
 +
  NXP PTN5150A CC LOGIC AND EXTCON DRIVER
  M:    Krzysztof Kozlowski <[email protected]>
  L:    [email protected]
@@@ -13004,14 -12877,6 +13005,14 @@@ M: Harald Welte <[email protected]
  S:    Maintained
  F:    drivers/char/pcmcia/cm4040_cs.*
  
 +OMNIVISION OV02A10 SENSOR DRIVER
 +M:    Dongchun Zhu <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +T:    git git://linuxtv.org/media_tree.git
 +F:    Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml
 +F:    drivers/media/i2c/ov02a10.c
 +
  OMNIVISION OV13858 SENSOR DRIVER
  M:    Sakari Ailus <[email protected]>
  L:    [email protected]
@@@ -13024,7 -12889,7 +13025,7 @@@ M:   Rui Miguel Silva <[email protected]
  L:    [email protected]
  S:    Maintained
  T:    git git://linuxtv.org/media_tree.git
 -F:    Documentation/devicetree/bindings/media/i2c/ov2680.txt
 +F:    Documentation/devicetree/bindings/media/i2c/ov2680.yaml
  F:    drivers/media/i2c/ov2680.c
  
  OMNIVISION OV2685 SENSOR DRIVER
@@@ -13082,8 -12947,9 +13083,8 @@@ T:   git git://linuxtv.org/media_tree.gi
  F:    drivers/media/i2c/ov5695.c
  
  OMNIVISION OV7670 SENSOR DRIVER
 -M:    Jonathan Corbet <[email protected]>
  L:    [email protected]
 -S:    Maintained
 +S:    Orphan
  T:    git git://linuxtv.org/media_tree.git
  F:    Documentation/devicetree/bindings/media/i2c/ov7670.txt
  F:    drivers/media/i2c/ov7670.c
@@@ -13093,7 -12959,7 +13094,7 @@@ M:   Jacopo Mondi <[email protected]
  L:    [email protected]
  S:    Odd fixes
  T:    git git://linuxtv.org/media_tree.git
 -F:    Documentation/devicetree/bindings/media/i2c/ov772x.txt
 +F:    Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml
  F:    drivers/media/i2c/ov772x.c
  F:    include/media/i2c/ov772x.h
  
@@@ -13129,14 -12995,6 +13130,14 @@@ T: git git://linuxtv.org/media_tree.gi
  F:    Documentation/devicetree/bindings/media/i2c/ov9650.txt
  F:    drivers/media/i2c/ov9650.c
  
 +OMNIVISION OV9734 SENSOR DRIVER
 +M:    Tianshu Qiu <[email protected]>
 +R:    Bingbu Cao <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +T:    git git://linuxtv.org/media_tree.git
 +F:    drivers/media/i2c/ov9734.c
 +
  ONENAND FLASH DRIVER
  M:    Kyungmin Park <[email protected]>
  L:    [email protected]
@@@ -13339,13 -13197,11 +13340,13 @@@ M:        Jesper Dangaard Brouer <hawk@kernel.
  M:    Ilias Apalodimas <[email protected]>
  L:    [email protected]
  S:    Supported
 +F:    Documentation/networking/page_pool.rst
  F:    include/net/page_pool.h
 +F:    include/trace/events/page_pool.h
  F:    net/core/page_pool.c
  
  PANASONIC LAPTOP ACPI EXTRAS DRIVER
 -M:    Harald Welte <[email protected]>
 +M:    Kenneth Chan <[email protected]>
  L:    [email protected]
  S:    Maintained
  F:    drivers/platform/x86/panasonic-laptop.c
@@@ -13569,6 -13425,7 +13570,6 @@@ F:   drivers/pci/controller/mobiveil/pcie
  
  PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support)
  M:    Thomas Petazzoni <[email protected]>
 -M:    Jason Cooper <[email protected]>
  L:    [email protected]
  L:    [email protected] (moderated for non-subscribers)
  S:    Maintained
@@@ -13644,8 -13501,6 +13645,8 @@@ M:   Kishon Vijay Abraham I <[email protected]
  M:    Lorenzo Pieralisi <[email protected]>
  L:    [email protected]
  S:    Supported
 +F:    Documentation/PCI/endpoint/*
 +F:    Documentation/misc-devices/pci-endpoint-test.rst
  T:    git git://git.kernel.org/pub/scm/linux/kernel/git/kishon/pci-endpoint.git
  F:    drivers/misc/pci_endpoint_test.c
  F:    drivers/pci/endpoint/
@@@ -14069,13 -13924,6 +14070,13 @@@ M: Logan Gunthorpe <[email protected]
  S:    Maintained
  F:    drivers/dma/plx_dma.c
  
 +PM6764TR DRIVER
 +M:    Charles Hsu     <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/hwmon/pm6764tr.rst
 +F:    drivers/hwmon/pmbus/pm6764tr.c
 +
  PM-GRAPH UTILITY
  M:    "Todd E Brandt" <[email protected]>
  L:    [email protected]
@@@ -14383,6 -14231,7 +14384,6 @@@ F:   drivers/media/usb/pwc/
  F:    include/trace/events/pwc.h
  
  PWM FAN DRIVER
 -M:    Kamil Debski <[email protected]>
  M:    Bartlomiej Zolnierkiewicz <[email protected]>
  L:    [email protected]
  S:    Supported
@@@ -14618,7 -14467,6 +14619,7 @@@ W:   https://wireless.wiki.kernel.org/en/
  F:    drivers/net/wireless/ath/ath9k/
  
  QUALCOMM CAMERA SUBSYSTEM DRIVER
 +M:    Robert Foss <[email protected]>
  M:    Todor Tomov <[email protected]>
  L:    [email protected]
  S:    Maintained
@@@ -14700,22 -14548,6 +14701,22 @@@ F: Documentation/devicetree/bindings/ma
  F:    drivers/mailbox/qcom-ipcc.c
  F:    include/dt-bindings/mailbox/qcom-ipcc.h
  
 +QUALCOMM IPQ4019 USB PHY DRIVER
 +M:    Robert Marko <[email protected]>
 +M:    Luka Perkov <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml
 +F:    drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
 +
 +QUALCOMM IPQ4019 VQMMC REGULATOR DRIVER
 +M:    Robert Marko <[email protected]>
 +M:    Luka Perkov <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml
 +F:    drivers/regulator/vqmmc-ipq4019-regulator.c
 +
  QUALCOMM RMNET DRIVER
  M:    Subash Abhinov Kasiviswanathan <[email protected]>
  M:    Sean Tranchetti <[email protected]>
@@@ -15000,7 -14832,7 +15001,7 @@@ T:   git git://git.kernel.org/pub/scm/lin
  F:    drivers/net/wireless/realtek/rtlwifi/
  
  REALTEK WIRELESS DRIVER (rtw88)
 -M:    Yan-Hsuan Chuang <yhchuang@realtek.com>
 +M:    Yan-Hsuan Chuang <tony0620emma@gmail.com>
  L:    [email protected]
  S:    Maintained
  F:    drivers/net/wireless/realtek/rtw88/
@@@ -15071,6 -14903,7 +15072,6 @@@ RENESAS ETHERNET DRIVER
  R:    Sergei Shtylyov <[email protected]>
  L:    [email protected]
  L:    [email protected]
 -F:    Documentation/devicetree/bindings/net/renesas,*.txt
  F:    Documentation/devicetree/bindings/net/renesas,*.yaml
  F:    drivers/net/ethernet/renesas/
  F:    include/linux/sh_eth.h
@@@ -15116,7 -14949,6 +15117,7 @@@ M:   Philipp Zabel <[email protected]
  S:    Maintained
  T:    git git://git.pengutronix.de/git/pza/linux
  F:    Documentation/devicetree/bindings/reset/
 +F:    Documentation/driver-api/reset.rst
  F:    drivers/reset/
  F:    include/dt-bindings/reset/
  F:    include/linux/reset-controller.h
@@@ -15201,13 -15033,10 +15202,13 @@@ ROCKCHIP ISP V1 DRIVE
  M:    Helen Koike <[email protected]>
  M:    Dafna Hirschfeld <[email protected]>
  L:    [email protected]
 +L:    [email protected]
  S:    Maintained
  F:    Documentation/admin-guide/media/rkisp1.rst
 +F:    Documentation/devicetree/bindings/media/rockchip-isp1.yaml
  F:    Documentation/userspace-api/media/v4l/pixfmt-meta-rkisp1.rst
 -F:    drivers/staging/media/rkisp1/
 +F:    drivers/media/platform/rockchip/rkisp1
 +F:    include/uapi/linux/rkisp1-config.h
  
  ROCKCHIP RASTER 2D GRAPHIC ACCELERATION UNIT DRIVER
  M:    Jacob Chen <[email protected]>
@@@ -15431,6 -15260,7 +15432,6 @@@ F:   drivers/iommu/s390-iommu.
  S390 IUCV NETWORK LAYER
  M:    Julian Wiedmann <[email protected]>
  M:    Karsten Graul <[email protected]>
 -M:    Ursula Braun <[email protected]>
  L:    [email protected]
  S:    Supported
  W:    http://www.ibm.com/developerworks/linux/linux390/
@@@ -15441,6 -15271,7 +15442,6 @@@ F:   net/iucv
  S390 NETWORK DRIVERS
  M:    Julian Wiedmann <[email protected]>
  M:    Karsten Graul <[email protected]>
 -M:    Ursula Braun <[email protected]>
  L:    [email protected]
  S:    Supported
  W:    http://www.ibm.com/developerworks/linux/linux390/
@@@ -15542,6 -15373,7 +15543,6 @@@ F:   security/safesetid
  
  SAMSUNG AUDIO (ASoC) DRIVERS
  M:    Krzysztof Kozlowski <[email protected]>
 -M:    Sangbeom Kim <[email protected]>
  M:    Sylwester Nawrocki <[email protected]>
  L:    [email protected] (moderated for non-subscribers)
  S:    Supported
  S:    Maintained
  F:    drivers/video/fbdev/s3c-fb.c
  
 +SAMSUNG INTERCONNECT DRIVERS
 +M:    Sylwester Nawrocki <[email protected]>
 +M:    Artur Świgoń <[email protected]>
 +L:    [email protected]
 +L:    [email protected]
 +S:    Supported
 +F:    drivers/interconnect/samsung/
 +
  SAMSUNG LAPTOP DRIVER
  M:    Corentin Chary <[email protected]>
  L:    [email protected]
@@@ -15584,6 -15408,7 +15585,6 @@@ S:   Maintaine
  F:    drivers/platform/x86/samsung-laptop.c
  
  SAMSUNG MULTIFUNCTION PMIC DEVICE DRIVERS
 -M:    Sangbeom Kim <[email protected]>
  M:    Krzysztof Kozlowski <[email protected]>
  M:    Bartlomiej Zolnierkiewicz <[email protected]>
  L:    [email protected]
@@@ -15617,12 -15442,14 +15618,12 @@@ F:        Documentation/devicetree/bindings/ne
  F:    drivers/nfc/s3fwrn5
  
  SAMSUNG S5C73M3 CAMERA DRIVER
 -M:    Kyungmin Park <[email protected]>
  M:    Andrzej Hajda <[email protected]>
  L:    [email protected]
  S:    Supported
  F:    drivers/media/i2c/s5c73m3/*
  
  SAMSUNG S5K5BAF CAMERA DRIVER
 -M:    Kyungmin Park <[email protected]>
  M:    Andrzej Hajda <[email protected]>
  L:    [email protected]
  S:    Supported
@@@ -15640,6 -15467,7 +15641,6 @@@ F:   Documentation/devicetree/bindings/cr
  F:    drivers/crypto/s5p-sss.c
  
  SAMSUNG S5P/EXYNOS4 SOC SERIES CAMERA SUBSYSTEM DRIVERS
 -M:    Kyungmin Park <[email protected]>
  M:    Sylwester Nawrocki <[email protected]>
  L:    [email protected]
  S:    Supported
@@@ -15662,6 -15490,7 +15663,6 @@@ F:   include/linux/clk/samsung.
  F:    include/linux/platform_data/clk-s3c2410.h
  
  SAMSUNG SPI DRIVERS
 -M:    Kukjin Kim <[email protected]>
  M:    Krzysztof Kozlowski <[email protected]>
  M:    Andi Shyti <[email protected]>
  L:    [email protected]
@@@ -15687,6 -15516,7 +15688,6 @@@ T:   git https://github.com/lmajewski/lin
  F:    drivers/thermal/samsung/
  
  SAMSUNG USB2 PHY DRIVER
 -M:    Kamil Debski <[email protected]>
  M:    Sylwester Nawrocki <[email protected]>
  L:    [email protected]
  S:    Supported
@@@ -15780,15 -15610,6 +15781,15 @@@ F: Documentation/scsi/st.rs
  F:    drivers/scsi/st.*
  F:    drivers/scsi/st_*.h
  
 +SCSI TARGET CORE USER DRIVER
 +M:    Bodo Stroesser <[email protected]>
 +L:    [email protected]
 +L:    [email protected]
 +S:    Supported
 +F:    Documentation/target/tcmu-design.rst
 +F:    drivers/target/target_core_user.c
 +F:    include/uapi/linux/target_core_user.h
 +
  SCSI TARGET SUBSYSTEM
  M:    "Martin K. Petersen" <[email protected]>
  L:    [email protected]
@@@ -15994,8 -15815,9 +15995,8 @@@ F:   drivers/slimbus
  F:    include/linux/slimbus.h
  
  SFC NETWORK DRIVER
 -M:    Solarflare linux maintainers <[email protected]>
 -M:    Edward Cree <[email protected]>
 -M:    Martin Habets <[email protected]>
 +M:    Edward Cree <[email protected]>
 +M:    Martin Habets <[email protected]>
  L:    [email protected]
  S:    Supported
  F:    drivers/net/ethernet/sfc/
@@@ -16012,18 -15834,18 +16013,18 @@@ F:        include/linux/sfp.
  K:    phylink\.h|struct\s+phylink|\.phylink|>phylink_|phylink_(autoneg|clear|connect|create|destroy|disconnect|ethtool|helper|mac|mii|of|set|start|stop|test|validate)
  
  SGI GRU DRIVER
 -M:    Dimitri Sivanich <sivanich@sgi.com>
 +M:    Dimitri Sivanich <dimitri.sivanich@hpe.com>
  S:    Maintained
  F:    drivers/misc/sgi-gru/
  
  SGI XP/XPC/XPNET DRIVER
 -M:    Cliff Whickman <[email protected]>
  M:    Robin Holt <[email protected]>
 +M:    Steve Wahl <[email protected]>
 +R:    Mike Travis <[email protected]>
  S:    Maintained
  F:    drivers/misc/sgi-xp/
  
  SHARED MEMORY COMMUNICATIONS (SMC) SOCKETS
 -M:    Ursula Braun <[email protected]>
  M:    Karsten Graul <[email protected]>
  L:    [email protected]
  S:    Supported
@@@ -16304,6 -16126,16 +16305,6 @@@ S:  Maintaine
  F:    drivers/firmware/smccc/
  F:    include/linux/arm-smccc.h
  
 -SMIA AND SMIA++ IMAGE SENSOR DRIVER
 -M:    Sakari Ailus <[email protected]>
 -L:    [email protected]
 -S:    Maintained
 -F:    Documentation/devicetree/bindings/media/i2c/nokia,smia.txt
 -F:    drivers/media/i2c/smiapp-pll.c
 -F:    drivers/media/i2c/smiapp-pll.h
 -F:    drivers/media/i2c/smiapp/
 -F:    include/uapi/linux/smiapp.h
 -
  SMM665 HARDWARE MONITOR DRIVER
  M:    Guenter Roeck <[email protected]>
  L:    [email protected]
@@@ -16399,7 -16231,7 +16400,7 @@@ F:   drivers/infiniband/sw/siw
  F:    include/uapi/rdma/siw-abi.h
  
  SOFT-ROCE DRIVER (rxe)
 -M:    Zhu Yanjun <yanjunz@nvidia.com>
 +M:    Zhu Yanjun <zyjzyj2000@gmail.com>
  L:    [email protected]
  S:    Supported
  F:    drivers/infiniband/sw/rxe/
@@@ -16466,7 -16298,7 +16467,7 @@@ M:   Ricardo Ribalda <[email protected]
  L:    [email protected]
  S:    Maintained
  T:    git git://linuxtv.org/media_tree.git
 -F:    Documentation/devicetree/bindings/media/i2c/sony,imx214.txt
 +F:    Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml
  F:    drivers/media/i2c/imx214.c
  
  SONY IMX219 SENSOR DRIVER
@@@ -16702,10 -16534,8 +16703,10 @@@ F: Documentation/networking/device_driv
  F:    drivers/net/ethernet/toshiba/spider_net*
  
  SPMI SUBSYSTEM
 -R:    Stephen Boyd <[email protected]>
 -L:    [email protected]
 +M:    Stephen Boyd <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +T:    git git://git.kernel.org/pub/scm/linux/kernel/git/sboyd/spmi.git
  F:    Documentation/devicetree/bindings/spmi/
  F:    drivers/spmi/
  F:    include/dt-bindings/spmi/spmi.h
@@@ -17565,12 -17395,6 +17566,12 @@@ W: http://thinkwiki.org/wiki/Ibm-acp
  T:    git git://repo.or.cz/linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git
  F:    drivers/platform/x86/thinkpad_acpi.c
  
 +THUNDERBOLT DMA TRAFFIC TEST DRIVER
 +M:    Isaac Hazan <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/thunderbolt/dma_test.c
 +
  THUNDERBOLT DRIVER
  M:    Andreas Noever <[email protected]>
  M:    Michael Jamet <[email protected]>
@@@ -18283,7 -18107,7 +18284,7 @@@ M:   Yu Chen <[email protected]
  M:    Binghui Wang <[email protected]>
  L:    [email protected]
  S:    Maintained
 -F:    Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt
 +F:    Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml
  F:    drivers/phy/hisilicon/phy-hi3660-usb3.c
  
  USB ISP116X DRIVER
  S:    Supported
  F:    drivers/usb/class/usblp.c
  
 +USB RAW GADGET DRIVER
 +R:    Andrey Konovalov <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/usb/raw-gadget.rst
 +F:    drivers/usb/gadget/legacy/raw_gadget.c
 +F:    include/uapi/linux/usb/raw_gadget.h
 +
  USB QMI WWAN NETWORK DRIVER
  M:    Bjørn Mork <[email protected]>
  L:    [email protected]
@@@ -18570,12 -18386,6 +18571,12 @@@ F: include/uapi/linux/uuid.
  F:    lib/test_uuid.c
  F:    lib/uuid.c
  
 +UV SYSFS DRIVER
 +M:    Justin Ernst <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    drivers/platform/x86/uv_sysfs.c
 +
  UVESAFB DRIVER
  M:    Michal Januszewski <[email protected]>
  L:    [email protected]
@@@ -19098,6 -18908,18 +19099,6 @@@ S:  Supporte
  W:    https://wireless.wiki.kernel.org/en/users/Drivers/wil6210
  F:    drivers/net/wireless/ath/wil6210/
  
 -WIMAX STACK
 -M:    Inaky Perez-Gonzalez <[email protected]>
 -M:    [email protected]
 -L:    [email protected] (subscribers-only)
 -S:    Supported
 -W:    http://linuxwimax.org
 -F:    Documentation/admin-guide/wimax/wimax.rst
 -F:    include/linux/wimax/debug.h
 -F:    include/net/wimax.h
 -F:    include/uapi/linux/wimax.h
 -F:    net/wimax/
 -
  WINBOND CIR DRIVER
  M:    David Härdeman <[email protected]>
  S:    Maintained
@@@ -19195,18 -19017,12 +19196,18 @@@ L:        [email protected]
  S:    Maintained
  N:    axp[128]
  
 -X.25 NETWORK LAYER
 -M:    Andrew Hendry <[email protected]>
 +X.25 STACK
 +M:    Martin Schiller <[email protected]>
  L:    [email protected]
 -S:    Odd Fixes
 +S:    Maintained
 +F:    Documentation/networking/lapb-module.rst
  F:    Documentation/networking/x25*
 +F:    drivers/net/wan/hdlc_x25.c
 +F:    drivers/net/wan/lapbether.c
 +F:    include/*/lapb.h
  F:    include/net/x25*
 +F:    include/uapi/linux/x25.h
 +F:    net/lapb/
  F:    net/x25/
  
  X86 ARCHITECTURE (32-BIT AND 64-BIT)
@@@ -19270,7 -19086,6 +19271,7 @@@ F:   arch/x86/platfor
  
  X86 PLATFORM UV HPE SUPERDOME FLEX
  M:    Steve Wahl <[email protected]>
 +R:    Mike Travis <[email protected]>
  R:    Dimitri Sivanich <[email protected]>
  R:    Russ Anderson <[email protected]>
  S:    Supported
@@@ -19321,17 -19136,12 +19322,17 @@@ L:        [email protected]
  L:    [email protected]
  S:    Supported
  F:    include/net/xdp.h
 +F:    include/net/xdp_priv.h
  F:    include/trace/events/xdp.h
  F:    kernel/bpf/cpumap.c
  F:    kernel/bpf/devmap.c
  F:    net/core/xdp.c
 -N:    xdp
 -K:    xdp
 +F:    samples/bpf/xdp*
 +F:    tools/testing/selftests/bpf/*xdp*
 +F:    tools/testing/selftests/bpf/*/*xdp*
 +F:    drivers/net/ethernet/*/*/*/*/*xdp*
 +F:    drivers/net/ethernet/*/*/*xdp*
 +K:    (?:\b|_)xdp(?:\b|_)
  
  XDP SOCKETS (AF_XDP)
  M:    Björn Töpel <[email protected]>
@@@ -19340,12 -19150,9 +19341,12 @@@ R: Jonathan Lemon <jonathan.lemon@gmail
  L:    [email protected]
  L:    [email protected]
  S:    Maintained
 +F:    Documentation/networking/af_xdp.rst
  F:    include/net/xdp_sock*
  F:    include/net/xsk_buff_pool.h
  F:    include/uapi/linux/if_xdp.h
 +F:    include/uapi/linux/xdp_diag.h
 +F:    include/net/netns/xdp.h
  F:    net/xdp/
  F:    samples/bpf/xdpsock*
  F:    tools/lib/bpf/xsk*
@@@ -19613,13 -19420,6 +19614,13 @@@ T: git git://git.kernel.org/pub/scm/lin
  F:    Documentation/filesystems/zonefs.rst
  F:    fs/zonefs/
  
 +ZPOOL COMPRESSED PAGE STORAGE API
 +M:    Dan Streetman <[email protected]>
 +L:    [email protected]
 +S:    Maintained
 +F:    include/linux/zpool.h
 +F:    mm/zpool.c
 +
  ZR36067 VIDEO FOR LINUX DRIVER
  M:    Corentin Labbe <[email protected]>
  L:    [email protected]
@@@ -19630,6 -19430,13 +19631,6 @@@ Q:  https://patchwork.linuxtv.org/projec
  F:    Documentation/driver-api/media/drivers/zoran.rst
  F:    drivers/staging/media/zoran/
  
 -ZPOOL COMPRESSED PAGE STORAGE API
 -M:    Dan Streetman <[email protected]>
 -L:    [email protected]
 -S:    Maintained
 -F:    include/linux/zpool.h
 -F:    mm/zpool.c
 -
  ZRAM COMPRESSED RAM BLOCK DEVICE DRVIER
  M:    Minchan Kim <[email protected]>
  M:    Nitin Gupta <[email protected]>
index 5e7d86cf5dfa4886dd24db6e03b60a8314214ad6,45768828fdb8ee5336bccfc464e1c02d10155ac3..d93ffbdedfc0aee2f62f0c4d7325e2971fd7f1da
@@@ -483,6 -483,7 +483,7 @@@ CONFIG_PINCTRL_IMX8MP=
  CONFIG_PINCTRL_IMX8MQ=y
  CONFIG_PINCTRL_IMX8QXP=y
  CONFIG_PINCTRL_IMX8DXL=y
+ CONFIG_PINCTRL_MSM=y
  CONFIG_PINCTRL_IPQ8074=y
  CONFIG_PINCTRL_IPQ6018=y
  CONFIG_PINCTRL_MSM8916=y
@@@ -500,7 -501,6 +501,7 @@@ CONFIG_GPIO_ALTERA=
  CONFIG_GPIO_DWAPB=y
  CONFIG_GPIO_MB86S7X=y
  CONFIG_GPIO_MPC8XXX=y
 +CONFIG_GPIO_MXC=y
  CONFIG_GPIO_PL061=y
  CONFIG_GPIO_RCAR=y
  CONFIG_GPIO_UNIPHIER=y
@@@ -1082,7 -1082,6 +1083,7 @@@ CONFIG_CRYPTO_DEV_CCREE=
  CONFIG_CRYPTO_DEV_HISI_SEC2=m
  CONFIG_CRYPTO_DEV_HISI_ZIP=m
  CONFIG_CRYPTO_DEV_HISI_HPRE=m
 +CONFIG_CRYPTO_DEV_HISI_TRNG=m
  CONFIG_CMA_SIZE_MBYTES=32
  CONFIG_PRINTK_TIME=y
  CONFIG_DEBUG_INFO=y
diff --combined drivers/pinctrl/Kconfig
index 453acce3d0c340484fd32e6f4f961ce6d3849300,67352375036f9effe5f3519d7e02c70a7658a38c..d4b2f2e2ed7539de7db6a02fbe97045a8492030b
@@@ -82,6 -82,7 +82,7 @@@ config PINCTRL_AT9
  config PINCTRL_AT91PIO4
        bool "AT91 PIO4 pinctrl driver"
        depends on OF
+       depends on HAS_IOMEM
        depends on ARCH_AT91 || COMPILE_TEST
        select PINMUX
        select GENERIC_PINCONF
@@@ -374,6 -375,25 +375,25 @@@ config PINCTRL_OCELO
        select OF_GPIO
        select REGMAP_MMIO
  
+ config PINCTRL_MICROCHIP_SGPIO
+       bool "Pinctrl driver for Microsemi/Microchip Serial GPIO"
+       depends on OF
+       depends on HAS_IOMEM
+       select GPIOLIB
+       select GPIOLIB_IRQCHIP
+       select GENERIC_PINCONF
+       select GENERIC_PINCTRL_GROUPS
+       select GENERIC_PINMUX_FUNCTIONS
+       select OF_GPIO
+       help
+         Support for the serial GPIO interface used on Microsemi and
+         Microchip SoC's. By using a serial interface, the SIO
+         controller significantly extends the number of available
+         GPIOs with a minimum number of additional pins on the
+         device. The primary purpose of the SIO controller is to
+         connect control signals from SFP modules and to act as an
+         LED controller.
  source "drivers/pinctrl/actions/Kconfig"
  source "drivers/pinctrl/aspeed/Kconfig"
  source "drivers/pinctrl/bcm/Kconfig"
@@@ -385,7 -405,6 +405,7 @@@ source "drivers/pinctrl/nomadik/Kconfig
  source "drivers/pinctrl/nuvoton/Kconfig"
  source "drivers/pinctrl/pxa/Kconfig"
  source "drivers/pinctrl/qcom/Kconfig"
 +source "drivers/pinctrl/ralink/Kconfig"
  source "drivers/pinctrl/renesas/Kconfig"
  source "drivers/pinctrl/samsung/Kconfig"
  source "drivers/pinctrl/spear/Kconfig"
diff --combined drivers/pinctrl/Makefile
index 3cdb6529db95a701495659fb2e281a3516fd7d04,c9fcfafc45c772c520cf6d836d9a5906cb8ec9e1..5bb9bb6cc3ceb0eb5c4f7e9ec8fdcadaeb538794
@@@ -46,6 -46,7 +46,7 @@@ obj-$(CONFIG_PINCTRL_ZYNQ)    += pinctrl-z
  obj-$(CONFIG_PINCTRL_INGENIC) += pinctrl-ingenic.o
  obj-$(CONFIG_PINCTRL_RK805)   += pinctrl-rk805.o
  obj-$(CONFIG_PINCTRL_OCELOT)  += pinctrl-ocelot.o
+ obj-$(CONFIG_PINCTRL_MICROCHIP_SGPIO) += pinctrl-microchip-sgpio.o
  obj-$(CONFIG_PINCTRL_EQUILIBRIUM)   += pinctrl-equilibrium.o
  
  obj-y                         += actions/
@@@ -59,7 -60,6 +60,7 @@@ obj-y                         += nomadik
  obj-$(CONFIG_ARCH_NPCM7XX)    += nuvoton/
  obj-$(CONFIG_PINCTRL_PXA)     += pxa/
  obj-$(CONFIG_ARCH_QCOM)               += qcom/
 +obj-$(CONFIG_PINCTRL_RALINK)  += ralink/
  obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
  obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
  obj-$(CONFIG_PINCTRL_SPEAR)   += spear/
index 899c16c17b6da4c0c7b42faff86d259603d2ddfe,8aa2e876cb476682150f810825f9494d5ddb2ef7..2d4acf21117cc5ce4fbabab577bf0ded2f4ca35b
@@@ -156,7 -156,7 +156,7 @@@ static int amd_gpio_set_debounce(struc
                        pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
                        pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
                } else if (debounce < 250000) {
 -                      time = debounce / 15600;
 +                      time = debounce / 15625;
                        pin_reg |= time & DB_TMR_OUT_MASK;
                        pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
                        pin_reg |= BIT(DB_TMR_LARGE_OFF);
                        pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
                        pin_reg |= BIT(DB_TMR_LARGE_OFF);
                } else {
 -                      pin_reg &= ~DB_CNTRl_MASK;
 +                      pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
                        ret = -EINVAL;
                }
        } else {
                pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
                pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
                pin_reg &= ~DB_TMR_OUT_MASK;
 -              pin_reg &= ~DB_CNTRl_MASK;
 +              pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
        }
        writel(pin_reg, gpio_dev->base + offset * 4);
        raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
@@@ -197,10 -197,16 +197,16 @@@ static int amd_gpio_set_config(struct g
  static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
  {
        u32 pin_reg;
+       u32 db_cntrl;
        unsigned long flags;
        unsigned int bank, i, pin_num;
        struct amd_gpio *gpio_dev = gpiochip_get_data(gc);
  
+       bool tmr_out_unit;
+       unsigned int time;
+       unsigned int unit;
+       bool tmr_large;
        char *level_trig;
        char *active_level;
        char *interrupt_enable;
        char *pull_down_enable;
        char *output_value;
        char *output_enable;
+       char debounce_value[40];
+       char *debounce_enable;
  
        for (bank = 0; bank < gpio_dev->hwbank_num; bank++) {
                seq_printf(s, "GPIO bank%d\t", bank);
                                        pin_sts = "input is low|";
                        }
  
+                       db_cntrl = (DB_CNTRl_MASK << DB_CNTRL_OFF) & pin_reg;
+                       if (db_cntrl) {
+                               tmr_out_unit = pin_reg & BIT(DB_TMR_OUT_UNIT_OFF);
+                               tmr_large = pin_reg & BIT(DB_TMR_LARGE_OFF);
+                               time = pin_reg & DB_TMR_OUT_MASK;
+                               if (tmr_large) {
+                                       if (tmr_out_unit)
+                                               unit = 62500;
+                                       else
+                                               unit = 15625;
+                               } else {
+                                       if (tmr_out_unit)
+                                               unit = 244;
+                                       else
+                                               unit = 61;
+                               }
+                               if ((DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF) == db_cntrl)
+                                       debounce_enable = "debouncing filter (high and low) enabled|";
+                               else if ((DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF) == db_cntrl)
+                                       debounce_enable = "debouncing filter (low) enabled|";
+                               else
+                                       debounce_enable = "debouncing filter (high) enabled|";
+                               snprintf(debounce_value, sizeof(debounce_value),
+                                        "debouncing timeout is %u (us)|", time * unit);
+                       } else {
+                               debounce_enable = "debouncing filter disabled|";
+                               snprintf(debounce_value, sizeof(debounce_value), " ");
+                       }
                        seq_printf(s, "%s %s %s %s %s %s\n"
-                               " %s %s %s %s %s %s %s 0x%x\n",
+                               " %s %s %s %s %s %s %s %s %s 0x%x\n",
                                level_trig, active_level, interrupt_enable,
                                interrupt_mask, wake_cntrl0, wake_cntrl1,
                                wake_cntrl2, pin_sts, pull_up_sel,
                                pull_up_enable, pull_down_enable,
-                               output_value, output_enable, pin_reg);
+                               output_value, output_enable,
+                               debounce_enable, debounce_value, pin_reg);
                }
        }
  }
@@@ -429,6 -468,7 +468,6 @@@ static int amd_gpio_irq_set_type(struc
                pin_reg &= ~BIT(LEVEL_TRIG_OFF);
                pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
                pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
 -              pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
                irq_set_handler_locked(d, handle_edge_irq);
                break;
  
                pin_reg &= ~BIT(LEVEL_TRIG_OFF);
                pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
                pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
 -              pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
                irq_set_handler_locked(d, handle_edge_irq);
                break;
  
                pin_reg &= ~BIT(LEVEL_TRIG_OFF);
                pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
                pin_reg |= BOTH_EADGE << ACTIVE_LEVEL_OFF;
 -              pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
                irq_set_handler_locked(d, handle_edge_irq);
                break;
  
                pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
                pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
                pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
 -              pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
 -              pin_reg |= DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF;
                irq_set_handler_locked(d, handle_level_irq);
                break;
  
                pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
                pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
                pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
 -              pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
 -              pin_reg |= DB_TYPE_PRESERVE_HIGH_GLITCH << DB_CNTRL_OFF;
                irq_set_handler_locked(d, handle_level_irq);
                break;
  
index 621909b01debd79d4eb0923fa48e314d747cc237,6d3c2c80c8ec199b709eb62aea802f56fcf0525f..53a6a24bd05270291b690de275b072cba5cfb722
@@@ -134,61 -134,42 +134,42 @@@ static int jz4740_pwm_pwm5_pins[] = { 0
  static int jz4740_pwm_pwm6_pins[] = { 0x7e, };
  static int jz4740_pwm_pwm7_pins[] = { 0x7f, };
  
- static int jz4740_mmc_1bit_funcs[] = { 0, 0, 0, };
- static int jz4740_mmc_4bit_funcs[] = { 0, 0, 0, };
- static int jz4740_uart0_data_funcs[] = { 1, 1, };
- static int jz4740_uart0_hwflow_funcs[] = { 1, 1, };
- static int jz4740_uart1_data_funcs[] = { 2, 2, };
- static int jz4740_lcd_8bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4740_lcd_16bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4740_lcd_18bit_funcs[] = { 0, 0, };
- static int jz4740_lcd_18bit_tft_funcs[] = { 0, 0, 0, 0, };
- static int jz4740_nand_cs1_funcs[] = { 0, };
- static int jz4740_nand_cs2_funcs[] = { 0, };
- static int jz4740_nand_cs3_funcs[] = { 0, };
- static int jz4740_nand_cs4_funcs[] = { 0, };
- static int jz4740_nand_fre_fwe_funcs[] = { 0, 0, };
- static int jz4740_pwm_pwm0_funcs[] = { 0, };
- static int jz4740_pwm_pwm1_funcs[] = { 0, };
- static int jz4740_pwm_pwm2_funcs[] = { 0, };
- static int jz4740_pwm_pwm3_funcs[] = { 0, };
- static int jz4740_pwm_pwm4_funcs[] = { 0, };
- static int jz4740_pwm_pwm5_funcs[] = { 0, };
- static int jz4740_pwm_pwm6_funcs[] = { 0, };
- static int jz4740_pwm_pwm7_funcs[] = { 0, };
- #define INGENIC_PIN_GROUP(name, id)                   \
+ #define INGENIC_PIN_GROUP_FUNCS(name, id, funcs)              \
        {                                               \
                name,                                   \
                id##_pins,                              \
                ARRAY_SIZE(id##_pins),                  \
-               id##_funcs,                             \
+               funcs,                                  \
        }
  
+ #define INGENIC_PIN_GROUP(name, id, func)             \
+       INGENIC_PIN_GROUP_FUNCS(name, id, (void *)(func))
  static const struct group_desc jz4740_groups[] = {
-       INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit),
-       INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit),
-       INGENIC_PIN_GROUP("uart0-data", jz4740_uart0_data),
-       INGENIC_PIN_GROUP("uart0-hwflow", jz4740_uart0_hwflow),
-       INGENIC_PIN_GROUP("uart1-data", jz4740_uart1_data),
-       INGENIC_PIN_GROUP("lcd-8bit", jz4740_lcd_8bit),
-       INGENIC_PIN_GROUP("lcd-16bit", jz4740_lcd_16bit),
-       INGENIC_PIN_GROUP("lcd-18bit", jz4740_lcd_18bit),
-       INGENIC_PIN_GROUP("lcd-18bit-tft", jz4740_lcd_18bit_tft),
+       INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit, 0),
+       INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit, 0),
+       INGENIC_PIN_GROUP("uart0-data", jz4740_uart0_data, 1),
+       INGENIC_PIN_GROUP("uart0-hwflow", jz4740_uart0_hwflow, 1),
+       INGENIC_PIN_GROUP("uart1-data", jz4740_uart1_data, 2),
+       INGENIC_PIN_GROUP("lcd-8bit", jz4740_lcd_8bit, 0),
+       INGENIC_PIN_GROUP("lcd-16bit", jz4740_lcd_16bit, 0),
+       INGENIC_PIN_GROUP("lcd-18bit", jz4740_lcd_18bit, 0),
+       INGENIC_PIN_GROUP("lcd-18bit-tft", jz4740_lcd_18bit_tft, 0),
        { "lcd-no-pins", },
-       INGENIC_PIN_GROUP("nand-cs1", jz4740_nand_cs1),
-       INGENIC_PIN_GROUP("nand-cs2", jz4740_nand_cs2),
-       INGENIC_PIN_GROUP("nand-cs3", jz4740_nand_cs3),
-       INGENIC_PIN_GROUP("nand-cs4", jz4740_nand_cs4),
-       INGENIC_PIN_GROUP("nand-fre-fwe", jz4740_nand_fre_fwe),
-       INGENIC_PIN_GROUP("pwm0", jz4740_pwm_pwm0),
-       INGENIC_PIN_GROUP("pwm1", jz4740_pwm_pwm1),
-       INGENIC_PIN_GROUP("pwm2", jz4740_pwm_pwm2),
-       INGENIC_PIN_GROUP("pwm3", jz4740_pwm_pwm3),
-       INGENIC_PIN_GROUP("pwm4", jz4740_pwm_pwm4),
-       INGENIC_PIN_GROUP("pwm5", jz4740_pwm_pwm5),
-       INGENIC_PIN_GROUP("pwm6", jz4740_pwm_pwm6),
-       INGENIC_PIN_GROUP("pwm7", jz4740_pwm_pwm7),
+       INGENIC_PIN_GROUP("nand-cs1", jz4740_nand_cs1, 0),
+       INGENIC_PIN_GROUP("nand-cs2", jz4740_nand_cs2, 0),
+       INGENIC_PIN_GROUP("nand-cs3", jz4740_nand_cs3, 0),
+       INGENIC_PIN_GROUP("nand-cs4", jz4740_nand_cs4, 0),
+       INGENIC_PIN_GROUP("nand-fre-fwe", jz4740_nand_fre_fwe, 0),
+       INGENIC_PIN_GROUP("pwm0", jz4740_pwm_pwm0, 0),
+       INGENIC_PIN_GROUP("pwm1", jz4740_pwm_pwm1, 0),
+       INGENIC_PIN_GROUP("pwm2", jz4740_pwm_pwm2, 0),
+       INGENIC_PIN_GROUP("pwm3", jz4740_pwm_pwm3, 0),
+       INGENIC_PIN_GROUP("pwm4", jz4740_pwm_pwm4, 0),
+       INGENIC_PIN_GROUP("pwm5", jz4740_pwm_pwm5, 0),
+       INGENIC_PIN_GROUP("pwm6", jz4740_pwm_pwm6, 0),
+       INGENIC_PIN_GROUP("pwm7", jz4740_pwm_pwm7, 0),
  };
  
  static const char *jz4740_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
@@@ -268,54 -249,33 +249,33 @@@ static int jz4725b_lcd_24bit_pins[] = 
  static int jz4725b_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
  static int jz4725b_lcd_generic_pins[] = { 0x75, };
  
- static int jz4725b_mmc0_1bit_funcs[] = { 1, 1, 1, };
- static int jz4725b_mmc0_4bit_funcs[] = { 1, 0, 1, };
- static int jz4725b_mmc1_1bit_funcs[] = { 0, 0, 0, };
- static int jz4725b_mmc1_4bit_funcs[] = { 0, 0, 0, };
- static int jz4725b_uart_data_funcs[] = { 1, 1, };
- static int jz4725b_nand_cs1_funcs[] = { 0, };
- static int jz4725b_nand_cs2_funcs[] = { 0, };
- static int jz4725b_nand_cs3_funcs[] = { 0, };
- static int jz4725b_nand_cs4_funcs[] = { 0, };
- static int jz4725b_nand_cle_ale_funcs[] = { 0, 0, };
- static int jz4725b_nand_fre_fwe_funcs[] = { 0, 0, };
- static int jz4725b_pwm_pwm0_funcs[] = { 0, };
- static int jz4725b_pwm_pwm1_funcs[] = { 0, };
- static int jz4725b_pwm_pwm2_funcs[] = { 0, };
- static int jz4725b_pwm_pwm3_funcs[] = { 0, };
- static int jz4725b_pwm_pwm4_funcs[] = { 0, };
- static int jz4725b_pwm_pwm5_funcs[] = { 0, };
- static int jz4725b_lcd_8bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4725b_lcd_16bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4725b_lcd_18bit_funcs[] = { 0, 0, };
- static int jz4725b_lcd_24bit_funcs[] = { 1, 1, 1, 1, };
- static int jz4725b_lcd_special_funcs[] = { 0, 0, 0, 0, };
- static int jz4725b_lcd_generic_funcs[] = { 0, };
+ static u8 jz4725b_mmc0_4bit_funcs[] = { 1, 0, 1, };
  
  static const struct group_desc jz4725b_groups[] = {
-       INGENIC_PIN_GROUP("mmc0-1bit", jz4725b_mmc0_1bit),
-       INGENIC_PIN_GROUP("mmc0-4bit", jz4725b_mmc0_4bit),
-       INGENIC_PIN_GROUP("mmc1-1bit", jz4725b_mmc1_1bit),
-       INGENIC_PIN_GROUP("mmc1-4bit", jz4725b_mmc1_4bit),
-       INGENIC_PIN_GROUP("uart-data", jz4725b_uart_data),
-       INGENIC_PIN_GROUP("nand-cs1", jz4725b_nand_cs1),
-       INGENIC_PIN_GROUP("nand-cs2", jz4725b_nand_cs2),
-       INGENIC_PIN_GROUP("nand-cs3", jz4725b_nand_cs3),
-       INGENIC_PIN_GROUP("nand-cs4", jz4725b_nand_cs4),
-       INGENIC_PIN_GROUP("nand-cle-ale", jz4725b_nand_cle_ale),
-       INGENIC_PIN_GROUP("nand-fre-fwe", jz4725b_nand_fre_fwe),
-       INGENIC_PIN_GROUP("pwm0", jz4725b_pwm_pwm0),
-       INGENIC_PIN_GROUP("pwm1", jz4725b_pwm_pwm1),
-       INGENIC_PIN_GROUP("pwm2", jz4725b_pwm_pwm2),
-       INGENIC_PIN_GROUP("pwm3", jz4725b_pwm_pwm3),
-       INGENIC_PIN_GROUP("pwm4", jz4725b_pwm_pwm4),
-       INGENIC_PIN_GROUP("pwm5", jz4725b_pwm_pwm5),
-       INGENIC_PIN_GROUP("lcd-8bit", jz4725b_lcd_8bit),
-       INGENIC_PIN_GROUP("lcd-16bit", jz4725b_lcd_16bit),
-       INGENIC_PIN_GROUP("lcd-18bit", jz4725b_lcd_18bit),
-       INGENIC_PIN_GROUP("lcd-24bit", jz4725b_lcd_24bit),
-       INGENIC_PIN_GROUP("lcd-special", jz4725b_lcd_special),
-       INGENIC_PIN_GROUP("lcd-generic", jz4725b_lcd_generic),
+       INGENIC_PIN_GROUP("mmc0-1bit", jz4725b_mmc0_1bit, 1),
+       INGENIC_PIN_GROUP_FUNCS("mmc0-4bit", jz4725b_mmc0_4bit,
+                               jz4725b_mmc0_4bit_funcs),
+       INGENIC_PIN_GROUP("mmc1-1bit", jz4725b_mmc1_1bit, 0),
+       INGENIC_PIN_GROUP("mmc1-4bit", jz4725b_mmc1_4bit, 0),
+       INGENIC_PIN_GROUP("uart-data", jz4725b_uart_data, 1),
+       INGENIC_PIN_GROUP("nand-cs1", jz4725b_nand_cs1, 0),
+       INGENIC_PIN_GROUP("nand-cs2", jz4725b_nand_cs2, 0),
+       INGENIC_PIN_GROUP("nand-cs3", jz4725b_nand_cs3, 0),
+       INGENIC_PIN_GROUP("nand-cs4", jz4725b_nand_cs4, 0),
+       INGENIC_PIN_GROUP("nand-cle-ale", jz4725b_nand_cle_ale, 0),
+       INGENIC_PIN_GROUP("nand-fre-fwe", jz4725b_nand_fre_fwe, 0),
+       INGENIC_PIN_GROUP("pwm0", jz4725b_pwm_pwm0, 0),
+       INGENIC_PIN_GROUP("pwm1", jz4725b_pwm_pwm1, 0),
+       INGENIC_PIN_GROUP("pwm2", jz4725b_pwm_pwm2, 0),
+       INGENIC_PIN_GROUP("pwm3", jz4725b_pwm_pwm3, 0),
+       INGENIC_PIN_GROUP("pwm4", jz4725b_pwm_pwm4, 0),
+       INGENIC_PIN_GROUP("pwm5", jz4725b_pwm_pwm5, 0),
+       INGENIC_PIN_GROUP("lcd-8bit", jz4725b_lcd_8bit, 0),
+       INGENIC_PIN_GROUP("lcd-16bit", jz4725b_lcd_16bit, 0),
+       INGENIC_PIN_GROUP("lcd-18bit", jz4725b_lcd_18bit, 0),
+       INGENIC_PIN_GROUP("lcd-24bit", jz4725b_lcd_24bit, 1),
+       INGENIC_PIN_GROUP("lcd-special", jz4725b_lcd_special, 0),
+       INGENIC_PIN_GROUP("lcd-generic", jz4725b_lcd_generic, 0),
  };
  
  static const char *jz4725b_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
@@@ -431,110 -391,61 +391,61 @@@ static int jz4760_pwm_pwm5_pins[] = { 0
  static int jz4760_pwm_pwm6_pins[] = { 0x6a, };
  static int jz4760_pwm_pwm7_pins[] = { 0x6b, };
  
- static int jz4760_uart0_data_funcs[] = { 0, 0, };
- static int jz4760_uart0_hwflow_funcs[] = { 0, 0, };
- static int jz4760_uart1_data_funcs[] = { 0, 0, };
- static int jz4760_uart1_hwflow_funcs[] = { 0, 0, };
- static int jz4760_uart2_data_funcs[] = { 0, 0, };
- static int jz4760_uart2_hwflow_funcs[] = { 0, 0, };
- static int jz4760_uart3_data_funcs[] = { 0, 1, };
- static int jz4760_uart3_hwflow_funcs[] = { 0, 0, };
- static int jz4760_mmc0_1bit_a_funcs[] = { 1, 1, 0, };
- static int jz4760_mmc0_4bit_a_funcs[] = { 1, 1, 1, };
- static int jz4760_mmc0_1bit_e_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc0_4bit_e_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc0_8bit_e_funcs[] = { 0, 0, 0, 0, };
- static int jz4760_mmc1_1bit_d_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc1_4bit_d_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc1_1bit_e_funcs[] = { 1, 1, 1, };
- static int jz4760_mmc1_4bit_e_funcs[] = { 1, 1, 1, };
- static int jz4760_mmc1_8bit_e_funcs[] = { 1, 1, 1, 1, };
- static int jz4760_mmc2_1bit_b_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc2_4bit_b_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc2_1bit_e_funcs[] = { 2, 2, 2, };
- static int jz4760_mmc2_4bit_e_funcs[] = { 2, 2, 2, };
- static int jz4760_mmc2_8bit_e_funcs[] = { 2, 2, 2, 2, };
- static int jz4760_nemc_8bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4760_nemc_16bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4760_nemc_cle_ale_funcs[] = { 0, 0, };
- static int jz4760_nemc_addr_funcs[] = { 0, 0, 0, 0, };
- static int jz4760_nemc_rd_we_funcs[] = { 0, 0, };
- static int jz4760_nemc_frd_fwe_funcs[] = { 0, 0, };
- static int jz4760_nemc_wait_funcs[] = { 0, };
- static int jz4760_nemc_cs1_funcs[] = { 0, };
- static int jz4760_nemc_cs2_funcs[] = { 0, };
- static int jz4760_nemc_cs3_funcs[] = { 0, };
- static int jz4760_nemc_cs4_funcs[] = { 0, };
- static int jz4760_nemc_cs5_funcs[] = { 0, };
- static int jz4760_nemc_cs6_funcs[] = { 0, };
- static int jz4760_i2c0_funcs[] = { 0, 0, };
- static int jz4760_i2c1_funcs[] = { 0, 0, };
- static int jz4760_cim_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4760_lcd_24bit_funcs[] = {
-       0, 0, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0,
- };
- static int jz4760_pwm_pwm0_funcs[] = { 0, };
- static int jz4760_pwm_pwm1_funcs[] = { 0, };
- static int jz4760_pwm_pwm2_funcs[] = { 0, };
- static int jz4760_pwm_pwm3_funcs[] = { 0, };
- static int jz4760_pwm_pwm4_funcs[] = { 0, };
- static int jz4760_pwm_pwm5_funcs[] = { 0, };
- static int jz4760_pwm_pwm6_funcs[] = { 0, };
- static int jz4760_pwm_pwm7_funcs[] = { 0, };
+ static u8 jz4760_uart3_data_funcs[] = { 0, 1, };
+ static u8 jz4760_mmc0_1bit_a_funcs[] = { 1, 1, 0, };
  
  static const struct group_desc jz4760_groups[] = {
-       INGENIC_PIN_GROUP("uart0-data", jz4760_uart0_data),
-       INGENIC_PIN_GROUP("uart0-hwflow", jz4760_uart0_hwflow),
-       INGENIC_PIN_GROUP("uart1-data", jz4760_uart1_data),
-       INGENIC_PIN_GROUP("uart1-hwflow", jz4760_uart1_hwflow),
-       INGENIC_PIN_GROUP("uart2-data", jz4760_uart2_data),
-       INGENIC_PIN_GROUP("uart2-hwflow", jz4760_uart2_hwflow),
-       INGENIC_PIN_GROUP("uart3-data", jz4760_uart3_data),
-       INGENIC_PIN_GROUP("uart3-hwflow", jz4760_uart3_hwflow),
-       INGENIC_PIN_GROUP("mmc0-1bit-a", jz4760_mmc0_1bit_a),
-       INGENIC_PIN_GROUP("mmc0-4bit-a", jz4760_mmc0_4bit_a),
-       INGENIC_PIN_GROUP("mmc0-1bit-e", jz4760_mmc0_1bit_e),
-       INGENIC_PIN_GROUP("mmc0-4bit-e", jz4760_mmc0_4bit_e),
-       INGENIC_PIN_GROUP("mmc0-8bit-e", jz4760_mmc0_8bit_e),
-       INGENIC_PIN_GROUP("mmc1-1bit-d", jz4760_mmc1_1bit_d),
-       INGENIC_PIN_GROUP("mmc1-4bit-d", jz4760_mmc1_4bit_d),
-       INGENIC_PIN_GROUP("mmc1-1bit-e", jz4760_mmc1_1bit_e),
-       INGENIC_PIN_GROUP("mmc1-4bit-e", jz4760_mmc1_4bit_e),
-       INGENIC_PIN_GROUP("mmc1-8bit-e", jz4760_mmc1_8bit_e),
-       INGENIC_PIN_GROUP("mmc2-1bit-b", jz4760_mmc2_1bit_b),
-       INGENIC_PIN_GROUP("mmc2-4bit-b", jz4760_mmc2_4bit_b),
-       INGENIC_PIN_GROUP("mmc2-1bit-e", jz4760_mmc2_1bit_e),
-       INGENIC_PIN_GROUP("mmc2-4bit-e", jz4760_mmc2_4bit_e),
-       INGENIC_PIN_GROUP("mmc2-8bit-e", jz4760_mmc2_8bit_e),
-       INGENIC_PIN_GROUP("nemc-8bit-data", jz4760_nemc_8bit_data),
-       INGENIC_PIN_GROUP("nemc-16bit-data", jz4760_nemc_16bit_data),
-       INGENIC_PIN_GROUP("nemc-cle-ale", jz4760_nemc_cle_ale),
-       INGENIC_PIN_GROUP("nemc-addr", jz4760_nemc_addr),
-       INGENIC_PIN_GROUP("nemc-rd-we", jz4760_nemc_rd_we),
-       INGENIC_PIN_GROUP("nemc-frd-fwe", jz4760_nemc_frd_fwe),
-       INGENIC_PIN_GROUP("nemc-wait", jz4760_nemc_wait),
-       INGENIC_PIN_GROUP("nemc-cs1", jz4760_nemc_cs1),
-       INGENIC_PIN_GROUP("nemc-cs2", jz4760_nemc_cs2),
-       INGENIC_PIN_GROUP("nemc-cs3", jz4760_nemc_cs3),
-       INGENIC_PIN_GROUP("nemc-cs4", jz4760_nemc_cs4),
-       INGENIC_PIN_GROUP("nemc-cs5", jz4760_nemc_cs5),
-       INGENIC_PIN_GROUP("nemc-cs6", jz4760_nemc_cs6),
-       INGENIC_PIN_GROUP("i2c0-data", jz4760_i2c0),
-       INGENIC_PIN_GROUP("i2c1-data", jz4760_i2c1),
-       INGENIC_PIN_GROUP("cim-data", jz4760_cim),
-       INGENIC_PIN_GROUP("lcd-24bit", jz4760_lcd_24bit),
+       INGENIC_PIN_GROUP("uart0-data", jz4760_uart0_data, 0),
+       INGENIC_PIN_GROUP("uart0-hwflow", jz4760_uart0_hwflow, 0),
+       INGENIC_PIN_GROUP("uart1-data", jz4760_uart1_data, 0),
+       INGENIC_PIN_GROUP("uart1-hwflow", jz4760_uart1_hwflow, 0),
+       INGENIC_PIN_GROUP("uart2-data", jz4760_uart2_data, 0),
+       INGENIC_PIN_GROUP("uart2-hwflow", jz4760_uart2_hwflow, 0),
+       INGENIC_PIN_GROUP_FUNCS("uart3-data", jz4760_uart3_data,
+                               jz4760_uart3_data_funcs),
+       INGENIC_PIN_GROUP("uart3-hwflow", jz4760_uart3_hwflow, 0),
+       INGENIC_PIN_GROUP_FUNCS("mmc0-1bit-a", jz4760_mmc0_1bit_a,
+                               jz4760_mmc0_1bit_a_funcs),
+       INGENIC_PIN_GROUP("mmc0-4bit-a", jz4760_mmc0_4bit_a, 1),
+       INGENIC_PIN_GROUP("mmc0-1bit-e", jz4760_mmc0_1bit_e, 0),
+       INGENIC_PIN_GROUP("mmc0-4bit-e", jz4760_mmc0_4bit_e, 0),
+       INGENIC_PIN_GROUP("mmc0-8bit-e", jz4760_mmc0_8bit_e, 0),
+       INGENIC_PIN_GROUP("mmc1-1bit-d", jz4760_mmc1_1bit_d, 0),
+       INGENIC_PIN_GROUP("mmc1-4bit-d", jz4760_mmc1_4bit_d, 0),
+       INGENIC_PIN_GROUP("mmc1-1bit-e", jz4760_mmc1_1bit_e, 1),
+       INGENIC_PIN_GROUP("mmc1-4bit-e", jz4760_mmc1_4bit_e, 1),
+       INGENIC_PIN_GROUP("mmc1-8bit-e", jz4760_mmc1_8bit_e, 1),
+       INGENIC_PIN_GROUP("mmc2-1bit-b", jz4760_mmc2_1bit_b, 0),
+       INGENIC_PIN_GROUP("mmc2-4bit-b", jz4760_mmc2_4bit_b, 0),
+       INGENIC_PIN_GROUP("mmc2-1bit-e", jz4760_mmc2_1bit_e, 2),
+       INGENIC_PIN_GROUP("mmc2-4bit-e", jz4760_mmc2_4bit_e, 2),
+       INGENIC_PIN_GROUP("mmc2-8bit-e", jz4760_mmc2_8bit_e, 2),
+       INGENIC_PIN_GROUP("nemc-8bit-data", jz4760_nemc_8bit_data, 0),
+       INGENIC_PIN_GROUP("nemc-16bit-data", jz4760_nemc_16bit_data, 0),
+       INGENIC_PIN_GROUP("nemc-cle-ale", jz4760_nemc_cle_ale, 0),
+       INGENIC_PIN_GROUP("nemc-addr", jz4760_nemc_addr, 0),
+       INGENIC_PIN_GROUP("nemc-rd-we", jz4760_nemc_rd_we, 0),
+       INGENIC_PIN_GROUP("nemc-frd-fwe", jz4760_nemc_frd_fwe, 0),
+       INGENIC_PIN_GROUP("nemc-wait", jz4760_nemc_wait, 0),
+       INGENIC_PIN_GROUP("nemc-cs1", jz4760_nemc_cs1, 0),
+       INGENIC_PIN_GROUP("nemc-cs2", jz4760_nemc_cs2, 0),
+       INGENIC_PIN_GROUP("nemc-cs3", jz4760_nemc_cs3, 0),
+       INGENIC_PIN_GROUP("nemc-cs4", jz4760_nemc_cs4, 0),
+       INGENIC_PIN_GROUP("nemc-cs5", jz4760_nemc_cs5, 0),
+       INGENIC_PIN_GROUP("nemc-cs6", jz4760_nemc_cs6, 0),
+       INGENIC_PIN_GROUP("i2c0-data", jz4760_i2c0, 0),
+       INGENIC_PIN_GROUP("i2c1-data", jz4760_i2c1, 0),
+       INGENIC_PIN_GROUP("cim-data", jz4760_cim, 0),
+       INGENIC_PIN_GROUP("lcd-24bit", jz4760_lcd_24bit, 0),
        { "lcd-no-pins", },
-       INGENIC_PIN_GROUP("pwm0", jz4760_pwm_pwm0),
-       INGENIC_PIN_GROUP("pwm1", jz4760_pwm_pwm1),
-       INGENIC_PIN_GROUP("pwm2", jz4760_pwm_pwm2),
-       INGENIC_PIN_GROUP("pwm3", jz4760_pwm_pwm3),
-       INGENIC_PIN_GROUP("pwm4", jz4760_pwm_pwm4),
-       INGENIC_PIN_GROUP("pwm5", jz4760_pwm_pwm5),
-       INGENIC_PIN_GROUP("pwm6", jz4760_pwm_pwm6),
-       INGENIC_PIN_GROUP("pwm7", jz4760_pwm_pwm7),
+       INGENIC_PIN_GROUP("pwm0", jz4760_pwm_pwm0, 0),
+       INGENIC_PIN_GROUP("pwm1", jz4760_pwm_pwm1, 0),
+       INGENIC_PIN_GROUP("pwm2", jz4760_pwm_pwm2, 0),
+       INGENIC_PIN_GROUP("pwm3", jz4760_pwm_pwm3, 0),
+       INGENIC_PIN_GROUP("pwm4", jz4760_pwm_pwm4, 0),
+       INGENIC_PIN_GROUP("pwm5", jz4760_pwm_pwm5, 0),
+       INGENIC_PIN_GROUP("pwm6", jz4760_pwm_pwm6, 0),
+       INGENIC_PIN_GROUP("pwm7", jz4760_pwm_pwm7, 0),
  };
  
  static const char *jz4760_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
@@@ -635,44 -546,44 +546,44 @@@ static int jz4770_uart3_data_pins[] = 
  static int jz4770_uart3_hwflow_pins[] = { 0x88, 0x89, };
  static int jz4770_ssi0_dt_a_pins[] = { 0x15, };
  static int jz4770_ssi0_dt_b_pins[] = { 0x35, };
 -static int jz4770_ssi0_dt_d_pins[] = { 0x55, };
 -static int jz4770_ssi0_dt_e_pins[] = { 0x71, };
 +static int jz4770_ssi0_dt_d_pins[] = { 0x75, };
 +static int jz4770_ssi0_dt_e_pins[] = { 0x91, };
  static int jz4770_ssi0_dr_a_pins[] = { 0x14, };
  static int jz4770_ssi0_dr_b_pins[] = { 0x34, };
 -static int jz4770_ssi0_dr_d_pins[] = { 0x54, };
 -static int jz4770_ssi0_dr_e_pins[] = { 0x6e, };
 +static int jz4770_ssi0_dr_d_pins[] = { 0x74, };
 +static int jz4770_ssi0_dr_e_pins[] = { 0x8e, };
  static int jz4770_ssi0_clk_a_pins[] = { 0x12, };
  static int jz4770_ssi0_clk_b_pins[] = { 0x3c, };
 -static int jz4770_ssi0_clk_d_pins[] = { 0x58, };
 -static int jz4770_ssi0_clk_e_pins[] = { 0x6f, };
 +static int jz4770_ssi0_clk_d_pins[] = { 0x78, };
 +static int jz4770_ssi0_clk_e_pins[] = { 0x8f, };
  static int jz4770_ssi0_gpc_b_pins[] = { 0x3e, };
 -static int jz4770_ssi0_gpc_d_pins[] = { 0x56, };
 -static int jz4770_ssi0_gpc_e_pins[] = { 0x73, };
 +static int jz4770_ssi0_gpc_d_pins[] = { 0x76, };
 +static int jz4770_ssi0_gpc_e_pins[] = { 0x93, };
  static int jz4770_ssi0_ce0_a_pins[] = { 0x13, };
  static int jz4770_ssi0_ce0_b_pins[] = { 0x3d, };
 -static int jz4770_ssi0_ce0_d_pins[] = { 0x59, };
 -static int jz4770_ssi0_ce0_e_pins[] = { 0x70, };
 +static int jz4770_ssi0_ce0_d_pins[] = { 0x79, };
 +static int jz4770_ssi0_ce0_e_pins[] = { 0x90, };
  static int jz4770_ssi0_ce1_b_pins[] = { 0x3f, };
 -static int jz4770_ssi0_ce1_d_pins[] = { 0x57, };
 -static int jz4770_ssi0_ce1_e_pins[] = { 0x72, };
 +static int jz4770_ssi0_ce1_d_pins[] = { 0x77, };
 +static int jz4770_ssi0_ce1_e_pins[] = { 0x92, };
  static int jz4770_ssi1_dt_b_pins[] = { 0x35, };
 -static int jz4770_ssi1_dt_d_pins[] = { 0x55, };
 -static int jz4770_ssi1_dt_e_pins[] = { 0x71, };
 +static int jz4770_ssi1_dt_d_pins[] = { 0x75, };
 +static int jz4770_ssi1_dt_e_pins[] = { 0x91, };
  static int jz4770_ssi1_dr_b_pins[] = { 0x34, };
 -static int jz4770_ssi1_dr_d_pins[] = { 0x54, };
 -static int jz4770_ssi1_dr_e_pins[] = { 0x6e, };
 +static int jz4770_ssi1_dr_d_pins[] = { 0x74, };
 +static int jz4770_ssi1_dr_e_pins[] = { 0x8e, };
  static int jz4770_ssi1_clk_b_pins[] = { 0x3c, };
 -static int jz4770_ssi1_clk_d_pins[] = { 0x58, };
 -static int jz4770_ssi1_clk_e_pins[] = { 0x6f, };
 +static int jz4770_ssi1_clk_d_pins[] = { 0x78, };
 +static int jz4770_ssi1_clk_e_pins[] = { 0x8f, };
  static int jz4770_ssi1_gpc_b_pins[] = { 0x3e, };
 -static int jz4770_ssi1_gpc_d_pins[] = { 0x56, };
 -static int jz4770_ssi1_gpc_e_pins[] = { 0x73, };
 +static int jz4770_ssi1_gpc_d_pins[] = { 0x76, };
 +static int jz4770_ssi1_gpc_e_pins[] = { 0x93, };
  static int jz4770_ssi1_ce0_b_pins[] = { 0x3d, };
 -static int jz4770_ssi1_ce0_d_pins[] = { 0x59, };
 -static int jz4770_ssi1_ce0_e_pins[] = { 0x70, };
 +static int jz4770_ssi1_ce0_d_pins[] = { 0x79, };
 +static int jz4770_ssi1_ce0_e_pins[] = { 0x90, };
  static int jz4770_ssi1_ce1_b_pins[] = { 0x3f, };
 -static int jz4770_ssi1_ce1_d_pins[] = { 0x57, };
 -static int jz4770_ssi1_ce1_e_pins[] = { 0x72, };
 +static int jz4770_ssi1_ce1_d_pins[] = { 0x77, };
 +static int jz4770_ssi1_ce1_e_pins[] = { 0x92, };
  static int jz4770_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
  static int jz4770_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
  static int jz4770_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
@@@ -715,6 -626,10 +626,10 @@@ static int jz4770_cim_8bit_pins[] = 
  static int jz4770_cim_12bit_pins[] = {
        0x32, 0x33, 0xb0, 0xb1,
  };
+ static int jz4770_lcd_8bit_pins[] = {
+       0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x4c, 0x4d,
+       0x48, 0x49, 0x52, 0x53,
+ };
  static int jz4770_lcd_24bit_pins[] = {
        0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
        0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
@@@ -735,200 -650,104 +650,104 @@@ static int jz4770_mac_rmii_pins[] = 
  static int jz4770_mac_mii_pins[] = { 0xa7, 0xaf, };
  static int jz4770_otg_pins[] = { 0x8a, };
  
- static int jz4770_uart0_data_funcs[] = { 0, 0, };
- static int jz4770_uart0_hwflow_funcs[] = { 0, 0, };
- static int jz4770_uart1_data_funcs[] = { 0, 0, };
- static int jz4770_uart1_hwflow_funcs[] = { 0, 0, };
- static int jz4770_uart2_data_funcs[] = { 0, 0, };
- static int jz4770_uart2_hwflow_funcs[] = { 0, 0, };
- static int jz4770_uart3_data_funcs[] = { 0, 1, };
- static int jz4770_uart3_hwflow_funcs[] = { 0, 0, };
- static int jz4770_ssi0_dt_a_funcs[] = { 2, };
- static int jz4770_ssi0_dt_b_funcs[] = { 1, };
- static int jz4770_ssi0_dt_d_funcs[] = { 1, };
- static int jz4770_ssi0_dt_e_funcs[] = { 0, };
- static int jz4770_ssi0_dr_a_funcs[] = { 1, };
- static int jz4770_ssi0_dr_b_funcs[] = { 1, };
- static int jz4770_ssi0_dr_d_funcs[] = { 1, };
- static int jz4770_ssi0_dr_e_funcs[] = { 0, };
- static int jz4770_ssi0_clk_a_funcs[] = { 2, };
- static int jz4770_ssi0_clk_b_funcs[] = { 1, };
- static int jz4770_ssi0_clk_d_funcs[] = { 1, };
- static int jz4770_ssi0_clk_e_funcs[] = { 0, };
- static int jz4770_ssi0_gpc_b_funcs[] = { 1, };
- static int jz4770_ssi0_gpc_d_funcs[] = { 1, };
- static int jz4770_ssi0_gpc_e_funcs[] = { 0, };
- static int jz4770_ssi0_ce0_a_funcs[] = { 2, };
- static int jz4770_ssi0_ce0_b_funcs[] = { 1, };
- static int jz4770_ssi0_ce0_d_funcs[] = { 1, };
- static int jz4770_ssi0_ce0_e_funcs[] = { 0, };
- static int jz4770_ssi0_ce1_b_funcs[] = { 1, };
- static int jz4770_ssi0_ce1_d_funcs[] = { 1, };
- static int jz4770_ssi0_ce1_e_funcs[] = { 0, };
- static int jz4770_ssi1_dt_b_funcs[] = { 2, };
- static int jz4770_ssi1_dt_d_funcs[] = { 2, };
- static int jz4770_ssi1_dt_e_funcs[] = { 1, };
- static int jz4770_ssi1_dr_b_funcs[] = { 2, };
- static int jz4770_ssi1_dr_d_funcs[] = { 2, };
- static int jz4770_ssi1_dr_e_funcs[] = { 1, };
- static int jz4770_ssi1_clk_b_funcs[] = { 2, };
- static int jz4770_ssi1_clk_d_funcs[] = { 2, };
- static int jz4770_ssi1_clk_e_funcs[] = { 1, };
- static int jz4770_ssi1_gpc_b_funcs[] = { 2, };
- static int jz4770_ssi1_gpc_d_funcs[] = { 2, };
- static int jz4770_ssi1_gpc_e_funcs[] = { 1, };
- static int jz4770_ssi1_ce0_b_funcs[] = { 2, };
- static int jz4770_ssi1_ce0_d_funcs[] = { 2, };
- static int jz4770_ssi1_ce0_e_funcs[] = { 1, };
- static int jz4770_ssi1_ce1_b_funcs[] = { 2, };
- static int jz4770_ssi1_ce1_d_funcs[] = { 2, };
- static int jz4770_ssi1_ce1_e_funcs[] = { 1, };
- static int jz4770_mmc0_1bit_a_funcs[] = { 1, 1, 0, };
- static int jz4770_mmc0_4bit_a_funcs[] = { 1, 1, 1, };
- static int jz4770_mmc0_1bit_e_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc0_4bit_e_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc0_8bit_e_funcs[] = { 0, 0, 0, 0, };
- static int jz4770_mmc1_1bit_d_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc1_4bit_d_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc1_1bit_e_funcs[] = { 1, 1, 1, };
- static int jz4770_mmc1_4bit_e_funcs[] = { 1, 1, 1, };
- static int jz4770_mmc1_8bit_e_funcs[] = { 1, 1, 1, 1, };
- static int jz4770_mmc2_1bit_b_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc2_4bit_b_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc2_1bit_e_funcs[] = { 2, 2, 2, };
- static int jz4770_mmc2_4bit_e_funcs[] = { 2, 2, 2, };
- static int jz4770_mmc2_8bit_e_funcs[] = { 2, 2, 2, 2, };
- static int jz4770_nemc_8bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4770_nemc_16bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4770_nemc_cle_ale_funcs[] = { 0, 0, };
- static int jz4770_nemc_addr_funcs[] = { 0, 0, 0, 0, };
- static int jz4770_nemc_rd_we_funcs[] = { 0, 0, };
- static int jz4770_nemc_frd_fwe_funcs[] = { 0, 0, };
- static int jz4770_nemc_wait_funcs[] = { 0, };
- static int jz4770_nemc_cs1_funcs[] = { 0, };
- static int jz4770_nemc_cs2_funcs[] = { 0, };
- static int jz4770_nemc_cs3_funcs[] = { 0, };
- static int jz4770_nemc_cs4_funcs[] = { 0, };
- static int jz4770_nemc_cs5_funcs[] = { 0, };
- static int jz4770_nemc_cs6_funcs[] = { 0, };
- static int jz4770_i2c0_funcs[] = { 0, 0, };
- static int jz4770_i2c1_funcs[] = { 0, 0, };
- static int jz4770_i2c2_funcs[] = { 2, 2, };
- static int jz4770_cim_8bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4770_cim_12bit_funcs[] = { 0, 0, 0, 0, };
- static int jz4770_lcd_24bit_funcs[] = {
-       0, 0, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0,
- };
- static int jz4770_pwm_pwm0_funcs[] = { 0, };
- static int jz4770_pwm_pwm1_funcs[] = { 0, };
- static int jz4770_pwm_pwm2_funcs[] = { 0, };
- static int jz4770_pwm_pwm3_funcs[] = { 0, };
- static int jz4770_pwm_pwm4_funcs[] = { 0, };
- static int jz4770_pwm_pwm5_funcs[] = { 0, };
- static int jz4770_pwm_pwm6_funcs[] = { 0, };
- static int jz4770_pwm_pwm7_funcs[] = { 0, };
- static int jz4770_mac_rmii_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4770_mac_mii_funcs[] = { 0, 0, };
- static int jz4770_otg_funcs[] = { 0, };
  static const struct group_desc jz4770_groups[] = {
-       INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data),
-       INGENIC_PIN_GROUP("uart0-hwflow", jz4770_uart0_hwflow),
-       INGENIC_PIN_GROUP("uart1-data", jz4770_uart1_data),
-       INGENIC_PIN_GROUP("uart1-hwflow", jz4770_uart1_hwflow),
-       INGENIC_PIN_GROUP("uart2-data", jz4770_uart2_data),
-       INGENIC_PIN_GROUP("uart2-hwflow", jz4770_uart2_hwflow),
-       INGENIC_PIN_GROUP("uart3-data", jz4770_uart3_data),
-       INGENIC_PIN_GROUP("uart3-hwflow", jz4770_uart3_hwflow),
-       INGENIC_PIN_GROUP("ssi0-dt-a", jz4770_ssi0_dt_a),
-       INGENIC_PIN_GROUP("ssi0-dt-b", jz4770_ssi0_dt_b),
-       INGENIC_PIN_GROUP("ssi0-dt-d", jz4770_ssi0_dt_d),
-       INGENIC_PIN_GROUP("ssi0-dt-e", jz4770_ssi0_dt_e),
-       INGENIC_PIN_GROUP("ssi0-dr-a", jz4770_ssi0_dr_a),
-       INGENIC_PIN_GROUP("ssi0-dr-b", jz4770_ssi0_dr_b),
-       INGENIC_PIN_GROUP("ssi0-dr-d", jz4770_ssi0_dr_d),
-       INGENIC_PIN_GROUP("ssi0-dr-e", jz4770_ssi0_dr_e),
-       INGENIC_PIN_GROUP("ssi0-clk-a", jz4770_ssi0_clk_a),
-       INGENIC_PIN_GROUP("ssi0-clk-b", jz4770_ssi0_clk_b),
-       INGENIC_PIN_GROUP("ssi0-clk-d", jz4770_ssi0_clk_d),
-       INGENIC_PIN_GROUP("ssi0-clk-e", jz4770_ssi0_clk_e),
-       INGENIC_PIN_GROUP("ssi0-gpc-b", jz4770_ssi0_gpc_b),
-       INGENIC_PIN_GROUP("ssi0-gpc-d", jz4770_ssi0_gpc_d),
-       INGENIC_PIN_GROUP("ssi0-gpc-e", jz4770_ssi0_gpc_e),
-       INGENIC_PIN_GROUP("ssi0-ce0-a", jz4770_ssi0_ce0_a),
-       INGENIC_PIN_GROUP("ssi0-ce0-b", jz4770_ssi0_ce0_b),
-       INGENIC_PIN_GROUP("ssi0-ce0-d", jz4770_ssi0_ce0_d),
-       INGENIC_PIN_GROUP("ssi0-ce0-e", jz4770_ssi0_ce0_e),
-       INGENIC_PIN_GROUP("ssi0-ce1-b", jz4770_ssi0_ce1_b),
-       INGENIC_PIN_GROUP("ssi0-ce1-d", jz4770_ssi0_ce1_d),
-       INGENIC_PIN_GROUP("ssi0-ce1-e", jz4770_ssi0_ce1_e),
-       INGENIC_PIN_GROUP("ssi1-dt-b", jz4770_ssi1_dt_b),
-       INGENIC_PIN_GROUP("ssi1-dt-d", jz4770_ssi1_dt_d),
-       INGENIC_PIN_GROUP("ssi1-dt-e", jz4770_ssi1_dt_e),
-       INGENIC_PIN_GROUP("ssi1-dr-b", jz4770_ssi1_dr_b),
-       INGENIC_PIN_GROUP("ssi1-dr-d", jz4770_ssi1_dr_d),
-       INGENIC_PIN_GROUP("ssi1-dr-e", jz4770_ssi1_dr_e),
-       INGENIC_PIN_GROUP("ssi1-clk-b", jz4770_ssi1_clk_b),
-       INGENIC_PIN_GROUP("ssi1-clk-d", jz4770_ssi1_clk_d),
-       INGENIC_PIN_GROUP("ssi1-clk-e", jz4770_ssi1_clk_e),
-       INGENIC_PIN_GROUP("ssi1-gpc-b", jz4770_ssi1_gpc_b),
-       INGENIC_PIN_GROUP("ssi1-gpc-d", jz4770_ssi1_gpc_d),
-       INGENIC_PIN_GROUP("ssi1-gpc-e", jz4770_ssi1_gpc_e),
-       INGENIC_PIN_GROUP("ssi1-ce0-b", jz4770_ssi1_ce0_b),
-       INGENIC_PIN_GROUP("ssi1-ce0-d", jz4770_ssi1_ce0_d),
-       INGENIC_PIN_GROUP("ssi1-ce0-e", jz4770_ssi1_ce0_e),
-       INGENIC_PIN_GROUP("ssi1-ce1-b", jz4770_ssi1_ce1_b),
-       INGENIC_PIN_GROUP("ssi1-ce1-d", jz4770_ssi1_ce1_d),
-       INGENIC_PIN_GROUP("ssi1-ce1-e", jz4770_ssi1_ce1_e),
-       INGENIC_PIN_GROUP("mmc0-1bit-a", jz4770_mmc0_1bit_a),
-       INGENIC_PIN_GROUP("mmc0-4bit-a", jz4770_mmc0_4bit_a),
-       INGENIC_PIN_GROUP("mmc0-1bit-e", jz4770_mmc0_1bit_e),
-       INGENIC_PIN_GROUP("mmc0-4bit-e", jz4770_mmc0_4bit_e),
-       INGENIC_PIN_GROUP("mmc0-8bit-e", jz4770_mmc0_8bit_e),
-       INGENIC_PIN_GROUP("mmc1-1bit-d", jz4770_mmc1_1bit_d),
-       INGENIC_PIN_GROUP("mmc1-4bit-d", jz4770_mmc1_4bit_d),
-       INGENIC_PIN_GROUP("mmc1-1bit-e", jz4770_mmc1_1bit_e),
-       INGENIC_PIN_GROUP("mmc1-4bit-e", jz4770_mmc1_4bit_e),
-       INGENIC_PIN_GROUP("mmc1-8bit-e", jz4770_mmc1_8bit_e),
-       INGENIC_PIN_GROUP("mmc2-1bit-b", jz4770_mmc2_1bit_b),
-       INGENIC_PIN_GROUP("mmc2-4bit-b", jz4770_mmc2_4bit_b),
-       INGENIC_PIN_GROUP("mmc2-1bit-e", jz4770_mmc2_1bit_e),
-       INGENIC_PIN_GROUP("mmc2-4bit-e", jz4770_mmc2_4bit_e),
-       INGENIC_PIN_GROUP("mmc2-8bit-e", jz4770_mmc2_8bit_e),
-       INGENIC_PIN_GROUP("nemc-8bit-data", jz4770_nemc_8bit_data),
-       INGENIC_PIN_GROUP("nemc-16bit-data", jz4770_nemc_16bit_data),
-       INGENIC_PIN_GROUP("nemc-cle-ale", jz4770_nemc_cle_ale),
-       INGENIC_PIN_GROUP("nemc-addr", jz4770_nemc_addr),
-       INGENIC_PIN_GROUP("nemc-rd-we", jz4770_nemc_rd_we),
-       INGENIC_PIN_GROUP("nemc-frd-fwe", jz4770_nemc_frd_fwe),
-       INGENIC_PIN_GROUP("nemc-wait", jz4770_nemc_wait),
-       INGENIC_PIN_GROUP("nemc-cs1", jz4770_nemc_cs1),
-       INGENIC_PIN_GROUP("nemc-cs2", jz4770_nemc_cs2),
-       INGENIC_PIN_GROUP("nemc-cs3", jz4770_nemc_cs3),
-       INGENIC_PIN_GROUP("nemc-cs4", jz4770_nemc_cs4),
-       INGENIC_PIN_GROUP("nemc-cs5", jz4770_nemc_cs5),
-       INGENIC_PIN_GROUP("nemc-cs6", jz4770_nemc_cs6),
-       INGENIC_PIN_GROUP("i2c0-data", jz4770_i2c0),
-       INGENIC_PIN_GROUP("i2c1-data", jz4770_i2c1),
-       INGENIC_PIN_GROUP("i2c2-data", jz4770_i2c2),
-       INGENIC_PIN_GROUP("cim-data-8bit", jz4770_cim_8bit),
-       INGENIC_PIN_GROUP("cim-data-12bit", jz4770_cim_12bit),
-       INGENIC_PIN_GROUP("lcd-24bit", jz4770_lcd_24bit),
+       INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data, 0),
+       INGENIC_PIN_GROUP("uart0-hwflow", jz4770_uart0_hwflow, 0),
+       INGENIC_PIN_GROUP("uart1-data", jz4770_uart1_data, 0),
+       INGENIC_PIN_GROUP("uart1-hwflow", jz4770_uart1_hwflow, 0),
+       INGENIC_PIN_GROUP("uart2-data", jz4770_uart2_data, 0),
+       INGENIC_PIN_GROUP("uart2-hwflow", jz4770_uart2_hwflow, 0),
+       INGENIC_PIN_GROUP_FUNCS("uart3-data", jz4770_uart3_data,
+                               jz4760_uart3_data_funcs),
+       INGENIC_PIN_GROUP("uart3-hwflow", jz4770_uart3_hwflow, 0),
+       INGENIC_PIN_GROUP("ssi0-dt-a", jz4770_ssi0_dt_a, 2),
+       INGENIC_PIN_GROUP("ssi0-dt-b", jz4770_ssi0_dt_b, 1),
+       INGENIC_PIN_GROUP("ssi0-dt-d", jz4770_ssi0_dt_d, 1),
+       INGENIC_PIN_GROUP("ssi0-dt-e", jz4770_ssi0_dt_e, 0),
+       INGENIC_PIN_GROUP("ssi0-dr-a", jz4770_ssi0_dr_a, 1),
+       INGENIC_PIN_GROUP("ssi0-dr-b", jz4770_ssi0_dr_b, 1),
+       INGENIC_PIN_GROUP("ssi0-dr-d", jz4770_ssi0_dr_d, 1),
+       INGENIC_PIN_GROUP("ssi0-dr-e", jz4770_ssi0_dr_e, 0),
+       INGENIC_PIN_GROUP("ssi0-clk-a", jz4770_ssi0_clk_a, 2),
+       INGENIC_PIN_GROUP("ssi0-clk-b", jz4770_ssi0_clk_b, 1),
+       INGENIC_PIN_GROUP("ssi0-clk-d", jz4770_ssi0_clk_d, 1),
+       INGENIC_PIN_GROUP("ssi0-clk-e", jz4770_ssi0_clk_e, 0),
+       INGENIC_PIN_GROUP("ssi0-gpc-b", jz4770_ssi0_gpc_b, 1),
+       INGENIC_PIN_GROUP("ssi0-gpc-d", jz4770_ssi0_gpc_d, 1),
+       INGENIC_PIN_GROUP("ssi0-gpc-e", jz4770_ssi0_gpc_e, 0),
+       INGENIC_PIN_GROUP("ssi0-ce0-a", jz4770_ssi0_ce0_a, 2),
+       INGENIC_PIN_GROUP("ssi0-ce0-b", jz4770_ssi0_ce0_b, 1),
+       INGENIC_PIN_GROUP("ssi0-ce0-d", jz4770_ssi0_ce0_d, 1),
+       INGENIC_PIN_GROUP("ssi0-ce0-e", jz4770_ssi0_ce0_e, 0),
+       INGENIC_PIN_GROUP("ssi0-ce1-b", jz4770_ssi0_ce1_b, 1),
+       INGENIC_PIN_GROUP("ssi0-ce1-d", jz4770_ssi0_ce1_d, 1),
+       INGENIC_PIN_GROUP("ssi0-ce1-e", jz4770_ssi0_ce1_e, 0),
+       INGENIC_PIN_GROUP("ssi1-dt-b", jz4770_ssi1_dt_b, 2),
+       INGENIC_PIN_GROUP("ssi1-dt-d", jz4770_ssi1_dt_d, 2),
+       INGENIC_PIN_GROUP("ssi1-dt-e", jz4770_ssi1_dt_e, 1),
+       INGENIC_PIN_GROUP("ssi1-dr-b", jz4770_ssi1_dr_b, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-d", jz4770_ssi1_dr_d, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-e", jz4770_ssi1_dr_e, 1),
+       INGENIC_PIN_GROUP("ssi1-clk-b", jz4770_ssi1_clk_b, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-d", jz4770_ssi1_clk_d, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-e", jz4770_ssi1_clk_e, 1),
+       INGENIC_PIN_GROUP("ssi1-gpc-b", jz4770_ssi1_gpc_b, 2),
+       INGENIC_PIN_GROUP("ssi1-gpc-d", jz4770_ssi1_gpc_d, 2),
+       INGENIC_PIN_GROUP("ssi1-gpc-e", jz4770_ssi1_gpc_e, 1),
+       INGENIC_PIN_GROUP("ssi1-ce0-b", jz4770_ssi1_ce0_b, 2),
+       INGENIC_PIN_GROUP("ssi1-ce0-d", jz4770_ssi1_ce0_d, 2),
+       INGENIC_PIN_GROUP("ssi1-ce0-e", jz4770_ssi1_ce0_e, 1),
+       INGENIC_PIN_GROUP("ssi1-ce1-b", jz4770_ssi1_ce1_b, 2),
+       INGENIC_PIN_GROUP("ssi1-ce1-d", jz4770_ssi1_ce1_d, 2),
+       INGENIC_PIN_GROUP("ssi1-ce1-e", jz4770_ssi1_ce1_e, 1),
+       INGENIC_PIN_GROUP_FUNCS("mmc0-1bit-a", jz4770_mmc0_1bit_a,
+                               jz4760_mmc0_1bit_a_funcs),
+       INGENIC_PIN_GROUP("mmc0-4bit-a", jz4770_mmc0_4bit_a, 1),
+       INGENIC_PIN_GROUP("mmc0-1bit-e", jz4770_mmc0_1bit_e, 0),
+       INGENIC_PIN_GROUP("mmc0-4bit-e", jz4770_mmc0_4bit_e, 0),
+       INGENIC_PIN_GROUP("mmc0-8bit-e", jz4770_mmc0_8bit_e, 0),
+       INGENIC_PIN_GROUP("mmc1-1bit-d", jz4770_mmc1_1bit_d, 0),
+       INGENIC_PIN_GROUP("mmc1-4bit-d", jz4770_mmc1_4bit_d, 0),
+       INGENIC_PIN_GROUP("mmc1-1bit-e", jz4770_mmc1_1bit_e, 1),
+       INGENIC_PIN_GROUP("mmc1-4bit-e", jz4770_mmc1_4bit_e, 1),
+       INGENIC_PIN_GROUP("mmc1-8bit-e", jz4770_mmc1_8bit_e, 1),
+       INGENIC_PIN_GROUP("mmc2-1bit-b", jz4770_mmc2_1bit_b, 0),
+       INGENIC_PIN_GROUP("mmc2-4bit-b", jz4770_mmc2_4bit_b, 0),
+       INGENIC_PIN_GROUP("mmc2-1bit-e", jz4770_mmc2_1bit_e, 2),
+       INGENIC_PIN_GROUP("mmc2-4bit-e", jz4770_mmc2_4bit_e, 2),
+       INGENIC_PIN_GROUP("mmc2-8bit-e", jz4770_mmc2_8bit_e, 2),
+       INGENIC_PIN_GROUP("nemc-8bit-data", jz4770_nemc_8bit_data, 0),
+       INGENIC_PIN_GROUP("nemc-16bit-data", jz4770_nemc_16bit_data, 0),
+       INGENIC_PIN_GROUP("nemc-cle-ale", jz4770_nemc_cle_ale, 0),
+       INGENIC_PIN_GROUP("nemc-addr", jz4770_nemc_addr, 0),
+       INGENIC_PIN_GROUP("nemc-rd-we", jz4770_nemc_rd_we, 0),
+       INGENIC_PIN_GROUP("nemc-frd-fwe", jz4770_nemc_frd_fwe, 0),
+       INGENIC_PIN_GROUP("nemc-wait", jz4770_nemc_wait, 0),
+       INGENIC_PIN_GROUP("nemc-cs1", jz4770_nemc_cs1, 0),
+       INGENIC_PIN_GROUP("nemc-cs2", jz4770_nemc_cs2, 0),
+       INGENIC_PIN_GROUP("nemc-cs3", jz4770_nemc_cs3, 0),
+       INGENIC_PIN_GROUP("nemc-cs4", jz4770_nemc_cs4, 0),
+       INGENIC_PIN_GROUP("nemc-cs5", jz4770_nemc_cs5, 0),
+       INGENIC_PIN_GROUP("nemc-cs6", jz4770_nemc_cs6, 0),
+       INGENIC_PIN_GROUP("i2c0-data", jz4770_i2c0, 0),
+       INGENIC_PIN_GROUP("i2c1-data", jz4770_i2c1, 0),
+       INGENIC_PIN_GROUP("i2c2-data", jz4770_i2c2, 2),
+       INGENIC_PIN_GROUP("cim-data-8bit", jz4770_cim_8bit, 0),
+       INGENIC_PIN_GROUP("cim-data-12bit", jz4770_cim_12bit, 0),
+       INGENIC_PIN_GROUP("lcd-8bit", jz4770_lcd_8bit, 0),
+       INGENIC_PIN_GROUP("lcd-24bit", jz4770_lcd_24bit, 0),
        { "lcd-no-pins", },
-       INGENIC_PIN_GROUP("pwm0", jz4770_pwm_pwm0),
-       INGENIC_PIN_GROUP("pwm1", jz4770_pwm_pwm1),
-       INGENIC_PIN_GROUP("pwm2", jz4770_pwm_pwm2),
-       INGENIC_PIN_GROUP("pwm3", jz4770_pwm_pwm3),
-       INGENIC_PIN_GROUP("pwm4", jz4770_pwm_pwm4),
-       INGENIC_PIN_GROUP("pwm5", jz4770_pwm_pwm5),
-       INGENIC_PIN_GROUP("pwm6", jz4770_pwm_pwm6),
-       INGENIC_PIN_GROUP("pwm7", jz4770_pwm_pwm7),
-       INGENIC_PIN_GROUP("mac-rmii", jz4770_mac_rmii),
-       INGENIC_PIN_GROUP("mac-mii", jz4770_mac_mii),
-       INGENIC_PIN_GROUP("otg-vbus", jz4770_otg),
+       INGENIC_PIN_GROUP("pwm0", jz4770_pwm_pwm0, 0),
+       INGENIC_PIN_GROUP("pwm1", jz4770_pwm_pwm1, 0),
+       INGENIC_PIN_GROUP("pwm2", jz4770_pwm_pwm2, 0),
+       INGENIC_PIN_GROUP("pwm3", jz4770_pwm_pwm3, 0),
+       INGENIC_PIN_GROUP("pwm4", jz4770_pwm_pwm4, 0),
+       INGENIC_PIN_GROUP("pwm5", jz4770_pwm_pwm5, 0),
+       INGENIC_PIN_GROUP("pwm6", jz4770_pwm_pwm6, 0),
+       INGENIC_PIN_GROUP("pwm7", jz4770_pwm_pwm7, 0),
+       INGENIC_PIN_GROUP("mac-rmii", jz4770_mac_rmii, 0),
+       INGENIC_PIN_GROUP("mac-mii", jz4770_mac_mii, 0),
+       INGENIC_PIN_GROUP("otg-vbus", jz4770_otg, 0),
  };
  
  static const char *jz4770_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
@@@ -977,7 -796,9 +796,9 @@@ static const char *jz4770_i2c0_groups[
  static const char *jz4770_i2c1_groups[] = { "i2c1-data", };
  static const char *jz4770_i2c2_groups[] = { "i2c2-data", };
  static const char *jz4770_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", };
- static const char *jz4770_lcd_groups[] = { "lcd-24bit", "lcd-no-pins", };
+ static const char *jz4770_lcd_groups[] = {
+       "lcd-8bit", "lcd-24bit", "lcd-no-pins",
+ };
  static const char *jz4770_pwm0_groups[] = { "pwm0", };
  static const char *jz4770_pwm1_groups[] = { "pwm1", };
  static const char *jz4770_pwm2_groups[] = { "pwm2", };
@@@ -1050,35 -871,35 +871,35 @@@ static int jz4780_ssi0_dt_a_19_pins[] 
  static int jz4780_ssi0_dt_a_21_pins[] = { 0x15, };
  static int jz4780_ssi0_dt_a_28_pins[] = { 0x1c, };
  static int jz4780_ssi0_dt_b_pins[] = { 0x3d, };
 -static int jz4780_ssi0_dt_d_pins[] = { 0x59, };
 +static int jz4780_ssi0_dt_d_pins[] = { 0x79, };
  static int jz4780_ssi0_dr_a_20_pins[] = { 0x14, };
  static int jz4780_ssi0_dr_a_27_pins[] = { 0x1b, };
  static int jz4780_ssi0_dr_b_pins[] = { 0x34, };
 -static int jz4780_ssi0_dr_d_pins[] = { 0x54, };
 +static int jz4780_ssi0_dr_d_pins[] = { 0x74, };
  static int jz4780_ssi0_clk_a_pins[] = { 0x12, };
  static int jz4780_ssi0_clk_b_5_pins[] = { 0x25, };
  static int jz4780_ssi0_clk_b_28_pins[] = { 0x3c, };
 -static int jz4780_ssi0_clk_d_pins[] = { 0x58, };
 +static int jz4780_ssi0_clk_d_pins[] = { 0x78, };
  static int jz4780_ssi0_gpc_b_pins[] = { 0x3e, };
 -static int jz4780_ssi0_gpc_d_pins[] = { 0x56, };
 +static int jz4780_ssi0_gpc_d_pins[] = { 0x76, };
  static int jz4780_ssi0_ce0_a_23_pins[] = { 0x17, };
  static int jz4780_ssi0_ce0_a_25_pins[] = { 0x19, };
  static int jz4780_ssi0_ce0_b_pins[] = { 0x3f, };
 -static int jz4780_ssi0_ce0_d_pins[] = { 0x57, };
 +static int jz4780_ssi0_ce0_d_pins[] = { 0x77, };
  static int jz4780_ssi0_ce1_b_pins[] = { 0x35, };
 -static int jz4780_ssi0_ce1_d_pins[] = { 0x55, };
 +static int jz4780_ssi0_ce1_d_pins[] = { 0x75, };
  static int jz4780_ssi1_dt_b_pins[] = { 0x3d, };
 -static int jz4780_ssi1_dt_d_pins[] = { 0x59, };
 +static int jz4780_ssi1_dt_d_pins[] = { 0x79, };
  static int jz4780_ssi1_dr_b_pins[] = { 0x34, };
 -static int jz4780_ssi1_dr_d_pins[] = { 0x54, };
 +static int jz4780_ssi1_dr_d_pins[] = { 0x74, };
  static int jz4780_ssi1_clk_b_pins[] = { 0x3c, };
 -static int jz4780_ssi1_clk_d_pins[] = { 0x58, };
 +static int jz4780_ssi1_clk_d_pins[] = { 0x78, };
  static int jz4780_ssi1_gpc_b_pins[] = { 0x3e, };
 -static int jz4780_ssi1_gpc_d_pins[] = { 0x56, };
 +static int jz4780_ssi1_gpc_d_pins[] = { 0x76, };
  static int jz4780_ssi1_ce0_b_pins[] = { 0x3f, };
 -static int jz4780_ssi1_ce0_d_pins[] = { 0x57, };
 +static int jz4780_ssi1_ce0_d_pins[] = { 0x77, };
  static int jz4780_ssi1_ce1_b_pins[] = { 0x35, };
 -static int jz4780_ssi1_ce1_d_pins[] = { 0x55, };
 +static int jz4780_ssi1_ce1_d_pins[] = { 0x75, };
  static int jz4780_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, 0x18, };
  static int jz4780_i2c3_pins[] = { 0x6a, 0x6b, };
  static int jz4780_i2c4_e_pins[] = { 0x8c, 0x8d, };
@@@ -1090,156 -911,115 +911,115 @@@ static int jz4780_i2s_clk_rx_pins[] = 
  static int jz4780_i2s_sysclk_pins[] = { 0x85, };
  static int jz4780_hdmi_ddc_pins[] = { 0xb9, 0xb8, };
  
- static int jz4780_uart2_data_funcs[] = { 1, 1, };
- static int jz4780_uart2_hwflow_funcs[] = { 1, 1, };
- static int jz4780_uart4_data_funcs[] = { 2, 2, };
- static int jz4780_ssi0_dt_a_19_funcs[] = { 2, };
- static int jz4780_ssi0_dt_a_21_funcs[] = { 2, };
- static int jz4780_ssi0_dt_a_28_funcs[] = { 2, };
- static int jz4780_ssi0_dt_b_funcs[] = { 1, };
- static int jz4780_ssi0_dt_d_funcs[] = { 1, };
- static int jz4780_ssi0_dr_a_20_funcs[] = { 2, };
- static int jz4780_ssi0_dr_a_27_funcs[] = { 2, };
- static int jz4780_ssi0_dr_b_funcs[] = { 1, };
- static int jz4780_ssi0_dr_d_funcs[] = { 1, };
- static int jz4780_ssi0_clk_a_funcs[] = { 2, };
- static int jz4780_ssi0_clk_b_5_funcs[] = { 1, };
- static int jz4780_ssi0_clk_b_28_funcs[] = { 1, };
- static int jz4780_ssi0_clk_d_funcs[] = { 1, };
- static int jz4780_ssi0_gpc_b_funcs[] = { 1, };
- static int jz4780_ssi0_gpc_d_funcs[] = { 1, };
- static int jz4780_ssi0_ce0_a_23_funcs[] = { 2, };
- static int jz4780_ssi0_ce0_a_25_funcs[] = { 2, };
- static int jz4780_ssi0_ce0_b_funcs[] = { 1, };
- static int jz4780_ssi0_ce0_d_funcs[] = { 1, };
- static int jz4780_ssi0_ce1_b_funcs[] = { 1, };
- static int jz4780_ssi0_ce1_d_funcs[] = { 1, };
- static int jz4780_ssi1_dt_b_funcs[] = { 2, };
- static int jz4780_ssi1_dt_d_funcs[] = { 2, };
- static int jz4780_ssi1_dr_b_funcs[] = { 2, };
- static int jz4780_ssi1_dr_d_funcs[] = { 2, };
- static int jz4780_ssi1_clk_b_funcs[] = { 2, };
- static int jz4780_ssi1_clk_d_funcs[] = { 2, };
- static int jz4780_ssi1_gpc_b_funcs[] = { 2, };
- static int jz4780_ssi1_gpc_d_funcs[] = { 2, };
- static int jz4780_ssi1_ce0_b_funcs[] = { 2, };
- static int jz4780_ssi1_ce0_d_funcs[] = { 2, };
- static int jz4780_ssi1_ce1_b_funcs[] = { 2, };
- static int jz4780_ssi1_ce1_d_funcs[] = { 2, };
- static int jz4780_mmc0_8bit_a_funcs[] = { 1, 1, 1, 1, 1, };
- static int jz4780_i2c3_funcs[] = { 1, 1, };
- static int jz4780_i2c4_e_funcs[] = { 1, 1, };
- static int jz4780_i2c4_f_funcs[] = { 1, 1, };
- static int jz4780_i2s_data_tx_funcs[] = { 0, };
- static int jz4780_i2s_data_rx_funcs[] = { 0, };
- static int jz4780_i2s_clk_txrx_funcs[] = { 1, 0, };
- static int jz4780_i2s_clk_rx_funcs[] = { 1, 1, };
- static int jz4780_i2s_sysclk_funcs[] = { 2, };
- static int jz4780_hdmi_ddc_funcs[] = { 0, 0, };
+ static u8 jz4780_i2s_clk_txrx_funcs[] = { 1, 0, };
  
  static const struct group_desc jz4780_groups[] = {
-       INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data),
-       INGENIC_PIN_GROUP("uart0-hwflow", jz4770_uart0_hwflow),
-       INGENIC_PIN_GROUP("uart1-data", jz4770_uart1_data),
-       INGENIC_PIN_GROUP("uart1-hwflow", jz4770_uart1_hwflow),
-       INGENIC_PIN_GROUP("uart2-data", jz4780_uart2_data),
-       INGENIC_PIN_GROUP("uart2-hwflow", jz4780_uart2_hwflow),
-       INGENIC_PIN_GROUP("uart3-data", jz4770_uart3_data),
-       INGENIC_PIN_GROUP("uart3-hwflow", jz4770_uart3_hwflow),
-       INGENIC_PIN_GROUP("uart4-data", jz4780_uart4_data),
-       INGENIC_PIN_GROUP("ssi0-dt-a-19", jz4780_ssi0_dt_a_19),
-       INGENIC_PIN_GROUP("ssi0-dt-a-21", jz4780_ssi0_dt_a_21),
-       INGENIC_PIN_GROUP("ssi0-dt-a-28", jz4780_ssi0_dt_a_28),
-       INGENIC_PIN_GROUP("ssi0-dt-b", jz4780_ssi0_dt_b),
-       INGENIC_PIN_GROUP("ssi0-dt-d", jz4780_ssi0_dt_d),
-       INGENIC_PIN_GROUP("ssi0-dt-e", jz4770_ssi0_dt_e),
-       INGENIC_PIN_GROUP("ssi0-dr-a-20", jz4780_ssi0_dr_a_20),
-       INGENIC_PIN_GROUP("ssi0-dr-a-27", jz4780_ssi0_dr_a_27),
-       INGENIC_PIN_GROUP("ssi0-dr-b", jz4780_ssi0_dr_b),
-       INGENIC_PIN_GROUP("ssi0-dr-d", jz4780_ssi0_dr_d),
-       INGENIC_PIN_GROUP("ssi0-dr-e", jz4770_ssi0_dr_e),
-       INGENIC_PIN_GROUP("ssi0-clk-a", jz4780_ssi0_clk_a),
-       INGENIC_PIN_GROUP("ssi0-clk-b-5", jz4780_ssi0_clk_b_5),
-       INGENIC_PIN_GROUP("ssi0-clk-b-28", jz4780_ssi0_clk_b_28),
-       INGENIC_PIN_GROUP("ssi0-clk-d", jz4780_ssi0_clk_d),
-       INGENIC_PIN_GROUP("ssi0-clk-e", jz4770_ssi0_clk_e),
-       INGENIC_PIN_GROUP("ssi0-gpc-b", jz4780_ssi0_gpc_b),
-       INGENIC_PIN_GROUP("ssi0-gpc-d", jz4780_ssi0_gpc_d),
-       INGENIC_PIN_GROUP("ssi0-gpc-e", jz4770_ssi0_gpc_e),
-       INGENIC_PIN_GROUP("ssi0-ce0-a-23", jz4780_ssi0_ce0_a_23),
-       INGENIC_PIN_GROUP("ssi0-ce0-a-25", jz4780_ssi0_ce0_a_25),
-       INGENIC_PIN_GROUP("ssi0-ce0-b", jz4780_ssi0_ce0_b),
-       INGENIC_PIN_GROUP("ssi0-ce0-d", jz4780_ssi0_ce0_d),
-       INGENIC_PIN_GROUP("ssi0-ce0-e", jz4770_ssi0_ce0_e),
-       INGENIC_PIN_GROUP("ssi0-ce1-b", jz4780_ssi0_ce1_b),
-       INGENIC_PIN_GROUP("ssi0-ce1-d", jz4780_ssi0_ce1_d),
-       INGENIC_PIN_GROUP("ssi0-ce1-e", jz4770_ssi0_ce1_e),
-       INGENIC_PIN_GROUP("ssi1-dt-b", jz4780_ssi1_dt_b),
-       INGENIC_PIN_GROUP("ssi1-dt-d", jz4780_ssi1_dt_d),
-       INGENIC_PIN_GROUP("ssi1-dt-e", jz4770_ssi1_dt_e),
-       INGENIC_PIN_GROUP("ssi1-dr-b", jz4780_ssi1_dr_b),
-       INGENIC_PIN_GROUP("ssi1-dr-d", jz4780_ssi1_dr_d),
-       INGENIC_PIN_GROUP("ssi1-dr-e", jz4770_ssi1_dr_e),
-       INGENIC_PIN_GROUP("ssi1-clk-b", jz4780_ssi1_clk_b),
-       INGENIC_PIN_GROUP("ssi1-clk-d", jz4780_ssi1_clk_d),
-       INGENIC_PIN_GROUP("ssi1-clk-e", jz4770_ssi1_clk_e),
-       INGENIC_PIN_GROUP("ssi1-gpc-b", jz4780_ssi1_gpc_b),
-       INGENIC_PIN_GROUP("ssi1-gpc-d", jz4780_ssi1_gpc_d),
-       INGENIC_PIN_GROUP("ssi1-gpc-e", jz4770_ssi1_gpc_e),
-       INGENIC_PIN_GROUP("ssi1-ce0-b", jz4780_ssi1_ce0_b),
-       INGENIC_PIN_GROUP("ssi1-ce0-d", jz4780_ssi1_ce0_d),
-       INGENIC_PIN_GROUP("ssi1-ce0-e", jz4770_ssi1_ce0_e),
-       INGENIC_PIN_GROUP("ssi1-ce1-b", jz4780_ssi1_ce1_b),
-       INGENIC_PIN_GROUP("ssi1-ce1-d", jz4780_ssi1_ce1_d),
-       INGENIC_PIN_GROUP("ssi1-ce1-e", jz4770_ssi1_ce1_e),
-       INGENIC_PIN_GROUP("mmc0-1bit-a", jz4770_mmc0_1bit_a),
-       INGENIC_PIN_GROUP("mmc0-4bit-a", jz4770_mmc0_4bit_a),
-       INGENIC_PIN_GROUP("mmc0-8bit-a", jz4780_mmc0_8bit_a),
-       INGENIC_PIN_GROUP("mmc0-1bit-e", jz4770_mmc0_1bit_e),
-       INGENIC_PIN_GROUP("mmc0-4bit-e", jz4770_mmc0_4bit_e),
-       INGENIC_PIN_GROUP("mmc1-1bit-d", jz4770_mmc1_1bit_d),
-       INGENIC_PIN_GROUP("mmc1-4bit-d", jz4770_mmc1_4bit_d),
-       INGENIC_PIN_GROUP("mmc1-1bit-e", jz4770_mmc1_1bit_e),
-       INGENIC_PIN_GROUP("mmc1-4bit-e", jz4770_mmc1_4bit_e),
-       INGENIC_PIN_GROUP("mmc2-1bit-b", jz4770_mmc2_1bit_b),
-       INGENIC_PIN_GROUP("mmc2-4bit-b", jz4770_mmc2_4bit_b),
-       INGENIC_PIN_GROUP("mmc2-1bit-e", jz4770_mmc2_1bit_e),
-       INGENIC_PIN_GROUP("mmc2-4bit-e", jz4770_mmc2_4bit_e),
-       INGENIC_PIN_GROUP("nemc-data", jz4770_nemc_8bit_data),
-       INGENIC_PIN_GROUP("nemc-cle-ale", jz4770_nemc_cle_ale),
-       INGENIC_PIN_GROUP("nemc-addr", jz4770_nemc_addr),
-       INGENIC_PIN_GROUP("nemc-rd-we", jz4770_nemc_rd_we),
-       INGENIC_PIN_GROUP("nemc-frd-fwe", jz4770_nemc_frd_fwe),
-       INGENIC_PIN_GROUP("nemc-wait", jz4770_nemc_wait),
-       INGENIC_PIN_GROUP("nemc-cs1", jz4770_nemc_cs1),
-       INGENIC_PIN_GROUP("nemc-cs2", jz4770_nemc_cs2),
-       INGENIC_PIN_GROUP("nemc-cs3", jz4770_nemc_cs3),
-       INGENIC_PIN_GROUP("nemc-cs4", jz4770_nemc_cs4),
-       INGENIC_PIN_GROUP("nemc-cs5", jz4770_nemc_cs5),
-       INGENIC_PIN_GROUP("nemc-cs6", jz4770_nemc_cs6),
-       INGENIC_PIN_GROUP("i2c0-data", jz4770_i2c0),
-       INGENIC_PIN_GROUP("i2c1-data", jz4770_i2c1),
-       INGENIC_PIN_GROUP("i2c2-data", jz4770_i2c2),
-       INGENIC_PIN_GROUP("i2c3-data", jz4780_i2c3),
-       INGENIC_PIN_GROUP("i2c4-data-e", jz4780_i2c4_e),
-       INGENIC_PIN_GROUP("i2c4-data-f", jz4780_i2c4_f),
-       INGENIC_PIN_GROUP("i2s-data-tx", jz4780_i2s_data_tx),
-       INGENIC_PIN_GROUP("i2s-data-rx", jz4780_i2s_data_rx),
-       INGENIC_PIN_GROUP("i2s-clk-txrx", jz4780_i2s_clk_txrx),
-       INGENIC_PIN_GROUP("i2s-clk-rx", jz4780_i2s_clk_rx),
-       INGENIC_PIN_GROUP("i2s-sysclk", jz4780_i2s_sysclk),
-       INGENIC_PIN_GROUP("hdmi-ddc", jz4780_hdmi_ddc),
-       INGENIC_PIN_GROUP("cim-data", jz4770_cim_8bit),
-       INGENIC_PIN_GROUP("lcd-24bit", jz4770_lcd_24bit),
+       INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data, 0),
+       INGENIC_PIN_GROUP("uart0-hwflow", jz4770_uart0_hwflow, 0),
+       INGENIC_PIN_GROUP("uart1-data", jz4770_uart1_data, 0),
+       INGENIC_PIN_GROUP("uart1-hwflow", jz4770_uart1_hwflow, 0),
+       INGENIC_PIN_GROUP("uart2-data", jz4780_uart2_data, 1),
+       INGENIC_PIN_GROUP("uart2-hwflow", jz4780_uart2_hwflow, 1),
+       INGENIC_PIN_GROUP_FUNCS("uart3-data", jz4770_uart3_data,
+                               jz4760_uart3_data_funcs),
+       INGENIC_PIN_GROUP("uart3-hwflow", jz4770_uart3_hwflow, 0),
+       INGENIC_PIN_GROUP("uart4-data", jz4780_uart4_data, 2),
+       INGENIC_PIN_GROUP("ssi0-dt-a-19", jz4780_ssi0_dt_a_19, 2),
+       INGENIC_PIN_GROUP("ssi0-dt-a-21", jz4780_ssi0_dt_a_21, 2),
+       INGENIC_PIN_GROUP("ssi0-dt-a-28", jz4780_ssi0_dt_a_28, 2),
+       INGENIC_PIN_GROUP("ssi0-dt-b", jz4780_ssi0_dt_b, 1),
+       INGENIC_PIN_GROUP("ssi0-dt-d", jz4780_ssi0_dt_d, 1),
+       INGENIC_PIN_GROUP("ssi0-dt-e", jz4770_ssi0_dt_e, 0),
+       INGENIC_PIN_GROUP("ssi0-dr-a-20", jz4780_ssi0_dr_a_20, 2),
+       INGENIC_PIN_GROUP("ssi0-dr-a-27", jz4780_ssi0_dr_a_27, 2),
+       INGENIC_PIN_GROUP("ssi0-dr-b", jz4780_ssi0_dr_b, 1),
+       INGENIC_PIN_GROUP("ssi0-dr-d", jz4780_ssi0_dr_d, 1),
+       INGENIC_PIN_GROUP("ssi0-dr-e", jz4770_ssi0_dr_e, 0),
+       INGENIC_PIN_GROUP("ssi0-clk-a", jz4780_ssi0_clk_a, 2),
+       INGENIC_PIN_GROUP("ssi0-clk-b-5", jz4780_ssi0_clk_b_5, 1),
+       INGENIC_PIN_GROUP("ssi0-clk-b-28", jz4780_ssi0_clk_b_28, 1),
+       INGENIC_PIN_GROUP("ssi0-clk-d", jz4780_ssi0_clk_d, 1),
+       INGENIC_PIN_GROUP("ssi0-clk-e", jz4770_ssi0_clk_e, 0),
+       INGENIC_PIN_GROUP("ssi0-gpc-b", jz4780_ssi0_gpc_b, 1),
+       INGENIC_PIN_GROUP("ssi0-gpc-d", jz4780_ssi0_gpc_d, 1),
+       INGENIC_PIN_GROUP("ssi0-gpc-e", jz4770_ssi0_gpc_e, 0),
+       INGENIC_PIN_GROUP("ssi0-ce0-a-23", jz4780_ssi0_ce0_a_23, 2),
+       INGENIC_PIN_GROUP("ssi0-ce0-a-25", jz4780_ssi0_ce0_a_25, 2),
+       INGENIC_PIN_GROUP("ssi0-ce0-b", jz4780_ssi0_ce0_b, 1),
+       INGENIC_PIN_GROUP("ssi0-ce0-d", jz4780_ssi0_ce0_d, 1),
+       INGENIC_PIN_GROUP("ssi0-ce0-e", jz4770_ssi0_ce0_e, 0),
+       INGENIC_PIN_GROUP("ssi0-ce1-b", jz4780_ssi0_ce1_b, 1),
+       INGENIC_PIN_GROUP("ssi0-ce1-d", jz4780_ssi0_ce1_d, 1),
+       INGENIC_PIN_GROUP("ssi0-ce1-e", jz4770_ssi0_ce1_e, 0),
+       INGENIC_PIN_GROUP("ssi1-dt-b", jz4780_ssi1_dt_b, 2),
+       INGENIC_PIN_GROUP("ssi1-dt-d", jz4780_ssi1_dt_d, 2),
+       INGENIC_PIN_GROUP("ssi1-dt-e", jz4770_ssi1_dt_e, 1),
+       INGENIC_PIN_GROUP("ssi1-dr-b", jz4780_ssi1_dr_b, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-d", jz4780_ssi1_dr_d, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-e", jz4770_ssi1_dr_e, 1),
+       INGENIC_PIN_GROUP("ssi1-clk-b", jz4780_ssi1_clk_b, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-d", jz4780_ssi1_clk_d, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-e", jz4770_ssi1_clk_e, 1),
+       INGENIC_PIN_GROUP("ssi1-gpc-b", jz4780_ssi1_gpc_b, 2),
+       INGENIC_PIN_GROUP("ssi1-gpc-d", jz4780_ssi1_gpc_d, 2),
+       INGENIC_PIN_GROUP("ssi1-gpc-e", jz4770_ssi1_gpc_e, 1),
+       INGENIC_PIN_GROUP("ssi1-ce0-b", jz4780_ssi1_ce0_b, 2),
+       INGENIC_PIN_GROUP("ssi1-ce0-d", jz4780_ssi1_ce0_d, 2),
+       INGENIC_PIN_GROUP("ssi1-ce0-e", jz4770_ssi1_ce0_e, 1),
+       INGENIC_PIN_GROUP("ssi1-ce1-b", jz4780_ssi1_ce1_b, 2),
+       INGENIC_PIN_GROUP("ssi1-ce1-d", jz4780_ssi1_ce1_d, 2),
+       INGENIC_PIN_GROUP("ssi1-ce1-e", jz4770_ssi1_ce1_e, 1),
+       INGENIC_PIN_GROUP_FUNCS("mmc0-1bit-a", jz4770_mmc0_1bit_a,
+                               jz4760_mmc0_1bit_a_funcs),
+       INGENIC_PIN_GROUP("mmc0-4bit-a", jz4770_mmc0_4bit_a, 1),
+       INGENIC_PIN_GROUP("mmc0-8bit-a", jz4780_mmc0_8bit_a, 1),
+       INGENIC_PIN_GROUP("mmc0-1bit-e", jz4770_mmc0_1bit_e, 0),
+       INGENIC_PIN_GROUP("mmc0-4bit-e", jz4770_mmc0_4bit_e, 0),
+       INGENIC_PIN_GROUP("mmc1-1bit-d", jz4770_mmc1_1bit_d, 0),
+       INGENIC_PIN_GROUP("mmc1-4bit-d", jz4770_mmc1_4bit_d, 0),
+       INGENIC_PIN_GROUP("mmc1-1bit-e", jz4770_mmc1_1bit_e, 1),
+       INGENIC_PIN_GROUP("mmc1-4bit-e", jz4770_mmc1_4bit_e, 1),
+       INGENIC_PIN_GROUP("mmc2-1bit-b", jz4770_mmc2_1bit_b, 0),
+       INGENIC_PIN_GROUP("mmc2-4bit-b", jz4770_mmc2_4bit_b, 0),
+       INGENIC_PIN_GROUP("mmc2-1bit-e", jz4770_mmc2_1bit_e, 2),
+       INGENIC_PIN_GROUP("mmc2-4bit-e", jz4770_mmc2_4bit_e, 2),
+       INGENIC_PIN_GROUP("nemc-data", jz4770_nemc_8bit_data, 0),
+       INGENIC_PIN_GROUP("nemc-cle-ale", jz4770_nemc_cle_ale, 0),
+       INGENIC_PIN_GROUP("nemc-addr", jz4770_nemc_addr, 0),
+       INGENIC_PIN_GROUP("nemc-rd-we", jz4770_nemc_rd_we, 0),
+       INGENIC_PIN_GROUP("nemc-frd-fwe", jz4770_nemc_frd_fwe, 0),
+       INGENIC_PIN_GROUP("nemc-wait", jz4770_nemc_wait, 0),
+       INGENIC_PIN_GROUP("nemc-cs1", jz4770_nemc_cs1, 0),
+       INGENIC_PIN_GROUP("nemc-cs2", jz4770_nemc_cs2, 0),
+       INGENIC_PIN_GROUP("nemc-cs3", jz4770_nemc_cs3, 0),
+       INGENIC_PIN_GROUP("nemc-cs4", jz4770_nemc_cs4, 0),
+       INGENIC_PIN_GROUP("nemc-cs5", jz4770_nemc_cs5, 0),
+       INGENIC_PIN_GROUP("nemc-cs6", jz4770_nemc_cs6, 0),
+       INGENIC_PIN_GROUP("i2c0-data", jz4770_i2c0, 0),
+       INGENIC_PIN_GROUP("i2c1-data", jz4770_i2c1, 0),
+       INGENIC_PIN_GROUP("i2c2-data", jz4770_i2c2, 2),
+       INGENIC_PIN_GROUP("i2c3-data", jz4780_i2c3, 1),
+       INGENIC_PIN_GROUP("i2c4-data-e", jz4780_i2c4_e, 1),
+       INGENIC_PIN_GROUP("i2c4-data-f", jz4780_i2c4_f, 1),
+       INGENIC_PIN_GROUP("i2s-data-tx", jz4780_i2s_data_tx, 0),
+       INGENIC_PIN_GROUP("i2s-data-rx", jz4780_i2s_data_rx, 0),
+       INGENIC_PIN_GROUP_FUNCS("i2s-clk-txrx", jz4780_i2s_clk_txrx,
+                               jz4780_i2s_clk_txrx_funcs),
+       INGENIC_PIN_GROUP("i2s-clk-rx", jz4780_i2s_clk_rx, 1),
+       INGENIC_PIN_GROUP("i2s-sysclk", jz4780_i2s_sysclk, 2),
+       INGENIC_PIN_GROUP("hdmi-ddc", jz4780_hdmi_ddc, 0),
+       INGENIC_PIN_GROUP("cim-data", jz4770_cim_8bit, 0),
+       INGENIC_PIN_GROUP("cim-data-12bit", jz4770_cim_12bit, 0),
+       INGENIC_PIN_GROUP("lcd-24bit", jz4770_lcd_24bit, 0),
        { "lcd-no-pins", },
-       INGENIC_PIN_GROUP("pwm0", jz4770_pwm_pwm0),
-       INGENIC_PIN_GROUP("pwm1", jz4770_pwm_pwm1),
-       INGENIC_PIN_GROUP("pwm2", jz4770_pwm_pwm2),
-       INGENIC_PIN_GROUP("pwm3", jz4770_pwm_pwm3),
-       INGENIC_PIN_GROUP("pwm4", jz4770_pwm_pwm4),
-       INGENIC_PIN_GROUP("pwm5", jz4770_pwm_pwm5),
-       INGENIC_PIN_GROUP("pwm6", jz4770_pwm_pwm6),
-       INGENIC_PIN_GROUP("pwm7", jz4770_pwm_pwm7),
+       INGENIC_PIN_GROUP("pwm0", jz4770_pwm_pwm0, 0),
+       INGENIC_PIN_GROUP("pwm1", jz4770_pwm_pwm1, 0),
+       INGENIC_PIN_GROUP("pwm2", jz4770_pwm_pwm2, 0),
+       INGENIC_PIN_GROUP("pwm3", jz4770_pwm_pwm3, 0),
+       INGENIC_PIN_GROUP("pwm4", jz4770_pwm_pwm4, 0),
+       INGENIC_PIN_GROUP("pwm5", jz4770_pwm_pwm5, 0),
+       INGENIC_PIN_GROUP("pwm6", jz4770_pwm_pwm6, 0),
+       INGENIC_PIN_GROUP("pwm7", jz4770_pwm_pwm7, 0),
  };
  
  static const char *jz4780_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
@@@ -1411,119 -1191,61 +1191,61 @@@ static int x1000_mac_pins[] = 
        0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x26,
  };
  
- static int x1000_uart0_data_funcs[] = { 0, 0, };
- static int x1000_uart0_hwflow_funcs[] = { 0, 0, };
- static int x1000_uart1_data_a_funcs[] = { 2, 2, };
- static int x1000_uart1_data_d_funcs[] = { 1, 1, };
- static int x1000_uart1_hwflow_funcs[] = { 1, 1, };
- static int x1000_uart2_data_a_funcs[] = { 2, 2, };
- static int x1000_uart2_data_d_funcs[] = { 0, 0, };
- static int x1000_sfc_funcs[] = { 1, 1, 1, 1, 1, 1, };
- static int x1000_ssi_dt_a_22_funcs[] = { 2, };
- static int x1000_ssi_dt_a_29_funcs[] = { 2, };
- static int x1000_ssi_dt_d_funcs[] = { 0, };
- static int x1000_ssi_dr_a_23_funcs[] = { 2, };
- static int x1000_ssi_dr_a_28_funcs[] = { 2, };
- static int x1000_ssi_dr_d_funcs[] = { 0, };
- static int x1000_ssi_clk_a_24_funcs[] = { 2, };
- static int x1000_ssi_clk_a_26_funcs[] = { 2, };
- static int x1000_ssi_clk_d_funcs[] = { 0, };
- static int x1000_ssi_gpc_a_20_funcs[] = { 2, };
- static int x1000_ssi_gpc_a_31_funcs[] = { 2, };
- static int x1000_ssi_ce0_a_25_funcs[] = { 2, };
- static int x1000_ssi_ce0_a_27_funcs[] = { 2, };
- static int x1000_ssi_ce0_d_funcs[] = { 0, };
- static int x1000_ssi_ce1_a_21_funcs[] = { 2, };
- static int x1000_ssi_ce1_a_30_funcs[] = { 2, };
- static int x1000_mmc0_1bit_funcs[] = { 1, 1, 1, };
- static int x1000_mmc0_4bit_funcs[] = { 1, 1, 1, };
- static int x1000_mmc0_8bit_funcs[] = { 1, 1, 1, 1, 1, };
- static int x1000_mmc1_1bit_funcs[] = { 0, 0, 0, };
- static int x1000_mmc1_4bit_funcs[] = { 0, 0, 0, };
- static int x1000_emc_8bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int x1000_emc_16bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int x1000_emc_addr_funcs[] = {
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- };
- static int x1000_emc_rd_we_funcs[] = { 0, 0, };
- static int x1000_emc_wait_funcs[] = { 0, };
- static int x1000_emc_cs1_funcs[] = { 0, };
- static int x1000_emc_cs2_funcs[] = { 0, };
- static int x1000_i2c0_funcs[] = { 0, 0, };
- static int x1000_i2c1_a_funcs[] = { 2, 2, };
- static int x1000_i2c1_c_funcs[] = { 0, 0, };
- static int x1000_i2c2_funcs[] = { 1, 1, };
- static int x1000_i2s_data_tx_funcs[] = { 1, };
- static int x1000_i2s_data_rx_funcs[] = { 1, };
- static int x1000_i2s_clk_txrx_funcs[] = { 1, 1, };
- static int x1000_i2s_sysclk_funcs[] = { 1, };
- static int x1000_cim_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
- static int x1000_lcd_8bit_funcs[] = {
-       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- };
- static int x1000_lcd_16bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, };
- static int x1000_pwm_pwm0_funcs[] = { 0, };
- static int x1000_pwm_pwm1_funcs[] = { 1, };
- static int x1000_pwm_pwm2_funcs[] = { 1, };
- static int x1000_pwm_pwm3_funcs[] = { 2, };
- static int x1000_pwm_pwm4_funcs[] = { 0, };
- static int x1000_mac_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
  static const struct group_desc x1000_groups[] = {
-       INGENIC_PIN_GROUP("uart0-data", x1000_uart0_data),
-       INGENIC_PIN_GROUP("uart0-hwflow", x1000_uart0_hwflow),
-       INGENIC_PIN_GROUP("uart1-data-a", x1000_uart1_data_a),
-       INGENIC_PIN_GROUP("uart1-data-d", x1000_uart1_data_d),
-       INGENIC_PIN_GROUP("uart1-hwflow", x1000_uart1_hwflow),
-       INGENIC_PIN_GROUP("uart2-data-a", x1000_uart2_data_a),
-       INGENIC_PIN_GROUP("uart2-data-d", x1000_uart2_data_d),
-       INGENIC_PIN_GROUP("sfc", x1000_sfc),
-       INGENIC_PIN_GROUP("ssi-dt-a-22", x1000_ssi_dt_a_22),
-       INGENIC_PIN_GROUP("ssi-dt-a-29", x1000_ssi_dt_a_29),
-       INGENIC_PIN_GROUP("ssi-dt-d", x1000_ssi_dt_d),
-       INGENIC_PIN_GROUP("ssi-dr-a-23", x1000_ssi_dr_a_23),
-       INGENIC_PIN_GROUP("ssi-dr-a-28", x1000_ssi_dr_a_28),
-       INGENIC_PIN_GROUP("ssi-dr-d", x1000_ssi_dr_d),
-       INGENIC_PIN_GROUP("ssi-clk-a-24", x1000_ssi_clk_a_24),
-       INGENIC_PIN_GROUP("ssi-clk-a-26", x1000_ssi_clk_a_26),
-       INGENIC_PIN_GROUP("ssi-clk-d", x1000_ssi_clk_d),
-       INGENIC_PIN_GROUP("ssi-gpc-a-20", x1000_ssi_gpc_a_20),
-       INGENIC_PIN_GROUP("ssi-gpc-a-31", x1000_ssi_gpc_a_31),
-       INGENIC_PIN_GROUP("ssi-ce0-a-25", x1000_ssi_ce0_a_25),
-       INGENIC_PIN_GROUP("ssi-ce0-a-27", x1000_ssi_ce0_a_27),
-       INGENIC_PIN_GROUP("ssi-ce0-d", x1000_ssi_ce0_d),
-       INGENIC_PIN_GROUP("ssi-ce1-a-21", x1000_ssi_ce1_a_21),
-       INGENIC_PIN_GROUP("ssi-ce1-a-30", x1000_ssi_ce1_a_30),
-       INGENIC_PIN_GROUP("mmc0-1bit", x1000_mmc0_1bit),
-       INGENIC_PIN_GROUP("mmc0-4bit", x1000_mmc0_4bit),
-       INGENIC_PIN_GROUP("mmc0-8bit", x1000_mmc0_8bit),
-       INGENIC_PIN_GROUP("mmc1-1bit", x1000_mmc1_1bit),
-       INGENIC_PIN_GROUP("mmc1-4bit", x1000_mmc1_4bit),
-       INGENIC_PIN_GROUP("emc-8bit-data", x1000_emc_8bit_data),
-       INGENIC_PIN_GROUP("emc-16bit-data", x1000_emc_16bit_data),
-       INGENIC_PIN_GROUP("emc-addr", x1000_emc_addr),
-       INGENIC_PIN_GROUP("emc-rd-we", x1000_emc_rd_we),
-       INGENIC_PIN_GROUP("emc-wait", x1000_emc_wait),
-       INGENIC_PIN_GROUP("emc-cs1", x1000_emc_cs1),
-       INGENIC_PIN_GROUP("emc-cs2", x1000_emc_cs2),
-       INGENIC_PIN_GROUP("i2c0-data", x1000_i2c0),
-       INGENIC_PIN_GROUP("i2c1-data-a", x1000_i2c1_a),
-       INGENIC_PIN_GROUP("i2c1-data-c", x1000_i2c1_c),
-       INGENIC_PIN_GROUP("i2c2-data", x1000_i2c2),
-       INGENIC_PIN_GROUP("i2s-data-tx", x1000_i2s_data_tx),
-       INGENIC_PIN_GROUP("i2s-data-rx", x1000_i2s_data_rx),
-       INGENIC_PIN_GROUP("i2s-clk-txrx", x1000_i2s_clk_txrx),
-       INGENIC_PIN_GROUP("i2s-sysclk", x1000_i2s_sysclk),
-       INGENIC_PIN_GROUP("cim-data", x1000_cim),
-       INGENIC_PIN_GROUP("lcd-8bit", x1000_lcd_8bit),
-       INGENIC_PIN_GROUP("lcd-16bit", x1000_lcd_16bit),
+       INGENIC_PIN_GROUP("uart0-data", x1000_uart0_data, 0),
+       INGENIC_PIN_GROUP("uart0-hwflow", x1000_uart0_hwflow, 0),
+       INGENIC_PIN_GROUP("uart1-data-a", x1000_uart1_data_a, 2),
+       INGENIC_PIN_GROUP("uart1-data-d", x1000_uart1_data_d, 1),
+       INGENIC_PIN_GROUP("uart1-hwflow", x1000_uart1_hwflow, 1),
+       INGENIC_PIN_GROUP("uart2-data-a", x1000_uart2_data_a, 2),
+       INGENIC_PIN_GROUP("uart2-data-d", x1000_uart2_data_d, 0),
+       INGENIC_PIN_GROUP("sfc", x1000_sfc, 1),
+       INGENIC_PIN_GROUP("ssi-dt-a-22", x1000_ssi_dt_a_22, 2),
+       INGENIC_PIN_GROUP("ssi-dt-a-29", x1000_ssi_dt_a_29, 2),
+       INGENIC_PIN_GROUP("ssi-dt-d", x1000_ssi_dt_d, 0),
+       INGENIC_PIN_GROUP("ssi-dr-a-23", x1000_ssi_dr_a_23, 2),
+       INGENIC_PIN_GROUP("ssi-dr-a-28", x1000_ssi_dr_a_28, 2),
+       INGENIC_PIN_GROUP("ssi-dr-d", x1000_ssi_dr_d, 0),
+       INGENIC_PIN_GROUP("ssi-clk-a-24", x1000_ssi_clk_a_24, 2),
+       INGENIC_PIN_GROUP("ssi-clk-a-26", x1000_ssi_clk_a_26, 2),
+       INGENIC_PIN_GROUP("ssi-clk-d", x1000_ssi_clk_d, 0),
+       INGENIC_PIN_GROUP("ssi-gpc-a-20", x1000_ssi_gpc_a_20, 2),
+       INGENIC_PIN_GROUP("ssi-gpc-a-31", x1000_ssi_gpc_a_31, 2),
+       INGENIC_PIN_GROUP("ssi-ce0-a-25", x1000_ssi_ce0_a_25, 2),
+       INGENIC_PIN_GROUP("ssi-ce0-a-27", x1000_ssi_ce0_a_27, 2),
+       INGENIC_PIN_GROUP("ssi-ce0-d", x1000_ssi_ce0_d, 0),
+       INGENIC_PIN_GROUP("ssi-ce1-a-21", x1000_ssi_ce1_a_21, 2),
+       INGENIC_PIN_GROUP("ssi-ce1-a-30", x1000_ssi_ce1_a_30, 2),
+       INGENIC_PIN_GROUP("mmc0-1bit", x1000_mmc0_1bit, 1),
+       INGENIC_PIN_GROUP("mmc0-4bit", x1000_mmc0_4bit, 1),
+       INGENIC_PIN_GROUP("mmc0-8bit", x1000_mmc0_8bit, 1),
+       INGENIC_PIN_GROUP("mmc1-1bit", x1000_mmc1_1bit, 0),
+       INGENIC_PIN_GROUP("mmc1-4bit", x1000_mmc1_4bit, 0),
+       INGENIC_PIN_GROUP("emc-8bit-data", x1000_emc_8bit_data, 0),
+       INGENIC_PIN_GROUP("emc-16bit-data", x1000_emc_16bit_data, 0),
+       INGENIC_PIN_GROUP("emc-addr", x1000_emc_addr, 0),
+       INGENIC_PIN_GROUP("emc-rd-we", x1000_emc_rd_we, 0),
+       INGENIC_PIN_GROUP("emc-wait", x1000_emc_wait, 0),
+       INGENIC_PIN_GROUP("emc-cs1", x1000_emc_cs1, 0),
+       INGENIC_PIN_GROUP("emc-cs2", x1000_emc_cs2, 0),
+       INGENIC_PIN_GROUP("i2c0-data", x1000_i2c0, 0),
+       INGENIC_PIN_GROUP("i2c1-data-a", x1000_i2c1_a, 2),
+       INGENIC_PIN_GROUP("i2c1-data-c", x1000_i2c1_c, 0),
+       INGENIC_PIN_GROUP("i2c2-data", x1000_i2c2, 1),
+       INGENIC_PIN_GROUP("i2s-data-tx", x1000_i2s_data_tx, 1),
+       INGENIC_PIN_GROUP("i2s-data-rx", x1000_i2s_data_rx, 1),
+       INGENIC_PIN_GROUP("i2s-clk-txrx", x1000_i2s_clk_txrx, 1),
+       INGENIC_PIN_GROUP("i2s-sysclk", x1000_i2s_sysclk, 1),
+       INGENIC_PIN_GROUP("cim-data", x1000_cim, 2),
+       INGENIC_PIN_GROUP("lcd-8bit", x1000_lcd_8bit, 1),
+       INGENIC_PIN_GROUP("lcd-16bit", x1000_lcd_16bit, 1),
        { "lcd-no-pins", },
-       INGENIC_PIN_GROUP("pwm0", x1000_pwm_pwm0),
-       INGENIC_PIN_GROUP("pwm1", x1000_pwm_pwm1),
-       INGENIC_PIN_GROUP("pwm2", x1000_pwm_pwm2),
-       INGENIC_PIN_GROUP("pwm3", x1000_pwm_pwm3),
-       INGENIC_PIN_GROUP("pwm4", x1000_pwm_pwm4),
-       INGENIC_PIN_GROUP("mac", x1000_mac),
+       INGENIC_PIN_GROUP("pwm0", x1000_pwm_pwm0, 0),
+       INGENIC_PIN_GROUP("pwm1", x1000_pwm_pwm1, 1),
+       INGENIC_PIN_GROUP("pwm2", x1000_pwm_pwm2, 1),
+       INGENIC_PIN_GROUP("pwm3", x1000_pwm_pwm3, 2),
+       INGENIC_PIN_GROUP("pwm4", x1000_pwm_pwm4, 0),
+       INGENIC_PIN_GROUP("mac", x1000_mac, 1),
  };
  
  static const char *x1000_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
@@@ -1633,56 -1355,32 +1355,32 @@@ static int x1500_pwm_pwm2_pins[] = { 0x
  static int x1500_pwm_pwm3_pins[] = { 0x26, };
  static int x1500_pwm_pwm4_pins[] = { 0x58, };
  
- static int x1500_uart0_data_funcs[] = { 0, 0, };
- static int x1500_uart0_hwflow_funcs[] = { 0, 0, };
- static int x1500_uart1_data_a_funcs[] = { 2, 2, };
- static int x1500_uart1_data_d_funcs[] = { 1, 1, };
- static int x1500_uart1_hwflow_funcs[] = { 1, 1, };
- static int x1500_uart2_data_a_funcs[] = { 2, 2, };
- static int x1500_uart2_data_d_funcs[] = { 0, 0, };
- static int x1500_mmc_1bit_funcs[] = { 1, 1, 1, };
- static int x1500_mmc_4bit_funcs[] = { 1, 1, 1, };
- static int x1500_i2c0_funcs[] = { 0, 0, };
- static int x1500_i2c1_a_funcs[] = { 2, 2, };
- static int x1500_i2c1_c_funcs[] = { 0, 0, };
- static int x1500_i2c2_funcs[] = { 1, 1, };
- static int x1500_i2s_data_tx_funcs[] = { 1, };
- static int x1500_i2s_data_rx_funcs[] = { 1, };
- static int x1500_i2s_clk_txrx_funcs[] = { 1, 1, };
- static int x1500_i2s_sysclk_funcs[] = { 1, };
- static int x1500_cim_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
- static int x1500_pwm_pwm0_funcs[] = { 0, };
- static int x1500_pwm_pwm1_funcs[] = { 1, };
- static int x1500_pwm_pwm2_funcs[] = { 1, };
- static int x1500_pwm_pwm3_funcs[] = { 2, };
- static int x1500_pwm_pwm4_funcs[] = { 0, };
  static const struct group_desc x1500_groups[] = {
-       INGENIC_PIN_GROUP("uart0-data", x1500_uart0_data),
-       INGENIC_PIN_GROUP("uart0-hwflow", x1500_uart0_hwflow),
-       INGENIC_PIN_GROUP("uart1-data-a", x1500_uart1_data_a),
-       INGENIC_PIN_GROUP("uart1-data-d", x1500_uart1_data_d),
-       INGENIC_PIN_GROUP("uart1-hwflow", x1500_uart1_hwflow),
-       INGENIC_PIN_GROUP("uart2-data-a", x1500_uart2_data_a),
-       INGENIC_PIN_GROUP("uart2-data-d", x1500_uart2_data_d),
-       INGENIC_PIN_GROUP("sfc", x1000_sfc),
-       INGENIC_PIN_GROUP("mmc-1bit", x1500_mmc_1bit),
-       INGENIC_PIN_GROUP("mmc-4bit", x1500_mmc_4bit),
-       INGENIC_PIN_GROUP("i2c0-data", x1500_i2c0),
-       INGENIC_PIN_GROUP("i2c1-data-a", x1500_i2c1_a),
-       INGENIC_PIN_GROUP("i2c1-data-c", x1500_i2c1_c),
-       INGENIC_PIN_GROUP("i2c2-data", x1500_i2c2),
-       INGENIC_PIN_GROUP("i2s-data-tx", x1500_i2s_data_tx),
-       INGENIC_PIN_GROUP("i2s-data-rx", x1500_i2s_data_rx),
-       INGENIC_PIN_GROUP("i2s-clk-txrx", x1500_i2s_clk_txrx),
-       INGENIC_PIN_GROUP("i2s-sysclk", x1500_i2s_sysclk),
-       INGENIC_PIN_GROUP("cim-data", x1500_cim),
+       INGENIC_PIN_GROUP("uart0-data", x1500_uart0_data, 0),
+       INGENIC_PIN_GROUP("uart0-hwflow", x1500_uart0_hwflow, 0),
+       INGENIC_PIN_GROUP("uart1-data-a", x1500_uart1_data_a, 2),
+       INGENIC_PIN_GROUP("uart1-data-d", x1500_uart1_data_d, 1),
+       INGENIC_PIN_GROUP("uart1-hwflow", x1500_uart1_hwflow, 1),
+       INGENIC_PIN_GROUP("uart2-data-a", x1500_uart2_data_a, 2),
+       INGENIC_PIN_GROUP("uart2-data-d", x1500_uart2_data_d, 0),
+       INGENIC_PIN_GROUP("sfc", x1000_sfc, 1),
+       INGENIC_PIN_GROUP("mmc-1bit", x1500_mmc_1bit, 1),
+       INGENIC_PIN_GROUP("mmc-4bit", x1500_mmc_4bit, 1),
+       INGENIC_PIN_GROUP("i2c0-data", x1500_i2c0, 0),
+       INGENIC_PIN_GROUP("i2c1-data-a", x1500_i2c1_a, 2),
+       INGENIC_PIN_GROUP("i2c1-data-c", x1500_i2c1_c, 0),
+       INGENIC_PIN_GROUP("i2c2-data", x1500_i2c2, 1),
+       INGENIC_PIN_GROUP("i2s-data-tx", x1500_i2s_data_tx, 1),
+       INGENIC_PIN_GROUP("i2s-data-rx", x1500_i2s_data_rx, 1),
+       INGENIC_PIN_GROUP("i2s-clk-txrx", x1500_i2s_clk_txrx, 1),
+       INGENIC_PIN_GROUP("i2s-sysclk", x1500_i2s_sysclk, 1),
+       INGENIC_PIN_GROUP("cim-data", x1500_cim, 2),
        { "lcd-no-pins", },
-       INGENIC_PIN_GROUP("pwm0", x1500_pwm_pwm0),
-       INGENIC_PIN_GROUP("pwm1", x1500_pwm_pwm1),
-       INGENIC_PIN_GROUP("pwm2", x1500_pwm_pwm2),
-       INGENIC_PIN_GROUP("pwm3", x1500_pwm_pwm3),
-       INGENIC_PIN_GROUP("pwm4", x1500_pwm_pwm4),
+       INGENIC_PIN_GROUP("pwm0", x1500_pwm_pwm0, 0),
+       INGENIC_PIN_GROUP("pwm1", x1500_pwm_pwm1, 1),
+       INGENIC_PIN_GROUP("pwm2", x1500_pwm_pwm2, 1),
+       INGENIC_PIN_GROUP("pwm3", x1500_pwm_pwm3, 2),
+       INGENIC_PIN_GROUP("pwm4", x1500_pwm_pwm4, 0),
  };
  
  static const char *x1500_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
@@@ -1811,124 -1509,62 +1509,62 @@@ static int x1830_mac_pins[] = 
        0x29, 0x30, 0x2f, 0x28, 0x2e, 0x2d, 0x2a, 0x2b, 0x26, 0x27,
  };
  
- static int x1830_uart0_data_funcs[] = { 0, 0, };
- static int x1830_uart0_hwflow_funcs[] = { 0, 0, };
- static int x1830_uart1_data_funcs[] = { 0, 0, };
- static int x1830_sfc_funcs[] = { 1, 1, 1, 1, 1, 1, };
- static int x1830_ssi0_dt_funcs[] = { 0, };
- static int x1830_ssi0_dr_funcs[] = { 0, };
- static int x1830_ssi0_clk_funcs[] = { 0, };
- static int x1830_ssi0_gpc_funcs[] = { 0, };
- static int x1830_ssi0_ce0_funcs[] = { 0, };
- static int x1830_ssi0_ce1_funcs[] = { 0, };
- static int x1830_ssi1_dt_c_funcs[] = { 1, };
- static int x1830_ssi1_dr_c_funcs[] = { 1, };
- static int x1830_ssi1_clk_c_funcs[] = { 1, };
- static int x1830_ssi1_gpc_c_funcs[] = { 1, };
- static int x1830_ssi1_ce0_c_funcs[] = { 1, };
- static int x1830_ssi1_ce1_c_funcs[] = { 1, };
- static int x1830_ssi1_dt_d_funcs[] = { 2, };
- static int x1830_ssi1_dr_d_funcs[] = { 2, };
- static int x1830_ssi1_clk_d_funcs[] = { 2, };
- static int x1830_ssi1_gpc_d_funcs[] = { 2, };
- static int x1830_ssi1_ce0_d_funcs[] = { 2, };
- static int x1830_ssi1_ce1_d_funcs[] = { 2, };
- static int x1830_mmc0_1bit_funcs[] = { 0, 0, 0, };
- static int x1830_mmc0_4bit_funcs[] = { 0, 0, 0, };
- static int x1830_mmc1_1bit_funcs[] = { 0, 0, 0, };
- static int x1830_mmc1_4bit_funcs[] = { 0, 0, 0, };
- static int x1830_i2c0_funcs[] = { 1, 1, };
- static int x1830_i2c1_funcs[] = { 0, 0, };
- static int x1830_i2c2_funcs[] = { 1, 1, };
- static int x1830_i2s_data_tx_funcs[] = { 0, };
- static int x1830_i2s_data_rx_funcs[] = { 0, };
- static int x1830_i2s_clk_txrx_funcs[] = { 0, 0, };
- static int x1830_i2s_clk_rx_funcs[] = { 0, 0, };
- static int x1830_i2s_sysclk_funcs[] = { 0, };
- static int x1830_lcd_rgb_18bit_funcs[] = {
-       0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0,
- };
- static int x1830_lcd_slcd_8bit_funcs[] = {
-       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- };
- static int x1830_lcd_slcd_16bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, };
- static int x1830_pwm_pwm0_b_funcs[] = { 0, };
- static int x1830_pwm_pwm0_c_funcs[] = { 1, };
- static int x1830_pwm_pwm1_b_funcs[] = { 0, };
- static int x1830_pwm_pwm1_c_funcs[] = { 1, };
- static int x1830_pwm_pwm2_c_8_funcs[] = { 0, };
- static int x1830_pwm_pwm2_c_13_funcs[] = { 1, };
- static int x1830_pwm_pwm3_c_9_funcs[] = { 0, };
- static int x1830_pwm_pwm3_c_14_funcs[] = { 1, };
- static int x1830_pwm_pwm4_c_15_funcs[] = { 1, };
- static int x1830_pwm_pwm4_c_25_funcs[] = { 0, };
- static int x1830_pwm_pwm5_c_16_funcs[] = { 1, };
- static int x1830_pwm_pwm5_c_26_funcs[] = { 0, };
- static int x1830_pwm_pwm6_c_17_funcs[] = { 1, };
- static int x1830_pwm_pwm6_c_27_funcs[] = { 0, };
- static int x1830_pwm_pwm7_c_18_funcs[] = { 1, };
- static int x1830_pwm_pwm7_c_28_funcs[] = { 0, };
- static int x1830_mac_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
  static const struct group_desc x1830_groups[] = {
-       INGENIC_PIN_GROUP("uart0-data", x1830_uart0_data),
-       INGENIC_PIN_GROUP("uart0-hwflow", x1830_uart0_hwflow),
-       INGENIC_PIN_GROUP("uart1-data", x1830_uart1_data),
-       INGENIC_PIN_GROUP("sfc", x1830_sfc),
-       INGENIC_PIN_GROUP("ssi0-dt", x1830_ssi0_dt),
-       INGENIC_PIN_GROUP("ssi0-dr", x1830_ssi0_dr),
-       INGENIC_PIN_GROUP("ssi0-clk", x1830_ssi0_clk),
-       INGENIC_PIN_GROUP("ssi0-gpc", x1830_ssi0_gpc),
-       INGENIC_PIN_GROUP("ssi0-ce0", x1830_ssi0_ce0),
-       INGENIC_PIN_GROUP("ssi0-ce1", x1830_ssi0_ce1),
-       INGENIC_PIN_GROUP("ssi1-dt-c", x1830_ssi1_dt_c),
-       INGENIC_PIN_GROUP("ssi1-dr-c", x1830_ssi1_dr_c),
-       INGENIC_PIN_GROUP("ssi1-clk-c", x1830_ssi1_clk_c),
-       INGENIC_PIN_GROUP("ssi1-gpc-c", x1830_ssi1_gpc_c),
-       INGENIC_PIN_GROUP("ssi1-ce0-c", x1830_ssi1_ce0_c),
-       INGENIC_PIN_GROUP("ssi1-ce1-c", x1830_ssi1_ce1_c),
-       INGENIC_PIN_GROUP("ssi1-dt-d", x1830_ssi1_dt_d),
-       INGENIC_PIN_GROUP("ssi1-dr-d", x1830_ssi1_dr_d),
-       INGENIC_PIN_GROUP("ssi1-clk-d", x1830_ssi1_clk_d),
-       INGENIC_PIN_GROUP("ssi1-gpc-d", x1830_ssi1_gpc_d),
-       INGENIC_PIN_GROUP("ssi1-ce0-d", x1830_ssi1_ce0_d),
-       INGENIC_PIN_GROUP("ssi1-ce1-d", x1830_ssi1_ce1_d),
-       INGENIC_PIN_GROUP("mmc0-1bit", x1830_mmc0_1bit),
-       INGENIC_PIN_GROUP("mmc0-4bit", x1830_mmc0_4bit),
-       INGENIC_PIN_GROUP("mmc1-1bit", x1830_mmc1_1bit),
-       INGENIC_PIN_GROUP("mmc1-4bit", x1830_mmc1_4bit),
-       INGENIC_PIN_GROUP("i2c0-data", x1830_i2c0),
-       INGENIC_PIN_GROUP("i2c1-data", x1830_i2c1),
-       INGENIC_PIN_GROUP("i2c2-data", x1830_i2c2),
-       INGENIC_PIN_GROUP("i2s-data-tx", x1830_i2s_data_tx),
-       INGENIC_PIN_GROUP("i2s-data-rx", x1830_i2s_data_rx),
-       INGENIC_PIN_GROUP("i2s-clk-txrx", x1830_i2s_clk_txrx),
-       INGENIC_PIN_GROUP("i2s-clk-rx", x1830_i2s_clk_rx),
-       INGENIC_PIN_GROUP("i2s-sysclk", x1830_i2s_sysclk),
-       INGENIC_PIN_GROUP("lcd-rgb-18bit", x1830_lcd_rgb_18bit),
-       INGENIC_PIN_GROUP("lcd-slcd-8bit", x1830_lcd_slcd_8bit),
-       INGENIC_PIN_GROUP("lcd-slcd-16bit", x1830_lcd_slcd_16bit),
+       INGENIC_PIN_GROUP("uart0-data", x1830_uart0_data, 0),
+       INGENIC_PIN_GROUP("uart0-hwflow", x1830_uart0_hwflow, 0),
+       INGENIC_PIN_GROUP("uart1-data", x1830_uart1_data, 0),
+       INGENIC_PIN_GROUP("sfc", x1830_sfc, 1),
+       INGENIC_PIN_GROUP("ssi0-dt", x1830_ssi0_dt, 0),
+       INGENIC_PIN_GROUP("ssi0-dr", x1830_ssi0_dr, 0),
+       INGENIC_PIN_GROUP("ssi0-clk", x1830_ssi0_clk, 0),
+       INGENIC_PIN_GROUP("ssi0-gpc", x1830_ssi0_gpc, 0),
+       INGENIC_PIN_GROUP("ssi0-ce0", x1830_ssi0_ce0, 0),
+       INGENIC_PIN_GROUP("ssi0-ce1", x1830_ssi0_ce1, 0),
+       INGENIC_PIN_GROUP("ssi1-dt-c", x1830_ssi1_dt_c, 1),
+       INGENIC_PIN_GROUP("ssi1-dr-c", x1830_ssi1_dr_c, 1),
+       INGENIC_PIN_GROUP("ssi1-clk-c", x1830_ssi1_clk_c, 1),
+       INGENIC_PIN_GROUP("ssi1-gpc-c", x1830_ssi1_gpc_c, 1),
+       INGENIC_PIN_GROUP("ssi1-ce0-c", x1830_ssi1_ce0_c, 1),
+       INGENIC_PIN_GROUP("ssi1-ce1-c", x1830_ssi1_ce1_c, 1),
+       INGENIC_PIN_GROUP("ssi1-dt-d", x1830_ssi1_dt_d, 2),
+       INGENIC_PIN_GROUP("ssi1-dr-d", x1830_ssi1_dr_d, 2),
+       INGENIC_PIN_GROUP("ssi1-clk-d", x1830_ssi1_clk_d, 2),
+       INGENIC_PIN_GROUP("ssi1-gpc-d", x1830_ssi1_gpc_d, 2),
+       INGENIC_PIN_GROUP("ssi1-ce0-d", x1830_ssi1_ce0_d, 2),
+       INGENIC_PIN_GROUP("ssi1-ce1-d", x1830_ssi1_ce1_d, 2),
+       INGENIC_PIN_GROUP("mmc0-1bit", x1830_mmc0_1bit, 0),
+       INGENIC_PIN_GROUP("mmc0-4bit", x1830_mmc0_4bit, 0),
+       INGENIC_PIN_GROUP("mmc1-1bit", x1830_mmc1_1bit, 0),
+       INGENIC_PIN_GROUP("mmc1-4bit", x1830_mmc1_4bit, 0),
+       INGENIC_PIN_GROUP("i2c0-data", x1830_i2c0, 1),
+       INGENIC_PIN_GROUP("i2c1-data", x1830_i2c1, 0),
+       INGENIC_PIN_GROUP("i2c2-data", x1830_i2c2, 1),
+       INGENIC_PIN_GROUP("i2s-data-tx", x1830_i2s_data_tx, 0),
+       INGENIC_PIN_GROUP("i2s-data-rx", x1830_i2s_data_rx, 0),
+       INGENIC_PIN_GROUP("i2s-clk-txrx", x1830_i2s_clk_txrx, 0),
+       INGENIC_PIN_GROUP("i2s-clk-rx", x1830_i2s_clk_rx, 0),
+       INGENIC_PIN_GROUP("i2s-sysclk", x1830_i2s_sysclk, 0),
+       INGENIC_PIN_GROUP("lcd-rgb-18bit", x1830_lcd_rgb_18bit, 0),
+       INGENIC_PIN_GROUP("lcd-slcd-8bit", x1830_lcd_slcd_8bit, 1),
+       INGENIC_PIN_GROUP("lcd-slcd-16bit", x1830_lcd_slcd_16bit, 1),
        { "lcd-no-pins", },
-       INGENIC_PIN_GROUP("pwm0-b", x1830_pwm_pwm0_b),
-       INGENIC_PIN_GROUP("pwm0-c", x1830_pwm_pwm0_c),
-       INGENIC_PIN_GROUP("pwm1-b", x1830_pwm_pwm1_b),
-       INGENIC_PIN_GROUP("pwm1-c", x1830_pwm_pwm1_c),
-       INGENIC_PIN_GROUP("pwm2-c-8", x1830_pwm_pwm2_c_8),
-       INGENIC_PIN_GROUP("pwm2-c-13", x1830_pwm_pwm2_c_13),
-       INGENIC_PIN_GROUP("pwm3-c-9", x1830_pwm_pwm3_c_9),
-       INGENIC_PIN_GROUP("pwm3-c-14", x1830_pwm_pwm3_c_14),
-       INGENIC_PIN_GROUP("pwm4-c-15", x1830_pwm_pwm4_c_15),
-       INGENIC_PIN_GROUP("pwm4-c-25", x1830_pwm_pwm4_c_25),
-       INGENIC_PIN_GROUP("pwm5-c-16", x1830_pwm_pwm5_c_16),
-       INGENIC_PIN_GROUP("pwm5-c-26", x1830_pwm_pwm5_c_26),
-       INGENIC_PIN_GROUP("pwm6-c-17", x1830_pwm_pwm6_c_17),
-       INGENIC_PIN_GROUP("pwm6-c-27", x1830_pwm_pwm6_c_27),
-       INGENIC_PIN_GROUP("pwm7-c-18", x1830_pwm_pwm7_c_18),
-       INGENIC_PIN_GROUP("pwm7-c-28", x1830_pwm_pwm7_c_28),
-       INGENIC_PIN_GROUP("mac", x1830_mac),
+       INGENIC_PIN_GROUP("pwm0-b", x1830_pwm_pwm0_b, 0),
+       INGENIC_PIN_GROUP("pwm0-c", x1830_pwm_pwm0_c, 1),
+       INGENIC_PIN_GROUP("pwm1-b", x1830_pwm_pwm1_b, 0),
+       INGENIC_PIN_GROUP("pwm1-c", x1830_pwm_pwm1_c, 1),
+       INGENIC_PIN_GROUP("pwm2-c-8", x1830_pwm_pwm2_c_8, 0),
+       INGENIC_PIN_GROUP("pwm2-c-13", x1830_pwm_pwm2_c_13, 1),
+       INGENIC_PIN_GROUP("pwm3-c-9", x1830_pwm_pwm3_c_9, 0),
+       INGENIC_PIN_GROUP("pwm3-c-14", x1830_pwm_pwm3_c_14, 1),
+       INGENIC_PIN_GROUP("pwm4-c-15", x1830_pwm_pwm4_c_15, 1),
+       INGENIC_PIN_GROUP("pwm4-c-25", x1830_pwm_pwm4_c_25, 0),
+       INGENIC_PIN_GROUP("pwm5-c-16", x1830_pwm_pwm5_c_16, 1),
+       INGENIC_PIN_GROUP("pwm5-c-26", x1830_pwm_pwm5_c_26, 0),
+       INGENIC_PIN_GROUP("pwm6-c-17", x1830_pwm_pwm6_c_17, 1),
+       INGENIC_PIN_GROUP("pwm6-c-27", x1830_pwm_pwm6_c_27, 0),
+       INGENIC_PIN_GROUP("pwm7-c-18", x1830_pwm_pwm7_c_18, 1),
+       INGENIC_PIN_GROUP("pwm7-c-28", x1830_pwm_pwm7_c_28, 0),
+       INGENIC_PIN_GROUP("mac", x1830_mac, 0),
  };
  
  static const char *x1830_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
@@@ -2381,6 -2017,8 +2017,8 @@@ static int ingenic_pinmux_set_mux(struc
        struct function_desc *func;
        struct group_desc *grp;
        unsigned int i;
+       uintptr_t mode;
+       u8 *pin_modes;
  
        func = pinmux_generic_get_function(pctldev, selector);
        if (!func)
        dev_dbg(pctldev->dev, "enable function %s group %s\n",
                func->name, grp->name);
  
-       for (i = 0; i < grp->num_pins; i++) {
-               int *pin_modes = grp->data;
+       mode = (uintptr_t)grp->data;
+       if (mode <= 3) {
+               for (i = 0; i < grp->num_pins; i++)
+                       ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], mode);
+       } else {
+               pin_modes = grp->data;
  
-               ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], pin_modes[i]);
+               for (i = 0; i < grp->num_pins; i++)
+                       ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], pin_modes[i]);
        }
  
        return 0;
index 77a25bdf0da70a3ff28c54c8c2a82a12a67a1067,988343ac49b9269cc3c23dd7bf31bff4f7badf37..e051aecf95c4ee5f8fc4feec3be30861dd61db0f
@@@ -815,14 -815,21 +815,14 @@@ static void msm_gpio_irq_clear_unmask(s
  
  static void msm_gpio_irq_enable(struct irq_data *d)
  {
 -      /*
 -       * Clear the interrupt that may be pending before we enable
 -       * the line.
 -       * This is especially a problem with the GPIOs routed to the
 -       * PDC. These GPIOs are direct-connect interrupts to the GIC.
 -       * Disabling the interrupt line at the PDC does not prevent
 -       * the interrupt from being latched at the GIC. The state at
 -       * GIC needs to be cleared before enabling.
 -       */
 -      if (d->parent_data) {
 -              irq_chip_set_parent_state(d, IRQCHIP_STATE_PENDING, 0);
 +      struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 +      struct msm_pinctrl *pctrl = gpiochip_get_data(gc);
 +
 +      if (d->parent_data)
                irq_chip_enable_parent(d);
 -      }
  
 -      msm_gpio_irq_clear_unmask(d, true);
 +      if (!test_bit(d->hwirq, pctrl->skip_wake_irqs))
 +              msm_gpio_irq_clear_unmask(d, true);
  }
  
  static void msm_gpio_irq_disable(struct irq_data *d)
@@@ -1097,19 -1104,6 +1097,19 @@@ static int msm_gpio_irq_reqres(struct i
                ret = -EINVAL;
                goto out;
        }
 +
 +      /*
 +       * Clear the interrupt that may be pending before we enable
 +       * the line.
 +       * This is especially a problem with the GPIOs routed to the
 +       * PDC. These GPIOs are direct-connect interrupts to the GIC.
 +       * Disabling the interrupt line at the PDC does not prevent
 +       * the interrupt from being latched at the GIC. The state at
 +       * GIC needs to be cleared before enabling.
 +       */
 +      if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs))
 +              irq_chip_set_parent_state(d, IRQCHIP_STATE_PENDING, 0);
 +
        return 0;
  out:
        module_put(gc->owner);
@@@ -1449,3 -1443,5 +1449,5 @@@ int msm_pinctrl_remove(struct platform_
  }
  EXPORT_SYMBOL(msm_pinctrl_remove);
  
+ MODULE_DESCRIPTION("Qualcomm Technologies, Inc. TLMM driver");
+ MODULE_LICENSE("GPL v2");
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