S: Maintained
F: drivers/i2c/busses/i2c-amd-mp2*
+AMD PMC DRIVER
+S: Maintained
+F: drivers/platform/x86/amd-pmc.*
+
AMD POWERPLAY
S: Supported
T: git git://people.freedesktop.org/~agd5f/linux
-F: drivers/gpu/drm/amd/powerplay/
+F: drivers/gpu/drm/amd/pm/powerplay/
AMD SEATTLE DEVICE TREE SUPPORT
S: Supported
W: http://ez.analog.com/community/linux-device-drivers
-F: Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.txt
+F: Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml
F: drivers/iio/adc/ad7768-1.c
ANALOG DEVICES INC AD7780 DRIVER
S: Maintained
F: drivers/media/i2c/adv7604*
+F: Documentation/devicetree/bindings/media/i2c/adv7604.yaml
ANALOG DEVICES INC ADV7842 DRIVER
F: Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt
F: drivers/rtc/rtc-goldfish.c
-ANDROID ION DRIVER
-S: Supported
-F: drivers/staging/android/ion
-F: drivers/staging/android/uapi/ion.h
-
AOA (Apple Onboard Audio) ALSA DRIVER
S: Supported
W: https://www.marvell.com/
-Q: http://patchwork.ozlabs.org/project/netdev/list/
+Q: https://patchwork.kernel.org/project/netdevbpf/list/
F: Documentation/networking/device_drivers/ethernet/aquantia/atlantic.rst
F: drivers/net/ethernet/aquantia/atlantic/
F: drivers/iommu/arm/
F: drivers/iommu/io-pgtable-arm*
+ARM AND ARM64 SoC SUB-ARCHITECTURES (COMMON PARTS)
+S: Maintained
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git
+F: arch/arm/boot/dts/Makefile
+F: arch/arm64/boot/dts/Makefile
+
ARM SUB-ARCHITECTURES
S: Maintained
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git
F: arch/arm/mach-*/
F: arch/arm/plat-*/
F: Documentation/devicetree/bindings/arm/actions.yaml
F: Documentation/devicetree/bindings/clock/actions,owl-cmu.txt
F: Documentation/devicetree/bindings/dma/owl-dma.yaml
-F: Documentation/devicetree/bindings/i2c/i2c-owl.txt
+F: Documentation/devicetree/bindings/i2c/i2c-owl.yaml
F: Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml
F: Documentation/devicetree/bindings/mmc/owl-mmc.yaml
F: Documentation/devicetree/bindings/pinctrl/actions,*
ARM/Allwinner sunXi SoC support
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git
ARM/CORESIGHT FRAMEWORK AND DRIVERS
S: Maintained
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git
F: Documentation/ABI/testing/sysfs-bus-coresight-devices-*
F: Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt
F: Documentation/devicetree/bindings/arm/coresight-cti.yaml
F: drivers/gpio/gpio-moxtet.c
F: include/linux/moxtet.h
-ARM/EBSA110 MACHINE SUPPORT
-S: Maintained
-W: http://www.armlinux.org.uk/
-F: arch/arm/mach-ebsa110/
-F: drivers/net/ethernet/amd/am79c961a.*
-
ARM/ENERGY MICRO (SILICON LABS) EFM32 SUPPORT
ARM/LPC32XX SOC SUPPORT
S: Maintained
T: git git://github.com/vzapolskiy/linux-lpc32xx.git
S: Maintained
ARM/Marvell Dove/MV78xx0/Orion SOC support
F: drivers/soc/dove/
ARM/Marvell Kirkwood and Armada 370, 375, 38x, 39x, XP, 3700, 7K/8K, CN9130 SOC support
S: Supported
T: git git://github.com/microchip-ung/linux-upstream.git
F: arch/arm64/boot/dts/microchip/
+ F: drivers/pinctrl/pinctrl-microchip-sgpio.c
N: sparx5
+Microchip Timer Counter Block (TCB) Capture Driver
+S: Maintained
+F: drivers/counter/microchip-tcb-capture.c
+
ARM/MIOA701 MACHINE SUPPORT
F: sound/soc/rockchip/
N: rockchip
-ARM/SAMSUNG EXYNOS ARM ARCHITECTURES
+ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES
N: s3c64xx
N: s5pv210
-ARM/SAMSUNG MOBILE MACHINE SUPPORT
-S: Maintained
-F: arch/arm/mach-s5pv210/
-
ARM/SAMSUNG S5P SERIES 2D GRAPHICS ACCELERATION (G2D) SUPPORT
F: drivers/media/platform/s5p-jpeg/
ARM/SAMSUNG S5P SERIES Multi Format Codec (MFC) SUPPORT
ARM/SOCFPGA EDAC SUPPORT
S: Maintained
-F: drivers/edac/altera_edac.
+F: drivers/edac/altera_edac.[ch]
ARM/SPREADTRUM SoC SUPPORT
N: visconti
ARM/UNIPHIER ARCHITECTURE
-S: Maintained
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
+S: Orphan
F: Documentation/devicetree/bindings/arm/socionext/uniphier.yaml
F: Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml
F: Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml
S: Maintained
T: git git://github.com/ndyer/linux.git
-F: Documentation/devicetree/bindings/input/atmel,maxtouch.txt
+F: Documentation/devicetree/bindings/input/atmel,maxtouch.yaml
F: drivers/input/touchscreen/atmel_mxt_ts.c
ATMEL WIRELESS DRIVER
S: Maintained
F: arch/*/include/asm/atomic*.h
F: include/*/atomic*.h
+F: include/linux/refcount.h
+F: Documentation/atomic_*.txt
F: scripts/atomic/
ATTO EXPRESSSAS SAS/SATA RAID SCSI DRIVER
B: https://www.open-mesh.org/projects/batman-adv/issues
C: irc://chat.freenode.net/batman
T: git https://git.open-mesh.org/linux-merge.git
-F: Documentation/ABI/obsolete/sysfs-class-net-batman-adv
-F: Documentation/ABI/obsolete/sysfs-class-net-mesh
F: Documentation/networking/batman-adv.rst
F: include/uapi/linux/batadv_packet.h
F: include/uapi/linux/batman_adv.h
BLUETOOTH DRIVERS
-S: Maintained
+S: Supported
W: http://www.bluez.org/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth-next.git
BLUETOOTH SUBSYSTEM
-S: Maintained
+S: Supported
W: http://www.bluez.org/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth-next.git
BPF (Safe dynamic programs and tools)
-R: KP Singh <kpsingh@chromium.org>
+R: KP Singh <kpsingh@kernel.org>
S: Supported
F: arch/x86/net/
X: arch/x86/net/bpf_jit_comp32.c
+BPF LSM (Security Audit and Enforcement using BPF)
+S: Maintained
+F: Documentation/bpf/bpf_lsm.rst
+F: include/linux/bpf_lsm.h
+F: kernel/bpf/bpf_lsm.c
+F: security/bpf/
+
BROADCOM B44 10/100 ETHERNET DRIVER
-L: brcm80211-dev-list@cypress.com
+L: SHA-cyfmac-dev-list@infineon.com
S: Supported
F: drivers/net/wireless/broadcom/brcm80211/
F: Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml
F: drivers/usb/host/ehci-brcm.*
+BROADCOM BRCMSTB USB PIN MAP DRIVER
+S: Maintained
+F: Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml
+F: drivers/usb/misc/brcmstb-usb-pinmap.c
+
BROADCOM BRCMSTB USB2 and USB3 PHY DRIVER
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git
-F: Documentation/devicetree/bindings/usb/cdns-usb3.txt
+F: Documentation/devicetree/bindings/usb/cdns,usb3.yaml
F: drivers/usb/cdns3/
CADET FM/AM RADIO RECEIVER DRIVER
F: drivers/media/radio/radio-cadet*
CAFE CMOS INTEGRATED CAMERA CONTROLLER DRIVER
-S: Maintained
+S: Orphan
T: git git://linuxtv.org/media_tree.git
F: Documentation/admin-guide/media/cafe_ccic*
F: drivers/media/platform/marvell-ccic/
C: irc://chat.freenode.net/clangbuiltlinux
F: Documentation/kbuild/llvm.rst
F: scripts/clang-tools/
+F: scripts/lld-version.sh
K: \b(?i:clang|llvm)\b
CLEANCACHE API
S: Maintained
-F: Documentation/devicetree/bindings/media/coda.txt
+F: Documentation/devicetree/bindings/media/coda.yaml
F: drivers/media/platform/coda/
CODE OF CONDUCT
S: Maintained
F: drivers/hwmon/corsair-cpro.c
+CORSAIR-PSU HARDWARE MONITOR DRIVER
+S: Maintained
+F: Documentation/hwmon/corsair-psu.rst
+F: drivers/hwmon/corsair-psu.c
+
COSA/SRP SYNC SERIAL DRIVER
S: Maintained
F: drivers/media/dvb-frontends/cxd2820r*
CXGB3 ETHERNET DRIVER (CXGB3)
-M: Vishal Kulkarni <vishal@chelsio.com>
+M: Raju Rangoju <rajur@chelsio.com>
S: Supported
W: http://www.chelsio.com
F: drivers/net/ethernet/chelsio/inline_crypto/
CXGB4 ETHERNET DRIVER (CXGB4)
-M: Vishal Kulkarni <vishal@chelsio.com>
+M: Raju Rangoju <rajur@chelsio.com>
S: Supported
W: http://www.chelsio.com
F: include/uapi/rdma/cxgb4-abi.h
CXGB4VF ETHERNET DRIVER (CXGB4VF)
-M: Vishal Kulkarni <vishal@gmail.com>
+M: Raju Rangoju <rajur@chelsio.com>
S: Supported
W: http://www.chelsio.com
S: Maintained
F: drivers/platform/x86/dell-wmi-descriptor.c
+DELL WMI SYSMAN DRIVER
+S: Maintained
+F: Documentation/ABI/testing/sysfs-class-firmware-attributes
+F: drivers/platform/x86/dell-wmi-sysman/
+
DELL WMI NOTIFICATIONS DRIVER
F: drivers/media/platform/sti/delta
DENALI NAND DRIVER
-S: Supported
+S: Orphan
F: drivers/mtd/nand/raw/denali*
DESIGNWARE EDMA CORE IP DRIVER
S: Supported
W: http://www.dialog-semiconductor.com/products
F: Documentation/devicetree/bindings/input/da90??-onkey.txt
+F: Documentation/devicetree/bindings/input/dlg,da72??.txt
F: Documentation/devicetree/bindings/mfd/da90*.txt
+F: Documentation/devicetree/bindings/regulator/dlg,da9*.yaml
F: Documentation/devicetree/bindings/regulator/da92*.txt
F: Documentation/devicetree/bindings/regulator/slg51000.txt
F: Documentation/devicetree/bindings/sound/da[79]*.txt
F: drivers/gpio/gpio-da90??.c
F: drivers/hwmon/da90??-hwmon.c
F: drivers/iio/adc/da91??-*.c
+F: drivers/input/misc/da72??.[ch]
F: drivers/input/misc/da90??_onkey.c
F: drivers/input/touchscreen/da9052_tsi.c
F: drivers/leds/leds-da90??.c
F: drivers/thermal/da90??-thermal.c
F: drivers/video/backlight/da90??_bl.c
F: drivers/watchdog/da90??_wdt.c
+F: include/dt-bindings/regulator/dlg,da9*-regulator.h
F: include/linux/mfd/da903x.h
F: include/linux/mfd/da9052/
F: include/linux/mfd/da9055/
F: Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml
F: drivers/gpu/drm/panel/panel-novatek-nt35510.c
+DRM DRIVER FOR NOVATEK NT36672A PANELS
+S: Maintained
+T: git git://anongit.freedesktop.org/drm/drm-misc
+F: Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
+F: drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+
DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS
F: Documentation/devicetree/bindings/display/mediatek/
F: drivers/gpu/drm/mediatek/
F: drivers/phy/mediatek/phy-mtk-hdmi*
+F: drivers/phy/mediatek/phy-mtk-mipi*
DRM DRIVERS FOR NVIDIA TEGRA
DRM DRIVERS FOR VC4
S: Supported
T: git git://github.com/anholt/linux
T: git git://anongit.freedesktop.org/drm/drm-misc
S: Maintained
F: drivers/edac/ie31200_edac.c
+EDAC-IGEN6
+S: Maintained
+F: drivers/edac/igen6_edac.c
+
EDAC-MPC85XX
S: Maintained
-F: drivers/edac/skx_*.c
+F: drivers/edac/skx_*.[ch]
EDAC-TI
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4.git
F: Documentation/filesystems/ext4/
F: fs/ext4/
+F: include/trace/events/ext4.h
Extended Verification Module (EVM)
W: http://floatingpoint.sourceforge.net/emulator/index.html
F: arch/x86/math-emu/
-FRAME RELAY DLCI/FRAD (Sangoma drivers too)
-S: Orphan
-F: drivers/net/wan/dlci.c
-F: drivers/net/wan/sdla.c
-
FRAMEBUFFER LAYER
-S: Maintained
+S: Orphan
Q: http://patchwork.kernel.org/project/linux-fbdev/list/
T: git git://anongit.freedesktop.org/drm/drm-misc
F: Documentation/fb/
GCC PLUGINS
S: Maintained
F: Documentation/kbuild/gcc-plugins.rst
F: drivers/base/arch_topology.c
F: include/linux/arch_topology.h
+GENERIC ENTRY CODE
+S: Maintained
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git core/entry
+F: include/linux/entry-common.h
+F: include/linux/entry-kvm.h
+F: kernel/entry/
+
GENERIC GPIO I2C DRIVER
S: Supported
F: drivers/irqchip/irq-renesas-h8*.c
HABANALABS PCI DRIVER
S: Supported
-T: git https://github.com/HabanaAI/linux.git
+T: git https://git.kernel.org/pub/scm/linux/kernel/git/ogabbay/linux.git
F: Documentation/ABI/testing/debugfs-driver-habanalabs
F: Documentation/ABI/testing/sysfs-driver-habanalabs
F: drivers/misc/habanalabs/
F: include/uapi/linux/if_hippi.h
F: net/802/hippi.c
+HIRSCHMANN HELLCREEK ETHERNET SWITCH DRIVER
+S: Maintained
+F: Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml
+F: drivers/net/dsa/hirschmann/*
+F: include/linux/platform_data/hirschmann-hellcreek.h
+F: net/dsa/tag_hellcreek.c
+
HISILICON DMA DRIVER
S: Maintained
W: http://www.hisilicon.com
-F: Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt
+F: Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml
F: drivers/bus/hisi_lpc.c
HISILICON NETWORK SUBSYSTEM 3 DRIVER (HNS3)
HISILICON TRUE RANDOM NUMBER GENERATOR V2 SUPPORT
S: Maintained
-F: drivers/char/hw_random/hisi-trng-v2.c
+F: drivers/crypto/hisilicon/trng/trng.c
HISILICON V3XX SPI NOR FLASH Controller Driver
S: Maintained
-F: Documentation/devicetree/bindings/hwmon/ina2xx.txt
+F: Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
F: Documentation/hwmon/ina209.rst
F: drivers/hwmon/ina209.c
F: samples/bpf/ibumad_kern.c
F: samples/bpf/ibumad_user.c
-INGENIC JZ4780 DMA Driver
-S: Maintained
-F: drivers/dma/dma-jz4780.c
-
INGENIC JZ4780 NAND DRIVER
S: Maintained
F: drivers/mtd/nand/raw/ingenic/
INGENIC JZ47xx SoCs
S: Maintained
F: arch/mips/boot/dts/ingenic/
F: arch/mips/generic/board-ingenic.c
W: http://www.intel.com/support/feedback.htm
W: http://e1000.sourceforge.net/
Q: http://patchwork.ozlabs.org/project/intel-wired-lan/list/
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-queue.git
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue.git
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue.git
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue.git
F: Documentation/networking/device_drivers/ethernet/intel/
F: drivers/net/ethernet/intel/
F: drivers/net/ethernet/intel/*/
S: Maintained
F: drivers/char/hw_random/ixp4xx-rng.c
+INTEL KEEM BAY DRM DRIVER
+S: Maintained
+F: Documentation/devicetree/bindings/display/intel,kmb_display.yaml
+F: drivers/gpu/drm/kmb/
+
+INTEL KEEM BAY OCS AES/SM4 CRYPTO DRIVER
+S: Maintained
+F: Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml
+F: drivers/crypto/keembay/Kconfig
+F: drivers/crypto/keembay/Makefile
+F: drivers/crypto/keembay/keembay-ocs-aes-core.c
+F: drivers/crypto/keembay/ocs-aes.c
+F: drivers/crypto/keembay/ocs-aes.h
+
INTEL MANAGEMENT ENGINE (mei)
W: https://01.org/linux-acpi
F: drivers/platform/x86/intel_menlow.c
-INTEL MIC DRIVERS (mic)
-S: Supported
-W: https://github.com/sudeepdutt/mic
-W: http://software.intel.com/en-us/mic-developer
-F: Documentation/misc-devices/mic/
-F: drivers/dma/mic_x100_dma.c
-F: drivers/dma/mic_x100_dma.h
-F: drivers/misc/mic/
-F: include/linux/mic_bus.h
-F: include/linux/scif.h
-F: include/uapi/linux/mic_common.h
-F: include/uapi/linux/mic_ioctl.h
-F: include/uapi/linux/scif_ioctl.h
-
INTEL P-Unit IPC DRIVER
F: include/linux/mfd/intel_msic.h
F: include/linux/mfd/intel_soc_pmic*
+INTEL PMT DRIVER
+S: Maintained
+F: drivers/mfd/intel_pmt.c
+F: drivers/platform/x86/intel_pmt_*
+
INTEL PRO/WIRELESS 2100, 2200BG, 2915ABG NETWORK CONNECTION SUPPORT
F: drivers/net/wireless/intel/iwlegacy/
INTEL WIRELESS WIFI LINK (iwlwifi)
S: Supported
W: https://wireless.wiki.kernel.org/en/users/drivers/iwlwifi
T: git git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi.git
F: drivers/net/wireless/intel/iwlwifi/
-INTEL WIRELESS WIMAX CONNECTION 2400
-S: Supported
-W: http://linuxwimax.org
-F: Documentation/admin-guide/wimax/i2400m.rst
-F: drivers/net/wimax/i2400m/
-F: include/uapi/linux/wimax/i2400m.h
-
INTEL WMI SLIM BOOTLOADER (SBL) FIRMWARE UPDATE DRIVER
F: arch/x86/kernel/tboot.c
F: include/linux/tboot.h
+INTEL SGX
+S: Supported
+Q: https://patchwork.kernel.org/project/intel-sgx/list/
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-sgx.git
+F: Documentation/x86/sgx.rst
+F: arch/x86/entry/vdso/vsgx.S
+F: arch/x86/include/uapi/asm/sgx.h
+F: arch/x86/kernel/cpu/sgx/*
+F: tools/testing/selftests/sgx/*
+K: \bSGX_
+
INTERCONNECT API
S: Maintained
-W https://invensense.tdk.com/
+W: https://invensense.tdk.com/
F: Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml
F: drivers/iio/imu/inv_icm42600/
IOMMU DRIVERS
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
IRQCHIP DRIVERS
S: Maintained
F: include/kvm/arm_*
KERNEL VIRTUAL MACHINE FOR MIPS (KVM/mips)
F: arch/s390/include/asm/gmap.h
F: arch/s390/include/asm/kvm*
F: arch/s390/include/uapi/asm/kvm*
+F: arch/s390/kernel/uv.c
F: arch/s390/kvm/
F: arch/s390/mm/gmap.c
F: tools/testing/selftests/kvm/*/s390x/
F: arch/mips/lantiq
F: drivers/soc/lantiq
-LAPB module
-S: Orphan
-F: Documentation/networking/lapb-module.rst
-F: include/*/lapb.h
-F: net/lapb/
-
LASI 53c700 driver for PARISC
S: Maintained
W: http://www.mac.linux-m68k.org/
F: arch/m68k/mac/
+F: drivers/macintosh/adb-iop.c
+F: drivers/macintosh/via-macii.c
M68K ON HP9000/300
S: Maintained
F: drivers/crypto/marvell/
+F: include/linux/soc/marvell/octeontx2/
MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2)
S: Maintained
F: drivers/net/ethernet/marvell/mvneta.*
+MARVELL MVPP2 ETHERNET DRIVER
+S: Maintained
+F: Documentation/devicetree/bindings/net/marvell-pp2.txt
+F: drivers/net/ethernet/marvell/mvpp2/
+
MARVELL MWIFIEX WIRELESS DRIVER
S: Supported
F: drivers/net/ethernet/marvell/octeontx2/nic/
+F: include/linux/soc/marvell/octeontx2/
MARVELL OCTEONTX2 RVU ADMIN FUNCTION DRIVER
F: Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst
F: drivers/net/ethernet/marvell/octeontx2/af/
+MARVELL PRESTERA ETHERNET SWITCH DRIVER
+S: Supported
+W: https://github.com/Marvell-switching/switchdev-prestera
+F: drivers/net/ethernet/marvell/prestera/
+
MARVELL SOC MMC/SD/SDIO CONTROLLER DRIVER
S: Odd Fixes
S: Maintained
T: git git://linuxtv.org/media_tree.git
F: Documentation/admin-guide/media/imx7.rst
-F: Documentation/devicetree/bindings/media/imx7-csi.txt
-F: Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt
+F: Documentation/devicetree/bindings/media/nxp,imx7-csi.yaml
+F: Documentation/devicetree/bindings/media/nxp,imx7-mipi-csi2.yaml
F: drivers/staging/media/imx/imx7-media-csi.c
F: drivers/staging/media/imx/imx7-mipi-csis.c
F: Documentation/devicetree/bindings/i2c/i2c-mt7621.txt
F: drivers/i2c/busses/i2c-mt7621.c
+MEDIATEK MT7621 PHY PCI DRIVER
+S: Maintained
+F: Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml
+F: drivers/phy/ralink/phy-mt7621-pci.c
+
MEDIATEK NAND CONTROLLER DRIVER
S: Orphan
F: drivers/input/touchscreen/melfas_mip4.c
MELLANOX BLUEFIELD I2C DRIVER
-M: Khalil Blaiech <kblaiech@mellanox.com>
+M: Khalil Blaiech <kblaiech@nvidia.com>
S: Supported
+F: Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml
F: drivers/i2c/busses/i2c-mlxbf.c
MELLANOX ETHERNET DRIVER (mlx4_en)
S: Supported
W: http://www.mellanox.com
-Q: http://patchwork.ozlabs.org/project/netdev/list/
+Q: https://patchwork.kernel.org/project/netdevbpf/list/
F: drivers/net/ethernet/mellanox/mlx4/en_*
MELLANOX ETHERNET DRIVER (mlx5e)
S: Supported
W: http://www.mellanox.com
-Q: http://patchwork.ozlabs.org/project/netdev/list/
+Q: https://patchwork.kernel.org/project/netdevbpf/list/
F: drivers/net/ethernet/mellanox/mlx5/core/en_*
MELLANOX ETHERNET INNOVA DRIVERS
S: Supported
W: http://www.mellanox.com
-Q: http://patchwork.ozlabs.org/project/netdev/list/
+Q: https://patchwork.kernel.org/project/netdevbpf/list/
F: drivers/net/ethernet/mellanox/mlx5/core/accel/*
F: drivers/net/ethernet/mellanox/mlx5/core/en_accel/*
F: drivers/net/ethernet/mellanox/mlx5/core/fpga/*
S: Supported
W: http://www.mellanox.com
-Q: http://patchwork.ozlabs.org/project/netdev/list/
+Q: https://patchwork.kernel.org/project/netdevbpf/list/
F: drivers/net/ethernet/mellanox/mlxsw/
F: tools/testing/selftests/drivers/net/mlxsw/
S: Supported
W: http://www.mellanox.com
-Q: http://patchwork.ozlabs.org/project/netdev/list/
+Q: https://patchwork.kernel.org/project/netdevbpf/list/
F: drivers/net/ethernet/mellanox/mlxfw/
MELLANOX HARDWARE PLATFORM SUPPORT
S: Supported
W: http://www.mellanox.com
-Q: http://patchwork.ozlabs.org/project/netdev/list/
+Q: https://patchwork.kernel.org/project/netdevbpf/list/
F: drivers/net/ethernet/mellanox/mlx4/
F: include/linux/mlx4/
S: Supported
W: http://www.mellanox.com
-Q: http://patchwork.ozlabs.org/project/netdev/list/
+Q: https://patchwork.kernel.org/project/netdevbpf/list/
F: Documentation/networking/device_drivers/ethernet/mellanox/
F: drivers/net/ethernet/mellanox/mlx5/core/
F: include/linux/mlx5/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux.git
S: Maintained
-F: drivers/devfreq/tegra20-devfreq.c
F: drivers/devfreq/tegra30-devfreq.c
MEMORY MANAGEMENT
F: drivers/media/cec/platform/meson/ao-cec-g12a.c
F: drivers/media/cec/platform/meson/ao-cec.c
+MESON GE2D DRIVER FOR AMLOGIC SOCS
+S: Supported
+T: git git://linuxtv.org/media_tree.git
+F: Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml
+F: drivers/media/meson/ge2d/
+
MESON NAND CONTROLLER DRIVER FOR AMLOGIC SOCS
S: Maintained
-F: Documentation/devicetree/bindings/net/dsa/ksz.txt
+F: Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
F: drivers/net/dsa/microchip/*
F: include/linux/platform_data/microchip-ksz.h
F: net/dsa/tag_ksz.c
F: include/linux/cciss*.h
F: include/uapi/linux/cciss*.h
+MICROSOFT SURFACE GPE LID SUPPORT DRIVER
+S: Maintained
+F: drivers/platform/surface/surface_gpe.c
+
+MICROSOFT SURFACE HARDWARE PLATFORM SUPPORT
+S: Maintained
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git
+F: drivers/platform/surface/
+
MICROSOFT SURFACE PRO 3 BUTTON DRIVER
S: Supported
-F: drivers/platform/x86/surfacepro3_button.c
+F: drivers/platform/surface/surfacepro3_button.c
MICROTEK X6 SCANNER
S: Maintained
F: drivers/usb/image/microtek.*
+MIPI CCS, SMIA AND SMIA++ IMAGE SENSOR DRIVER
+S: Maintained
+F: Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml
+F: Documentation/driver-api/media/drivers/ccs/
+F: drivers/media/i2c/ccs-pll.c
+F: drivers/media/i2c/ccs-pll.h
+F: drivers/media/i2c/ccs/
+F: include/uapi/linux/smiapp.h
+
MIPS
F: drivers/*/*loongson2*
MIPS/LOONGSON64 ARCHITECTURE
S: Maintained
S: Maintained
T: git git://linuxtv.org/media_tree.git
-F: Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.txt
+F: Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml
F: drivers/media/i2c/mt9v111.c
MULTIFUNCTION DEVICES (MFD)
S: Maintained
W: http://www.linuxfoundation.org/en/Net
-Q: http://patchwork.ozlabs.org/project/netdev/list/
+Q: https://patchwork.kernel.org/project/netdevbpf/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git
F: Documentation/devicetree/bindings/net/
S: Maintained
W: http://www.linuxfoundation.org/en/Net
-Q: http://patchwork.ozlabs.org/project/netdev/list/
+Q: https://patchwork.kernel.org/project/netdevbpf/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git
S: Maintained
W: https://github.com/multipath-tcp/mptcp_net-next/wiki
B: https://github.com/multipath-tcp/mptcp_net-next/issues
+F: Documentation/networking/mptcp-sysctl.rst
F: include/net/mptcp.h
F: include/uapi/linux/mptcp.h
F: net/mptcp/
S: Maintained
-F: Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.txt
+F: Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml
F: drivers/iio/gyro/fxas21002c.h
F: drivers/iio/gyro/fxas21002c_core.c
F: drivers/iio/gyro/fxas21002c_i2c.c
F: Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
F: drivers/gpu/drm/imx/dcss/
+NXP PF8100/PF8121A/PF8200 PMIC REGULATOR DEVICE DRIVER
+S: Maintained
+F: Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml
+F: drivers/regulator/pf8x00-regulator.c
+
NXP PTN5150A CC LOGIC AND EXTCON DRIVER
S: Maintained
F: drivers/char/pcmcia/cm4040_cs.*
+OMNIVISION OV02A10 SENSOR DRIVER
+S: Maintained
+T: git git://linuxtv.org/media_tree.git
+F: Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml
+F: drivers/media/i2c/ov02a10.c
+
OMNIVISION OV13858 SENSOR DRIVER
S: Maintained
T: git git://linuxtv.org/media_tree.git
-F: Documentation/devicetree/bindings/media/i2c/ov2680.txt
+F: Documentation/devicetree/bindings/media/i2c/ov2680.yaml
F: drivers/media/i2c/ov2680.c
OMNIVISION OV2685 SENSOR DRIVER
F: drivers/media/i2c/ov5695.c
OMNIVISION OV7670 SENSOR DRIVER
-S: Maintained
+S: Orphan
T: git git://linuxtv.org/media_tree.git
F: Documentation/devicetree/bindings/media/i2c/ov7670.txt
F: drivers/media/i2c/ov7670.c
S: Odd fixes
T: git git://linuxtv.org/media_tree.git
-F: Documentation/devicetree/bindings/media/i2c/ov772x.txt
+F: Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml
F: drivers/media/i2c/ov772x.c
F: include/media/i2c/ov772x.h
F: Documentation/devicetree/bindings/media/i2c/ov9650.txt
F: drivers/media/i2c/ov9650.c
+OMNIVISION OV9734 SENSOR DRIVER
+S: Maintained
+T: git git://linuxtv.org/media_tree.git
+F: drivers/media/i2c/ov9734.c
+
ONENAND FLASH DRIVER
S: Supported
+F: Documentation/networking/page_pool.rst
F: include/net/page_pool.h
+F: include/trace/events/page_pool.h
F: net/core/page_pool.c
PANASONIC LAPTOP ACPI EXTRAS DRIVER
S: Maintained
F: drivers/platform/x86/panasonic-laptop.c
PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support)
S: Maintained
S: Supported
+F: Documentation/PCI/endpoint/*
+F: Documentation/misc-devices/pci-endpoint-test.rst
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kishon/pci-endpoint.git
F: drivers/misc/pci_endpoint_test.c
F: drivers/pci/endpoint/
S: Maintained
F: drivers/dma/plx_dma.c
+PM6764TR DRIVER
+S: Maintained
+F: Documentation/hwmon/pm6764tr.rst
+F: drivers/hwmon/pmbus/pm6764tr.c
+
PM-GRAPH UTILITY
F: include/trace/events/pwc.h
PWM FAN DRIVER
S: Supported
F: drivers/net/wireless/ath/ath9k/
QUALCOMM CAMERA SUBSYSTEM DRIVER
S: Maintained
F: drivers/mailbox/qcom-ipcc.c
F: include/dt-bindings/mailbox/qcom-ipcc.h
+QUALCOMM IPQ4019 USB PHY DRIVER
+S: Maintained
+F: Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml
+F: drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
+
+QUALCOMM IPQ4019 VQMMC REGULATOR DRIVER
+S: Maintained
+F: Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml
+F: drivers/regulator/vqmmc-ipq4019-regulator.c
+
QUALCOMM RMNET DRIVER
F: drivers/net/wireless/realtek/rtlwifi/
REALTEK WIRELESS DRIVER (rtw88)
-M: Yan-Hsuan Chuang <yhchuang@realtek.com>
+M: Yan-Hsuan Chuang <tony0620emma@gmail.com>
S: Maintained
F: drivers/net/wireless/realtek/rtw88/
-F: Documentation/devicetree/bindings/net/renesas,*.txt
F: Documentation/devicetree/bindings/net/renesas,*.yaml
F: drivers/net/ethernet/renesas/
F: include/linux/sh_eth.h
S: Maintained
T: git git://git.pengutronix.de/git/pza/linux
F: Documentation/devicetree/bindings/reset/
+F: Documentation/driver-api/reset.rst
F: drivers/reset/
F: include/dt-bindings/reset/
F: include/linux/reset-controller.h
S: Maintained
F: Documentation/admin-guide/media/rkisp1.rst
+F: Documentation/devicetree/bindings/media/rockchip-isp1.yaml
F: Documentation/userspace-api/media/v4l/pixfmt-meta-rkisp1.rst
-F: drivers/staging/media/rkisp1/
+F: drivers/media/platform/rockchip/rkisp1
+F: include/uapi/linux/rkisp1-config.h
ROCKCHIP RASTER 2D GRAPHIC ACCELERATION UNIT DRIVER
S390 IUCV NETWORK LAYER
S: Supported
W: http://www.ibm.com/developerworks/linux/linux390/
S390 NETWORK DRIVERS
S: Supported
W: http://www.ibm.com/developerworks/linux/linux390/
SAMSUNG AUDIO (ASoC) DRIVERS
S: Supported
S: Maintained
F: drivers/video/fbdev/s3c-fb.c
+SAMSUNG INTERCONNECT DRIVERS
+S: Supported
+F: drivers/interconnect/samsung/
+
SAMSUNG LAPTOP DRIVER
F: drivers/platform/x86/samsung-laptop.c
SAMSUNG MULTIFUNCTION PMIC DEVICE DRIVERS
F: drivers/nfc/s3fwrn5
SAMSUNG S5C73M3 CAMERA DRIVER
S: Supported
F: drivers/media/i2c/s5c73m3/*
SAMSUNG S5K5BAF CAMERA DRIVER
S: Supported
F: drivers/crypto/s5p-sss.c
SAMSUNG S5P/EXYNOS4 SOC SERIES CAMERA SUBSYSTEM DRIVERS
S: Supported
F: include/linux/platform_data/clk-s3c2410.h
SAMSUNG SPI DRIVERS
F: drivers/thermal/samsung/
SAMSUNG USB2 PHY DRIVER
S: Supported
F: drivers/scsi/st.*
F: drivers/scsi/st_*.h
+SCSI TARGET CORE USER DRIVER
+S: Supported
+F: Documentation/target/tcmu-design.rst
+F: drivers/target/target_core_user.c
+F: include/uapi/linux/target_core_user.h
+
SCSI TARGET SUBSYSTEM
F: include/linux/slimbus.h
SFC NETWORK DRIVER
S: Supported
F: drivers/net/ethernet/sfc/
K: phylink\.h|struct\s+phylink|\.phylink|>phylink_|phylink_(autoneg|clear|connect|create|destroy|disconnect|ethtool|helper|mac|mii|of|set|start|stop|test|validate)
SGI GRU DRIVER
-M: Dimitri Sivanich <sivanich@sgi.com>
+M: Dimitri Sivanich <dimitri.sivanich@hpe.com>
S: Maintained
F: drivers/misc/sgi-gru/
SGI XP/XPC/XPNET DRIVER
S: Maintained
F: drivers/misc/sgi-xp/
SHARED MEMORY COMMUNICATIONS (SMC) SOCKETS
S: Supported
F: drivers/firmware/smccc/
F: include/linux/arm-smccc.h
-SMIA AND SMIA++ IMAGE SENSOR DRIVER
-S: Maintained
-F: Documentation/devicetree/bindings/media/i2c/nokia,smia.txt
-F: drivers/media/i2c/smiapp-pll.c
-F: drivers/media/i2c/smiapp-pll.h
-F: drivers/media/i2c/smiapp/
-F: include/uapi/linux/smiapp.h
-
SMM665 HARDWARE MONITOR DRIVER
F: include/uapi/rdma/siw-abi.h
SOFT-ROCE DRIVER (rxe)
-M: Zhu Yanjun <yanjunz@nvidia.com>
+M: Zhu Yanjun <zyjzyj2000@gmail.com>
S: Supported
F: drivers/infiniband/sw/rxe/
S: Maintained
T: git git://linuxtv.org/media_tree.git
-F: Documentation/devicetree/bindings/media/i2c/sony,imx214.txt
+F: Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml
F: drivers/media/i2c/imx214.c
SONY IMX219 SENSOR DRIVER
F: drivers/net/ethernet/toshiba/spider_net*
SPMI SUBSYSTEM
+S: Maintained
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/sboyd/spmi.git
F: Documentation/devicetree/bindings/spmi/
F: drivers/spmi/
F: include/dt-bindings/spmi/spmi.h
T: git git://repo.or.cz/linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git
F: drivers/platform/x86/thinkpad_acpi.c
+THUNDERBOLT DMA TRAFFIC TEST DRIVER
+S: Maintained
+F: drivers/thunderbolt/dma_test.c
+
THUNDERBOLT DRIVER
S: Maintained
-F: Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt
+F: Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml
F: drivers/phy/hisilicon/phy-hi3660-usb3.c
USB ISP116X DRIVER
S: Supported
F: drivers/usb/class/usblp.c
+USB RAW GADGET DRIVER
+S: Maintained
+F: Documentation/usb/raw-gadget.rst
+F: drivers/usb/gadget/legacy/raw_gadget.c
+F: include/uapi/linux/usb/raw_gadget.h
+
USB QMI WWAN NETWORK DRIVER
F: lib/test_uuid.c
F: lib/uuid.c
+UV SYSFS DRIVER
+S: Maintained
+F: drivers/platform/x86/uv_sysfs.c
+
UVESAFB DRIVER
W: https://wireless.wiki.kernel.org/en/users/Drivers/wil6210
F: drivers/net/wireless/ath/wil6210/
-WIMAX STACK
-S: Supported
-W: http://linuxwimax.org
-F: Documentation/admin-guide/wimax/wimax.rst
-F: include/linux/wimax/debug.h
-F: include/net/wimax.h
-F: include/uapi/linux/wimax.h
-F: net/wimax/
-
WINBOND CIR DRIVER
S: Maintained
S: Maintained
N: axp[128]
-X.25 NETWORK LAYER
+X.25 STACK
-S: Odd Fixes
+S: Maintained
+F: Documentation/networking/lapb-module.rst
F: Documentation/networking/x25*
+F: drivers/net/wan/hdlc_x25.c
+F: drivers/net/wan/lapbether.c
+F: include/*/lapb.h
F: include/net/x25*
+F: include/uapi/linux/x25.h
+F: net/lapb/
F: net/x25/
X86 ARCHITECTURE (32-BIT AND 64-BIT)
X86 PLATFORM UV HPE SUPERDOME FLEX
S: Supported
S: Supported
F: include/net/xdp.h
+F: include/net/xdp_priv.h
F: include/trace/events/xdp.h
F: kernel/bpf/cpumap.c
F: kernel/bpf/devmap.c
F: net/core/xdp.c
-N: xdp
-K: xdp
+F: samples/bpf/xdp*
+F: tools/testing/selftests/bpf/*xdp*
+F: tools/testing/selftests/bpf/*/*xdp*
+F: drivers/net/ethernet/*/*/*/*/*xdp*
+F: drivers/net/ethernet/*/*/*xdp*
+K: (?:\b|_)xdp(?:\b|_)
XDP SOCKETS (AF_XDP)
S: Maintained
+F: Documentation/networking/af_xdp.rst
F: include/net/xdp_sock*
F: include/net/xsk_buff_pool.h
F: include/uapi/linux/if_xdp.h
+F: include/uapi/linux/xdp_diag.h
+F: include/net/netns/xdp.h
F: net/xdp/
F: samples/bpf/xdpsock*
F: tools/lib/bpf/xsk*
F: Documentation/filesystems/zonefs.rst
F: fs/zonefs/
+ZPOOL COMPRESSED PAGE STORAGE API
+S: Maintained
+F: include/linux/zpool.h
+F: mm/zpool.c
+
ZR36067 VIDEO FOR LINUX DRIVER
F: Documentation/driver-api/media/drivers/zoran.rst
F: drivers/staging/media/zoran/
-ZPOOL COMPRESSED PAGE STORAGE API
-S: Maintained
-F: include/linux/zpool.h
-F: mm/zpool.c
-
ZRAM COMPRESSED RAM BLOCK DEVICE DRVIER
static int jz4740_pwm_pwm6_pins[] = { 0x7e, };
static int jz4740_pwm_pwm7_pins[] = { 0x7f, };
- static int jz4740_mmc_1bit_funcs[] = { 0, 0, 0, };
- static int jz4740_mmc_4bit_funcs[] = { 0, 0, 0, };
- static int jz4740_uart0_data_funcs[] = { 1, 1, };
- static int jz4740_uart0_hwflow_funcs[] = { 1, 1, };
- static int jz4740_uart1_data_funcs[] = { 2, 2, };
- static int jz4740_lcd_8bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4740_lcd_16bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4740_lcd_18bit_funcs[] = { 0, 0, };
- static int jz4740_lcd_18bit_tft_funcs[] = { 0, 0, 0, 0, };
- static int jz4740_nand_cs1_funcs[] = { 0, };
- static int jz4740_nand_cs2_funcs[] = { 0, };
- static int jz4740_nand_cs3_funcs[] = { 0, };
- static int jz4740_nand_cs4_funcs[] = { 0, };
- static int jz4740_nand_fre_fwe_funcs[] = { 0, 0, };
- static int jz4740_pwm_pwm0_funcs[] = { 0, };
- static int jz4740_pwm_pwm1_funcs[] = { 0, };
- static int jz4740_pwm_pwm2_funcs[] = { 0, };
- static int jz4740_pwm_pwm3_funcs[] = { 0, };
- static int jz4740_pwm_pwm4_funcs[] = { 0, };
- static int jz4740_pwm_pwm5_funcs[] = { 0, };
- static int jz4740_pwm_pwm6_funcs[] = { 0, };
- static int jz4740_pwm_pwm7_funcs[] = { 0, };
-
- #define INGENIC_PIN_GROUP(name, id) \
+
+ #define INGENIC_PIN_GROUP_FUNCS(name, id, funcs) \
{ \
name, \
id##_pins, \
ARRAY_SIZE(id##_pins), \
- id##_funcs, \
+ funcs, \
}
+ #define INGENIC_PIN_GROUP(name, id, func) \
+ INGENIC_PIN_GROUP_FUNCS(name, id, (void *)(func))
+
static const struct group_desc jz4740_groups[] = {
- INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit),
- INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit),
- INGENIC_PIN_GROUP("uart0-data", jz4740_uart0_data),
- INGENIC_PIN_GROUP("uart0-hwflow", jz4740_uart0_hwflow),
- INGENIC_PIN_GROUP("uart1-data", jz4740_uart1_data),
- INGENIC_PIN_GROUP("lcd-8bit", jz4740_lcd_8bit),
- INGENIC_PIN_GROUP("lcd-16bit", jz4740_lcd_16bit),
- INGENIC_PIN_GROUP("lcd-18bit", jz4740_lcd_18bit),
- INGENIC_PIN_GROUP("lcd-18bit-tft", jz4740_lcd_18bit_tft),
+ INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit, 0),
+ INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit, 0),
+ INGENIC_PIN_GROUP("uart0-data", jz4740_uart0_data, 1),
+ INGENIC_PIN_GROUP("uart0-hwflow", jz4740_uart0_hwflow, 1),
+ INGENIC_PIN_GROUP("uart1-data", jz4740_uart1_data, 2),
+ INGENIC_PIN_GROUP("lcd-8bit", jz4740_lcd_8bit, 0),
+ INGENIC_PIN_GROUP("lcd-16bit", jz4740_lcd_16bit, 0),
+ INGENIC_PIN_GROUP("lcd-18bit", jz4740_lcd_18bit, 0),
+ INGENIC_PIN_GROUP("lcd-18bit-tft", jz4740_lcd_18bit_tft, 0),
{ "lcd-no-pins", },
- INGENIC_PIN_GROUP("nand-cs1", jz4740_nand_cs1),
- INGENIC_PIN_GROUP("nand-cs2", jz4740_nand_cs2),
- INGENIC_PIN_GROUP("nand-cs3", jz4740_nand_cs3),
- INGENIC_PIN_GROUP("nand-cs4", jz4740_nand_cs4),
- INGENIC_PIN_GROUP("nand-fre-fwe", jz4740_nand_fre_fwe),
- INGENIC_PIN_GROUP("pwm0", jz4740_pwm_pwm0),
- INGENIC_PIN_GROUP("pwm1", jz4740_pwm_pwm1),
- INGENIC_PIN_GROUP("pwm2", jz4740_pwm_pwm2),
- INGENIC_PIN_GROUP("pwm3", jz4740_pwm_pwm3),
- INGENIC_PIN_GROUP("pwm4", jz4740_pwm_pwm4),
- INGENIC_PIN_GROUP("pwm5", jz4740_pwm_pwm5),
- INGENIC_PIN_GROUP("pwm6", jz4740_pwm_pwm6),
- INGENIC_PIN_GROUP("pwm7", jz4740_pwm_pwm7),
+ INGENIC_PIN_GROUP("nand-cs1", jz4740_nand_cs1, 0),
+ INGENIC_PIN_GROUP("nand-cs2", jz4740_nand_cs2, 0),
+ INGENIC_PIN_GROUP("nand-cs3", jz4740_nand_cs3, 0),
+ INGENIC_PIN_GROUP("nand-cs4", jz4740_nand_cs4, 0),
+ INGENIC_PIN_GROUP("nand-fre-fwe", jz4740_nand_fre_fwe, 0),
+ INGENIC_PIN_GROUP("pwm0", jz4740_pwm_pwm0, 0),
+ INGENIC_PIN_GROUP("pwm1", jz4740_pwm_pwm1, 0),
+ INGENIC_PIN_GROUP("pwm2", jz4740_pwm_pwm2, 0),
+ INGENIC_PIN_GROUP("pwm3", jz4740_pwm_pwm3, 0),
+ INGENIC_PIN_GROUP("pwm4", jz4740_pwm_pwm4, 0),
+ INGENIC_PIN_GROUP("pwm5", jz4740_pwm_pwm5, 0),
+ INGENIC_PIN_GROUP("pwm6", jz4740_pwm_pwm6, 0),
+ INGENIC_PIN_GROUP("pwm7", jz4740_pwm_pwm7, 0),
};
static const char *jz4740_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
static int jz4725b_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
static int jz4725b_lcd_generic_pins[] = { 0x75, };
- static int jz4725b_mmc0_1bit_funcs[] = { 1, 1, 1, };
- static int jz4725b_mmc0_4bit_funcs[] = { 1, 0, 1, };
- static int jz4725b_mmc1_1bit_funcs[] = { 0, 0, 0, };
- static int jz4725b_mmc1_4bit_funcs[] = { 0, 0, 0, };
- static int jz4725b_uart_data_funcs[] = { 1, 1, };
- static int jz4725b_nand_cs1_funcs[] = { 0, };
- static int jz4725b_nand_cs2_funcs[] = { 0, };
- static int jz4725b_nand_cs3_funcs[] = { 0, };
- static int jz4725b_nand_cs4_funcs[] = { 0, };
- static int jz4725b_nand_cle_ale_funcs[] = { 0, 0, };
- static int jz4725b_nand_fre_fwe_funcs[] = { 0, 0, };
- static int jz4725b_pwm_pwm0_funcs[] = { 0, };
- static int jz4725b_pwm_pwm1_funcs[] = { 0, };
- static int jz4725b_pwm_pwm2_funcs[] = { 0, };
- static int jz4725b_pwm_pwm3_funcs[] = { 0, };
- static int jz4725b_pwm_pwm4_funcs[] = { 0, };
- static int jz4725b_pwm_pwm5_funcs[] = { 0, };
- static int jz4725b_lcd_8bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4725b_lcd_16bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4725b_lcd_18bit_funcs[] = { 0, 0, };
- static int jz4725b_lcd_24bit_funcs[] = { 1, 1, 1, 1, };
- static int jz4725b_lcd_special_funcs[] = { 0, 0, 0, 0, };
- static int jz4725b_lcd_generic_funcs[] = { 0, };
+ static u8 jz4725b_mmc0_4bit_funcs[] = { 1, 0, 1, };
static const struct group_desc jz4725b_groups[] = {
- INGENIC_PIN_GROUP("mmc0-1bit", jz4725b_mmc0_1bit),
- INGENIC_PIN_GROUP("mmc0-4bit", jz4725b_mmc0_4bit),
- INGENIC_PIN_GROUP("mmc1-1bit", jz4725b_mmc1_1bit),
- INGENIC_PIN_GROUP("mmc1-4bit", jz4725b_mmc1_4bit),
- INGENIC_PIN_GROUP("uart-data", jz4725b_uart_data),
- INGENIC_PIN_GROUP("nand-cs1", jz4725b_nand_cs1),
- INGENIC_PIN_GROUP("nand-cs2", jz4725b_nand_cs2),
- INGENIC_PIN_GROUP("nand-cs3", jz4725b_nand_cs3),
- INGENIC_PIN_GROUP("nand-cs4", jz4725b_nand_cs4),
- INGENIC_PIN_GROUP("nand-cle-ale", jz4725b_nand_cle_ale),
- INGENIC_PIN_GROUP("nand-fre-fwe", jz4725b_nand_fre_fwe),
- INGENIC_PIN_GROUP("pwm0", jz4725b_pwm_pwm0),
- INGENIC_PIN_GROUP("pwm1", jz4725b_pwm_pwm1),
- INGENIC_PIN_GROUP("pwm2", jz4725b_pwm_pwm2),
- INGENIC_PIN_GROUP("pwm3", jz4725b_pwm_pwm3),
- INGENIC_PIN_GROUP("pwm4", jz4725b_pwm_pwm4),
- INGENIC_PIN_GROUP("pwm5", jz4725b_pwm_pwm5),
- INGENIC_PIN_GROUP("lcd-8bit", jz4725b_lcd_8bit),
- INGENIC_PIN_GROUP("lcd-16bit", jz4725b_lcd_16bit),
- INGENIC_PIN_GROUP("lcd-18bit", jz4725b_lcd_18bit),
- INGENIC_PIN_GROUP("lcd-24bit", jz4725b_lcd_24bit),
- INGENIC_PIN_GROUP("lcd-special", jz4725b_lcd_special),
- INGENIC_PIN_GROUP("lcd-generic", jz4725b_lcd_generic),
+ INGENIC_PIN_GROUP("mmc0-1bit", jz4725b_mmc0_1bit, 1),
+ INGENIC_PIN_GROUP_FUNCS("mmc0-4bit", jz4725b_mmc0_4bit,
+ jz4725b_mmc0_4bit_funcs),
+ INGENIC_PIN_GROUP("mmc1-1bit", jz4725b_mmc1_1bit, 0),
+ INGENIC_PIN_GROUP("mmc1-4bit", jz4725b_mmc1_4bit, 0),
+ INGENIC_PIN_GROUP("uart-data", jz4725b_uart_data, 1),
+ INGENIC_PIN_GROUP("nand-cs1", jz4725b_nand_cs1, 0),
+ INGENIC_PIN_GROUP("nand-cs2", jz4725b_nand_cs2, 0),
+ INGENIC_PIN_GROUP("nand-cs3", jz4725b_nand_cs3, 0),
+ INGENIC_PIN_GROUP("nand-cs4", jz4725b_nand_cs4, 0),
+ INGENIC_PIN_GROUP("nand-cle-ale", jz4725b_nand_cle_ale, 0),
+ INGENIC_PIN_GROUP("nand-fre-fwe", jz4725b_nand_fre_fwe, 0),
+ INGENIC_PIN_GROUP("pwm0", jz4725b_pwm_pwm0, 0),
+ INGENIC_PIN_GROUP("pwm1", jz4725b_pwm_pwm1, 0),
+ INGENIC_PIN_GROUP("pwm2", jz4725b_pwm_pwm2, 0),
+ INGENIC_PIN_GROUP("pwm3", jz4725b_pwm_pwm3, 0),
+ INGENIC_PIN_GROUP("pwm4", jz4725b_pwm_pwm4, 0),
+ INGENIC_PIN_GROUP("pwm5", jz4725b_pwm_pwm5, 0),
+ INGENIC_PIN_GROUP("lcd-8bit", jz4725b_lcd_8bit, 0),
+ INGENIC_PIN_GROUP("lcd-16bit", jz4725b_lcd_16bit, 0),
+ INGENIC_PIN_GROUP("lcd-18bit", jz4725b_lcd_18bit, 0),
+ INGENIC_PIN_GROUP("lcd-24bit", jz4725b_lcd_24bit, 1),
+ INGENIC_PIN_GROUP("lcd-special", jz4725b_lcd_special, 0),
+ INGENIC_PIN_GROUP("lcd-generic", jz4725b_lcd_generic, 0),
};
static const char *jz4725b_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
static int jz4760_pwm_pwm6_pins[] = { 0x6a, };
static int jz4760_pwm_pwm7_pins[] = { 0x6b, };
- static int jz4760_uart0_data_funcs[] = { 0, 0, };
- static int jz4760_uart0_hwflow_funcs[] = { 0, 0, };
- static int jz4760_uart1_data_funcs[] = { 0, 0, };
- static int jz4760_uart1_hwflow_funcs[] = { 0, 0, };
- static int jz4760_uart2_data_funcs[] = { 0, 0, };
- static int jz4760_uart2_hwflow_funcs[] = { 0, 0, };
- static int jz4760_uart3_data_funcs[] = { 0, 1, };
- static int jz4760_uart3_hwflow_funcs[] = { 0, 0, };
- static int jz4760_mmc0_1bit_a_funcs[] = { 1, 1, 0, };
- static int jz4760_mmc0_4bit_a_funcs[] = { 1, 1, 1, };
- static int jz4760_mmc0_1bit_e_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc0_4bit_e_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc0_8bit_e_funcs[] = { 0, 0, 0, 0, };
- static int jz4760_mmc1_1bit_d_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc1_4bit_d_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc1_1bit_e_funcs[] = { 1, 1, 1, };
- static int jz4760_mmc1_4bit_e_funcs[] = { 1, 1, 1, };
- static int jz4760_mmc1_8bit_e_funcs[] = { 1, 1, 1, 1, };
- static int jz4760_mmc2_1bit_b_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc2_4bit_b_funcs[] = { 0, 0, 0, };
- static int jz4760_mmc2_1bit_e_funcs[] = { 2, 2, 2, };
- static int jz4760_mmc2_4bit_e_funcs[] = { 2, 2, 2, };
- static int jz4760_mmc2_8bit_e_funcs[] = { 2, 2, 2, 2, };
- static int jz4760_nemc_8bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4760_nemc_16bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4760_nemc_cle_ale_funcs[] = { 0, 0, };
- static int jz4760_nemc_addr_funcs[] = { 0, 0, 0, 0, };
- static int jz4760_nemc_rd_we_funcs[] = { 0, 0, };
- static int jz4760_nemc_frd_fwe_funcs[] = { 0, 0, };
- static int jz4760_nemc_wait_funcs[] = { 0, };
- static int jz4760_nemc_cs1_funcs[] = { 0, };
- static int jz4760_nemc_cs2_funcs[] = { 0, };
- static int jz4760_nemc_cs3_funcs[] = { 0, };
- static int jz4760_nemc_cs4_funcs[] = { 0, };
- static int jz4760_nemc_cs5_funcs[] = { 0, };
- static int jz4760_nemc_cs6_funcs[] = { 0, };
- static int jz4760_i2c0_funcs[] = { 0, 0, };
- static int jz4760_i2c1_funcs[] = { 0, 0, };
- static int jz4760_cim_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4760_lcd_24bit_funcs[] = {
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0,
- };
- static int jz4760_pwm_pwm0_funcs[] = { 0, };
- static int jz4760_pwm_pwm1_funcs[] = { 0, };
- static int jz4760_pwm_pwm2_funcs[] = { 0, };
- static int jz4760_pwm_pwm3_funcs[] = { 0, };
- static int jz4760_pwm_pwm4_funcs[] = { 0, };
- static int jz4760_pwm_pwm5_funcs[] = { 0, };
- static int jz4760_pwm_pwm6_funcs[] = { 0, };
- static int jz4760_pwm_pwm7_funcs[] = { 0, };
+ static u8 jz4760_uart3_data_funcs[] = { 0, 1, };
+ static u8 jz4760_mmc0_1bit_a_funcs[] = { 1, 1, 0, };
static const struct group_desc jz4760_groups[] = {
- INGENIC_PIN_GROUP("uart0-data", jz4760_uart0_data),
- INGENIC_PIN_GROUP("uart0-hwflow", jz4760_uart0_hwflow),
- INGENIC_PIN_GROUP("uart1-data", jz4760_uart1_data),
- INGENIC_PIN_GROUP("uart1-hwflow", jz4760_uart1_hwflow),
- INGENIC_PIN_GROUP("uart2-data", jz4760_uart2_data),
- INGENIC_PIN_GROUP("uart2-hwflow", jz4760_uart2_hwflow),
- INGENIC_PIN_GROUP("uart3-data", jz4760_uart3_data),
- INGENIC_PIN_GROUP("uart3-hwflow", jz4760_uart3_hwflow),
- INGENIC_PIN_GROUP("mmc0-1bit-a", jz4760_mmc0_1bit_a),
- INGENIC_PIN_GROUP("mmc0-4bit-a", jz4760_mmc0_4bit_a),
- INGENIC_PIN_GROUP("mmc0-1bit-e", jz4760_mmc0_1bit_e),
- INGENIC_PIN_GROUP("mmc0-4bit-e", jz4760_mmc0_4bit_e),
- INGENIC_PIN_GROUP("mmc0-8bit-e", jz4760_mmc0_8bit_e),
- INGENIC_PIN_GROUP("mmc1-1bit-d", jz4760_mmc1_1bit_d),
- INGENIC_PIN_GROUP("mmc1-4bit-d", jz4760_mmc1_4bit_d),
- INGENIC_PIN_GROUP("mmc1-1bit-e", jz4760_mmc1_1bit_e),
- INGENIC_PIN_GROUP("mmc1-4bit-e", jz4760_mmc1_4bit_e),
- INGENIC_PIN_GROUP("mmc1-8bit-e", jz4760_mmc1_8bit_e),
- INGENIC_PIN_GROUP("mmc2-1bit-b", jz4760_mmc2_1bit_b),
- INGENIC_PIN_GROUP("mmc2-4bit-b", jz4760_mmc2_4bit_b),
- INGENIC_PIN_GROUP("mmc2-1bit-e", jz4760_mmc2_1bit_e),
- INGENIC_PIN_GROUP("mmc2-4bit-e", jz4760_mmc2_4bit_e),
- INGENIC_PIN_GROUP("mmc2-8bit-e", jz4760_mmc2_8bit_e),
- INGENIC_PIN_GROUP("nemc-8bit-data", jz4760_nemc_8bit_data),
- INGENIC_PIN_GROUP("nemc-16bit-data", jz4760_nemc_16bit_data),
- INGENIC_PIN_GROUP("nemc-cle-ale", jz4760_nemc_cle_ale),
- INGENIC_PIN_GROUP("nemc-addr", jz4760_nemc_addr),
- INGENIC_PIN_GROUP("nemc-rd-we", jz4760_nemc_rd_we),
- INGENIC_PIN_GROUP("nemc-frd-fwe", jz4760_nemc_frd_fwe),
- INGENIC_PIN_GROUP("nemc-wait", jz4760_nemc_wait),
- INGENIC_PIN_GROUP("nemc-cs1", jz4760_nemc_cs1),
- INGENIC_PIN_GROUP("nemc-cs2", jz4760_nemc_cs2),
- INGENIC_PIN_GROUP("nemc-cs3", jz4760_nemc_cs3),
- INGENIC_PIN_GROUP("nemc-cs4", jz4760_nemc_cs4),
- INGENIC_PIN_GROUP("nemc-cs5", jz4760_nemc_cs5),
- INGENIC_PIN_GROUP("nemc-cs6", jz4760_nemc_cs6),
- INGENIC_PIN_GROUP("i2c0-data", jz4760_i2c0),
- INGENIC_PIN_GROUP("i2c1-data", jz4760_i2c1),
- INGENIC_PIN_GROUP("cim-data", jz4760_cim),
- INGENIC_PIN_GROUP("lcd-24bit", jz4760_lcd_24bit),
+ INGENIC_PIN_GROUP("uart0-data", jz4760_uart0_data, 0),
+ INGENIC_PIN_GROUP("uart0-hwflow", jz4760_uart0_hwflow, 0),
+ INGENIC_PIN_GROUP("uart1-data", jz4760_uart1_data, 0),
+ INGENIC_PIN_GROUP("uart1-hwflow", jz4760_uart1_hwflow, 0),
+ INGENIC_PIN_GROUP("uart2-data", jz4760_uart2_data, 0),
+ INGENIC_PIN_GROUP("uart2-hwflow", jz4760_uart2_hwflow, 0),
+ INGENIC_PIN_GROUP_FUNCS("uart3-data", jz4760_uart3_data,
+ jz4760_uart3_data_funcs),
+ INGENIC_PIN_GROUP("uart3-hwflow", jz4760_uart3_hwflow, 0),
+ INGENIC_PIN_GROUP_FUNCS("mmc0-1bit-a", jz4760_mmc0_1bit_a,
+ jz4760_mmc0_1bit_a_funcs),
+ INGENIC_PIN_GROUP("mmc0-4bit-a", jz4760_mmc0_4bit_a, 1),
+ INGENIC_PIN_GROUP("mmc0-1bit-e", jz4760_mmc0_1bit_e, 0),
+ INGENIC_PIN_GROUP("mmc0-4bit-e", jz4760_mmc0_4bit_e, 0),
+ INGENIC_PIN_GROUP("mmc0-8bit-e", jz4760_mmc0_8bit_e, 0),
+ INGENIC_PIN_GROUP("mmc1-1bit-d", jz4760_mmc1_1bit_d, 0),
+ INGENIC_PIN_GROUP("mmc1-4bit-d", jz4760_mmc1_4bit_d, 0),
+ INGENIC_PIN_GROUP("mmc1-1bit-e", jz4760_mmc1_1bit_e, 1),
+ INGENIC_PIN_GROUP("mmc1-4bit-e", jz4760_mmc1_4bit_e, 1),
+ INGENIC_PIN_GROUP("mmc1-8bit-e", jz4760_mmc1_8bit_e, 1),
+ INGENIC_PIN_GROUP("mmc2-1bit-b", jz4760_mmc2_1bit_b, 0),
+ INGENIC_PIN_GROUP("mmc2-4bit-b", jz4760_mmc2_4bit_b, 0),
+ INGENIC_PIN_GROUP("mmc2-1bit-e", jz4760_mmc2_1bit_e, 2),
+ INGENIC_PIN_GROUP("mmc2-4bit-e", jz4760_mmc2_4bit_e, 2),
+ INGENIC_PIN_GROUP("mmc2-8bit-e", jz4760_mmc2_8bit_e, 2),
+ INGENIC_PIN_GROUP("nemc-8bit-data", jz4760_nemc_8bit_data, 0),
+ INGENIC_PIN_GROUP("nemc-16bit-data", jz4760_nemc_16bit_data, 0),
+ INGENIC_PIN_GROUP("nemc-cle-ale", jz4760_nemc_cle_ale, 0),
+ INGENIC_PIN_GROUP("nemc-addr", jz4760_nemc_addr, 0),
+ INGENIC_PIN_GROUP("nemc-rd-we", jz4760_nemc_rd_we, 0),
+ INGENIC_PIN_GROUP("nemc-frd-fwe", jz4760_nemc_frd_fwe, 0),
+ INGENIC_PIN_GROUP("nemc-wait", jz4760_nemc_wait, 0),
+ INGENIC_PIN_GROUP("nemc-cs1", jz4760_nemc_cs1, 0),
+ INGENIC_PIN_GROUP("nemc-cs2", jz4760_nemc_cs2, 0),
+ INGENIC_PIN_GROUP("nemc-cs3", jz4760_nemc_cs3, 0),
+ INGENIC_PIN_GROUP("nemc-cs4", jz4760_nemc_cs4, 0),
+ INGENIC_PIN_GROUP("nemc-cs5", jz4760_nemc_cs5, 0),
+ INGENIC_PIN_GROUP("nemc-cs6", jz4760_nemc_cs6, 0),
+ INGENIC_PIN_GROUP("i2c0-data", jz4760_i2c0, 0),
+ INGENIC_PIN_GROUP("i2c1-data", jz4760_i2c1, 0),
+ INGENIC_PIN_GROUP("cim-data", jz4760_cim, 0),
+ INGENIC_PIN_GROUP("lcd-24bit", jz4760_lcd_24bit, 0),
{ "lcd-no-pins", },
- INGENIC_PIN_GROUP("pwm0", jz4760_pwm_pwm0),
- INGENIC_PIN_GROUP("pwm1", jz4760_pwm_pwm1),
- INGENIC_PIN_GROUP("pwm2", jz4760_pwm_pwm2),
- INGENIC_PIN_GROUP("pwm3", jz4760_pwm_pwm3),
- INGENIC_PIN_GROUP("pwm4", jz4760_pwm_pwm4),
- INGENIC_PIN_GROUP("pwm5", jz4760_pwm_pwm5),
- INGENIC_PIN_GROUP("pwm6", jz4760_pwm_pwm6),
- INGENIC_PIN_GROUP("pwm7", jz4760_pwm_pwm7),
+ INGENIC_PIN_GROUP("pwm0", jz4760_pwm_pwm0, 0),
+ INGENIC_PIN_GROUP("pwm1", jz4760_pwm_pwm1, 0),
+ INGENIC_PIN_GROUP("pwm2", jz4760_pwm_pwm2, 0),
+ INGENIC_PIN_GROUP("pwm3", jz4760_pwm_pwm3, 0),
+ INGENIC_PIN_GROUP("pwm4", jz4760_pwm_pwm4, 0),
+ INGENIC_PIN_GROUP("pwm5", jz4760_pwm_pwm5, 0),
+ INGENIC_PIN_GROUP("pwm6", jz4760_pwm_pwm6, 0),
+ INGENIC_PIN_GROUP("pwm7", jz4760_pwm_pwm7, 0),
};
static const char *jz4760_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
static int jz4770_uart3_hwflow_pins[] = { 0x88, 0x89, };
static int jz4770_ssi0_dt_a_pins[] = { 0x15, };
static int jz4770_ssi0_dt_b_pins[] = { 0x35, };
-static int jz4770_ssi0_dt_d_pins[] = { 0x55, };
-static int jz4770_ssi0_dt_e_pins[] = { 0x71, };
+static int jz4770_ssi0_dt_d_pins[] = { 0x75, };
+static int jz4770_ssi0_dt_e_pins[] = { 0x91, };
static int jz4770_ssi0_dr_a_pins[] = { 0x14, };
static int jz4770_ssi0_dr_b_pins[] = { 0x34, };
-static int jz4770_ssi0_dr_d_pins[] = { 0x54, };
-static int jz4770_ssi0_dr_e_pins[] = { 0x6e, };
+static int jz4770_ssi0_dr_d_pins[] = { 0x74, };
+static int jz4770_ssi0_dr_e_pins[] = { 0x8e, };
static int jz4770_ssi0_clk_a_pins[] = { 0x12, };
static int jz4770_ssi0_clk_b_pins[] = { 0x3c, };
-static int jz4770_ssi0_clk_d_pins[] = { 0x58, };
-static int jz4770_ssi0_clk_e_pins[] = { 0x6f, };
+static int jz4770_ssi0_clk_d_pins[] = { 0x78, };
+static int jz4770_ssi0_clk_e_pins[] = { 0x8f, };
static int jz4770_ssi0_gpc_b_pins[] = { 0x3e, };
-static int jz4770_ssi0_gpc_d_pins[] = { 0x56, };
-static int jz4770_ssi0_gpc_e_pins[] = { 0x73, };
+static int jz4770_ssi0_gpc_d_pins[] = { 0x76, };
+static int jz4770_ssi0_gpc_e_pins[] = { 0x93, };
static int jz4770_ssi0_ce0_a_pins[] = { 0x13, };
static int jz4770_ssi0_ce0_b_pins[] = { 0x3d, };
-static int jz4770_ssi0_ce0_d_pins[] = { 0x59, };
-static int jz4770_ssi0_ce0_e_pins[] = { 0x70, };
+static int jz4770_ssi0_ce0_d_pins[] = { 0x79, };
+static int jz4770_ssi0_ce0_e_pins[] = { 0x90, };
static int jz4770_ssi0_ce1_b_pins[] = { 0x3f, };
-static int jz4770_ssi0_ce1_d_pins[] = { 0x57, };
-static int jz4770_ssi0_ce1_e_pins[] = { 0x72, };
+static int jz4770_ssi0_ce1_d_pins[] = { 0x77, };
+static int jz4770_ssi0_ce1_e_pins[] = { 0x92, };
static int jz4770_ssi1_dt_b_pins[] = { 0x35, };
-static int jz4770_ssi1_dt_d_pins[] = { 0x55, };
-static int jz4770_ssi1_dt_e_pins[] = { 0x71, };
+static int jz4770_ssi1_dt_d_pins[] = { 0x75, };
+static int jz4770_ssi1_dt_e_pins[] = { 0x91, };
static int jz4770_ssi1_dr_b_pins[] = { 0x34, };
-static int jz4770_ssi1_dr_d_pins[] = { 0x54, };
-static int jz4770_ssi1_dr_e_pins[] = { 0x6e, };
+static int jz4770_ssi1_dr_d_pins[] = { 0x74, };
+static int jz4770_ssi1_dr_e_pins[] = { 0x8e, };
static int jz4770_ssi1_clk_b_pins[] = { 0x3c, };
-static int jz4770_ssi1_clk_d_pins[] = { 0x58, };
-static int jz4770_ssi1_clk_e_pins[] = { 0x6f, };
+static int jz4770_ssi1_clk_d_pins[] = { 0x78, };
+static int jz4770_ssi1_clk_e_pins[] = { 0x8f, };
static int jz4770_ssi1_gpc_b_pins[] = { 0x3e, };
-static int jz4770_ssi1_gpc_d_pins[] = { 0x56, };
-static int jz4770_ssi1_gpc_e_pins[] = { 0x73, };
+static int jz4770_ssi1_gpc_d_pins[] = { 0x76, };
+static int jz4770_ssi1_gpc_e_pins[] = { 0x93, };
static int jz4770_ssi1_ce0_b_pins[] = { 0x3d, };
-static int jz4770_ssi1_ce0_d_pins[] = { 0x59, };
-static int jz4770_ssi1_ce0_e_pins[] = { 0x70, };
+static int jz4770_ssi1_ce0_d_pins[] = { 0x79, };
+static int jz4770_ssi1_ce0_e_pins[] = { 0x90, };
static int jz4770_ssi1_ce1_b_pins[] = { 0x3f, };
-static int jz4770_ssi1_ce1_d_pins[] = { 0x57, };
-static int jz4770_ssi1_ce1_e_pins[] = { 0x72, };
+static int jz4770_ssi1_ce1_d_pins[] = { 0x77, };
+static int jz4770_ssi1_ce1_e_pins[] = { 0x92, };
static int jz4770_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
static int jz4770_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
static int jz4770_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
static int jz4770_cim_12bit_pins[] = {
0x32, 0x33, 0xb0, 0xb1,
};
+ static int jz4770_lcd_8bit_pins[] = {
+ 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x4c, 0x4d,
+ 0x48, 0x49, 0x52, 0x53,
+ };
static int jz4770_lcd_24bit_pins[] = {
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
static int jz4770_mac_mii_pins[] = { 0xa7, 0xaf, };
static int jz4770_otg_pins[] = { 0x8a, };
- static int jz4770_uart0_data_funcs[] = { 0, 0, };
- static int jz4770_uart0_hwflow_funcs[] = { 0, 0, };
- static int jz4770_uart1_data_funcs[] = { 0, 0, };
- static int jz4770_uart1_hwflow_funcs[] = { 0, 0, };
- static int jz4770_uart2_data_funcs[] = { 0, 0, };
- static int jz4770_uart2_hwflow_funcs[] = { 0, 0, };
- static int jz4770_uart3_data_funcs[] = { 0, 1, };
- static int jz4770_uart3_hwflow_funcs[] = { 0, 0, };
- static int jz4770_ssi0_dt_a_funcs[] = { 2, };
- static int jz4770_ssi0_dt_b_funcs[] = { 1, };
- static int jz4770_ssi0_dt_d_funcs[] = { 1, };
- static int jz4770_ssi0_dt_e_funcs[] = { 0, };
- static int jz4770_ssi0_dr_a_funcs[] = { 1, };
- static int jz4770_ssi0_dr_b_funcs[] = { 1, };
- static int jz4770_ssi0_dr_d_funcs[] = { 1, };
- static int jz4770_ssi0_dr_e_funcs[] = { 0, };
- static int jz4770_ssi0_clk_a_funcs[] = { 2, };
- static int jz4770_ssi0_clk_b_funcs[] = { 1, };
- static int jz4770_ssi0_clk_d_funcs[] = { 1, };
- static int jz4770_ssi0_clk_e_funcs[] = { 0, };
- static int jz4770_ssi0_gpc_b_funcs[] = { 1, };
- static int jz4770_ssi0_gpc_d_funcs[] = { 1, };
- static int jz4770_ssi0_gpc_e_funcs[] = { 0, };
- static int jz4770_ssi0_ce0_a_funcs[] = { 2, };
- static int jz4770_ssi0_ce0_b_funcs[] = { 1, };
- static int jz4770_ssi0_ce0_d_funcs[] = { 1, };
- static int jz4770_ssi0_ce0_e_funcs[] = { 0, };
- static int jz4770_ssi0_ce1_b_funcs[] = { 1, };
- static int jz4770_ssi0_ce1_d_funcs[] = { 1, };
- static int jz4770_ssi0_ce1_e_funcs[] = { 0, };
- static int jz4770_ssi1_dt_b_funcs[] = { 2, };
- static int jz4770_ssi1_dt_d_funcs[] = { 2, };
- static int jz4770_ssi1_dt_e_funcs[] = { 1, };
- static int jz4770_ssi1_dr_b_funcs[] = { 2, };
- static int jz4770_ssi1_dr_d_funcs[] = { 2, };
- static int jz4770_ssi1_dr_e_funcs[] = { 1, };
- static int jz4770_ssi1_clk_b_funcs[] = { 2, };
- static int jz4770_ssi1_clk_d_funcs[] = { 2, };
- static int jz4770_ssi1_clk_e_funcs[] = { 1, };
- static int jz4770_ssi1_gpc_b_funcs[] = { 2, };
- static int jz4770_ssi1_gpc_d_funcs[] = { 2, };
- static int jz4770_ssi1_gpc_e_funcs[] = { 1, };
- static int jz4770_ssi1_ce0_b_funcs[] = { 2, };
- static int jz4770_ssi1_ce0_d_funcs[] = { 2, };
- static int jz4770_ssi1_ce0_e_funcs[] = { 1, };
- static int jz4770_ssi1_ce1_b_funcs[] = { 2, };
- static int jz4770_ssi1_ce1_d_funcs[] = { 2, };
- static int jz4770_ssi1_ce1_e_funcs[] = { 1, };
- static int jz4770_mmc0_1bit_a_funcs[] = { 1, 1, 0, };
- static int jz4770_mmc0_4bit_a_funcs[] = { 1, 1, 1, };
- static int jz4770_mmc0_1bit_e_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc0_4bit_e_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc0_8bit_e_funcs[] = { 0, 0, 0, 0, };
- static int jz4770_mmc1_1bit_d_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc1_4bit_d_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc1_1bit_e_funcs[] = { 1, 1, 1, };
- static int jz4770_mmc1_4bit_e_funcs[] = { 1, 1, 1, };
- static int jz4770_mmc1_8bit_e_funcs[] = { 1, 1, 1, 1, };
- static int jz4770_mmc2_1bit_b_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc2_4bit_b_funcs[] = { 0, 0, 0, };
- static int jz4770_mmc2_1bit_e_funcs[] = { 2, 2, 2, };
- static int jz4770_mmc2_4bit_e_funcs[] = { 2, 2, 2, };
- static int jz4770_mmc2_8bit_e_funcs[] = { 2, 2, 2, 2, };
- static int jz4770_nemc_8bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4770_nemc_16bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4770_nemc_cle_ale_funcs[] = { 0, 0, };
- static int jz4770_nemc_addr_funcs[] = { 0, 0, 0, 0, };
- static int jz4770_nemc_rd_we_funcs[] = { 0, 0, };
- static int jz4770_nemc_frd_fwe_funcs[] = { 0, 0, };
- static int jz4770_nemc_wait_funcs[] = { 0, };
- static int jz4770_nemc_cs1_funcs[] = { 0, };
- static int jz4770_nemc_cs2_funcs[] = { 0, };
- static int jz4770_nemc_cs3_funcs[] = { 0, };
- static int jz4770_nemc_cs4_funcs[] = { 0, };
- static int jz4770_nemc_cs5_funcs[] = { 0, };
- static int jz4770_nemc_cs6_funcs[] = { 0, };
- static int jz4770_i2c0_funcs[] = { 0, 0, };
- static int jz4770_i2c1_funcs[] = { 0, 0, };
- static int jz4770_i2c2_funcs[] = { 2, 2, };
- static int jz4770_cim_8bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4770_cim_12bit_funcs[] = { 0, 0, 0, 0, };
- static int jz4770_lcd_24bit_funcs[] = {
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0,
- };
- static int jz4770_pwm_pwm0_funcs[] = { 0, };
- static int jz4770_pwm_pwm1_funcs[] = { 0, };
- static int jz4770_pwm_pwm2_funcs[] = { 0, };
- static int jz4770_pwm_pwm3_funcs[] = { 0, };
- static int jz4770_pwm_pwm4_funcs[] = { 0, };
- static int jz4770_pwm_pwm5_funcs[] = { 0, };
- static int jz4770_pwm_pwm6_funcs[] = { 0, };
- static int jz4770_pwm_pwm7_funcs[] = { 0, };
- static int jz4770_mac_rmii_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
- static int jz4770_mac_mii_funcs[] = { 0, 0, };
- static int jz4770_otg_funcs[] = { 0, };
-
static const struct group_desc jz4770_groups[] = {
- INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data),
- INGENIC_PIN_GROUP("uart0-hwflow", jz4770_uart0_hwflow),
- INGENIC_PIN_GROUP("uart1-data", jz4770_uart1_data),
- INGENIC_PIN_GROUP("uart1-hwflow", jz4770_uart1_hwflow),
- INGENIC_PIN_GROUP("uart2-data", jz4770_uart2_data),
- INGENIC_PIN_GROUP("uart2-hwflow", jz4770_uart2_hwflow),
- INGENIC_PIN_GROUP("uart3-data", jz4770_uart3_data),
- INGENIC_PIN_GROUP("uart3-hwflow", jz4770_uart3_hwflow),
- INGENIC_PIN_GROUP("ssi0-dt-a", jz4770_ssi0_dt_a),
- INGENIC_PIN_GROUP("ssi0-dt-b", jz4770_ssi0_dt_b),
- INGENIC_PIN_GROUP("ssi0-dt-d", jz4770_ssi0_dt_d),
- INGENIC_PIN_GROUP("ssi0-dt-e", jz4770_ssi0_dt_e),
- INGENIC_PIN_GROUP("ssi0-dr-a", jz4770_ssi0_dr_a),
- INGENIC_PIN_GROUP("ssi0-dr-b", jz4770_ssi0_dr_b),
- INGENIC_PIN_GROUP("ssi0-dr-d", jz4770_ssi0_dr_d),
- INGENIC_PIN_GROUP("ssi0-dr-e", jz4770_ssi0_dr_e),
- INGENIC_PIN_GROUP("ssi0-clk-a", jz4770_ssi0_clk_a),
- INGENIC_PIN_GROUP("ssi0-clk-b", jz4770_ssi0_clk_b),
- INGENIC_PIN_GROUP("ssi0-clk-d", jz4770_ssi0_clk_d),
- INGENIC_PIN_GROUP("ssi0-clk-e", jz4770_ssi0_clk_e),
- INGENIC_PIN_GROUP("ssi0-gpc-b", jz4770_ssi0_gpc_b),
- INGENIC_PIN_GROUP("ssi0-gpc-d", jz4770_ssi0_gpc_d),
- INGENIC_PIN_GROUP("ssi0-gpc-e", jz4770_ssi0_gpc_e),
- INGENIC_PIN_GROUP("ssi0-ce0-a", jz4770_ssi0_ce0_a),
- INGENIC_PIN_GROUP("ssi0-ce0-b", jz4770_ssi0_ce0_b),
- INGENIC_PIN_GROUP("ssi0-ce0-d", jz4770_ssi0_ce0_d),
- INGENIC_PIN_GROUP("ssi0-ce0-e", jz4770_ssi0_ce0_e),
- INGENIC_PIN_GROUP("ssi0-ce1-b", jz4770_ssi0_ce1_b),
- INGENIC_PIN_GROUP("ssi0-ce1-d", jz4770_ssi0_ce1_d),
- INGENIC_PIN_GROUP("ssi0-ce1-e", jz4770_ssi0_ce1_e),
- INGENIC_PIN_GROUP("ssi1-dt-b", jz4770_ssi1_dt_b),
- INGENIC_PIN_GROUP("ssi1-dt-d", jz4770_ssi1_dt_d),
- INGENIC_PIN_GROUP("ssi1-dt-e", jz4770_ssi1_dt_e),
- INGENIC_PIN_GROUP("ssi1-dr-b", jz4770_ssi1_dr_b),
- INGENIC_PIN_GROUP("ssi1-dr-d", jz4770_ssi1_dr_d),
- INGENIC_PIN_GROUP("ssi1-dr-e", jz4770_ssi1_dr_e),
- INGENIC_PIN_GROUP("ssi1-clk-b", jz4770_ssi1_clk_b),
- INGENIC_PIN_GROUP("ssi1-clk-d", jz4770_ssi1_clk_d),
- INGENIC_PIN_GROUP("ssi1-clk-e", jz4770_ssi1_clk_e),
- INGENIC_PIN_GROUP("ssi1-gpc-b", jz4770_ssi1_gpc_b),
- INGENIC_PIN_GROUP("ssi1-gpc-d", jz4770_ssi1_gpc_d),
- INGENIC_PIN_GROUP("ssi1-gpc-e", jz4770_ssi1_gpc_e),
- INGENIC_PIN_GROUP("ssi1-ce0-b", jz4770_ssi1_ce0_b),
- INGENIC_PIN_GROUP("ssi1-ce0-d", jz4770_ssi1_ce0_d),
- INGENIC_PIN_GROUP("ssi1-ce0-e", jz4770_ssi1_ce0_e),
- INGENIC_PIN_GROUP("ssi1-ce1-b", jz4770_ssi1_ce1_b),
- INGENIC_PIN_GROUP("ssi1-ce1-d", jz4770_ssi1_ce1_d),
- INGENIC_PIN_GROUP("ssi1-ce1-e", jz4770_ssi1_ce1_e),
- INGENIC_PIN_GROUP("mmc0-1bit-a", jz4770_mmc0_1bit_a),
- INGENIC_PIN_GROUP("mmc0-4bit-a", jz4770_mmc0_4bit_a),
- INGENIC_PIN_GROUP("mmc0-1bit-e", jz4770_mmc0_1bit_e),
- INGENIC_PIN_GROUP("mmc0-4bit-e", jz4770_mmc0_4bit_e),
- INGENIC_PIN_GROUP("mmc0-8bit-e", jz4770_mmc0_8bit_e),
- INGENIC_PIN_GROUP("mmc1-1bit-d", jz4770_mmc1_1bit_d),
- INGENIC_PIN_GROUP("mmc1-4bit-d", jz4770_mmc1_4bit_d),
- INGENIC_PIN_GROUP("mmc1-1bit-e", jz4770_mmc1_1bit_e),
- INGENIC_PIN_GROUP("mmc1-4bit-e", jz4770_mmc1_4bit_e),
- INGENIC_PIN_GROUP("mmc1-8bit-e", jz4770_mmc1_8bit_e),
- INGENIC_PIN_GROUP("mmc2-1bit-b", jz4770_mmc2_1bit_b),
- INGENIC_PIN_GROUP("mmc2-4bit-b", jz4770_mmc2_4bit_b),
- INGENIC_PIN_GROUP("mmc2-1bit-e", jz4770_mmc2_1bit_e),
- INGENIC_PIN_GROUP("mmc2-4bit-e", jz4770_mmc2_4bit_e),
- INGENIC_PIN_GROUP("mmc2-8bit-e", jz4770_mmc2_8bit_e),
- INGENIC_PIN_GROUP("nemc-8bit-data", jz4770_nemc_8bit_data),
- INGENIC_PIN_GROUP("nemc-16bit-data", jz4770_nemc_16bit_data),
- INGENIC_PIN_GROUP("nemc-cle-ale", jz4770_nemc_cle_ale),
- INGENIC_PIN_GROUP("nemc-addr", jz4770_nemc_addr),
- INGENIC_PIN_GROUP("nemc-rd-we", jz4770_nemc_rd_we),
- INGENIC_PIN_GROUP("nemc-frd-fwe", jz4770_nemc_frd_fwe),
- INGENIC_PIN_GROUP("nemc-wait", jz4770_nemc_wait),
- INGENIC_PIN_GROUP("nemc-cs1", jz4770_nemc_cs1),
- INGENIC_PIN_GROUP("nemc-cs2", jz4770_nemc_cs2),
- INGENIC_PIN_GROUP("nemc-cs3", jz4770_nemc_cs3),
- INGENIC_PIN_GROUP("nemc-cs4", jz4770_nemc_cs4),
- INGENIC_PIN_GROUP("nemc-cs5", jz4770_nemc_cs5),
- INGENIC_PIN_GROUP("nemc-cs6", jz4770_nemc_cs6),
- INGENIC_PIN_GROUP("i2c0-data", jz4770_i2c0),
- INGENIC_PIN_GROUP("i2c1-data", jz4770_i2c1),
- INGENIC_PIN_GROUP("i2c2-data", jz4770_i2c2),
- INGENIC_PIN_GROUP("cim-data-8bit", jz4770_cim_8bit),
- INGENIC_PIN_GROUP("cim-data-12bit", jz4770_cim_12bit),
- INGENIC_PIN_GROUP("lcd-24bit", jz4770_lcd_24bit),
+ INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data, 0),
+ INGENIC_PIN_GROUP("uart0-hwflow", jz4770_uart0_hwflow, 0),
+ INGENIC_PIN_GROUP("uart1-data", jz4770_uart1_data, 0),
+ INGENIC_PIN_GROUP("uart1-hwflow", jz4770_uart1_hwflow, 0),
+ INGENIC_PIN_GROUP("uart2-data", jz4770_uart2_data, 0),
+ INGENIC_PIN_GROUP("uart2-hwflow", jz4770_uart2_hwflow, 0),
+ INGENIC_PIN_GROUP_FUNCS("uart3-data", jz4770_uart3_data,
+ jz4760_uart3_data_funcs),
+ INGENIC_PIN_GROUP("uart3-hwflow", jz4770_uart3_hwflow, 0),
+ INGENIC_PIN_GROUP("ssi0-dt-a", jz4770_ssi0_dt_a, 2),
+ INGENIC_PIN_GROUP("ssi0-dt-b", jz4770_ssi0_dt_b, 1),
+ INGENIC_PIN_GROUP("ssi0-dt-d", jz4770_ssi0_dt_d, 1),
+ INGENIC_PIN_GROUP("ssi0-dt-e", jz4770_ssi0_dt_e, 0),
+ INGENIC_PIN_GROUP("ssi0-dr-a", jz4770_ssi0_dr_a, 1),
+ INGENIC_PIN_GROUP("ssi0-dr-b", jz4770_ssi0_dr_b, 1),
+ INGENIC_PIN_GROUP("ssi0-dr-d", jz4770_ssi0_dr_d, 1),
+ INGENIC_PIN_GROUP("ssi0-dr-e", jz4770_ssi0_dr_e, 0),
+ INGENIC_PIN_GROUP("ssi0-clk-a", jz4770_ssi0_clk_a, 2),
+ INGENIC_PIN_GROUP("ssi0-clk-b", jz4770_ssi0_clk_b, 1),
+ INGENIC_PIN_GROUP("ssi0-clk-d", jz4770_ssi0_clk_d, 1),
+ INGENIC_PIN_GROUP("ssi0-clk-e", jz4770_ssi0_clk_e, 0),
+ INGENIC_PIN_GROUP("ssi0-gpc-b", jz4770_ssi0_gpc_b, 1),
+ INGENIC_PIN_GROUP("ssi0-gpc-d", jz4770_ssi0_gpc_d, 1),
+ INGENIC_PIN_GROUP("ssi0-gpc-e", jz4770_ssi0_gpc_e, 0),
+ INGENIC_PIN_GROUP("ssi0-ce0-a", jz4770_ssi0_ce0_a, 2),
+ INGENIC_PIN_GROUP("ssi0-ce0-b", jz4770_ssi0_ce0_b, 1),
+ INGENIC_PIN_GROUP("ssi0-ce0-d", jz4770_ssi0_ce0_d, 1),
+ INGENIC_PIN_GROUP("ssi0-ce0-e", jz4770_ssi0_ce0_e, 0),
+ INGENIC_PIN_GROUP("ssi0-ce1-b", jz4770_ssi0_ce1_b, 1),
+ INGENIC_PIN_GROUP("ssi0-ce1-d", jz4770_ssi0_ce1_d, 1),
+ INGENIC_PIN_GROUP("ssi0-ce1-e", jz4770_ssi0_ce1_e, 0),
+ INGENIC_PIN_GROUP("ssi1-dt-b", jz4770_ssi1_dt_b, 2),
+ INGENIC_PIN_GROUP("ssi1-dt-d", jz4770_ssi1_dt_d, 2),
+ INGENIC_PIN_GROUP("ssi1-dt-e", jz4770_ssi1_dt_e, 1),
+ INGENIC_PIN_GROUP("ssi1-dr-b", jz4770_ssi1_dr_b, 2),
+ INGENIC_PIN_GROUP("ssi1-dr-d", jz4770_ssi1_dr_d, 2),
+ INGENIC_PIN_GROUP("ssi1-dr-e", jz4770_ssi1_dr_e, 1),
+ INGENIC_PIN_GROUP("ssi1-clk-b", jz4770_ssi1_clk_b, 2),
+ INGENIC_PIN_GROUP("ssi1-clk-d", jz4770_ssi1_clk_d, 2),
+ INGENIC_PIN_GROUP("ssi1-clk-e", jz4770_ssi1_clk_e, 1),
+ INGENIC_PIN_GROUP("ssi1-gpc-b", jz4770_ssi1_gpc_b, 2),
+ INGENIC_PIN_GROUP("ssi1-gpc-d", jz4770_ssi1_gpc_d, 2),
+ INGENIC_PIN_GROUP("ssi1-gpc-e", jz4770_ssi1_gpc_e, 1),
+ INGENIC_PIN_GROUP("ssi1-ce0-b", jz4770_ssi1_ce0_b, 2),
+ INGENIC_PIN_GROUP("ssi1-ce0-d", jz4770_ssi1_ce0_d, 2),
+ INGENIC_PIN_GROUP("ssi1-ce0-e", jz4770_ssi1_ce0_e, 1),
+ INGENIC_PIN_GROUP("ssi1-ce1-b", jz4770_ssi1_ce1_b, 2),
+ INGENIC_PIN_GROUP("ssi1-ce1-d", jz4770_ssi1_ce1_d, 2),
+ INGENIC_PIN_GROUP("ssi1-ce1-e", jz4770_ssi1_ce1_e, 1),
+ INGENIC_PIN_GROUP_FUNCS("mmc0-1bit-a", jz4770_mmc0_1bit_a,
+ jz4760_mmc0_1bit_a_funcs),
+ INGENIC_PIN_GROUP("mmc0-4bit-a", jz4770_mmc0_4bit_a, 1),
+ INGENIC_PIN_GROUP("mmc0-1bit-e", jz4770_mmc0_1bit_e, 0),
+ INGENIC_PIN_GROUP("mmc0-4bit-e", jz4770_mmc0_4bit_e, 0),
+ INGENIC_PIN_GROUP("mmc0-8bit-e", jz4770_mmc0_8bit_e, 0),
+ INGENIC_PIN_GROUP("mmc1-1bit-d", jz4770_mmc1_1bit_d, 0),
+ INGENIC_PIN_GROUP("mmc1-4bit-d", jz4770_mmc1_4bit_d, 0),
+ INGENIC_PIN_GROUP("mmc1-1bit-e", jz4770_mmc1_1bit_e, 1),
+ INGENIC_PIN_GROUP("mmc1-4bit-e", jz4770_mmc1_4bit_e, 1),
+ INGENIC_PIN_GROUP("mmc1-8bit-e", jz4770_mmc1_8bit_e, 1),
+ INGENIC_PIN_GROUP("mmc2-1bit-b", jz4770_mmc2_1bit_b, 0),
+ INGENIC_PIN_GROUP("mmc2-4bit-b", jz4770_mmc2_4bit_b, 0),
+ INGENIC_PIN_GROUP("mmc2-1bit-e", jz4770_mmc2_1bit_e, 2),
+ INGENIC_PIN_GROUP("mmc2-4bit-e", jz4770_mmc2_4bit_e, 2),
+ INGENIC_PIN_GROUP("mmc2-8bit-e", jz4770_mmc2_8bit_e, 2),
+ INGENIC_PIN_GROUP("nemc-8bit-data", jz4770_nemc_8bit_data, 0),
+ INGENIC_PIN_GROUP("nemc-16bit-data", jz4770_nemc_16bit_data, 0),
+ INGENIC_PIN_GROUP("nemc-cle-ale", jz4770_nemc_cle_ale, 0),
+ INGENIC_PIN_GROUP("nemc-addr", jz4770_nemc_addr, 0),
+ INGENIC_PIN_GROUP("nemc-rd-we", jz4770_nemc_rd_we, 0),
+ INGENIC_PIN_GROUP("nemc-frd-fwe", jz4770_nemc_frd_fwe, 0),
+ INGENIC_PIN_GROUP("nemc-wait", jz4770_nemc_wait, 0),
+ INGENIC_PIN_GROUP("nemc-cs1", jz4770_nemc_cs1, 0),
+ INGENIC_PIN_GROUP("nemc-cs2", jz4770_nemc_cs2, 0),
+ INGENIC_PIN_GROUP("nemc-cs3", jz4770_nemc_cs3, 0),
+ INGENIC_PIN_GROUP("nemc-cs4", jz4770_nemc_cs4, 0),
+ INGENIC_PIN_GROUP("nemc-cs5", jz4770_nemc_cs5, 0),
+ INGENIC_PIN_GROUP("nemc-cs6", jz4770_nemc_cs6, 0),
+ INGENIC_PIN_GROUP("i2c0-data", jz4770_i2c0, 0),
+ INGENIC_PIN_GROUP("i2c1-data", jz4770_i2c1, 0),
+ INGENIC_PIN_GROUP("i2c2-data", jz4770_i2c2, 2),
+ INGENIC_PIN_GROUP("cim-data-8bit", jz4770_cim_8bit, 0),
+ INGENIC_PIN_GROUP("cim-data-12bit", jz4770_cim_12bit, 0),
+ INGENIC_PIN_GROUP("lcd-8bit", jz4770_lcd_8bit, 0),
+ INGENIC_PIN_GROUP("lcd-24bit", jz4770_lcd_24bit, 0),
{ "lcd-no-pins", },
- INGENIC_PIN_GROUP("pwm0", jz4770_pwm_pwm0),
- INGENIC_PIN_GROUP("pwm1", jz4770_pwm_pwm1),
- INGENIC_PIN_GROUP("pwm2", jz4770_pwm_pwm2),
- INGENIC_PIN_GROUP("pwm3", jz4770_pwm_pwm3),
- INGENIC_PIN_GROUP("pwm4", jz4770_pwm_pwm4),
- INGENIC_PIN_GROUP("pwm5", jz4770_pwm_pwm5),
- INGENIC_PIN_GROUP("pwm6", jz4770_pwm_pwm6),
- INGENIC_PIN_GROUP("pwm7", jz4770_pwm_pwm7),
- INGENIC_PIN_GROUP("mac-rmii", jz4770_mac_rmii),
- INGENIC_PIN_GROUP("mac-mii", jz4770_mac_mii),
- INGENIC_PIN_GROUP("otg-vbus", jz4770_otg),
+ INGENIC_PIN_GROUP("pwm0", jz4770_pwm_pwm0, 0),
+ INGENIC_PIN_GROUP("pwm1", jz4770_pwm_pwm1, 0),
+ INGENIC_PIN_GROUP("pwm2", jz4770_pwm_pwm2, 0),
+ INGENIC_PIN_GROUP("pwm3", jz4770_pwm_pwm3, 0),
+ INGENIC_PIN_GROUP("pwm4", jz4770_pwm_pwm4, 0),
+ INGENIC_PIN_GROUP("pwm5", jz4770_pwm_pwm5, 0),
+ INGENIC_PIN_GROUP("pwm6", jz4770_pwm_pwm6, 0),
+ INGENIC_PIN_GROUP("pwm7", jz4770_pwm_pwm7, 0),
+ INGENIC_PIN_GROUP("mac-rmii", jz4770_mac_rmii, 0),
+ INGENIC_PIN_GROUP("mac-mii", jz4770_mac_mii, 0),
+ INGENIC_PIN_GROUP("otg-vbus", jz4770_otg, 0),
};
static const char *jz4770_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
static const char *jz4770_i2c1_groups[] = { "i2c1-data", };
static const char *jz4770_i2c2_groups[] = { "i2c2-data", };
static const char *jz4770_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", };
- static const char *jz4770_lcd_groups[] = { "lcd-24bit", "lcd-no-pins", };
+ static const char *jz4770_lcd_groups[] = {
+ "lcd-8bit", "lcd-24bit", "lcd-no-pins",
+ };
static const char *jz4770_pwm0_groups[] = { "pwm0", };
static const char *jz4770_pwm1_groups[] = { "pwm1", };
static const char *jz4770_pwm2_groups[] = { "pwm2", };
static int jz4780_ssi0_dt_a_21_pins[] = { 0x15, };
static int jz4780_ssi0_dt_a_28_pins[] = { 0x1c, };
static int jz4780_ssi0_dt_b_pins[] = { 0x3d, };
-static int jz4780_ssi0_dt_d_pins[] = { 0x59, };
+static int jz4780_ssi0_dt_d_pins[] = { 0x79, };
static int jz4780_ssi0_dr_a_20_pins[] = { 0x14, };
static int jz4780_ssi0_dr_a_27_pins[] = { 0x1b, };
static int jz4780_ssi0_dr_b_pins[] = { 0x34, };
-static int jz4780_ssi0_dr_d_pins[] = { 0x54, };
+static int jz4780_ssi0_dr_d_pins[] = { 0x74, };
static int jz4780_ssi0_clk_a_pins[] = { 0x12, };
static int jz4780_ssi0_clk_b_5_pins[] = { 0x25, };
static int jz4780_ssi0_clk_b_28_pins[] = { 0x3c, };
-static int jz4780_ssi0_clk_d_pins[] = { 0x58, };
+static int jz4780_ssi0_clk_d_pins[] = { 0x78, };
static int jz4780_ssi0_gpc_b_pins[] = { 0x3e, };
-static int jz4780_ssi0_gpc_d_pins[] = { 0x56, };
+static int jz4780_ssi0_gpc_d_pins[] = { 0x76, };
static int jz4780_ssi0_ce0_a_23_pins[] = { 0x17, };
static int jz4780_ssi0_ce0_a_25_pins[] = { 0x19, };
static int jz4780_ssi0_ce0_b_pins[] = { 0x3f, };
-static int jz4780_ssi0_ce0_d_pins[] = { 0x57, };
+static int jz4780_ssi0_ce0_d_pins[] = { 0x77, };
static int jz4780_ssi0_ce1_b_pins[] = { 0x35, };
-static int jz4780_ssi0_ce1_d_pins[] = { 0x55, };
+static int jz4780_ssi0_ce1_d_pins[] = { 0x75, };
static int jz4780_ssi1_dt_b_pins[] = { 0x3d, };
-static int jz4780_ssi1_dt_d_pins[] = { 0x59, };
+static int jz4780_ssi1_dt_d_pins[] = { 0x79, };
static int jz4780_ssi1_dr_b_pins[] = { 0x34, };
-static int jz4780_ssi1_dr_d_pins[] = { 0x54, };
+static int jz4780_ssi1_dr_d_pins[] = { 0x74, };
static int jz4780_ssi1_clk_b_pins[] = { 0x3c, };
-static int jz4780_ssi1_clk_d_pins[] = { 0x58, };
+static int jz4780_ssi1_clk_d_pins[] = { 0x78, };
static int jz4780_ssi1_gpc_b_pins[] = { 0x3e, };
-static int jz4780_ssi1_gpc_d_pins[] = { 0x56, };
+static int jz4780_ssi1_gpc_d_pins[] = { 0x76, };
static int jz4780_ssi1_ce0_b_pins[] = { 0x3f, };
-static int jz4780_ssi1_ce0_d_pins[] = { 0x57, };
+static int jz4780_ssi1_ce0_d_pins[] = { 0x77, };
static int jz4780_ssi1_ce1_b_pins[] = { 0x35, };
-static int jz4780_ssi1_ce1_d_pins[] = { 0x55, };
+static int jz4780_ssi1_ce1_d_pins[] = { 0x75, };
static int jz4780_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, 0x18, };
static int jz4780_i2c3_pins[] = { 0x6a, 0x6b, };
static int jz4780_i2c4_e_pins[] = { 0x8c, 0x8d, };
static int jz4780_i2s_sysclk_pins[] = { 0x85, };
static int jz4780_hdmi_ddc_pins[] = { 0xb9, 0xb8, };
- static int jz4780_uart2_data_funcs[] = { 1, 1, };
- static int jz4780_uart2_hwflow_funcs[] = { 1, 1, };
- static int jz4780_uart4_data_funcs[] = { 2, 2, };
- static int jz4780_ssi0_dt_a_19_funcs[] = { 2, };
- static int jz4780_ssi0_dt_a_21_funcs[] = { 2, };
- static int jz4780_ssi0_dt_a_28_funcs[] = { 2, };
- static int jz4780_ssi0_dt_b_funcs[] = { 1, };
- static int jz4780_ssi0_dt_d_funcs[] = { 1, };
- static int jz4780_ssi0_dr_a_20_funcs[] = { 2, };
- static int jz4780_ssi0_dr_a_27_funcs[] = { 2, };
- static int jz4780_ssi0_dr_b_funcs[] = { 1, };
- static int jz4780_ssi0_dr_d_funcs[] = { 1, };
- static int jz4780_ssi0_clk_a_funcs[] = { 2, };
- static int jz4780_ssi0_clk_b_5_funcs[] = { 1, };
- static int jz4780_ssi0_clk_b_28_funcs[] = { 1, };
- static int jz4780_ssi0_clk_d_funcs[] = { 1, };
- static int jz4780_ssi0_gpc_b_funcs[] = { 1, };
- static int jz4780_ssi0_gpc_d_funcs[] = { 1, };
- static int jz4780_ssi0_ce0_a_23_funcs[] = { 2, };
- static int jz4780_ssi0_ce0_a_25_funcs[] = { 2, };
- static int jz4780_ssi0_ce0_b_funcs[] = { 1, };
- static int jz4780_ssi0_ce0_d_funcs[] = { 1, };
- static int jz4780_ssi0_ce1_b_funcs[] = { 1, };
- static int jz4780_ssi0_ce1_d_funcs[] = { 1, };
- static int jz4780_ssi1_dt_b_funcs[] = { 2, };
- static int jz4780_ssi1_dt_d_funcs[] = { 2, };
- static int jz4780_ssi1_dr_b_funcs[] = { 2, };
- static int jz4780_ssi1_dr_d_funcs[] = { 2, };
- static int jz4780_ssi1_clk_b_funcs[] = { 2, };
- static int jz4780_ssi1_clk_d_funcs[] = { 2, };
- static int jz4780_ssi1_gpc_b_funcs[] = { 2, };
- static int jz4780_ssi1_gpc_d_funcs[] = { 2, };
- static int jz4780_ssi1_ce0_b_funcs[] = { 2, };
- static int jz4780_ssi1_ce0_d_funcs[] = { 2, };
- static int jz4780_ssi1_ce1_b_funcs[] = { 2, };
- static int jz4780_ssi1_ce1_d_funcs[] = { 2, };
- static int jz4780_mmc0_8bit_a_funcs[] = { 1, 1, 1, 1, 1, };
- static int jz4780_i2c3_funcs[] = { 1, 1, };
- static int jz4780_i2c4_e_funcs[] = { 1, 1, };
- static int jz4780_i2c4_f_funcs[] = { 1, 1, };
- static int jz4780_i2s_data_tx_funcs[] = { 0, };
- static int jz4780_i2s_data_rx_funcs[] = { 0, };
- static int jz4780_i2s_clk_txrx_funcs[] = { 1, 0, };
- static int jz4780_i2s_clk_rx_funcs[] = { 1, 1, };
- static int jz4780_i2s_sysclk_funcs[] = { 2, };
- static int jz4780_hdmi_ddc_funcs[] = { 0, 0, };
+ static u8 jz4780_i2s_clk_txrx_funcs[] = { 1, 0, };
static const struct group_desc jz4780_groups[] = {
- INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data),
- INGENIC_PIN_GROUP("uart0-hwflow", jz4770_uart0_hwflow),
- INGENIC_PIN_GROUP("uart1-data", jz4770_uart1_data),
- INGENIC_PIN_GROUP("uart1-hwflow", jz4770_uart1_hwflow),
- INGENIC_PIN_GROUP("uart2-data", jz4780_uart2_data),
- INGENIC_PIN_GROUP("uart2-hwflow", jz4780_uart2_hwflow),
- INGENIC_PIN_GROUP("uart3-data", jz4770_uart3_data),
- INGENIC_PIN_GROUP("uart3-hwflow", jz4770_uart3_hwflow),
- INGENIC_PIN_GROUP("uart4-data", jz4780_uart4_data),
- INGENIC_PIN_GROUP("ssi0-dt-a-19", jz4780_ssi0_dt_a_19),
- INGENIC_PIN_GROUP("ssi0-dt-a-21", jz4780_ssi0_dt_a_21),
- INGENIC_PIN_GROUP("ssi0-dt-a-28", jz4780_ssi0_dt_a_28),
- INGENIC_PIN_GROUP("ssi0-dt-b", jz4780_ssi0_dt_b),
- INGENIC_PIN_GROUP("ssi0-dt-d", jz4780_ssi0_dt_d),
- INGENIC_PIN_GROUP("ssi0-dt-e", jz4770_ssi0_dt_e),
- INGENIC_PIN_GROUP("ssi0-dr-a-20", jz4780_ssi0_dr_a_20),
- INGENIC_PIN_GROUP("ssi0-dr-a-27", jz4780_ssi0_dr_a_27),
- INGENIC_PIN_GROUP("ssi0-dr-b", jz4780_ssi0_dr_b),
- INGENIC_PIN_GROUP("ssi0-dr-d", jz4780_ssi0_dr_d),
- INGENIC_PIN_GROUP("ssi0-dr-e", jz4770_ssi0_dr_e),
- INGENIC_PIN_GROUP("ssi0-clk-a", jz4780_ssi0_clk_a),
- INGENIC_PIN_GROUP("ssi0-clk-b-5", jz4780_ssi0_clk_b_5),
- INGENIC_PIN_GROUP("ssi0-clk-b-28", jz4780_ssi0_clk_b_28),
- INGENIC_PIN_GROUP("ssi0-clk-d", jz4780_ssi0_clk_d),
- INGENIC_PIN_GROUP("ssi0-clk-e", jz4770_ssi0_clk_e),
- INGENIC_PIN_GROUP("ssi0-gpc-b", jz4780_ssi0_gpc_b),
- INGENIC_PIN_GROUP("ssi0-gpc-d", jz4780_ssi0_gpc_d),
- INGENIC_PIN_GROUP("ssi0-gpc-e", jz4770_ssi0_gpc_e),
- INGENIC_PIN_GROUP("ssi0-ce0-a-23", jz4780_ssi0_ce0_a_23),
- INGENIC_PIN_GROUP("ssi0-ce0-a-25", jz4780_ssi0_ce0_a_25),
- INGENIC_PIN_GROUP("ssi0-ce0-b", jz4780_ssi0_ce0_b),
- INGENIC_PIN_GROUP("ssi0-ce0-d", jz4780_ssi0_ce0_d),
- INGENIC_PIN_GROUP("ssi0-ce0-e", jz4770_ssi0_ce0_e),
- INGENIC_PIN_GROUP("ssi0-ce1-b", jz4780_ssi0_ce1_b),
- INGENIC_PIN_GROUP("ssi0-ce1-d", jz4780_ssi0_ce1_d),
- INGENIC_PIN_GROUP("ssi0-ce1-e", jz4770_ssi0_ce1_e),
- INGENIC_PIN_GROUP("ssi1-dt-b", jz4780_ssi1_dt_b),
- INGENIC_PIN_GROUP("ssi1-dt-d", jz4780_ssi1_dt_d),
- INGENIC_PIN_GROUP("ssi1-dt-e", jz4770_ssi1_dt_e),
- INGENIC_PIN_GROUP("ssi1-dr-b", jz4780_ssi1_dr_b),
- INGENIC_PIN_GROUP("ssi1-dr-d", jz4780_ssi1_dr_d),
- INGENIC_PIN_GROUP("ssi1-dr-e", jz4770_ssi1_dr_e),
- INGENIC_PIN_GROUP("ssi1-clk-b", jz4780_ssi1_clk_b),
- INGENIC_PIN_GROUP("ssi1-clk-d", jz4780_ssi1_clk_d),
- INGENIC_PIN_GROUP("ssi1-clk-e", jz4770_ssi1_clk_e),
- INGENIC_PIN_GROUP("ssi1-gpc-b", jz4780_ssi1_gpc_b),
- INGENIC_PIN_GROUP("ssi1-gpc-d", jz4780_ssi1_gpc_d),
- INGENIC_PIN_GROUP("ssi1-gpc-e", jz4770_ssi1_gpc_e),
- INGENIC_PIN_GROUP("ssi1-ce0-b", jz4780_ssi1_ce0_b),
- INGENIC_PIN_GROUP("ssi1-ce0-d", jz4780_ssi1_ce0_d),
- INGENIC_PIN_GROUP("ssi1-ce0-e", jz4770_ssi1_ce0_e),
- INGENIC_PIN_GROUP("ssi1-ce1-b", jz4780_ssi1_ce1_b),
- INGENIC_PIN_GROUP("ssi1-ce1-d", jz4780_ssi1_ce1_d),
- INGENIC_PIN_GROUP("ssi1-ce1-e", jz4770_ssi1_ce1_e),
- INGENIC_PIN_GROUP("mmc0-1bit-a", jz4770_mmc0_1bit_a),
- INGENIC_PIN_GROUP("mmc0-4bit-a", jz4770_mmc0_4bit_a),
- INGENIC_PIN_GROUP("mmc0-8bit-a", jz4780_mmc0_8bit_a),
- INGENIC_PIN_GROUP("mmc0-1bit-e", jz4770_mmc0_1bit_e),
- INGENIC_PIN_GROUP("mmc0-4bit-e", jz4770_mmc0_4bit_e),
- INGENIC_PIN_GROUP("mmc1-1bit-d", jz4770_mmc1_1bit_d),
- INGENIC_PIN_GROUP("mmc1-4bit-d", jz4770_mmc1_4bit_d),
- INGENIC_PIN_GROUP("mmc1-1bit-e", jz4770_mmc1_1bit_e),
- INGENIC_PIN_GROUP("mmc1-4bit-e", jz4770_mmc1_4bit_e),
- INGENIC_PIN_GROUP("mmc2-1bit-b", jz4770_mmc2_1bit_b),
- INGENIC_PIN_GROUP("mmc2-4bit-b", jz4770_mmc2_4bit_b),
- INGENIC_PIN_GROUP("mmc2-1bit-e", jz4770_mmc2_1bit_e),
- INGENIC_PIN_GROUP("mmc2-4bit-e", jz4770_mmc2_4bit_e),
- INGENIC_PIN_GROUP("nemc-data", jz4770_nemc_8bit_data),
- INGENIC_PIN_GROUP("nemc-cle-ale", jz4770_nemc_cle_ale),
- INGENIC_PIN_GROUP("nemc-addr", jz4770_nemc_addr),
- INGENIC_PIN_GROUP("nemc-rd-we", jz4770_nemc_rd_we),
- INGENIC_PIN_GROUP("nemc-frd-fwe", jz4770_nemc_frd_fwe),
- INGENIC_PIN_GROUP("nemc-wait", jz4770_nemc_wait),
- INGENIC_PIN_GROUP("nemc-cs1", jz4770_nemc_cs1),
- INGENIC_PIN_GROUP("nemc-cs2", jz4770_nemc_cs2),
- INGENIC_PIN_GROUP("nemc-cs3", jz4770_nemc_cs3),
- INGENIC_PIN_GROUP("nemc-cs4", jz4770_nemc_cs4),
- INGENIC_PIN_GROUP("nemc-cs5", jz4770_nemc_cs5),
- INGENIC_PIN_GROUP("nemc-cs6", jz4770_nemc_cs6),
- INGENIC_PIN_GROUP("i2c0-data", jz4770_i2c0),
- INGENIC_PIN_GROUP("i2c1-data", jz4770_i2c1),
- INGENIC_PIN_GROUP("i2c2-data", jz4770_i2c2),
- INGENIC_PIN_GROUP("i2c3-data", jz4780_i2c3),
- INGENIC_PIN_GROUP("i2c4-data-e", jz4780_i2c4_e),
- INGENIC_PIN_GROUP("i2c4-data-f", jz4780_i2c4_f),
- INGENIC_PIN_GROUP("i2s-data-tx", jz4780_i2s_data_tx),
- INGENIC_PIN_GROUP("i2s-data-rx", jz4780_i2s_data_rx),
- INGENIC_PIN_GROUP("i2s-clk-txrx", jz4780_i2s_clk_txrx),
- INGENIC_PIN_GROUP("i2s-clk-rx", jz4780_i2s_clk_rx),
- INGENIC_PIN_GROUP("i2s-sysclk", jz4780_i2s_sysclk),
- INGENIC_PIN_GROUP("hdmi-ddc", jz4780_hdmi_ddc),
- INGENIC_PIN_GROUP("cim-data", jz4770_cim_8bit),
- INGENIC_PIN_GROUP("lcd-24bit", jz4770_lcd_24bit),
+ INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data, 0),
+ INGENIC_PIN_GROUP("uart0-hwflow", jz4770_uart0_hwflow, 0),
+ INGENIC_PIN_GROUP("uart1-data", jz4770_uart1_data, 0),
+ INGENIC_PIN_GROUP("uart1-hwflow", jz4770_uart1_hwflow, 0),
+ INGENIC_PIN_GROUP("uart2-data", jz4780_uart2_data, 1),
+ INGENIC_PIN_GROUP("uart2-hwflow", jz4780_uart2_hwflow, 1),
+ INGENIC_PIN_GROUP_FUNCS("uart3-data", jz4770_uart3_data,
+ jz4760_uart3_data_funcs),
+ INGENIC_PIN_GROUP("uart3-hwflow", jz4770_uart3_hwflow, 0),
+ INGENIC_PIN_GROUP("uart4-data", jz4780_uart4_data, 2),
+ INGENIC_PIN_GROUP("ssi0-dt-a-19", jz4780_ssi0_dt_a_19, 2),
+ INGENIC_PIN_GROUP("ssi0-dt-a-21", jz4780_ssi0_dt_a_21, 2),
+ INGENIC_PIN_GROUP("ssi0-dt-a-28", jz4780_ssi0_dt_a_28, 2),
+ INGENIC_PIN_GROUP("ssi0-dt-b", jz4780_ssi0_dt_b, 1),
+ INGENIC_PIN_GROUP("ssi0-dt-d", jz4780_ssi0_dt_d, 1),
+ INGENIC_PIN_GROUP("ssi0-dt-e", jz4770_ssi0_dt_e, 0),
+ INGENIC_PIN_GROUP("ssi0-dr-a-20", jz4780_ssi0_dr_a_20, 2),
+ INGENIC_PIN_GROUP("ssi0-dr-a-27", jz4780_ssi0_dr_a_27, 2),
+ INGENIC_PIN_GROUP("ssi0-dr-b", jz4780_ssi0_dr_b, 1),
+ INGENIC_PIN_GROUP("ssi0-dr-d", jz4780_ssi0_dr_d, 1),
+ INGENIC_PIN_GROUP("ssi0-dr-e", jz4770_ssi0_dr_e, 0),
+ INGENIC_PIN_GROUP("ssi0-clk-a", jz4780_ssi0_clk_a, 2),
+ INGENIC_PIN_GROUP("ssi0-clk-b-5", jz4780_ssi0_clk_b_5, 1),
+ INGENIC_PIN_GROUP("ssi0-clk-b-28", jz4780_ssi0_clk_b_28, 1),
+ INGENIC_PIN_GROUP("ssi0-clk-d", jz4780_ssi0_clk_d, 1),
+ INGENIC_PIN_GROUP("ssi0-clk-e", jz4770_ssi0_clk_e, 0),
+ INGENIC_PIN_GROUP("ssi0-gpc-b", jz4780_ssi0_gpc_b, 1),
+ INGENIC_PIN_GROUP("ssi0-gpc-d", jz4780_ssi0_gpc_d, 1),
+ INGENIC_PIN_GROUP("ssi0-gpc-e", jz4770_ssi0_gpc_e, 0),
+ INGENIC_PIN_GROUP("ssi0-ce0-a-23", jz4780_ssi0_ce0_a_23, 2),
+ INGENIC_PIN_GROUP("ssi0-ce0-a-25", jz4780_ssi0_ce0_a_25, 2),
+ INGENIC_PIN_GROUP("ssi0-ce0-b", jz4780_ssi0_ce0_b, 1),
+ INGENIC_PIN_GROUP("ssi0-ce0-d", jz4780_ssi0_ce0_d, 1),
+ INGENIC_PIN_GROUP("ssi0-ce0-e", jz4770_ssi0_ce0_e, 0),
+ INGENIC_PIN_GROUP("ssi0-ce1-b", jz4780_ssi0_ce1_b, 1),
+ INGENIC_PIN_GROUP("ssi0-ce1-d", jz4780_ssi0_ce1_d, 1),
+ INGENIC_PIN_GROUP("ssi0-ce1-e", jz4770_ssi0_ce1_e, 0),
+ INGENIC_PIN_GROUP("ssi1-dt-b", jz4780_ssi1_dt_b, 2),
+ INGENIC_PIN_GROUP("ssi1-dt-d", jz4780_ssi1_dt_d, 2),
+ INGENIC_PIN_GROUP("ssi1-dt-e", jz4770_ssi1_dt_e, 1),
+ INGENIC_PIN_GROUP("ssi1-dr-b", jz4780_ssi1_dr_b, 2),
+ INGENIC_PIN_GROUP("ssi1-dr-d", jz4780_ssi1_dr_d, 2),
+ INGENIC_PIN_GROUP("ssi1-dr-e", jz4770_ssi1_dr_e, 1),
+ INGENIC_PIN_GROUP("ssi1-clk-b", jz4780_ssi1_clk_b, 2),
+ INGENIC_PIN_GROUP("ssi1-clk-d", jz4780_ssi1_clk_d, 2),
+ INGENIC_PIN_GROUP("ssi1-clk-e", jz4770_ssi1_clk_e, 1),
+ INGENIC_PIN_GROUP("ssi1-gpc-b", jz4780_ssi1_gpc_b, 2),
+ INGENIC_PIN_GROUP("ssi1-gpc-d", jz4780_ssi1_gpc_d, 2),
+ INGENIC_PIN_GROUP("ssi1-gpc-e", jz4770_ssi1_gpc_e, 1),
+ INGENIC_PIN_GROUP("ssi1-ce0-b", jz4780_ssi1_ce0_b, 2),
+ INGENIC_PIN_GROUP("ssi1-ce0-d", jz4780_ssi1_ce0_d, 2),
+ INGENIC_PIN_GROUP("ssi1-ce0-e", jz4770_ssi1_ce0_e, 1),
+ INGENIC_PIN_GROUP("ssi1-ce1-b", jz4780_ssi1_ce1_b, 2),
+ INGENIC_PIN_GROUP("ssi1-ce1-d", jz4780_ssi1_ce1_d, 2),
+ INGENIC_PIN_GROUP("ssi1-ce1-e", jz4770_ssi1_ce1_e, 1),
+ INGENIC_PIN_GROUP_FUNCS("mmc0-1bit-a", jz4770_mmc0_1bit_a,
+ jz4760_mmc0_1bit_a_funcs),
+ INGENIC_PIN_GROUP("mmc0-4bit-a", jz4770_mmc0_4bit_a, 1),
+ INGENIC_PIN_GROUP("mmc0-8bit-a", jz4780_mmc0_8bit_a, 1),
+ INGENIC_PIN_GROUP("mmc0-1bit-e", jz4770_mmc0_1bit_e, 0),
+ INGENIC_PIN_GROUP("mmc0-4bit-e", jz4770_mmc0_4bit_e, 0),
+ INGENIC_PIN_GROUP("mmc1-1bit-d", jz4770_mmc1_1bit_d, 0),
+ INGENIC_PIN_GROUP("mmc1-4bit-d", jz4770_mmc1_4bit_d, 0),
+ INGENIC_PIN_GROUP("mmc1-1bit-e", jz4770_mmc1_1bit_e, 1),
+ INGENIC_PIN_GROUP("mmc1-4bit-e", jz4770_mmc1_4bit_e, 1),
+ INGENIC_PIN_GROUP("mmc2-1bit-b", jz4770_mmc2_1bit_b, 0),
+ INGENIC_PIN_GROUP("mmc2-4bit-b", jz4770_mmc2_4bit_b, 0),
+ INGENIC_PIN_GROUP("mmc2-1bit-e", jz4770_mmc2_1bit_e, 2),
+ INGENIC_PIN_GROUP("mmc2-4bit-e", jz4770_mmc2_4bit_e, 2),
+ INGENIC_PIN_GROUP("nemc-data", jz4770_nemc_8bit_data, 0),
+ INGENIC_PIN_GROUP("nemc-cle-ale", jz4770_nemc_cle_ale, 0),
+ INGENIC_PIN_GROUP("nemc-addr", jz4770_nemc_addr, 0),
+ INGENIC_PIN_GROUP("nemc-rd-we", jz4770_nemc_rd_we, 0),
+ INGENIC_PIN_GROUP("nemc-frd-fwe", jz4770_nemc_frd_fwe, 0),
+ INGENIC_PIN_GROUP("nemc-wait", jz4770_nemc_wait, 0),
+ INGENIC_PIN_GROUP("nemc-cs1", jz4770_nemc_cs1, 0),
+ INGENIC_PIN_GROUP("nemc-cs2", jz4770_nemc_cs2, 0),
+ INGENIC_PIN_GROUP("nemc-cs3", jz4770_nemc_cs3, 0),
+ INGENIC_PIN_GROUP("nemc-cs4", jz4770_nemc_cs4, 0),
+ INGENIC_PIN_GROUP("nemc-cs5", jz4770_nemc_cs5, 0),
+ INGENIC_PIN_GROUP("nemc-cs6", jz4770_nemc_cs6, 0),
+ INGENIC_PIN_GROUP("i2c0-data", jz4770_i2c0, 0),
+ INGENIC_PIN_GROUP("i2c1-data", jz4770_i2c1, 0),
+ INGENIC_PIN_GROUP("i2c2-data", jz4770_i2c2, 2),
+ INGENIC_PIN_GROUP("i2c3-data", jz4780_i2c3, 1),
+ INGENIC_PIN_GROUP("i2c4-data-e", jz4780_i2c4_e, 1),
+ INGENIC_PIN_GROUP("i2c4-data-f", jz4780_i2c4_f, 1),
+ INGENIC_PIN_GROUP("i2s-data-tx", jz4780_i2s_data_tx, 0),
+ INGENIC_PIN_GROUP("i2s-data-rx", jz4780_i2s_data_rx, 0),
+ INGENIC_PIN_GROUP_FUNCS("i2s-clk-txrx", jz4780_i2s_clk_txrx,
+ jz4780_i2s_clk_txrx_funcs),
+ INGENIC_PIN_GROUP("i2s-clk-rx", jz4780_i2s_clk_rx, 1),
+ INGENIC_PIN_GROUP("i2s-sysclk", jz4780_i2s_sysclk, 2),
+ INGENIC_PIN_GROUP("hdmi-ddc", jz4780_hdmi_ddc, 0),
+ INGENIC_PIN_GROUP("cim-data", jz4770_cim_8bit, 0),
+ INGENIC_PIN_GROUP("cim-data-12bit", jz4770_cim_12bit, 0),
+ INGENIC_PIN_GROUP("lcd-24bit", jz4770_lcd_24bit, 0),
{ "lcd-no-pins", },
- INGENIC_PIN_GROUP("pwm0", jz4770_pwm_pwm0),
- INGENIC_PIN_GROUP("pwm1", jz4770_pwm_pwm1),
- INGENIC_PIN_GROUP("pwm2", jz4770_pwm_pwm2),
- INGENIC_PIN_GROUP("pwm3", jz4770_pwm_pwm3),
- INGENIC_PIN_GROUP("pwm4", jz4770_pwm_pwm4),
- INGENIC_PIN_GROUP("pwm5", jz4770_pwm_pwm5),
- INGENIC_PIN_GROUP("pwm6", jz4770_pwm_pwm6),
- INGENIC_PIN_GROUP("pwm7", jz4770_pwm_pwm7),
+ INGENIC_PIN_GROUP("pwm0", jz4770_pwm_pwm0, 0),
+ INGENIC_PIN_GROUP("pwm1", jz4770_pwm_pwm1, 0),
+ INGENIC_PIN_GROUP("pwm2", jz4770_pwm_pwm2, 0),
+ INGENIC_PIN_GROUP("pwm3", jz4770_pwm_pwm3, 0),
+ INGENIC_PIN_GROUP("pwm4", jz4770_pwm_pwm4, 0),
+ INGENIC_PIN_GROUP("pwm5", jz4770_pwm_pwm5, 0),
+ INGENIC_PIN_GROUP("pwm6", jz4770_pwm_pwm6, 0),
+ INGENIC_PIN_GROUP("pwm7", jz4770_pwm_pwm7, 0),
};
static const char *jz4780_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x26,
};
- static int x1000_uart0_data_funcs[] = { 0, 0, };
- static int x1000_uart0_hwflow_funcs[] = { 0, 0, };
- static int x1000_uart1_data_a_funcs[] = { 2, 2, };
- static int x1000_uart1_data_d_funcs[] = { 1, 1, };
- static int x1000_uart1_hwflow_funcs[] = { 1, 1, };
- static int x1000_uart2_data_a_funcs[] = { 2, 2, };
- static int x1000_uart2_data_d_funcs[] = { 0, 0, };
- static int x1000_sfc_funcs[] = { 1, 1, 1, 1, 1, 1, };
- static int x1000_ssi_dt_a_22_funcs[] = { 2, };
- static int x1000_ssi_dt_a_29_funcs[] = { 2, };
- static int x1000_ssi_dt_d_funcs[] = { 0, };
- static int x1000_ssi_dr_a_23_funcs[] = { 2, };
- static int x1000_ssi_dr_a_28_funcs[] = { 2, };
- static int x1000_ssi_dr_d_funcs[] = { 0, };
- static int x1000_ssi_clk_a_24_funcs[] = { 2, };
- static int x1000_ssi_clk_a_26_funcs[] = { 2, };
- static int x1000_ssi_clk_d_funcs[] = { 0, };
- static int x1000_ssi_gpc_a_20_funcs[] = { 2, };
- static int x1000_ssi_gpc_a_31_funcs[] = { 2, };
- static int x1000_ssi_ce0_a_25_funcs[] = { 2, };
- static int x1000_ssi_ce0_a_27_funcs[] = { 2, };
- static int x1000_ssi_ce0_d_funcs[] = { 0, };
- static int x1000_ssi_ce1_a_21_funcs[] = { 2, };
- static int x1000_ssi_ce1_a_30_funcs[] = { 2, };
- static int x1000_mmc0_1bit_funcs[] = { 1, 1, 1, };
- static int x1000_mmc0_4bit_funcs[] = { 1, 1, 1, };
- static int x1000_mmc0_8bit_funcs[] = { 1, 1, 1, 1, 1, };
- static int x1000_mmc1_1bit_funcs[] = { 0, 0, 0, };
- static int x1000_mmc1_4bit_funcs[] = { 0, 0, 0, };
- static int x1000_emc_8bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int x1000_emc_16bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
- static int x1000_emc_addr_funcs[] = {
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- };
- static int x1000_emc_rd_we_funcs[] = { 0, 0, };
- static int x1000_emc_wait_funcs[] = { 0, };
- static int x1000_emc_cs1_funcs[] = { 0, };
- static int x1000_emc_cs2_funcs[] = { 0, };
- static int x1000_i2c0_funcs[] = { 0, 0, };
- static int x1000_i2c1_a_funcs[] = { 2, 2, };
- static int x1000_i2c1_c_funcs[] = { 0, 0, };
- static int x1000_i2c2_funcs[] = { 1, 1, };
- static int x1000_i2s_data_tx_funcs[] = { 1, };
- static int x1000_i2s_data_rx_funcs[] = { 1, };
- static int x1000_i2s_clk_txrx_funcs[] = { 1, 1, };
- static int x1000_i2s_sysclk_funcs[] = { 1, };
- static int x1000_cim_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
- static int x1000_lcd_8bit_funcs[] = {
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- };
- static int x1000_lcd_16bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, };
- static int x1000_pwm_pwm0_funcs[] = { 0, };
- static int x1000_pwm_pwm1_funcs[] = { 1, };
- static int x1000_pwm_pwm2_funcs[] = { 1, };
- static int x1000_pwm_pwm3_funcs[] = { 2, };
- static int x1000_pwm_pwm4_funcs[] = { 0, };
- static int x1000_mac_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
-
static const struct group_desc x1000_groups[] = {
- INGENIC_PIN_GROUP("uart0-data", x1000_uart0_data),
- INGENIC_PIN_GROUP("uart0-hwflow", x1000_uart0_hwflow),
- INGENIC_PIN_GROUP("uart1-data-a", x1000_uart1_data_a),
- INGENIC_PIN_GROUP("uart1-data-d", x1000_uart1_data_d),
- INGENIC_PIN_GROUP("uart1-hwflow", x1000_uart1_hwflow),
- INGENIC_PIN_GROUP("uart2-data-a", x1000_uart2_data_a),
- INGENIC_PIN_GROUP("uart2-data-d", x1000_uart2_data_d),
- INGENIC_PIN_GROUP("sfc", x1000_sfc),
- INGENIC_PIN_GROUP("ssi-dt-a-22", x1000_ssi_dt_a_22),
- INGENIC_PIN_GROUP("ssi-dt-a-29", x1000_ssi_dt_a_29),
- INGENIC_PIN_GROUP("ssi-dt-d", x1000_ssi_dt_d),
- INGENIC_PIN_GROUP("ssi-dr-a-23", x1000_ssi_dr_a_23),
- INGENIC_PIN_GROUP("ssi-dr-a-28", x1000_ssi_dr_a_28),
- INGENIC_PIN_GROUP("ssi-dr-d", x1000_ssi_dr_d),
- INGENIC_PIN_GROUP("ssi-clk-a-24", x1000_ssi_clk_a_24),
- INGENIC_PIN_GROUP("ssi-clk-a-26", x1000_ssi_clk_a_26),
- INGENIC_PIN_GROUP("ssi-clk-d", x1000_ssi_clk_d),
- INGENIC_PIN_GROUP("ssi-gpc-a-20", x1000_ssi_gpc_a_20),
- INGENIC_PIN_GROUP("ssi-gpc-a-31", x1000_ssi_gpc_a_31),
- INGENIC_PIN_GROUP("ssi-ce0-a-25", x1000_ssi_ce0_a_25),
- INGENIC_PIN_GROUP("ssi-ce0-a-27", x1000_ssi_ce0_a_27),
- INGENIC_PIN_GROUP("ssi-ce0-d", x1000_ssi_ce0_d),
- INGENIC_PIN_GROUP("ssi-ce1-a-21", x1000_ssi_ce1_a_21),
- INGENIC_PIN_GROUP("ssi-ce1-a-30", x1000_ssi_ce1_a_30),
- INGENIC_PIN_GROUP("mmc0-1bit", x1000_mmc0_1bit),
- INGENIC_PIN_GROUP("mmc0-4bit", x1000_mmc0_4bit),
- INGENIC_PIN_GROUP("mmc0-8bit", x1000_mmc0_8bit),
- INGENIC_PIN_GROUP("mmc1-1bit", x1000_mmc1_1bit),
- INGENIC_PIN_GROUP("mmc1-4bit", x1000_mmc1_4bit),
- INGENIC_PIN_GROUP("emc-8bit-data", x1000_emc_8bit_data),
- INGENIC_PIN_GROUP("emc-16bit-data", x1000_emc_16bit_data),
- INGENIC_PIN_GROUP("emc-addr", x1000_emc_addr),
- INGENIC_PIN_GROUP("emc-rd-we", x1000_emc_rd_we),
- INGENIC_PIN_GROUP("emc-wait", x1000_emc_wait),
- INGENIC_PIN_GROUP("emc-cs1", x1000_emc_cs1),
- INGENIC_PIN_GROUP("emc-cs2", x1000_emc_cs2),
- INGENIC_PIN_GROUP("i2c0-data", x1000_i2c0),
- INGENIC_PIN_GROUP("i2c1-data-a", x1000_i2c1_a),
- INGENIC_PIN_GROUP("i2c1-data-c", x1000_i2c1_c),
- INGENIC_PIN_GROUP("i2c2-data", x1000_i2c2),
- INGENIC_PIN_GROUP("i2s-data-tx", x1000_i2s_data_tx),
- INGENIC_PIN_GROUP("i2s-data-rx", x1000_i2s_data_rx),
- INGENIC_PIN_GROUP("i2s-clk-txrx", x1000_i2s_clk_txrx),
- INGENIC_PIN_GROUP("i2s-sysclk", x1000_i2s_sysclk),
- INGENIC_PIN_GROUP("cim-data", x1000_cim),
- INGENIC_PIN_GROUP("lcd-8bit", x1000_lcd_8bit),
- INGENIC_PIN_GROUP("lcd-16bit", x1000_lcd_16bit),
+ INGENIC_PIN_GROUP("uart0-data", x1000_uart0_data, 0),
+ INGENIC_PIN_GROUP("uart0-hwflow", x1000_uart0_hwflow, 0),
+ INGENIC_PIN_GROUP("uart1-data-a", x1000_uart1_data_a, 2),
+ INGENIC_PIN_GROUP("uart1-data-d", x1000_uart1_data_d, 1),
+ INGENIC_PIN_GROUP("uart1-hwflow", x1000_uart1_hwflow, 1),
+ INGENIC_PIN_GROUP("uart2-data-a", x1000_uart2_data_a, 2),
+ INGENIC_PIN_GROUP("uart2-data-d", x1000_uart2_data_d, 0),
+ INGENIC_PIN_GROUP("sfc", x1000_sfc, 1),
+ INGENIC_PIN_GROUP("ssi-dt-a-22", x1000_ssi_dt_a_22, 2),
+ INGENIC_PIN_GROUP("ssi-dt-a-29", x1000_ssi_dt_a_29, 2),
+ INGENIC_PIN_GROUP("ssi-dt-d", x1000_ssi_dt_d, 0),
+ INGENIC_PIN_GROUP("ssi-dr-a-23", x1000_ssi_dr_a_23, 2),
+ INGENIC_PIN_GROUP("ssi-dr-a-28", x1000_ssi_dr_a_28, 2),
+ INGENIC_PIN_GROUP("ssi-dr-d", x1000_ssi_dr_d, 0),
+ INGENIC_PIN_GROUP("ssi-clk-a-24", x1000_ssi_clk_a_24, 2),
+ INGENIC_PIN_GROUP("ssi-clk-a-26", x1000_ssi_clk_a_26, 2),
+ INGENIC_PIN_GROUP("ssi-clk-d", x1000_ssi_clk_d, 0),
+ INGENIC_PIN_GROUP("ssi-gpc-a-20", x1000_ssi_gpc_a_20, 2),
+ INGENIC_PIN_GROUP("ssi-gpc-a-31", x1000_ssi_gpc_a_31, 2),
+ INGENIC_PIN_GROUP("ssi-ce0-a-25", x1000_ssi_ce0_a_25, 2),
+ INGENIC_PIN_GROUP("ssi-ce0-a-27", x1000_ssi_ce0_a_27, 2),
+ INGENIC_PIN_GROUP("ssi-ce0-d", x1000_ssi_ce0_d, 0),
+ INGENIC_PIN_GROUP("ssi-ce1-a-21", x1000_ssi_ce1_a_21, 2),
+ INGENIC_PIN_GROUP("ssi-ce1-a-30", x1000_ssi_ce1_a_30, 2),
+ INGENIC_PIN_GROUP("mmc0-1bit", x1000_mmc0_1bit, 1),
+ INGENIC_PIN_GROUP("mmc0-4bit", x1000_mmc0_4bit, 1),
+ INGENIC_PIN_GROUP("mmc0-8bit", x1000_mmc0_8bit, 1),
+ INGENIC_PIN_GROUP("mmc1-1bit", x1000_mmc1_1bit, 0),
+ INGENIC_PIN_GROUP("mmc1-4bit", x1000_mmc1_4bit, 0),
+ INGENIC_PIN_GROUP("emc-8bit-data", x1000_emc_8bit_data, 0),
+ INGENIC_PIN_GROUP("emc-16bit-data", x1000_emc_16bit_data, 0),
+ INGENIC_PIN_GROUP("emc-addr", x1000_emc_addr, 0),
+ INGENIC_PIN_GROUP("emc-rd-we", x1000_emc_rd_we, 0),
+ INGENIC_PIN_GROUP("emc-wait", x1000_emc_wait, 0),
+ INGENIC_PIN_GROUP("emc-cs1", x1000_emc_cs1, 0),
+ INGENIC_PIN_GROUP("emc-cs2", x1000_emc_cs2, 0),
+ INGENIC_PIN_GROUP("i2c0-data", x1000_i2c0, 0),
+ INGENIC_PIN_GROUP("i2c1-data-a", x1000_i2c1_a, 2),
+ INGENIC_PIN_GROUP("i2c1-data-c", x1000_i2c1_c, 0),
+ INGENIC_PIN_GROUP("i2c2-data", x1000_i2c2, 1),
+ INGENIC_PIN_GROUP("i2s-data-tx", x1000_i2s_data_tx, 1),
+ INGENIC_PIN_GROUP("i2s-data-rx", x1000_i2s_data_rx, 1),
+ INGENIC_PIN_GROUP("i2s-clk-txrx", x1000_i2s_clk_txrx, 1),
+ INGENIC_PIN_GROUP("i2s-sysclk", x1000_i2s_sysclk, 1),
+ INGENIC_PIN_GROUP("cim-data", x1000_cim, 2),
+ INGENIC_PIN_GROUP("lcd-8bit", x1000_lcd_8bit, 1),
+ INGENIC_PIN_GROUP("lcd-16bit", x1000_lcd_16bit, 1),
{ "lcd-no-pins", },
- INGENIC_PIN_GROUP("pwm0", x1000_pwm_pwm0),
- INGENIC_PIN_GROUP("pwm1", x1000_pwm_pwm1),
- INGENIC_PIN_GROUP("pwm2", x1000_pwm_pwm2),
- INGENIC_PIN_GROUP("pwm3", x1000_pwm_pwm3),
- INGENIC_PIN_GROUP("pwm4", x1000_pwm_pwm4),
- INGENIC_PIN_GROUP("mac", x1000_mac),
+ INGENIC_PIN_GROUP("pwm0", x1000_pwm_pwm0, 0),
+ INGENIC_PIN_GROUP("pwm1", x1000_pwm_pwm1, 1),
+ INGENIC_PIN_GROUP("pwm2", x1000_pwm_pwm2, 1),
+ INGENIC_PIN_GROUP("pwm3", x1000_pwm_pwm3, 2),
+ INGENIC_PIN_GROUP("pwm4", x1000_pwm_pwm4, 0),
+ INGENIC_PIN_GROUP("mac", x1000_mac, 1),
};
static const char *x1000_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
static int x1500_pwm_pwm3_pins[] = { 0x26, };
static int x1500_pwm_pwm4_pins[] = { 0x58, };
- static int x1500_uart0_data_funcs[] = { 0, 0, };
- static int x1500_uart0_hwflow_funcs[] = { 0, 0, };
- static int x1500_uart1_data_a_funcs[] = { 2, 2, };
- static int x1500_uart1_data_d_funcs[] = { 1, 1, };
- static int x1500_uart1_hwflow_funcs[] = { 1, 1, };
- static int x1500_uart2_data_a_funcs[] = { 2, 2, };
- static int x1500_uart2_data_d_funcs[] = { 0, 0, };
- static int x1500_mmc_1bit_funcs[] = { 1, 1, 1, };
- static int x1500_mmc_4bit_funcs[] = { 1, 1, 1, };
- static int x1500_i2c0_funcs[] = { 0, 0, };
- static int x1500_i2c1_a_funcs[] = { 2, 2, };
- static int x1500_i2c1_c_funcs[] = { 0, 0, };
- static int x1500_i2c2_funcs[] = { 1, 1, };
- static int x1500_i2s_data_tx_funcs[] = { 1, };
- static int x1500_i2s_data_rx_funcs[] = { 1, };
- static int x1500_i2s_clk_txrx_funcs[] = { 1, 1, };
- static int x1500_i2s_sysclk_funcs[] = { 1, };
- static int x1500_cim_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
- static int x1500_pwm_pwm0_funcs[] = { 0, };
- static int x1500_pwm_pwm1_funcs[] = { 1, };
- static int x1500_pwm_pwm2_funcs[] = { 1, };
- static int x1500_pwm_pwm3_funcs[] = { 2, };
- static int x1500_pwm_pwm4_funcs[] = { 0, };
-
static const struct group_desc x1500_groups[] = {
- INGENIC_PIN_GROUP("uart0-data", x1500_uart0_data),
- INGENIC_PIN_GROUP("uart0-hwflow", x1500_uart0_hwflow),
- INGENIC_PIN_GROUP("uart1-data-a", x1500_uart1_data_a),
- INGENIC_PIN_GROUP("uart1-data-d", x1500_uart1_data_d),
- INGENIC_PIN_GROUP("uart1-hwflow", x1500_uart1_hwflow),
- INGENIC_PIN_GROUP("uart2-data-a", x1500_uart2_data_a),
- INGENIC_PIN_GROUP("uart2-data-d", x1500_uart2_data_d),
- INGENIC_PIN_GROUP("sfc", x1000_sfc),
- INGENIC_PIN_GROUP("mmc-1bit", x1500_mmc_1bit),
- INGENIC_PIN_GROUP("mmc-4bit", x1500_mmc_4bit),
- INGENIC_PIN_GROUP("i2c0-data", x1500_i2c0),
- INGENIC_PIN_GROUP("i2c1-data-a", x1500_i2c1_a),
- INGENIC_PIN_GROUP("i2c1-data-c", x1500_i2c1_c),
- INGENIC_PIN_GROUP("i2c2-data", x1500_i2c2),
- INGENIC_PIN_GROUP("i2s-data-tx", x1500_i2s_data_tx),
- INGENIC_PIN_GROUP("i2s-data-rx", x1500_i2s_data_rx),
- INGENIC_PIN_GROUP("i2s-clk-txrx", x1500_i2s_clk_txrx),
- INGENIC_PIN_GROUP("i2s-sysclk", x1500_i2s_sysclk),
- INGENIC_PIN_GROUP("cim-data", x1500_cim),
+ INGENIC_PIN_GROUP("uart0-data", x1500_uart0_data, 0),
+ INGENIC_PIN_GROUP("uart0-hwflow", x1500_uart0_hwflow, 0),
+ INGENIC_PIN_GROUP("uart1-data-a", x1500_uart1_data_a, 2),
+ INGENIC_PIN_GROUP("uart1-data-d", x1500_uart1_data_d, 1),
+ INGENIC_PIN_GROUP("uart1-hwflow", x1500_uart1_hwflow, 1),
+ INGENIC_PIN_GROUP("uart2-data-a", x1500_uart2_data_a, 2),
+ INGENIC_PIN_GROUP("uart2-data-d", x1500_uart2_data_d, 0),
+ INGENIC_PIN_GROUP("sfc", x1000_sfc, 1),
+ INGENIC_PIN_GROUP("mmc-1bit", x1500_mmc_1bit, 1),
+ INGENIC_PIN_GROUP("mmc-4bit", x1500_mmc_4bit, 1),
+ INGENIC_PIN_GROUP("i2c0-data", x1500_i2c0, 0),
+ INGENIC_PIN_GROUP("i2c1-data-a", x1500_i2c1_a, 2),
+ INGENIC_PIN_GROUP("i2c1-data-c", x1500_i2c1_c, 0),
+ INGENIC_PIN_GROUP("i2c2-data", x1500_i2c2, 1),
+ INGENIC_PIN_GROUP("i2s-data-tx", x1500_i2s_data_tx, 1),
+ INGENIC_PIN_GROUP("i2s-data-rx", x1500_i2s_data_rx, 1),
+ INGENIC_PIN_GROUP("i2s-clk-txrx", x1500_i2s_clk_txrx, 1),
+ INGENIC_PIN_GROUP("i2s-sysclk", x1500_i2s_sysclk, 1),
+ INGENIC_PIN_GROUP("cim-data", x1500_cim, 2),
{ "lcd-no-pins", },
- INGENIC_PIN_GROUP("pwm0", x1500_pwm_pwm0),
- INGENIC_PIN_GROUP("pwm1", x1500_pwm_pwm1),
- INGENIC_PIN_GROUP("pwm2", x1500_pwm_pwm2),
- INGENIC_PIN_GROUP("pwm3", x1500_pwm_pwm3),
- INGENIC_PIN_GROUP("pwm4", x1500_pwm_pwm4),
+ INGENIC_PIN_GROUP("pwm0", x1500_pwm_pwm0, 0),
+ INGENIC_PIN_GROUP("pwm1", x1500_pwm_pwm1, 1),
+ INGENIC_PIN_GROUP("pwm2", x1500_pwm_pwm2, 1),
+ INGENIC_PIN_GROUP("pwm3", x1500_pwm_pwm3, 2),
+ INGENIC_PIN_GROUP("pwm4", x1500_pwm_pwm4, 0),
};
static const char *x1500_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
0x29, 0x30, 0x2f, 0x28, 0x2e, 0x2d, 0x2a, 0x2b, 0x26, 0x27,
};
- static int x1830_uart0_data_funcs[] = { 0, 0, };
- static int x1830_uart0_hwflow_funcs[] = { 0, 0, };
- static int x1830_uart1_data_funcs[] = { 0, 0, };
- static int x1830_sfc_funcs[] = { 1, 1, 1, 1, 1, 1, };
- static int x1830_ssi0_dt_funcs[] = { 0, };
- static int x1830_ssi0_dr_funcs[] = { 0, };
- static int x1830_ssi0_clk_funcs[] = { 0, };
- static int x1830_ssi0_gpc_funcs[] = { 0, };
- static int x1830_ssi0_ce0_funcs[] = { 0, };
- static int x1830_ssi0_ce1_funcs[] = { 0, };
- static int x1830_ssi1_dt_c_funcs[] = { 1, };
- static int x1830_ssi1_dr_c_funcs[] = { 1, };
- static int x1830_ssi1_clk_c_funcs[] = { 1, };
- static int x1830_ssi1_gpc_c_funcs[] = { 1, };
- static int x1830_ssi1_ce0_c_funcs[] = { 1, };
- static int x1830_ssi1_ce1_c_funcs[] = { 1, };
- static int x1830_ssi1_dt_d_funcs[] = { 2, };
- static int x1830_ssi1_dr_d_funcs[] = { 2, };
- static int x1830_ssi1_clk_d_funcs[] = { 2, };
- static int x1830_ssi1_gpc_d_funcs[] = { 2, };
- static int x1830_ssi1_ce0_d_funcs[] = { 2, };
- static int x1830_ssi1_ce1_d_funcs[] = { 2, };
- static int x1830_mmc0_1bit_funcs[] = { 0, 0, 0, };
- static int x1830_mmc0_4bit_funcs[] = { 0, 0, 0, };
- static int x1830_mmc1_1bit_funcs[] = { 0, 0, 0, };
- static int x1830_mmc1_4bit_funcs[] = { 0, 0, 0, };
- static int x1830_i2c0_funcs[] = { 1, 1, };
- static int x1830_i2c1_funcs[] = { 0, 0, };
- static int x1830_i2c2_funcs[] = { 1, 1, };
- static int x1830_i2s_data_tx_funcs[] = { 0, };
- static int x1830_i2s_data_rx_funcs[] = { 0, };
- static int x1830_i2s_clk_txrx_funcs[] = { 0, 0, };
- static int x1830_i2s_clk_rx_funcs[] = { 0, 0, };
- static int x1830_i2s_sysclk_funcs[] = { 0, };
- static int x1830_lcd_rgb_18bit_funcs[] = {
- 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0,
- };
- static int x1830_lcd_slcd_8bit_funcs[] = {
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- };
- static int x1830_lcd_slcd_16bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, };
- static int x1830_pwm_pwm0_b_funcs[] = { 0, };
- static int x1830_pwm_pwm0_c_funcs[] = { 1, };
- static int x1830_pwm_pwm1_b_funcs[] = { 0, };
- static int x1830_pwm_pwm1_c_funcs[] = { 1, };
- static int x1830_pwm_pwm2_c_8_funcs[] = { 0, };
- static int x1830_pwm_pwm2_c_13_funcs[] = { 1, };
- static int x1830_pwm_pwm3_c_9_funcs[] = { 0, };
- static int x1830_pwm_pwm3_c_14_funcs[] = { 1, };
- static int x1830_pwm_pwm4_c_15_funcs[] = { 1, };
- static int x1830_pwm_pwm4_c_25_funcs[] = { 0, };
- static int x1830_pwm_pwm5_c_16_funcs[] = { 1, };
- static int x1830_pwm_pwm5_c_26_funcs[] = { 0, };
- static int x1830_pwm_pwm6_c_17_funcs[] = { 1, };
- static int x1830_pwm_pwm6_c_27_funcs[] = { 0, };
- static int x1830_pwm_pwm7_c_18_funcs[] = { 1, };
- static int x1830_pwm_pwm7_c_28_funcs[] = { 0, };
- static int x1830_mac_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
-
static const struct group_desc x1830_groups[] = {
- INGENIC_PIN_GROUP("uart0-data", x1830_uart0_data),
- INGENIC_PIN_GROUP("uart0-hwflow", x1830_uart0_hwflow),
- INGENIC_PIN_GROUP("uart1-data", x1830_uart1_data),
- INGENIC_PIN_GROUP("sfc", x1830_sfc),
- INGENIC_PIN_GROUP("ssi0-dt", x1830_ssi0_dt),
- INGENIC_PIN_GROUP("ssi0-dr", x1830_ssi0_dr),
- INGENIC_PIN_GROUP("ssi0-clk", x1830_ssi0_clk),
- INGENIC_PIN_GROUP("ssi0-gpc", x1830_ssi0_gpc),
- INGENIC_PIN_GROUP("ssi0-ce0", x1830_ssi0_ce0),
- INGENIC_PIN_GROUP("ssi0-ce1", x1830_ssi0_ce1),
- INGENIC_PIN_GROUP("ssi1-dt-c", x1830_ssi1_dt_c),
- INGENIC_PIN_GROUP("ssi1-dr-c", x1830_ssi1_dr_c),
- INGENIC_PIN_GROUP("ssi1-clk-c", x1830_ssi1_clk_c),
- INGENIC_PIN_GROUP("ssi1-gpc-c", x1830_ssi1_gpc_c),
- INGENIC_PIN_GROUP("ssi1-ce0-c", x1830_ssi1_ce0_c),
- INGENIC_PIN_GROUP("ssi1-ce1-c", x1830_ssi1_ce1_c),
- INGENIC_PIN_GROUP("ssi1-dt-d", x1830_ssi1_dt_d),
- INGENIC_PIN_GROUP("ssi1-dr-d", x1830_ssi1_dr_d),
- INGENIC_PIN_GROUP("ssi1-clk-d", x1830_ssi1_clk_d),
- INGENIC_PIN_GROUP("ssi1-gpc-d", x1830_ssi1_gpc_d),
- INGENIC_PIN_GROUP("ssi1-ce0-d", x1830_ssi1_ce0_d),
- INGENIC_PIN_GROUP("ssi1-ce1-d", x1830_ssi1_ce1_d),
- INGENIC_PIN_GROUP("mmc0-1bit", x1830_mmc0_1bit),
- INGENIC_PIN_GROUP("mmc0-4bit", x1830_mmc0_4bit),
- INGENIC_PIN_GROUP("mmc1-1bit", x1830_mmc1_1bit),
- INGENIC_PIN_GROUP("mmc1-4bit", x1830_mmc1_4bit),
- INGENIC_PIN_GROUP("i2c0-data", x1830_i2c0),
- INGENIC_PIN_GROUP("i2c1-data", x1830_i2c1),
- INGENIC_PIN_GROUP("i2c2-data", x1830_i2c2),
- INGENIC_PIN_GROUP("i2s-data-tx", x1830_i2s_data_tx),
- INGENIC_PIN_GROUP("i2s-data-rx", x1830_i2s_data_rx),
- INGENIC_PIN_GROUP("i2s-clk-txrx", x1830_i2s_clk_txrx),
- INGENIC_PIN_GROUP("i2s-clk-rx", x1830_i2s_clk_rx),
- INGENIC_PIN_GROUP("i2s-sysclk", x1830_i2s_sysclk),
- INGENIC_PIN_GROUP("lcd-rgb-18bit", x1830_lcd_rgb_18bit),
- INGENIC_PIN_GROUP("lcd-slcd-8bit", x1830_lcd_slcd_8bit),
- INGENIC_PIN_GROUP("lcd-slcd-16bit", x1830_lcd_slcd_16bit),
+ INGENIC_PIN_GROUP("uart0-data", x1830_uart0_data, 0),
+ INGENIC_PIN_GROUP("uart0-hwflow", x1830_uart0_hwflow, 0),
+ INGENIC_PIN_GROUP("uart1-data", x1830_uart1_data, 0),
+ INGENIC_PIN_GROUP("sfc", x1830_sfc, 1),
+ INGENIC_PIN_GROUP("ssi0-dt", x1830_ssi0_dt, 0),
+ INGENIC_PIN_GROUP("ssi0-dr", x1830_ssi0_dr, 0),
+ INGENIC_PIN_GROUP("ssi0-clk", x1830_ssi0_clk, 0),
+ INGENIC_PIN_GROUP("ssi0-gpc", x1830_ssi0_gpc, 0),
+ INGENIC_PIN_GROUP("ssi0-ce0", x1830_ssi0_ce0, 0),
+ INGENIC_PIN_GROUP("ssi0-ce1", x1830_ssi0_ce1, 0),
+ INGENIC_PIN_GROUP("ssi1-dt-c", x1830_ssi1_dt_c, 1),
+ INGENIC_PIN_GROUP("ssi1-dr-c", x1830_ssi1_dr_c, 1),
+ INGENIC_PIN_GROUP("ssi1-clk-c", x1830_ssi1_clk_c, 1),
+ INGENIC_PIN_GROUP("ssi1-gpc-c", x1830_ssi1_gpc_c, 1),
+ INGENIC_PIN_GROUP("ssi1-ce0-c", x1830_ssi1_ce0_c, 1),
+ INGENIC_PIN_GROUP("ssi1-ce1-c", x1830_ssi1_ce1_c, 1),
+ INGENIC_PIN_GROUP("ssi1-dt-d", x1830_ssi1_dt_d, 2),
+ INGENIC_PIN_GROUP("ssi1-dr-d", x1830_ssi1_dr_d, 2),
+ INGENIC_PIN_GROUP("ssi1-clk-d", x1830_ssi1_clk_d, 2),
+ INGENIC_PIN_GROUP("ssi1-gpc-d", x1830_ssi1_gpc_d, 2),
+ INGENIC_PIN_GROUP("ssi1-ce0-d", x1830_ssi1_ce0_d, 2),
+ INGENIC_PIN_GROUP("ssi1-ce1-d", x1830_ssi1_ce1_d, 2),
+ INGENIC_PIN_GROUP("mmc0-1bit", x1830_mmc0_1bit, 0),
+ INGENIC_PIN_GROUP("mmc0-4bit", x1830_mmc0_4bit, 0),
+ INGENIC_PIN_GROUP("mmc1-1bit", x1830_mmc1_1bit, 0),
+ INGENIC_PIN_GROUP("mmc1-4bit", x1830_mmc1_4bit, 0),
+ INGENIC_PIN_GROUP("i2c0-data", x1830_i2c0, 1),
+ INGENIC_PIN_GROUP("i2c1-data", x1830_i2c1, 0),
+ INGENIC_PIN_GROUP("i2c2-data", x1830_i2c2, 1),
+ INGENIC_PIN_GROUP("i2s-data-tx", x1830_i2s_data_tx, 0),
+ INGENIC_PIN_GROUP("i2s-data-rx", x1830_i2s_data_rx, 0),
+ INGENIC_PIN_GROUP("i2s-clk-txrx", x1830_i2s_clk_txrx, 0),
+ INGENIC_PIN_GROUP("i2s-clk-rx", x1830_i2s_clk_rx, 0),
+ INGENIC_PIN_GROUP("i2s-sysclk", x1830_i2s_sysclk, 0),
+ INGENIC_PIN_GROUP("lcd-rgb-18bit", x1830_lcd_rgb_18bit, 0),
+ INGENIC_PIN_GROUP("lcd-slcd-8bit", x1830_lcd_slcd_8bit, 1),
+ INGENIC_PIN_GROUP("lcd-slcd-16bit", x1830_lcd_slcd_16bit, 1),
{ "lcd-no-pins", },
- INGENIC_PIN_GROUP("pwm0-b", x1830_pwm_pwm0_b),
- INGENIC_PIN_GROUP("pwm0-c", x1830_pwm_pwm0_c),
- INGENIC_PIN_GROUP("pwm1-b", x1830_pwm_pwm1_b),
- INGENIC_PIN_GROUP("pwm1-c", x1830_pwm_pwm1_c),
- INGENIC_PIN_GROUP("pwm2-c-8", x1830_pwm_pwm2_c_8),
- INGENIC_PIN_GROUP("pwm2-c-13", x1830_pwm_pwm2_c_13),
- INGENIC_PIN_GROUP("pwm3-c-9", x1830_pwm_pwm3_c_9),
- INGENIC_PIN_GROUP("pwm3-c-14", x1830_pwm_pwm3_c_14),
- INGENIC_PIN_GROUP("pwm4-c-15", x1830_pwm_pwm4_c_15),
- INGENIC_PIN_GROUP("pwm4-c-25", x1830_pwm_pwm4_c_25),
- INGENIC_PIN_GROUP("pwm5-c-16", x1830_pwm_pwm5_c_16),
- INGENIC_PIN_GROUP("pwm5-c-26", x1830_pwm_pwm5_c_26),
- INGENIC_PIN_GROUP("pwm6-c-17", x1830_pwm_pwm6_c_17),
- INGENIC_PIN_GROUP("pwm6-c-27", x1830_pwm_pwm6_c_27),
- INGENIC_PIN_GROUP("pwm7-c-18", x1830_pwm_pwm7_c_18),
- INGENIC_PIN_GROUP("pwm7-c-28", x1830_pwm_pwm7_c_28),
- INGENIC_PIN_GROUP("mac", x1830_mac),
+ INGENIC_PIN_GROUP("pwm0-b", x1830_pwm_pwm0_b, 0),
+ INGENIC_PIN_GROUP("pwm0-c", x1830_pwm_pwm0_c, 1),
+ INGENIC_PIN_GROUP("pwm1-b", x1830_pwm_pwm1_b, 0),
+ INGENIC_PIN_GROUP("pwm1-c", x1830_pwm_pwm1_c, 1),
+ INGENIC_PIN_GROUP("pwm2-c-8", x1830_pwm_pwm2_c_8, 0),
+ INGENIC_PIN_GROUP("pwm2-c-13", x1830_pwm_pwm2_c_13, 1),
+ INGENIC_PIN_GROUP("pwm3-c-9", x1830_pwm_pwm3_c_9, 0),
+ INGENIC_PIN_GROUP("pwm3-c-14", x1830_pwm_pwm3_c_14, 1),
+ INGENIC_PIN_GROUP("pwm4-c-15", x1830_pwm_pwm4_c_15, 1),
+ INGENIC_PIN_GROUP("pwm4-c-25", x1830_pwm_pwm4_c_25, 0),
+ INGENIC_PIN_GROUP("pwm5-c-16", x1830_pwm_pwm5_c_16, 1),
+ INGENIC_PIN_GROUP("pwm5-c-26", x1830_pwm_pwm5_c_26, 0),
+ INGENIC_PIN_GROUP("pwm6-c-17", x1830_pwm_pwm6_c_17, 1),
+ INGENIC_PIN_GROUP("pwm6-c-27", x1830_pwm_pwm6_c_27, 0),
+ INGENIC_PIN_GROUP("pwm7-c-18", x1830_pwm_pwm7_c_18, 1),
+ INGENIC_PIN_GROUP("pwm7-c-28", x1830_pwm_pwm7_c_28, 0),
+ INGENIC_PIN_GROUP("mac", x1830_mac, 0),
};
static const char *x1830_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
struct function_desc *func;
struct group_desc *grp;
unsigned int i;
+ uintptr_t mode;
+ u8 *pin_modes;
func = pinmux_generic_get_function(pctldev, selector);
if (!func)
dev_dbg(pctldev->dev, "enable function %s group %s\n",
func->name, grp->name);
- for (i = 0; i < grp->num_pins; i++) {
- int *pin_modes = grp->data;
+ mode = (uintptr_t)grp->data;
+ if (mode <= 3) {
+ for (i = 0; i < grp->num_pins; i++)
+ ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], mode);
+ } else {
+ pin_modes = grp->data;
- ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], pin_modes[i]);
+ for (i = 0; i < grp->num_pins; i++)
+ ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], pin_modes[i]);
}
return 0;