drm/amdgpu: Update RAS XGMI Error Query

Resolve bug querying error on unsupported ASIC

Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: John Clements <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index dda4f0c5c4e72caf5c749b92825a75616d80b8f1..e2a8dfea003c71de07421bee5feb42a44e401ffa 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -848,7 +848,6 @@ static int amdgpu_xgmi_query_ras_error_count(struct amdgpu_device *adev,
                }
                break;
        case CHIP_VEGA20:
                }
                break;
        case CHIP_VEGA20:

-       default:

                /* check xgmi pcs error */
                for (i = 0; i < ARRAY_SIZE(xgmi_pcs_err_status_reg_vg20); i++) {
                        data = RREG32_PCIE(xgmi_pcs_err_status_reg_vg20[i]);
                /* check xgmi pcs error */
                for (i = 0; i < ARRAY_SIZE(xgmi_pcs_err_status_reg_vg20); i++) {
                        data = RREG32_PCIE(xgmi_pcs_err_status_reg_vg20[i]);


@@ -864,6 +863,9 @@ static int amdgpu_xgmi_query_ras_error_count(struct amdgpu_device *adev,
                                                data, &ue_cnt, &ce_cnt, false);
                }
                break;
                                                data, &ue_cnt, &ce_cnt, false);
                }
                break;

+       default:
+               dev_warn(adev->dev, "XGMI RAS error query not supported");
+               break;

        }
 
        adev->gmc.xgmi.ras_funcs->reset_ras_error_count(adev);
        }
 
        adev->gmc.xgmi.ras_funcs->reset_ras_error_count(adev);