spi: microchip-core-qspi: fix setting spi bus clock rate

Before ORing the new clock rate with the control register value read
from the hardware, the existing clock rate needs to be masked off as
otherwise the existing value will interfere with the new one.

CC: [email protected]
Fixes: 8596124c4c1b ("spi: microchip-core-qspi: Add support for microchip fpga qspi controllers")
Signed-off-by: Conor Dooley <[email protected]>
Reviewed-by: Tudor Ambarus <[email protected]>
Link: https://lore.kernel.org/r/20240508-fox-unpiloted-b97e1535627b@spud
Signed-off-by: Mark Brown <[email protected]>

diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c
index 03d125a71fd996071c7de9ccf4c576a31d6f95bd..09f16471c53757f8144e0429f041dd66df5e1be8 100644 (file)
--- a/drivers/spi/spi-microchip-core-qspi.c
+++ b/drivers/spi/spi-microchip-core-qspi.c
@@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi
        }
 
        control = readl_relaxed(qspi->regs + REG_CONTROL);
+       control &= ~CONTROL_CLKRATE_MASK;
        control |= baud_rate_val << CONTROL_CLKRATE_SHIFT;
        writel_relaxed(control, qspi->regs + REG_CONTROL);
        control = readl_relaxed(qspi->regs + REG_CONTROL);