drm/amd/display: [FW Promotion] Release 0.0.241.0

- Add DPCS health check
- Update USB4 PHY SSC
- Fix FAMS2 SubVP Close to VBlank changes
- Create VESA Aux-based backlight control path
- Fix PSR1 CRC error during CTS test

Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Taimur Hassan <[email protected]>
Signed-off-by: Zaeem Mohamed <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 3aa6c60588b5f5be40c5a8fb8cdbf8e4254268b2..a9b90fa00b88ad6d628ebbbf17d41efe0e61df93 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -495,6 +495,7 @@ struct dmub_feature_caps {
        uint8_t gecc_enable;
        uint8_t replay_supported;
        uint8_t replay_reserved[3];
+       uint8_t abm_aux_backlight_support;
 };
 
 struct dmub_visual_confirm_color {
@@ -754,7 +755,7 @@ union dmub_shared_state_ips_driver_signals {
                uint32_t allow_ips1 : 1; /**< 1 is IPS1 is allowed */
                uint32_t allow_ips2 : 1; /**< 1 is IPS1 is allowed */
                uint32_t allow_z10 : 1; /**< 1 if Z10 is allowed */
-               uint32_t allow_idle : 1; /**< 1 if driver is allowing idle */
+               uint32_t allow_idle: 1; /**< 1 if driver is allowing idle */
                uint32_t reserved_bits : 27; /**< Reversed bits */
        } bits;
        uint32_t all;
@@ -4460,9 +4461,9 @@ struct dmub_cmd_abm_set_backlight_data {
        uint8_t backlight_control_type;
 
        /**
-        * Explicit padding to 4 byte boundary.
+        * AUX HW instance.
         */
-       uint8_t pad[1];
+       uint8_t aux_inst;
 
        /**
         * Minimum luminance in nits.