platform/x86:intel/pmc: Enable the ACPI PM Timer to be turned off when suspended

Allow to disable ACPI PM Timer on suspend and enable on resume. A
disabled timer helps optimise power consumption when the system is
suspended. On resume the timer is only reactivated if it was activated
prior to suspend, so unless the ACPI PM timer is enabled in the BIOS,
this won't change anything.

The ACPI PM timer is used by Intel's iTCO/wdat_wdt watchdog to drive the
watchdog, so it doesn't need to run during suspend.

Signed-off-by: Marek Maslanka <[email protected]>
Reviewed-by: Hans de Goede <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Daniel Lezcano <[email protected]>

diff --git a/drivers/platform/x86/intel/pmc/adl.c b/drivers/platform/x86/intel/pmc/adl.c
index e7878558fd9090140e6de7c6ce192e8419eb5306..9d9c07f44ff61c001eafdc5c6def48b1402cbdfa 100644 (file)
--- a/drivers/platform/x86/intel/pmc/adl.c
+++ b/drivers/platform/x86/intel/pmc/adl.c
@@ -295,6 +295,8 @@ const struct pmc_reg_map adl_reg_map = {
        .ppfear_buckets = CNP_PPFEAR_NUM_ENTRIES,
        .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
        .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
+       .acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET,
+       .acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE,
        .ltr_ignore_max = ADL_NUM_IP_IGN_ALLOWED,
        .lpm_num_modes = ADL_LPM_NUM_MODES,
        .lpm_num_maps = ADL_LPM_NUM_MAPS,

diff --git a/drivers/platform/x86/intel/pmc/cnp.c b/drivers/platform/x86/intel/pmc/cnp.c
index dd72974bf71e2abe248a1f1b671a45756ad61288..513c02670c5aa97fde095f59eb123e51eccab9f2 100644 (file)
--- a/drivers/platform/x86/intel/pmc/cnp.c
+++ b/drivers/platform/x86/intel/pmc/cnp.c
@@ -200,6 +200,8 @@ const struct pmc_reg_map cnp_reg_map = {
        .ppfear_buckets = CNP_PPFEAR_NUM_ENTRIES,
        .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
        .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
+       .acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET,
+       .acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE,
        .ltr_ignore_max = CNP_NUM_IP_IGN_ALLOWED,
        .etr3_offset = ETR3_OFFSET,
 };

diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
index 01ae71c6df59d398df0b3a115c8188a871e04d30..c91c753b120e1636b88caef2de74dc2619ea44fc 100644 (file)
--- a/drivers/platform/x86/intel/pmc/core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -11,6 +11,7 @@
 
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
+#include <linux/acpi_pmtmr.h>
 #include <linux/bitfield.h>
 #include <linux/debugfs.h>
 #include <linux/delay.h>
@@ -1208,6 +1209,38 @@ static bool pmc_core_is_pson_residency_enabled(struct pmc_dev *pmcdev)
        return val == 1;
 }
 
+/**
+ * Enable or disable ACPI PM Timer
+ *
+ * This function is intended to be a callback for ACPI PM suspend/resume event.
+ * The ACPI PM Timer is enabled on resume only if it was enabled during suspend.
+ */
+static void pmc_core_acpi_pm_timer_suspend_resume(void *data, bool suspend)
+{
+       struct pmc_dev *pmcdev = data;
+       struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN];
+       const struct pmc_reg_map *map = pmc->map;
+       bool enabled;
+       u32 reg;
+
+       if (!map->acpi_pm_tmr_ctl_offset)
+               return;
+
+       guard(mutex)(&pmcdev->lock);
+
+       if (!suspend && !pmcdev->enable_acpi_pm_timer_on_resume)
+               return;
+
+       reg = pmc_core_reg_read(pmc, map->acpi_pm_tmr_ctl_offset);
+       enabled = !(reg & map->acpi_pm_tmr_disable_bit);
+       if (suspend)
+               reg |= map->acpi_pm_tmr_disable_bit;
+       else
+               reg &= ~map->acpi_pm_tmr_disable_bit;
+       pmc_core_reg_write(pmc, map->acpi_pm_tmr_ctl_offset, reg);
+
+       pmcdev->enable_acpi_pm_timer_on_resume = suspend && enabled;
+}
 
 static void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev)
 {
@@ -1404,6 +1437,7 @@ static int pmc_core_probe(struct platform_device *pdev)
        struct pmc_dev *pmcdev;
        const struct x86_cpu_id *cpu_id;
        int (*core_init)(struct pmc_dev *pmcdev);
+       const struct pmc_reg_map *map;
        struct pmc *primary_pmc;
        int ret;
 
@@ -1462,6 +1496,11 @@ static int pmc_core_probe(struct platform_device *pdev)
        pm_report_max_hw_sleep(FIELD_MAX(SLP_S0_RES_COUNTER_MASK) *
                               pmc_core_adjust_slp_s0_step(primary_pmc, 1));
 
+       map = primary_pmc->map;
+       if (map->acpi_pm_tmr_ctl_offset)
+               acpi_pmtmr_register_suspend_resume_callback(pmc_core_acpi_pm_timer_suspend_resume,
+                                                        pmcdev);
+
        device_initialized = true;
        dev_info(&pdev->dev, " initialized\n");
 
@@ -1471,6 +1510,12 @@ static int pmc_core_probe(struct platform_device *pdev)
 static void pmc_core_remove(struct platform_device *pdev)
 {
        struct pmc_dev *pmcdev = platform_get_drvdata(pdev);
+       const struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN];
+       const struct pmc_reg_map *map = pmc->map;
+
+       if (map->acpi_pm_tmr_ctl_offset)
+               acpi_pmtmr_unregister_suspend_resume_callback();
+
        pmc_core_dbgfs_unregister(pmcdev);
        pmc_core_clean_structure(pdev);
 }

diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index ea04de7eb9e846b65d5029fda7efc09480198ea0..4d37ef7113d74f56116e6fe326702187db8d1412 100644 (file)
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -68,6 +68,8 @@ struct telem_endpoint;
 #define SPT_PMC_LTR_SCC                                0x3A0
 #define SPT_PMC_LTR_ISH                                0x3A4
 
+#define SPT_PMC_ACPI_PM_TMR_CTL_OFFSET         0x18FC
+
 /* Sunrise Point: PGD PFET Enable Ack Status Registers */
 enum ppfear_regs {
        SPT_PMC_XRAM_PPFEAR0A = 0x590,
@@ -148,6 +150,8 @@ enum ppfear_regs {
 #define SPT_PMC_VRIC1_SLPS0LVEN                        BIT(13)
 #define SPT_PMC_VRIC1_XTALSDQDIS               BIT(22)
 
+#define SPT_PMC_BIT_ACPI_PM_TMR_DISABLE                BIT(1)
+
 /* Cannonlake Power Management Controller register offsets */
 #define CNP_PMC_SLPS0_DBG_OFFSET               0x10B4
 #define CNP_PMC_PM_CFG_OFFSET                  0x1818
@@ -351,6 +355,8 @@ struct pmc_reg_map {
        const u8  *lpm_reg_index;
        const u32 pson_residency_offset;
        const u32 pson_residency_counter_step;
+       const u32 acpi_pm_tmr_ctl_offset;
+       const u32 acpi_pm_tmr_disable_bit;
 };
 
 /**
@@ -424,6 +430,8 @@ struct pmc_dev {
        u32 die_c6_offset;
        struct telem_endpoint *punit_ep;
        struct pmc_info *regmap_list;
+
+       bool enable_acpi_pm_timer_on_resume;
 };
 
 enum pmc_index {

diff --git a/drivers/platform/x86/intel/pmc/icl.c b/drivers/platform/x86/intel/pmc/icl.c
index 71b0fd6cb7d840e1b2e9c71f3f8d40dd9d93126e..cbbd4405446888cd57e3f212e6ae4b47e183b0e0 100644 (file)
--- a/drivers/platform/x86/intel/pmc/icl.c
+++ b/drivers/platform/x86/intel/pmc/icl.c
@@ -46,6 +46,8 @@ const struct pmc_reg_map icl_reg_map = {
        .ppfear_buckets = ICL_PPFEAR_NUM_ENTRIES,
        .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
        .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
+       .acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET,
+       .acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE,
        .ltr_ignore_max = ICL_NUM_IP_IGN_ALLOWED,
        .etr3_offset = ETR3_OFFSET,
 };

diff --git a/drivers/platform/x86/intel/pmc/mtl.c b/drivers/platform/x86/intel/pmc/mtl.c
index c7d15d864039d0265199861316c5911539e10358..91f2fa728f5c88b5b0e56a77f386d5339e39ad61 100644 (file)
--- a/drivers/platform/x86/intel/pmc/mtl.c
+++ b/drivers/platform/x86/intel/pmc/mtl.c
@@ -462,6 +462,8 @@ const struct pmc_reg_map mtl_socm_reg_map = {
        .ppfear_buckets = MTL_SOCM_PPFEAR_NUM_ENTRIES,
        .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
        .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
+       .acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET,
+       .acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE,
        .lpm_num_maps = ADL_LPM_NUM_MAPS,
        .ltr_ignore_max = MTL_SOCM_NUM_IP_IGN_ALLOWED,
        .lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,

diff --git a/drivers/platform/x86/intel/pmc/spt.c b/drivers/platform/x86/intel/pmc/spt.c
index ab993a69e33ee204ddc59a246f0ff9e9bed22ff8..2cd2b3c68e468c41135fbfb9562bf470d7c384fd 100644 (file)
--- a/drivers/platform/x86/intel/pmc/spt.c
+++ b/drivers/platform/x86/intel/pmc/spt.c
@@ -130,6 +130,8 @@ const struct pmc_reg_map spt_reg_map = {
        .ppfear_buckets = SPT_PPFEAR_NUM_ENTRIES,
        .pm_cfg_offset = SPT_PMC_PM_CFG_OFFSET,
        .pm_read_disable_bit = SPT_PMC_READ_DISABLE_BIT,
+       .acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET,
+       .acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE,
        .ltr_ignore_max = SPT_NUM_IP_IGN_ALLOWED,
        .pm_vric1_offset = SPT_PMC_VRIC1_OFFSET,
 };

diff --git a/drivers/platform/x86/intel/pmc/tgl.c b/drivers/platform/x86/intel/pmc/tgl.c
index e0580de180773c57e6b1c2208d341402e97c64ad..371b4e30f142636d5019ab8d742cb513b03e8049 100644 (file)
--- a/drivers/platform/x86/intel/pmc/tgl.c
+++ b/drivers/platform/x86/intel/pmc/tgl.c
@@ -197,6 +197,8 @@ const struct pmc_reg_map tgl_reg_map = {
        .ppfear_buckets = ICL_PPFEAR_NUM_ENTRIES,
        .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
        .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
+       .acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET,
+       .acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE,
        .ltr_ignore_max = TGL_NUM_IP_IGN_ALLOWED,
        .lpm_num_maps = TGL_LPM_NUM_MAPS,
        .lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,