Samsung DT updates for v3.16
- exynos4
: add missing pinctrls
- exynos4412-trats2
: update camera nodes and add rear camera nodes
: rename alias for i2c_ak8975 label
Update camera nodes for exynos4 and exynos4412-trats2
- exynos5250
: update DWC3 usb controller and enable to use generic USB DRD phy
- exynos5250-snow
: enable dp-controller, fimd, hdmi and pwm backlight
: add sound node and Vbus regulator for USB 3.0
: add tps65090 power regulator
: add pinctrl for EC irq and i2c-arbitrator
- exynos5420
: change to correct compatible string for hdmi
: add PD entry to MFC codec and enable DWC3 and USB 3.0 PHY
: add MFC memory banks for smdk5420 and arndale-octa boards
- exynos5420-peach-pit
: add support exynos5420 based peach-pit board
: add sound node and Vbus regulatro for USB 3.0
: enable dp-controller, fimd
- exynos5420-smdk5420
: add Vbus regulatro for USB 3.0
- use generic DT bindings for map SYSRAM
[olof: Fixed up conflict with a fix for 4212 secondary CPU startup, carrying
over the fix to the reworked code]
* tag 'samsung-dt' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (32 commits)
ARM: dts: Add MFC memory banks to exynos5420 boards
ARM: dts: enable dp-controller for exynos5420-peach-pit board
ARM: dts: enable fimd for exynos5420 based peach-pit board
ARM: dts: enable dp-controller for exynos5250-snow board
ARM: dts: enable fimd for exynos5250-snow board
ARM: dts: enable pwm backlight for exynos5250-snow
ARM: dts: Add pwmX_out pinctrl nodes to exynos5250
ARM: dts: Add Vbus regulator for USB 3.0 on exynos5420-smdk5420
ARM: dts: Add Vbus regulator for USB 3.0 on exynos5420-peach-pit
ARM: dts: Add Vbus regulator for USB 3.0 on exynos5250-snow
ARM: dts: Add PD entry to MFC codec on exynos5420
ARM: dts: Add sound node for exynos5420-peach-pit board
ARM: dts: Add sound node for exynos5250-snow board
ARM: dts: Update DWC3 usb controller to use new phy driver for exynos5250
ARM: dts: Enable support for generic USB DRD phy for exynos5250
ARM: dts: Enable support for DWC3 controller for exynos5420
ARM: dts: Enable support for USB 3.0 PHY controller for exynos5420
ARM: dts: enable hdmi for exynos5420-peach-pit board
ARM: dts: change to correct compatible string for exynos5420 hdmi
ARM: dts: enable hdmi for exynos5250 based snow board
...
Signed-off-by: Olof Johansson <[email protected]>
interrupts = <0 112 0>;
clocks = <&clock 471>;
clock-names = "secss";
- samsung,power-domain = <&g2d_pd>;
};
+
+ usbdrd3_0: usb@12000000 {
+ compatible = "samsung,exynos5250-dwusb3";
+ clocks = <&clock CLK_USBD300>;
+ clock-names = "usbdrd30";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dwc3 {
+ compatible = "snps,dwc3";
+ reg = <0x12000000 0x10000>;
+ interrupts = <0 72 0>;
+ phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
+ phy-names = "usb2-phy", "usb3-phy";
+ };
+ };
+
+ usbdrd_phy0: phy@12100000 {
+ compatible = "samsung,exynos5420-usbdrd-phy";
+ reg = <0x12100000 0x100>;
+ clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
+ clock-names = "phy", "ref";
+ samsung,pmu-syscon = <&pmu_system_controller>;
+ #phy-cells = <1>;
+ };
+
+ usbdrd3_1: usb@12400000 {
+ compatible = "samsung,exynos5250-dwusb3";
+ clocks = <&clock CLK_USBD301>;
+ clock-names = "usbdrd30";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dwc3 {
+ compatible = "snps,dwc3";
+ reg = <0x12400000 0x10000>;
+ interrupts = <0 73 0>;
+ phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
+ phy-names = "usb2-phy", "usb3-phy";
+ };
+ };
+
+ usbdrd_phy1: phy@12500000 {
+ compatible = "samsung,exynos5420-usbdrd-phy";
+ reg = <0x12500000 0x100>;
+ clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
+ clock-names = "phy", "ref";
+ samsung,pmu-syscon = <&pmu_system_controller>;
+ #phy-cells = <1>;
+ };
};
#include <mach/map.h>
+#include <plat/cpu.h>
+
+ #include "common.h"
#include "smc.h"
static int exynos_do_idle(void)
static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
{
- void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c;
+ void __iomem *boot_reg;
+
+ if (!sysram_ns_base_addr)
+ return -ENODEV;
+
- boot_reg = sysram_ns_base_addr + 0x1c + 4*cpu;
++ boot_reg = sysram_ns_base_addr + 0x1c;
+
+ if (!soc_is_exynos4212())
+ boot_reg += 4*cpu;
__raw_writel(boot_addr, boot_reg);
return 0;