clk: qcom: videocc-sm8550: Use HW_CTRL_TRIGGER flag for video GDSC's

The video driver will be using the newly introduced
dev_pm_genpd_set_hwmode() API to switch the video GDSC
to HW/SW control modes at runtime.
Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for
video GDSC's.

Signed-off-by: Vedang Nagar <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>

diff --git a/drivers/clk/qcom/videocc-sm8550.c b/drivers/clk/qcom/videocc-sm8550.c
index 97d150b132a6dc5229387b4b495fdb4a4440615d..7c25a50cfa970dff55d701cb24bc3aa5924ca12d 100644 (file)
--- a/drivers/clk/qcom/videocc-sm8550.c
+++ b/drivers/clk/qcom/videocc-sm8550.c
@@ -449,7 +449,7 @@ static struct gdsc video_cc_mvs0_gdsc = {
        },
        .pwrsts = PWRSTS_OFF_ON,
        .parent = &video_cc_mvs0c_gdsc.pd,
-       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | HW_CTRL,
+       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | HW_CTRL_TRIGGER,
 };
 
 static struct gdsc video_cc_mvs1c_gdsc = {
@@ -474,7 +474,7 @@ static struct gdsc video_cc_mvs1_gdsc = {
        },
        .pwrsts = PWRSTS_OFF_ON,
        .parent = &video_cc_mvs1c_gdsc.pd,
-       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | HW_CTRL,
+       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | HW_CTRL_TRIGGER,
 };
 
 static struct clk_regmap *video_cc_sm8550_clocks[] = {