convert to using pci_scan_root_bus() so they can supply a list of
bus resources when the bus is created.
- What: The CAP9 SoC family will be removed
- When: 3.4
- Files: arch/arm/mach-at91/at91cap9.c
- arch/arm/mach-at91/at91cap9_devices.c
- arch/arm/mach-at91/include/mach/at91cap9.h
- arch/arm/mach-at91/include/mach/at91cap9_matrix.h
- arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
- arch/arm/mach-at91/board-cap9adk.c
- Why: The code is not actively maintained and platforms are now hard to find.
-
- ----------------------------
-
+
+----------------------------
+
+What: Low Performance USB Block driver ("CONFIG_BLK_DEV_UB")
+When: 3.6
+Why: This driver provides support for USB storage devices like "USB
+ sticks". As of now, it is deactivated in Debian, Fedora and
+ Ubuntu. All current users can switch over to usb-storage
+ (CONFIG_USB_STORAGE) which only drawback is the additional SCSI
+ stack.
+
+----------------------------
+
+What: kmap_atomic(page, km_type)
+When: 3.5
+Why: The old kmap_atomic() with two arguments is deprecated, we only
+ keep it for backward compatibility for few cycles and then drop it.
select CLKDEV_LOOKUP
help
This enables support for systems based on the Atmel AT91RM9200,
- AT91SAM9 and AT91CAP9 processors.
+ AT91SAM9 processors.
config ARCH_BCMRING
bool "Broadcom BCMRING"
help
Support for StrongARM 11x0 based boards.
- config ARCH_S3C2410
- bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
+ config ARCH_S3C24XX
+ bool "Samsung S3C24XX SoCs"
select GENERIC_GPIO
select ARCH_HAS_CPUFREQ
select HAVE_CLK
select CLKDEV_LOOKUP
select ARCH_USES_GETTIMEOFFSET
select HAVE_S3C2410_I2C if I2C
+ select HAVE_S3C_RTC if RTC_CLASS
+ select HAVE_S3C2410_WATCHDOG if WATCHDOG
help
- Samsung S3C2410X CPU based systems, such as the Simtec Electronics
- BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
- the Samsung SMDK2410 development board (and derivatives).
-
- Note, the S3C2416 and the S3C2450 are so close that they even share
- the same SoC ID code. This means that there is no separate machine
- directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
+ Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
+ and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
+ (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
+ Samsung SMDK2410 development board (and derivatives).
config ARCH_S3C64XX
bool "Samsung S3C64XX"
config ARCH_U8500
bool "ST-Ericsson U8500 Series"
+ depends on MMU
select CPU_V7
select ARM_AMBA
select GENERIC_CLOCKEVENTS
source "arch/arm/plat-spear/Kconfig"
- if ARCH_S3C2410
- source "arch/arm/mach-s3c2410/Kconfig"
+ source "arch/arm/mach-s3c24xx/Kconfig"
+ if ARCH_S3C24XX
source "arch/arm/mach-s3c2412/Kconfig"
- source "arch/arm/mach-s3c2416/Kconfig"
source "arch/arm/mach-s3c2440/Kconfig"
- source "arch/arm/mach-s3c2443/Kconfig"
endif
if ARCH_S3C64XX
config ARCH_NR_GPIO
int
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
- default 350 if ARCH_U8500
+ default 355 if ARCH_U8500
default 0
help
Maximum number of GPIOs in the system.
config HZ
int
- default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
+ default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
ARCH_S5PV210 || ARCH_EXYNOS4
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
default AT91_TIMER_HZ if ARCH_AT91
config CPU_FREQ_S3C24XX
bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
- depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
+ depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
select CPU_FREQ_S3C
help
This enables the CPUfreq driver for the Samsung S3C24XX family
# Core
- obj-$(CONFIG_ARCH_EXYNOS4) += common.o clock.o
+ obj-$(CONFIG_ARCH_EXYNOS) += common.o
+ obj-$(CONFIG_ARCH_EXYNOS4) += clock-exynos4.o
obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o
obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o
obj-$(CONFIG_PM) += pm.o
+obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_ARCH_EXYNOS4) += pmu.o
obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
-obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o
gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
if (!of_have_populated_dt())
- gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
+ gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
#ifdef CONFIG_OF
else
of_irq_init(exynos4_dt_irq_match);
chained_irq_exit(chip, desc);
}
- int __init exynos4_init_irq_eint(void)
+ static int __init exynos4_init_irq_eint(void)
{
int irq;
{ MAX8997_BUCK7, &max8997_buck7_data },
};
- struct max8997_platform_data __initdata origen_max8997_pdata = {
+ static struct max8997_platform_data __initdata origen_max8997_pdata = {
.num_regulators = ARRAY_SIZE(origen_max8997_regulators),
.regulators = origen_max8997_regulators,
&s5p_device_mfc_r,
&s5p_device_mixer,
&exynos4_device_ohci,
- &exynos4_device_pd[PD_LCD0],
- &exynos4_device_pd[PD_TV],
- &exynos4_device_pd[PD_G3D],
- &exynos4_device_pd[PD_LCD1],
- &exynos4_device_pd[PD_CAM],
- &exynos4_device_pd[PD_GPS],
- &exynos4_device_pd[PD_MFC],
&origen_device_gpiokeys,
&origen_lcd_hv070wsa,
};
platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
- s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
-
- s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
- s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
-
- s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
-
samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
}
&s3c_device_i2c5,
&s5p_device_i2c_hdmiphy,
&hdmi_fixed_voltage,
- &exynos4_device_pd[PD_TV],
&s5p_device_hdmi,
&s5p_device_sdo,
&s5p_device_mixer,
&s5p_device_mfc,
&s5p_device_mfc_l,
&s5p_device_mfc_r,
- &exynos4_device_pd[PD_MFC],
- &exynos4_device_pd[PD_LCD0],
- &exynos4_device_pd[PD_CAM],
&cam_i_core_fixed_reg_dev,
&cam_s_if_fixed_reg_dev,
&s5p_device_fimc_md,
s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
}
- void s5p_tv_setup(void)
+ static void s5p_tv_setup(void)
{
/* direct HPD to HDMI chip */
gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
-
- /* setup dependencies between TV devices */
- s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
- s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
}
static void __init universal_reserve(void)
/* Last */
platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
-
- s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
- s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
-
- s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
}
MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/export.h>
+#include <linux/omapfb.h>
+ #include <linux/io.h>
#include <media/soc_camera.h>
#include <asm/serial.h>
- #include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
- #include <plat/io.h>
#include <plat/board-ams-delta.h>
#include <plat/keypad.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include <plat/board.h>
- #include "common.h"
- #include <mach/camera.h>
+ #include <mach/hardware.h>
#include <mach/ams-delta-fiq.h>
+ #include <mach/camera.h>
+
+ #include "iomap.h"
+ #include "common.h"
static u8 ams_delta_latch1_reg;
static u16 ams_delta_latch2_reg;
.pins[0] = 2,
};
-static struct omap_board_config_kernel ams_delta_config[] __initdata = {
- { OMAP_TAG_LCD, &ams_delta_lcd_config },
-};
-
static struct resource ams_delta_nand_resources[] = {
[0] = {
.start = OMAP1_MPUIO_BASE,
omap_cfg_reg(J19_1610_CAM_D6);
omap_cfg_reg(J18_1610_CAM_D7);
- omap_board_config = ams_delta_config;
- omap_board_config_size = ARRAY_SIZE(ams_delta_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
ams_delta_init_fiq();
omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1);
+
+ omapfb_set_lcd_config(&ams_delta_lcd_config);
}
static struct plat_serial8250_port ams_delta_modem_ports[] = {
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/smc91x.h>
+#include <linux/omapfb.h>
- #include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/flash.h>
#include <plat/fpga.h>
#include <plat/keypad.h>
- #include "common.h"
#include <plat/board.h>
+ #include <mach/hardware.h>
+
+ #include "iomap.h"
+ #include "common.h"
+
/* fsample is pretty close to p2-sample */
#define fsample_cpld_read(reg) __raw_readb(reg)
.resource = kp_resources,
};
-static struct platform_device lcd_device = {
- .name = "lcd_p2",
- .id = -1,
-};
-
static struct platform_device *devices[] __initdata = {
&nor_device,
&nand_device,
&smc91x_device,
&kp_device,
- &lcd_device,
};
static struct omap_lcd_config fsample_lcd_config = {
.ctrl_name = "internal",
};
-static struct omap_board_config_kernel fsample_config[] __initdata = {
- { OMAP_TAG_LCD, &fsample_lcd_config },
-};
-
static void __init omap_fsample_init(void)
{
/* Early, board-dependent init */
platform_add_devices(devices, ARRAY_SIZE(devices));
- omap_board_config = fsample_config;
- omap_board_config_size = ARRAY_SIZE(fsample_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
+
+ omapfb_set_lcd_config(&fsample_lcd_config);
}
/* Only FPGA needs to be mapped here. All others are done with ioremap */
#include <linux/input.h>
#include <linux/i2c/tps65010.h>
#include <linux/smc91x.h>
+#include <linux/omapfb.h>
- #include <mach/hardware.h>
-
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/irda.h>
#include <plat/usb.h>
#include <plat/keypad.h>
- #include "common.h"
#include <plat/flash.h>
+ #include <mach/hardware.h>
+
+ #include "common.h"
#include "board-h2.h"
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
.resource = h2_irda_resources,
};
-static struct platform_device h2_lcd_device = {
- .name = "lcd_h2",
- .id = -1,
-};
-
static struct platform_device *h2_devices[] __initdata = {
&h2_nor_device,
&h2_nand_device,
&h2_smc91x_device,
&h2_irda_device,
&h2_kp_device,
- &h2_lcd_device,
};
static void __init h2_init_smc91x(void)
.ctrl_name = "internal",
};
-static struct omap_board_config_kernel h2_config[] __initdata = {
- { OMAP_TAG_LCD, &h2_lcd_config },
-};
-
static void __init h2_init(void)
{
h2_init_smc91x();
omap_cfg_reg(N19_1610_KBR5);
platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
- omap_board_config = h2_config;
- omap_board_config_size = ARRAY_SIZE(h2_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, h2_i2c_board_info,
ARRAY_SIZE(h2_i2c_board_info));
omap1_usb_init(&h2_usb_config);
h2_mmc_init();
+
+ omapfb_set_lcd_config(&h2_lcd_config);
}
MACHINE_START(OMAP_H2, "TI-H2")
#include <linux/spi/spi.h>
#include <linux/i2c/tps65010.h>
#include <linux/smc91x.h>
+#include <linux/omapfb.h>
#include <asm/setup.h>
#include <asm/page.h>
- #include <mach/hardware.h>
-
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
- #include <mach/irqs.h>
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/usb.h>
#include <plat/keypad.h>
#include <plat/dma.h>
- #include "common.h"
#include <plat/flash.h>
+ #include <mach/hardware.h>
+ #include <mach/irqs.h>
+
+ #include "common.h"
#include "board-h3.h"
/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
.ctrl_name = "internal",
};
-static struct omap_board_config_kernel h3_config[] __initdata = {
- { OMAP_TAG_LCD, &h3_lcd_config },
-};
-
static struct i2c_board_info __initdata h3_i2c_board_info[] = {
{
I2C_BOARD_INFO("tps65013", 0x48),
platform_add_devices(devices, ARRAY_SIZE(devices));
spi_register_board_info(h3_spi_board_info,
ARRAY_SIZE(h3_spi_board_info));
- omap_board_config = h3_config;
- omap_board_config_size = ARRAY_SIZE(h3_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, h3_i2c_board_info,
ARRAY_SIZE(h3_i2c_board_info));
omap1_usb_init(&h3_usb_config);
h3_mmc_init();
+
+ omapfb_set_lcd_config(&h3_lcd_config);
}
MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/input.h>
- #include <linux/io.h>
+ #include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
+#include <linux/omapfb.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <plat/omap7xx.h>
- #include "common.h"
#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/usb.h>
#include <mach/irqs.h>
- #include <linux/delay.h>
+ #include "common.h"
/* LCD register definition */
#define OMAP_LCDC_CONTROL (0xfffec000 + 0x00)
.ctrl_name = "internal",
};
-static struct omap_board_config_kernel htcherald_config[] __initdata = {
- { OMAP_TAG_LCD, &htcherald_lcd_config },
-};
-
static struct platform_device lcd_device = {
.name = "lcd_htcherald",
.id = -1,
printk(KERN_INFO "HTC Herald init.\n");
/* Do board initialization before we register all the devices */
- omap_board_config = htcherald_config;
- omap_board_config_size = ARRAY_SIZE(htcherald_config);
platform_add_devices(devices, ARRAY_SIZE(devices));
htcherald_disable_watchdog();
htc_mmc_data[0] = &htc_mmc1_data;
omap1_init_mmc(htc_mmc_data, 1);
#endif
+
+ omapfb_set_lcd_config(&htcherald_lcd_config);
}
MACHINE_START(HERALD, "HTC Herald")
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/smc91x.h>
+#include <linux/omapfb.h>
- #include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/tc.h>
#include <plat/usb.h>
#include <plat/keypad.h>
- #include "common.h"
#include <plat/mmc.h>
+ #include <mach/hardware.h>
+
+ #include "iomap.h"
+ #include "common.h"
+
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
#define INNOVATOR1610_ETHR_START 0x04000300
}
#endif
-static struct omap_board_config_kernel innovator_config[] = {
- { OMAP_TAG_LCD, NULL },
-};
-
static void __init innovator_init(void)
{
if (cpu_is_omap1510())
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
omap1_usb_init(&innovator1510_usb_config);
- innovator_config[0].data = &innovator1510_lcd_config;
+ omapfb_set_lcd_config(&innovator1510_lcd_config);
}
#endif
#ifdef CONFIG_ARCH_OMAP16XX
if (cpu_is_omap1610()) {
omap1_usb_init(&h2_usb_config);
- innovator_config[0].data = &innovator1610_lcd_config;
+ omapfb_set_lcd_config(&innovator1610_lcd_config);
}
#endif
- omap_board_config = innovator_config;
- omap_board_config_size = ARRAY_SIZE(innovator_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
innovator_mmc_init();
#include <linux/workqueue.h>
#include <linux/delay.h>
- #include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/usb.h>
#include <plat/board.h>
#include <plat/keypad.h>
- #include "common.h"
-#include <plat/hwa742.h>
#include <plat/lcd_mipid.h>
#include <plat/mmc.h>
#include <plat/clock.h>
+ #include <mach/hardware.h>
+
+ #include "common.h"
+
#define ADS7846_PENDOWN_GPIO 15
static const unsigned int nokia770_keymap[] = {
.shutdown = mipid_shutdown,
};
+static struct omap_lcd_config nokia770_lcd_config __initdata = {
+ .ctrl_name = "hwa742",
+};
+
static void __init mipid_dev_init(void)
{
- const struct omap_lcd_config *conf;
+ nokia770_mipid_platform_data.nreset_gpio = 13;
+ nokia770_mipid_platform_data.data_lines = 16;
- conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
- if (conf != NULL) {
- nokia770_mipid_platform_data.nreset_gpio = conf->nreset_gpio;
- nokia770_mipid_platform_data.data_lines = conf->data_lines;
- }
+ omapfb_set_lcd_config(&nokia770_lcd_config);
}
static void __init ads7846_dev_init(void)
},
};
-static struct hwa742_platform_data nokia770_hwa742_platform_data = {
- .te_connected = 1,
-};
-
static void __init hwa742_dev_init(void)
{
clk_add_alias("hwa_sys_ck", NULL, "bclk", NULL);
- omapfb_set_ctrl_platform_data(&nokia770_hwa742_platform_data);
}
/* assume no Mini-AB port */
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/smc91x.h>
-
+#include <linux/omapfb.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
-
#include <linux/i2c/tps65010.h>
- #include <mach/hardware.h>
-
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/usb.h>
#include <plat/mux.h>
#include <plat/tc.h>
+
+ #include <mach/hardware.h>
+
#include "common.h"
/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
};
#endif
-static struct omap_board_config_kernel osk_config[] __initdata = {
-#ifdef CONFIG_OMAP_OSK_MISTRAL
- { OMAP_TAG_LCD, &osk_lcd_config },
-#endif
-};
-
#ifdef CONFIG_OMAP_OSK_MISTRAL
#include <linux/input.h>
osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys();
osk_flash_resource.end += SZ_32M - 1;
platform_add_devices(osk5912_devices, ARRAY_SIZE(osk5912_devices));
- omap_board_config = osk_config;
- omap_board_config_size = ARRAY_SIZE(osk_config);
l = omap_readl(USB_TRANSCEIVER_CTRL);
l |= (3 << 1);
omap_register_i2c_bus(1, 400, osk_i2c_board_info,
ARRAY_SIZE(osk_i2c_board_info));
osk_mistral_init();
+
+#ifdef CONFIG_OMAP_OSK_MISTRAL
+ omapfb_set_lcd_config(&osk_lcd_config);
+#endif
+
}
MACHINE_START(OMAP_OSK, "TI-OSK")
#include <linux/spi/spi.h>
#include <linux/interrupt.h>
#include <linux/apm-emulation.h>
+#include <linux/omapfb.h>
- #include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>
+
+ #include <mach/hardware.h>
+
#include "common.h"
#define PALMTE_USBDETECT_GPIO 0
.ctrl_name = "internal",
};
-static struct omap_board_config_kernel palmte_config[] __initdata = {
- { OMAP_TAG_LCD, &palmte_lcd_config },
-};
-
static struct spi_board_info palmte_spi_info[] __initdata = {
{
.modalias = "tsc2102",
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
- omap_board_config = palmte_config;
- omap_board_config_size = ARRAY_SIZE(palmte_config);
-
platform_add_devices(palmte_devices, ARRAY_SIZE(palmte_devices));
spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info));
omap_serial_init();
omap1_usb_init(&palmte_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);
+
+ omapfb_set_lcd_config(&palmte_lcd_config);
}
MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/leds.h>
+#include <linux/omapfb.h>
+ #include <linux/spi/spi.h>
+ #include <linux/spi/ads7846.h>
- #include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>
- #include "common.h"
- #include <linux/spi/spi.h>
- #include <linux/spi/ads7846.h>
+ #include <mach/hardware.h>
+
+ #include "common.h"
#define PALMTT_USBDETECT_GPIO 0
#define PALMTT_CABLE_GPIO 1
.ctrl_name = "internal",
};
-static struct omap_board_config_kernel palmtt_config[] __initdata = {
- { OMAP_TAG_LCD, &palmtt_lcd_config },
-};
-
static void __init omap_mpu_wdt_mode(int mode) {
if (mode)
omap_writew(0x8000, OMAP_WDT_TIMER_MODE);
omap_mpu_wdt_mode(0);
- omap_board_config = palmtt_config;
- omap_board_config_size = ARRAY_SIZE(palmtt_config);
-
platform_add_devices(palmtt_devices, ARRAY_SIZE(palmtt_devices));
spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo));
omap_serial_init();
omap1_usb_init(&palmtt_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);
+
+ omapfb_set_lcd_config(&palmtt_lcd_config);
}
MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
+#include <linux/omapfb.h>
+ #include <linux/spi/spi.h>
+ #include <linux/spi/ads7846.h>
- #include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>
- #include "common.h"
- #include <linux/spi/spi.h>
- #include <linux/spi/ads7846.h>
+ #include <mach/hardware.h>
+
+ #include "common.h"
#define PALMZ71_USBDETECT_GPIO 0
#define PALMZ71_PENIRQ_GPIO 6
.ctrl_name = "internal",
};
-static struct omap_board_config_kernel palmz71_config[] __initdata = {
- {OMAP_TAG_LCD, &palmz71_lcd_config},
-};
-
static irqreturn_t
palmz71_powercable(int irq, void *dev_id)
{
palmz71_gpio_setup(1);
omap_mpu_wdt_mode(0);
- omap_board_config = palmz71_config;
- omap_board_config_size = ARRAY_SIZE(palmz71_config);
-
platform_add_devices(devices, ARRAY_SIZE(devices));
spi_register_board_info(palmz71_boardinfo,
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
palmz71_gpio_setup(0);
+
+ omapfb_set_lcd_config(&palmz71_lcd_config);
}
MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/smc91x.h>
+#include <linux/omapfb.h>
- #include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/fpga.h>
#include <plat/flash.h>
#include <plat/keypad.h>
- #include "common.h"
#include <plat/board.h>
+ #include <mach/hardware.h>
+
+ #include "iomap.h"
+ #include "common.h"
+
static const unsigned int p2_keymap[] = {
KEY(0, 0, KEY_UP),
KEY(1, 0, KEY_RIGHT),
.resource = kp_resources,
};
-static struct platform_device lcd_device = {
- .name = "lcd_p2",
- .id = -1,
-};
-
static struct platform_device *devices[] __initdata = {
&nor_device,
&nand_device,
&smc91x_device,
&kp_device,
- &lcd_device,
};
static struct omap_lcd_config perseus2_lcd_config __initdata = {
.ctrl_name = "internal",
};
-static struct omap_board_config_kernel perseus2_config[] __initdata = {
- { OMAP_TAG_LCD, &perseus2_lcd_config },
-};
-
static void __init perseus2_init_smc91x(void)
{
fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
platform_add_devices(devices, ARRAY_SIZE(devices));
- omap_board_config = perseus2_config;
- omap_board_config_size = ARRAY_SIZE(perseus2_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
+
+ omapfb_set_lcd_config(&perseus2_lcd_config);
}
/* Only FPGA needs to be mapped here. All others are done with ioremap */
#include <linux/i2c.h>
#include <linux/errno.h>
#include <linux/export.h>
+#include <linux/omapfb.h>
- #include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/usb.h>
#include <plat/tc.h>
#include <plat/board.h>
- #include "common.h"
#include <plat/keypad.h>
#include <plat/board-sx1.h>
+ #include <mach/hardware.h>
+
+ #include "common.h"
+
/* Write to I2C device */
int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
{
/*----------- LCD -------------------------*/
-static struct platform_device sx1_lcd_device = {
- .name = "lcd_sx1",
- .id = -1,
-};
-
static struct omap_lcd_config sx1_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct platform_device *sx1_devices[] __initdata = {
&sx1_flash_device,
&sx1_kp_device,
- &sx1_lcd_device,
&sx1_irda_device,
};
-/*-----------------------------------------*/
-
-static struct omap_board_config_kernel sx1_config[] __initdata = {
- { OMAP_TAG_LCD, &sx1_lcd_config },
-};
/*-----------------------------------------*/
platform_add_devices(sx1_devices, ARRAY_SIZE(sx1_devices));
- omap_board_config = sx1_config;
- omap_board_config_size = ARRAY_SIZE(sx1_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
omap1_usb_init(&sx1_usb_config);
gpio_direction_output(1, 1); /*A_IRDA_OFF = 1 */
gpio_direction_output(11, 0); /*A_SWITCH = 0 */
gpio_direction_output(15, 0); /*A_USB_ON = 0 */
+
+ omapfb_set_lcd_config(&sx1_lcd_config);
}
MACHINE_START(SX1, "OMAP310 based Siemens SX1")
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
- #include <linux/io.h>
#include <linux/spi/spi.h>
- #include <mach/camera.h>
- #include <mach/hardware.h>
#include <asm/mach/map.h>
- #include "common.h"
#include <plat/tc.h>
#include <plat/board.h>
#include <plat/mux.h>
#include <plat/mmc.h>
#include <plat/omap7xx.h>
-#include <plat/mcbsp.h>
+ #include <mach/camera.h>
+ #include <mach/hardware.h>
+
+ #include "common.h"
#include "clock.h"
/*-------------------------------------------------------------------------*/
.id = -1,
};
-OMAP_MCBSP_PLATFORM_DEVICE(1);
-OMAP_MCBSP_PLATFORM_DEVICE(2);
-OMAP_MCBSP_PLATFORM_DEVICE(3);
-
static void omap_init_audio(void)
{
- platform_device_register(&omap_mcbsp1);
- platform_device_register(&omap_mcbsp2);
- if (!cpu_is_omap7xx())
- platform_device_register(&omap_mcbsp3);
platform_device_register(&omap_pcm);
}
#include <asm/tlb.h>
#include <asm/mach/map.h>
+
#include <plat/mux.h>
#include <plat/tc.h>
+ #include "iomap.h"
+ #include "common.h"
#include "clock.h"
extern void omap_check_revision(void);
/*
* Common low-level hardware init for omap1.
*/
-void omap1_init_early(void)
+void __init omap1_init_early(void)
{
omap_check_revision();
#include <linux/interrupt.h>
#include <linux/io.h>
+ #include <plat/dma.h>
+
#include <mach/hardware.h>
#include <mach/lcdc.h>
- #include <plat/dma.h>
int omap_lcd_dma_running(void)
{
void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
{
if (cpu_is_omap15xx()) {
- printk(KERN_ERR "DMA virtual resulotion is not supported "
+ printk(KERN_ERR "DMA virtual resolution is not supported "
"in 1510 mode\n");
BUG();
}
#include <linux/platform_device.h>
#include <linux/slab.h>
- #include <mach/irqs.h>
#include <plat/dma.h>
#include <plat/mux.h>
#include <plat/cpu.h>
#include <plat/mcbsp.h>
+ #include <mach/irqs.h>
+
+ #include "iomap.h"
+
#define DPS_RSTCT2_PER_EN (1 << 0)
#define DSP_RSTCT2_WD_PER_EN (1 << 1)
if (!cpu_class_is_omap1())
return -ENODEV;
- if (cpu_is_omap7xx())
- omap_mcbsp_count = OMAP7XX_MCBSP_COUNT;
- else if (cpu_is_omap15xx())
- omap_mcbsp_count = OMAP15XX_MCBSP_COUNT;
- else if (cpu_is_omap16xx())
- omap_mcbsp_count = OMAP16XX_MCBSP_COUNT;
-
- mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
- GFP_KERNEL);
- if (!mcbsp_ptr)
- return -ENOMEM;
-
if (cpu_is_omap7xx())
omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res_0,
OMAP7XX_MCBSP_RES_SZ,
omap16xx_mcbsp_pdata,
OMAP16XX_MCBSP_COUNT);
- return omap_mcbsp_init();
+ return 0;
}
arch_initcall(omap1_mcbsp_init);
#include "mux.h"
-static int slot1_cover_open;
-static int slot2_cover_open;
-static struct device *mmc_device;
-
#define TUSB6010_ASYNC_CS 1
#define TUSB6010_SYNC_CS 4
#define TUSB6010_GPIO_INT 58
static struct omap2_mcspi_device_config p54spi_mcspi_config = {
.turbo_mode = 0,
- .single_channel = 1,
};
static struct spi_board_info n800_spi_board_info[] __initdata = {
#define N810_EMMC_VSD_GPIO 23
#define N810_EMMC_VIO_GPIO 9
+static int slot1_cover_open;
+static int slot2_cover_open;
+static struct device *mmc_device;
+
static int n8x0_mmc_switch_slot(struct device *dev, int slot)
{
#ifdef CONFIG_MMC_DEBUG
static int zoom_set_bl_intensity(struct omap_dss_device *dssdev, int level)
{
+#ifdef CONFIG_TWL4030_CORE
unsigned char c;
u8 mux_pwm, enb_pwm;
c = ((50 * (100 - level)) / 100) + 1;
twl_i2c_write_u8(TWL4030_MODULE_PWM1, 0x7F, TWL_LED_PWMOFF);
twl_i2c_write_u8(TWL4030_MODULE_PWM1, c, TWL_LED_PWMON);
+#else
+ pr_warn("Backlight not enabled\n");
+#endif
return 0;
}
static struct omap2_mcspi_device_config dss_lcd_mcspi_config = {
.turbo_mode = 1,
- .single_channel = 1, /* 0: slave, 1: master */
};
static struct spi_board_info nec_8048_spi_board_info[] __initdata = {
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
static struct omap2_mcspi_device_config ads7846_mcspi_config = {
.turbo_mode = 0,
- .single_channel = 1, /* 0: slave, 1: master */
};
static struct ads7846_platform_data ads7846_config = {
gpio_set_debounce(gpio_pendown, gpio_debounce);
}
- ads7846_config.gpio_pendown = gpio_pendown;
-
spi_bi->bus_num = bus_num;
spi_bi->irq = OMAP_GPIO_IRQ(gpio_pendown);
- if (board_pdata)
+ if (board_pdata) {
+ board_pdata->gpio_pendown = gpio_pendown;
spi_bi->platform_data = board_pdata;
+ } else {
+ ads7846_config.gpio_pendown = gpio_pendown;
+ }
spi_register_board_info(&ads7846_spi_board_info, 1);
}
#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H
#define __ARCH_ARM_MACH_OMAP2_CONTROL_H
- #include <mach/io.h>
#include <mach/ctrl_module_core_44xx.h>
#include <mach/ctrl_module_wkup_44xx.h>
#include <mach/ctrl_module_pad_core_44xx.h>
#define AM35XX_HECC_SW_RST BIT(3)
#define AM35XX_VPFE_PCLK_SW_RST BIT(4)
+/*
+ * CONTROL AM33XX STATUS register
+ */
+#define AM33XX_CONTROL_STATUS 0x040
+
/*
* CONTROL OMAP STATUS register to identify OMAP3 features
*/
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/of.h>
+#include <linux/platform_data/omap4-keypad.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <asm/mach/map.h>
#include <asm/pmu.h>
- #include <plat/tc.h>
+ #include "iomap.h"
#include <plat/board.h>
-#include <plat/mcbsp.h>
#include <plat/mmc.h>
#include <plat/dma.h>
#include <plat/omap_hwmod.h>
.id = -1,
};
-/*
- * OMAP2420 has 2 McBSP ports
- * OMAP2430 has 5 McBSP ports
- * OMAP3 has 5 McBSP ports
- * OMAP4 has 4 McBSP ports
- */
-OMAP_MCBSP_PLATFORM_DEVICE(1);
-OMAP_MCBSP_PLATFORM_DEVICE(2);
-OMAP_MCBSP_PLATFORM_DEVICE(3);
-OMAP_MCBSP_PLATFORM_DEVICE(4);
-OMAP_MCBSP_PLATFORM_DEVICE(5);
-
static void omap_init_audio(void)
{
- platform_device_register(&omap_mcbsp1);
- platform_device_register(&omap_mcbsp2);
- if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
- platform_device_register(&omap_mcbsp3);
- platform_device_register(&omap_mcbsp4);
- }
- if (cpu_is_omap243x() || cpu_is_omap34xx())
- platform_device_register(&omap_mcbsp5);
-
platform_device_register(&omap_pcm);
}
/*-------------------------------------------------------------------------*/
#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
-#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
#define OMAP_HDQ_BASE 0x480B2000
-#endif
static struct resource omap_hdq_resources[] = {
{
.start = OMAP_HDQ_BASE,
};
static inline void omap_hdq_init(void)
{
- (void) platform_device_register(&omap_hdq_dev);
+ if (cpu_is_omap2420())
+ return;
+
+ platform_device_register(&omap_hdq_dev);
}
#else
static inline void omap_hdq_init(void) {}
#include <linux/init.h>
#include <linux/io.h>
#include <linux/clk.h>
-#include <linux/omapfb.h>
#include <asm/tlb.h>
-
#include <asm/mach/map.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
#include <plat/serial.h>
-
- #include "clock2xxx.h"
- #include "clock3xxx.h"
- #include "clock44xx.h"
-
- #include "common.h"
#include <plat/omap-pm.h>
+ #include <plat/omap_hwmod.h>
+ #include <plat/multi.h>
+
+ #include "iomap.h"
#include "voltage.h"
#include "powerdomain.h"
-
#include "clockdomain.h"
- #include <plat/omap_hwmod.h>
- #include <plat/multi.h>
+ #include "common.h"
+ #include "clock2xxx.h"
+ #include "clock3xxx.h"
+ #include "clock44xx.h"
/*
* The machine specific code may provide the extra mapping besides the
* default mapping provided here.
*/
-#ifdef CONFIG_ARCH_OMAP2
+#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
static struct map_desc omap24xx_io_desc[] __initdata = {
{
.virtual = L3_24XX_VIRT,
_omap2_init_reprogram_sdrc();
}
}
-
- /*
- * NOTE: Please use ioremap + __raw_read/write where possible instead of these
- */
-
- u8 omap_readb(u32 pa)
- {
- return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
- }
- EXPORT_SYMBOL(omap_readb);
-
- u16 omap_readw(u32 pa)
- {
- return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
- }
- EXPORT_SYMBOL(omap_readw);
-
- u32 omap_readl(u32 pa)
- {
- return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
- }
- EXPORT_SYMBOL(omap_readl);
-
- void omap_writeb(u8 v, u32 pa)
- {
- __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
- }
- EXPORT_SYMBOL(omap_writeb);
-
- void omap_writew(u16 v, u32 pa)
- {
- __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
- }
- EXPORT_SYMBOL(omap_writew);
-
- void omap_writel(u32 v, u32 pa)
- {
- __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
- }
- EXPORT_SYMBOL(omap_writel);
* In MPUSS OSWR or device OFF, interrupt controller contest is lost.
*/
mpuss_clear_prev_logic_pwrst();
- pwrdm_clear_all_prev_pwrst(mpuss_pd);
if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) &&
(pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF))
save_state = 2;
- clear_cpu_prev_pwrst(cpu);
cpu_clear_prev_logic_pwrst(cpu);
set_cpu_next_pwrst(cpu, power_state);
set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume));
* @cpu : CPU ID
* @power_state: CPU low power state.
*/
-int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
+int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
{
unsigned int cpu_state = 0;
#include <linux/err.h>
#include <linux/opp.h>
#include <linux/export.h>
+ #include <linux/suspend.h>
#include <plat/omap-pm.h>
#include <plat/omap_device.h>
#include "common.h"
+ #include "prcm-common.h"
#include "voltage.h"
#include "powerdomain.h"
#include "clockdomain.h"
static struct omap_device_pm_latency *pm_lats;
+ /*
+ * omap_pm_suspend: points to a function that does the SoC-specific
+ * suspend work
+ */
+ int (*omap_pm_suspend)(void);
+
static int __init _init_omap_device(char *name)
{
struct omap_hwmod *oh;
/*
* Build omap_devices for processors and bus.
*/
-static void omap2_init_processor_devices(void)
+static void __init omap2_init_processor_devices(void)
{
_init_omap_device("mpu");
if (omap3_has_iva())
#define FORCEWAKEUP_SWITCH 0
#define LOWPOWERSTATE_SWITCH 1
+ int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
+ {
+ if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
+ clkdm_allow_idle(clkdm);
+ else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
+ atomic_read(&clkdm->usecount) == 0)
+ clkdm_sleep(clkdm);
+ return 0;
+ }
+
/*
* This sets pwrdm state (other than mpu & core. Currently only ON &
* RET are supported.
*/
- int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
+ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst)
{
- u32 cur_state;
- int sleep_switch = -1;
- int ret = 0;
- int hwsup = 0;
+ u8 curr_pwrst, next_pwrst;
+ int sleep_switch = -1, ret = 0, hwsup = 0;
- if (pwrdm == NULL || IS_ERR(pwrdm))
+ if (!pwrdm || IS_ERR(pwrdm))
return -EINVAL;
- while (!(pwrdm->pwrsts & (1 << state))) {
- if (state == PWRDM_POWER_OFF)
+ while (!(pwrdm->pwrsts & (1 << pwrst))) {
+ if (pwrst == PWRDM_POWER_OFF)
return ret;
- state--;
+ pwrst--;
}
- cur_state = pwrdm_read_next_pwrst(pwrdm);
- if (cur_state == state)
+ next_pwrst = pwrdm_read_next_pwrst(pwrdm);
+ if (next_pwrst == pwrst)
return ret;
- if (pwrdm_read_pwrst(pwrdm) < PWRDM_POWER_ON) {
- if ((pwrdm_read_pwrst(pwrdm) > state) &&
+ curr_pwrst = pwrdm_read_pwrst(pwrdm);
+ if (curr_pwrst < PWRDM_POWER_ON) {
+ if ((curr_pwrst > pwrst) &&
(pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
sleep_switch = LOWPOWERSTATE_SWITCH;
} else {
}
}
- ret = pwrdm_set_next_pwrst(pwrdm, state);
- if (ret) {
- pr_err("%s: unable to set state of powerdomain: %s\n",
+ ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
+ if (ret)
+ pr_err("%s: unable to set power state of powerdomain: %s\n",
__func__, pwrdm->name);
- goto err;
- }
switch (sleep_switch) {
case FORCEWAKEUP_SWITCH:
break;
case LOWPOWERSTATE_SWITCH:
pwrdm_set_lowpwrstchange(pwrdm);
+ pwrdm_wait_transition(pwrdm);
+ pwrdm_state_switch(pwrdm);
break;
- default:
- return ret;
}
- pwrdm_state_switch(pwrdm);
- err:
return ret;
}
+
+
/*
* This API is to be called during init to set the various voltage
* domains to the voltage as per the opp table. Typically we boot up
return -EINVAL;
}
+ #ifdef CONFIG_SUSPEND
+ static int omap_pm_enter(suspend_state_t suspend_state)
+ {
+ int ret = 0;
+
+ if (!omap_pm_suspend)
+ return -ENOENT; /* XXX doublecheck */
+
+ switch (suspend_state) {
+ case PM_SUSPEND_STANDBY:
+ case PM_SUSPEND_MEM:
+ ret = omap_pm_suspend();
+ break;
+ default:
+ ret = -EINVAL;
+ }
+
+ return ret;
+ }
+
+ static int omap_pm_begin(suspend_state_t state)
+ {
+ disable_hlt();
+ if (cpu_is_omap34xx())
+ omap_prcm_irq_prepare();
+ return 0;
+ }
+
+ static void omap_pm_end(void)
+ {
+ enable_hlt();
+ return;
+ }
+
+ static void omap_pm_finish(void)
+ {
+ if (cpu_is_omap34xx())
+ omap_prcm_irq_complete();
+ }
+
+ static const struct platform_suspend_ops omap_pm_ops = {
+ .begin = omap_pm_begin,
+ .end = omap_pm_end,
+ .enter = omap_pm_enter,
+ .finish = omap_pm_finish,
+ .valid = suspend_valid_only_mem,
+ };
+
+ #endif /* CONFIG_SUSPEND */
+
static void __init omap3_init_voltages(void)
{
if (!cpu_is_omap34xx())
/* Smartreflex device init */
omap_devinit_smartreflex();
+ #ifdef CONFIG_SUSPEND
+ suspend_set_ops(&omap_pm_ops);
+ #endif
+
return 0;
}
late_initcall(omap2_common_pm_late_init);
--- /dev/null
- printk(KERN_INFO "Simtec Board Power Manangement" COPYRIGHT "\n");
+ /* linux/arch/arm/plat-s3c24xx/pm-simtec.c
+ *
+ * Copyright 2004 Simtec Electronics
+ *
+ * http://armlinux.simtec.co.uk/
+ *
+ * Power Management helpers for Simtec S3C24XX implementations
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+ #include <linux/kernel.h>
+ #include <linux/types.h>
+ #include <linux/interrupt.h>
+ #include <linux/list.h>
+ #include <linux/timer.h>
+ #include <linux/init.h>
+ #include <linux/device.h>
+ #include <linux/io.h>
+
+ #include <asm/mach/arch.h>
+ #include <asm/mach/map.h>
+
+ #include <mach/hardware.h>
+
+ #include <mach/map.h>
+ #include <mach/regs-gpio.h>
+ #include <mach/regs-mem.h>
+
+ #include <asm/mach-types.h>
+
+ #include <plat/pm.h>
+
+ #define COPYRIGHT ", Copyright 2005 Simtec Electronics"
+
+ /* pm_simtec_init
+ *
+ * enable the power management functions
+ */
+
+ static __init int pm_simtec_init(void)
+ {
+ unsigned long gstatus4;
+
+ /* check which machine we are running on */
+
+ if (!machine_is_bast() && !machine_is_vr1000() &&
+ !machine_is_anubis() && !machine_is_osiris() &&
+ !machine_is_aml_m5900())
+ return 0;
+
++ printk(KERN_INFO "Simtec Board Power Management" COPYRIGHT "\n");
+
+ gstatus4 = (__raw_readl(S3C2410_BANKCON7) & 0x3) << 30;
+ gstatus4 |= (__raw_readl(S3C2410_BANKCON6) & 0x3) << 28;
+ gstatus4 |= (__raw_readl(S3C2410_BANKSIZE) & S3C2410_BANKSIZE_MASK);
+
+ __raw_writel(gstatus4, S3C2410_GSTATUS4);
+
+ return s3c_pm_init();
+ }
+
+ arch_initcall(pm_simtec_init);
select CPU_V7
select ARM_GIC
select ARCH_REQUIRE_GPIOLIB
+ select PINCTRL
+ select PINCTRL_TEGRA20
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select USB_ULPI if USB_SUPPORT
select USB_ULPI_VIEWPORT if USB_SUPPORT
+ select ARM_ERRATA_720789
+ select ARM_ERRATA_742230
+ select ARM_ERRATA_751472
+ select ARM_ERRATA_754327
+ select ARM_ERRATA_764369
+ select PL310_ERRATA_727915 if CACHE_L2X0
+ select PL310_ERRATA_769419 if CACHE_L2X0
+ select CPU_FREQ_TABLE if CPU_FREQ
help
Support for NVIDIA Tegra AP20 and T20 processors, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
select CPU_V7
select ARM_GIC
select ARCH_REQUIRE_GPIOLIB
+ select PINCTRL
+ select PINCTRL_TEGRA30
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select USB_ULPI if USB_SUPPORT
select USB_ULPI_VIEWPORT if USB_SUPPORT
select USE_OF
+ select ARM_ERRATA_743622
+ select ARM_ERRATA_751472
+ select ARM_ERRATA_754322
+ select ARM_ERRATA_764369
+ select PL310_ERRATA_769419 if CACHE_L2X0
+ select CPU_FREQ_TABLE if CPU_FREQ
help
Support for NVIDIA Tegra T30 processor family, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/err.h>
+ #include <linux/export.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/gpio.h>
writel(val, base + ULPI_TIMING_CTRL_1);
/* Fix VbusInvalid due to floating VBUS */
- ret = otg_io_write(phy->ulpi, 0x40, 0x08);
+ ret = usb_phy_io_write(phy->ulpi, 0x40, 0x08);
if (ret) {
pr_err("%s: ulpi write failed\n", __func__);
return ret;
}
- ret = otg_io_write(phy->ulpi, 0x80, 0x0B);
+ ret = usb_phy_io_write(phy->ulpi, 0x80, 0x0B);
if (ret) {
pr_err("%s: ulpi write failed\n", __func__);
return ret;
kfree(phy);
return ERR_PTR(err);
}
+ EXPORT_SYMBOL_GPL(tegra_usb_phy_open);
int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
{
else
return utmi_phy_power_on(phy);
}
+ EXPORT_SYMBOL_GPL(tegra_usb_phy_power_on);
void tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
{
else
utmi_phy_power_off(phy);
}
+ EXPORT_SYMBOL_GPL(tegra_usb_phy_power_off);
void tegra_usb_phy_preresume(struct tegra_usb_phy *phy)
{
if (!phy_is_ulpi(phy))
utmi_phy_preresume(phy);
}
+ EXPORT_SYMBOL_GPL(tegra_usb_phy_preresume);
void tegra_usb_phy_postresume(struct tegra_usb_phy *phy)
{
if (!phy_is_ulpi(phy))
utmi_phy_postresume(phy);
}
+ EXPORT_SYMBOL_GPL(tegra_usb_phy_postresume);
void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy,
enum tegra_usb_phy_port_speed port_speed)
if (!phy_is_ulpi(phy))
utmi_phy_restore_start(phy, port_speed);
}
+ EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_start);
void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy)
{
if (!phy_is_ulpi(phy))
utmi_phy_restore_end(phy);
}
+ EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_end);
void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy)
{
if (!phy_is_ulpi(phy))
utmi_phy_clk_disable(phy);
}
+ EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_disable);
void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy)
{
if (!phy_is_ulpi(phy))
utmi_phy_clk_enable(phy);
}
+ EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_enable);
void tegra_usb_phy_close(struct tegra_usb_phy *phy)
{
clk_put(phy->pll_u);
kfree(phy);
}
+ EXPORT_SYMBOL_GPL(tegra_usb_phy_close);
}
#else
#define set_gdma_dev(req, dev) do {} while (0)
+ #define omap_readl(reg) 0
+ #define omap_writel(val, reg) do {} while (0)
#endif
void omap_set_dma_priority(int lch, int dst_port, int priority)
static struct platform_driver omap_system_dma_driver = {
.probe = omap_system_dma_probe,
- .remove = omap_system_dma_remove,
+ .remove = __devexit_p(omap_system_dma_remove),
.driver = {
.name = "omap_dma_system"
},
#include <plat/dmtimer.h>
+ #include <mach/hardware.h>
+
static LIST_HEAD(omap_timer_list);
static DEFINE_SPINLOCK(dm_timer_lock);
static void omap_timer_restore_context(struct omap_dm_timer *timer)
{
- omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_OFFSET,
- timer->context.tiocp_cfg);
- if (timer->revision > 1)
+ __raw_writel(timer->context.tiocp_cfg,
+ timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
+ if (timer->revision == 1)
__raw_writel(timer->context.tistat, timer->sys_stat);
__raw_writel(timer->context.tisr, timer->irq_stat);
__omap_dm_timer_stop(timer, timer->posted, rate);
+ if (timer->loses_context && timer->get_context_loss_count)
+ timer->ctx_loss_count =
+ timer->get_context_loss_count(&timer->pdev->dev);
+
+ /*
+ * Since the register values are computed and written within
+ * __omap_dm_timer_stop, we need to use read to retrieve the
+ * context.
+ */
+ timer->context.tclr =
+ omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
+ timer->context.tisr = __raw_readl(timer->irq_stat);
+ omap_dm_timer_disable(timer);
return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
#include "sram.h"
- /* XXX These "sideways" includes are a sign that something is wrong */
- #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- # include "../mach-omap2/prm2xxx_3xxx.h"
- # include "../mach-omap2/sdrc.h"
- #endif
+ /* XXX These "sideways" includes will disappear when sram.c becomes a driver */
+ #include "../mach-omap2/iomap.h"
+ #include "../mach-omap2/prm2xxx_3xxx.h"
+ #include "../mach-omap2/sdrc.h"
#define OMAP1_SRAM_PA 0x20000000
#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
__raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
__raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
}
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() && !cpu_is_am33xx()) {
__raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
__raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
__raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
omap_sram_size = 0x800; /* 2K */
}
} else {
- if (cpu_is_omap34xx()) {
+ if (cpu_is_am33xx()) {
+ omap_sram_start = AM33XX_SRAM_PA;
+ omap_sram_size = 0x10000; /* 64K */
+ } else if (cpu_is_omap34xx()) {
omap_sram_start = OMAP3_SRAM_PA;
omap_sram_size = 0x10000; /* 64K */
} else if (cpu_is_omap44xx()) {
return 0;
}
+static inline int am33xx_sram_init(void)
+{
+ return 0;
+}
+
int __init omap_sram_init(void)
{
omap_detect_sram();
omap242x_sram_init();
else if (cpu_is_omap2430())
omap243x_sram_init();
+ else if (cpu_is_am33xx())
+ am33xx_sram_init();
else if (cpu_is_omap34xx())
omap34xx_sram_init();
/* Change Divider - DMC0 */
tmp = data->dmc_divtable[index];
- __raw_writel(tmp, S5P_CLKDIV_DMC0);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_DMC0);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_DMC0);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_DMC0);
} while (tmp & 0x11111111);
/* Change Divider - TOP */
tmp = data->top_divtable[index];
- __raw_writel(tmp, S5P_CLKDIV_TOP);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_TOP);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_TOP);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_TOP);
} while (tmp & 0x11111);
/* Change Divider - LEFTBUS */
- tmp = __raw_readl(S5P_CLKDIV_LEFTBUS);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_LEFTBUS);
- tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_BUS_GDLR_MASK | EXYNOS4_CLKDIV_BUS_GPLR_MASK);
tmp |= ((exynos4210_clkdiv_lr_bus[index][0] <<
- S5P_CLKDIV_BUS_GDLR_SHIFT) |
+ EXYNOS4_CLKDIV_BUS_GDLR_SHIFT) |
(exynos4210_clkdiv_lr_bus[index][1] <<
- S5P_CLKDIV_BUS_GPLR_SHIFT));
+ EXYNOS4_CLKDIV_BUS_GPLR_SHIFT));
- __raw_writel(tmp, S5P_CLKDIV_LEFTBUS);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_LEFTBUS);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_LEFTBUS);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_LEFTBUS);
} while (tmp & 0x11);
/* Change Divider - RIGHTBUS */
- tmp = __raw_readl(S5P_CLKDIV_RIGHTBUS);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_RIGHTBUS);
- tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_BUS_GDLR_MASK | EXYNOS4_CLKDIV_BUS_GPLR_MASK);
tmp |= ((exynos4210_clkdiv_lr_bus[index][0] <<
- S5P_CLKDIV_BUS_GDLR_SHIFT) |
+ EXYNOS4_CLKDIV_BUS_GDLR_SHIFT) |
(exynos4210_clkdiv_lr_bus[index][1] <<
- S5P_CLKDIV_BUS_GPLR_SHIFT));
+ EXYNOS4_CLKDIV_BUS_GPLR_SHIFT));
- __raw_writel(tmp, S5P_CLKDIV_RIGHTBUS);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_RIGHTBUS);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_RIGHTBUS);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_RIGHTBUS);
} while (tmp & 0x11);
return 0;
/* Change Divider - DMC0 */
tmp = data->dmc_divtable[index];
- __raw_writel(tmp, S5P_CLKDIV_DMC0);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_DMC0);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_DMC0);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_DMC0);
} while (tmp & 0x11111111);
/* Change Divider - DMC1 */
- tmp = __raw_readl(S5P_CLKDIV_DMC1);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_DMC1);
- tmp &= ~(S5P_CLKDIV_DMC1_G2D_ACP_MASK |
- S5P_CLKDIV_DMC1_C2C_MASK |
- S5P_CLKDIV_DMC1_C2CACLK_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_DMC1_G2D_ACP_MASK |
+ EXYNOS4_CLKDIV_DMC1_C2C_MASK |
+ EXYNOS4_CLKDIV_DMC1_C2CACLK_MASK);
tmp |= ((exynos4x12_clkdiv_dmc1[index][0] <<
- S5P_CLKDIV_DMC1_G2D_ACP_SHIFT) |
+ EXYNOS4_CLKDIV_DMC1_G2D_ACP_SHIFT) |
(exynos4x12_clkdiv_dmc1[index][1] <<
- S5P_CLKDIV_DMC1_C2C_SHIFT) |
+ EXYNOS4_CLKDIV_DMC1_C2C_SHIFT) |
(exynos4x12_clkdiv_dmc1[index][2] <<
- S5P_CLKDIV_DMC1_C2CACLK_SHIFT));
+ EXYNOS4_CLKDIV_DMC1_C2CACLK_SHIFT));
- __raw_writel(tmp, S5P_CLKDIV_DMC1);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_DMC1);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_DMC1);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_DMC1);
} while (tmp & 0x111111);
/* Change Divider - TOP */
- tmp = __raw_readl(S5P_CLKDIV_TOP);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_TOP);
- tmp &= ~(S5P_CLKDIV_TOP_ACLK266_GPS_MASK |
- S5P_CLKDIV_TOP_ACLK100_MASK |
- S5P_CLKDIV_TOP_ACLK160_MASK |
- S5P_CLKDIV_TOP_ACLK133_MASK |
- S5P_CLKDIV_TOP_ONENAND_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_TOP_ACLK266_GPS_MASK |
+ EXYNOS4_CLKDIV_TOP_ACLK100_MASK |
+ EXYNOS4_CLKDIV_TOP_ACLK160_MASK |
+ EXYNOS4_CLKDIV_TOP_ACLK133_MASK |
+ EXYNOS4_CLKDIV_TOP_ONENAND_MASK);
tmp |= ((exynos4x12_clkdiv_top[index][0] <<
- S5P_CLKDIV_TOP_ACLK266_GPS_SHIFT) |
+ EXYNOS4_CLKDIV_TOP_ACLK266_GPS_SHIFT) |
(exynos4x12_clkdiv_top[index][1] <<
- S5P_CLKDIV_TOP_ACLK100_SHIFT) |
+ EXYNOS4_CLKDIV_TOP_ACLK100_SHIFT) |
(exynos4x12_clkdiv_top[index][2] <<
- S5P_CLKDIV_TOP_ACLK160_SHIFT) |
+ EXYNOS4_CLKDIV_TOP_ACLK160_SHIFT) |
(exynos4x12_clkdiv_top[index][3] <<
- S5P_CLKDIV_TOP_ACLK133_SHIFT) |
+ EXYNOS4_CLKDIV_TOP_ACLK133_SHIFT) |
(exynos4x12_clkdiv_top[index][4] <<
- S5P_CLKDIV_TOP_ONENAND_SHIFT));
+ EXYNOS4_CLKDIV_TOP_ONENAND_SHIFT));
- __raw_writel(tmp, S5P_CLKDIV_TOP);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_TOP);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_TOP);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_TOP);
} while (tmp & 0x11111);
/* Change Divider - LEFTBUS */
- tmp = __raw_readl(S5P_CLKDIV_LEFTBUS);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_LEFTBUS);
- tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_BUS_GDLR_MASK | EXYNOS4_CLKDIV_BUS_GPLR_MASK);
tmp |= ((exynos4x12_clkdiv_lr_bus[index][0] <<
- S5P_CLKDIV_BUS_GDLR_SHIFT) |
+ EXYNOS4_CLKDIV_BUS_GDLR_SHIFT) |
(exynos4x12_clkdiv_lr_bus[index][1] <<
- S5P_CLKDIV_BUS_GPLR_SHIFT));
+ EXYNOS4_CLKDIV_BUS_GPLR_SHIFT));
- __raw_writel(tmp, S5P_CLKDIV_LEFTBUS);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_LEFTBUS);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_LEFTBUS);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_LEFTBUS);
} while (tmp & 0x11);
/* Change Divider - RIGHTBUS */
- tmp = __raw_readl(S5P_CLKDIV_RIGHTBUS);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_RIGHTBUS);
- tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_BUS_GDLR_MASK | EXYNOS4_CLKDIV_BUS_GPLR_MASK);
tmp |= ((exynos4x12_clkdiv_lr_bus[index][0] <<
- S5P_CLKDIV_BUS_GDLR_SHIFT) |
+ EXYNOS4_CLKDIV_BUS_GDLR_SHIFT) |
(exynos4x12_clkdiv_lr_bus[index][1] <<
- S5P_CLKDIV_BUS_GPLR_SHIFT));
+ EXYNOS4_CLKDIV_BUS_GPLR_SHIFT));
- __raw_writel(tmp, S5P_CLKDIV_RIGHTBUS);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_RIGHTBUS);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_RIGHTBUS);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_RIGHTBUS);
} while (tmp & 0x11);
/* Change Divider - MFC */
- tmp = __raw_readl(S5P_CLKDIV_MFC);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_MFC);
- tmp &= ~(S5P_CLKDIV_MFC_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_MFC_MASK);
tmp |= ((exynos4x12_clkdiv_sclkip[index][0] <<
- S5P_CLKDIV_MFC_SHIFT));
+ EXYNOS4_CLKDIV_MFC_SHIFT));
- __raw_writel(tmp, S5P_CLKDIV_MFC);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_MFC);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_MFC);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_MFC);
} while (tmp & 0x1);
/* Change Divider - JPEG */
- tmp = __raw_readl(S5P_CLKDIV_CAM1);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_CAM1);
- tmp &= ~(S5P_CLKDIV_CAM1_JPEG_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_CAM1_JPEG_MASK);
tmp |= ((exynos4x12_clkdiv_sclkip[index][1] <<
- S5P_CLKDIV_CAM1_JPEG_SHIFT));
+ EXYNOS4_CLKDIV_CAM1_JPEG_SHIFT));
- __raw_writel(tmp, S5P_CLKDIV_CAM1);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_CAM1);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_CAM1);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_CAM1);
} while (tmp & 0x1);
/* Change Divider - FIMC0~3 */
- tmp = __raw_readl(S5P_CLKDIV_CAM);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_CAM);
- tmp &= ~(S5P_CLKDIV_CAM_FIMC0_MASK | S5P_CLKDIV_CAM_FIMC1_MASK |
- S5P_CLKDIV_CAM_FIMC2_MASK | S5P_CLKDIV_CAM_FIMC3_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_CAM_FIMC0_MASK | EXYNOS4_CLKDIV_CAM_FIMC1_MASK |
+ EXYNOS4_CLKDIV_CAM_FIMC2_MASK | EXYNOS4_CLKDIV_CAM_FIMC3_MASK);
tmp |= ((exynos4x12_clkdiv_sclkip[index][2] <<
- S5P_CLKDIV_CAM_FIMC0_SHIFT) |
+ EXYNOS4_CLKDIV_CAM_FIMC0_SHIFT) |
(exynos4x12_clkdiv_sclkip[index][2] <<
- S5P_CLKDIV_CAM_FIMC1_SHIFT) |
+ EXYNOS4_CLKDIV_CAM_FIMC1_SHIFT) |
(exynos4x12_clkdiv_sclkip[index][2] <<
- S5P_CLKDIV_CAM_FIMC2_SHIFT) |
+ EXYNOS4_CLKDIV_CAM_FIMC2_SHIFT) |
(exynos4x12_clkdiv_sclkip[index][2] <<
- S5P_CLKDIV_CAM_FIMC3_SHIFT));
+ EXYNOS4_CLKDIV_CAM_FIMC3_SHIFT));
- __raw_writel(tmp, S5P_CLKDIV_CAM);
+ __raw_writel(tmp, EXYNOS4_CLKDIV_CAM);
do {
- tmp = __raw_readl(S5P_CLKDIV_STAT_CAM1);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_STAT_CAM1);
} while (tmp & 0x1111);
return 0;
return err;
}
-static int exynos4_bus_target(struct device *dev, unsigned long *_freq)
+static int exynos4_bus_target(struct device *dev, unsigned long *_freq,
+ u32 flags)
{
int err = 0;
struct platform_device *pdev = container_of(dev, struct platform_device,
dev);
struct busfreq_data *data = platform_get_drvdata(pdev);
- struct opp *opp = devfreq_recommended_opp(dev, _freq);
- unsigned long old_freq = opp_get_freq(data->curr_opp);
+ struct opp *opp = devfreq_recommended_opp(dev, _freq, flags);
unsigned long freq = opp_get_freq(opp);
+ unsigned long old_freq = opp_get_freq(data->curr_opp);
+
+ if (IS_ERR(opp))
+ return PTR_ERR(opp);
if (old_freq == freq)
return 0;
static int exynos4_bus_get_dev_status(struct device *dev,
struct devfreq_dev_status *stat)
{
- struct platform_device *pdev = container_of(dev, struct platform_device,
- dev);
- struct busfreq_data *data = platform_get_drvdata(pdev);
+ struct busfreq_data *data = dev_get_drvdata(dev);
int busier_dmc;
int cycles_x2 = 2; /* 2 x cycles */
void __iomem *addr;
static void exynos4_bus_exit(struct device *dev)
{
- struct platform_device *pdev = container_of(dev, struct platform_device,
- dev);
- struct busfreq_data *data = platform_get_drvdata(pdev);
+ struct busfreq_data *data = dev_get_drvdata(dev);
devfreq_unregister_opp_notifier(dev, data->devfreq);
}
int mgrp;
int i, err = 0;
- tmp = __raw_readl(S5P_CLKDIV_DMC0);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_DMC0);
for (i = LV_0; i < EX4210_LV_NUM; i++) {
- tmp &= ~(S5P_CLKDIV_DMC0_ACP_MASK |
- S5P_CLKDIV_DMC0_ACPPCLK_MASK |
- S5P_CLKDIV_DMC0_DPHY_MASK |
- S5P_CLKDIV_DMC0_DMC_MASK |
- S5P_CLKDIV_DMC0_DMCD_MASK |
- S5P_CLKDIV_DMC0_DMCP_MASK |
- S5P_CLKDIV_DMC0_COPY2_MASK |
- S5P_CLKDIV_DMC0_CORETI_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_DMC0_ACP_MASK |
+ EXYNOS4_CLKDIV_DMC0_ACPPCLK_MASK |
+ EXYNOS4_CLKDIV_DMC0_DPHY_MASK |
+ EXYNOS4_CLKDIV_DMC0_DMC_MASK |
+ EXYNOS4_CLKDIV_DMC0_DMCD_MASK |
+ EXYNOS4_CLKDIV_DMC0_DMCP_MASK |
+ EXYNOS4_CLKDIV_DMC0_COPY2_MASK |
+ EXYNOS4_CLKDIV_DMC0_CORETI_MASK);
tmp |= ((exynos4210_clkdiv_dmc0[i][0] <<
- S5P_CLKDIV_DMC0_ACP_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_ACP_SHIFT) |
(exynos4210_clkdiv_dmc0[i][1] <<
- S5P_CLKDIV_DMC0_ACPPCLK_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_ACPPCLK_SHIFT) |
(exynos4210_clkdiv_dmc0[i][2] <<
- S5P_CLKDIV_DMC0_DPHY_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_DPHY_SHIFT) |
(exynos4210_clkdiv_dmc0[i][3] <<
- S5P_CLKDIV_DMC0_DMC_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_DMC_SHIFT) |
(exynos4210_clkdiv_dmc0[i][4] <<
- S5P_CLKDIV_DMC0_DMCD_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_DMCD_SHIFT) |
(exynos4210_clkdiv_dmc0[i][5] <<
- S5P_CLKDIV_DMC0_DMCP_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_DMCP_SHIFT) |
(exynos4210_clkdiv_dmc0[i][6] <<
- S5P_CLKDIV_DMC0_COPY2_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_COPY2_SHIFT) |
(exynos4210_clkdiv_dmc0[i][7] <<
- S5P_CLKDIV_DMC0_CORETI_SHIFT));
+ EXYNOS4_CLKDIV_DMC0_CORETI_SHIFT));
data->dmc_divtable[i] = tmp;
}
- tmp = __raw_readl(S5P_CLKDIV_TOP);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_TOP);
for (i = LV_0; i < EX4210_LV_NUM; i++) {
- tmp &= ~(S5P_CLKDIV_TOP_ACLK200_MASK |
- S5P_CLKDIV_TOP_ACLK100_MASK |
- S5P_CLKDIV_TOP_ACLK160_MASK |
- S5P_CLKDIV_TOP_ACLK133_MASK |
- S5P_CLKDIV_TOP_ONENAND_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_TOP_ACLK200_MASK |
+ EXYNOS4_CLKDIV_TOP_ACLK100_MASK |
+ EXYNOS4_CLKDIV_TOP_ACLK160_MASK |
+ EXYNOS4_CLKDIV_TOP_ACLK133_MASK |
+ EXYNOS4_CLKDIV_TOP_ONENAND_MASK);
tmp |= ((exynos4210_clkdiv_top[i][0] <<
- S5P_CLKDIV_TOP_ACLK200_SHIFT) |
+ EXYNOS4_CLKDIV_TOP_ACLK200_SHIFT) |
(exynos4210_clkdiv_top[i][1] <<
- S5P_CLKDIV_TOP_ACLK100_SHIFT) |
+ EXYNOS4_CLKDIV_TOP_ACLK100_SHIFT) |
(exynos4210_clkdiv_top[i][2] <<
- S5P_CLKDIV_TOP_ACLK160_SHIFT) |
+ EXYNOS4_CLKDIV_TOP_ACLK160_SHIFT) |
(exynos4210_clkdiv_top[i][3] <<
- S5P_CLKDIV_TOP_ACLK133_SHIFT) |
+ EXYNOS4_CLKDIV_TOP_ACLK133_SHIFT) |
(exynos4210_clkdiv_top[i][4] <<
- S5P_CLKDIV_TOP_ONENAND_SHIFT));
+ EXYNOS4_CLKDIV_TOP_ONENAND_SHIFT));
data->top_divtable[i] = tmp;
}
int ret;
/* Enable pause function for DREX2 DVFS */
- tmp = __raw_readl(S5P_DMC_PAUSE_CTRL);
- tmp |= DMC_PAUSE_ENABLE;
- __raw_writel(tmp, S5P_DMC_PAUSE_CTRL);
+ tmp = __raw_readl(EXYNOS4_DMC_PAUSE_CTRL);
+ tmp |= EXYNOS4_DMC_PAUSE_ENABLE;
+ __raw_writel(tmp, EXYNOS4_DMC_PAUSE_CTRL);
- tmp = __raw_readl(S5P_CLKDIV_DMC0);
+ tmp = __raw_readl(EXYNOS4_CLKDIV_DMC0);
for (i = 0; i < EX4x12_LV_NUM; i++) {
- tmp &= ~(S5P_CLKDIV_DMC0_ACP_MASK |
- S5P_CLKDIV_DMC0_ACPPCLK_MASK |
- S5P_CLKDIV_DMC0_DPHY_MASK |
- S5P_CLKDIV_DMC0_DMC_MASK |
- S5P_CLKDIV_DMC0_DMCD_MASK |
- S5P_CLKDIV_DMC0_DMCP_MASK);
+ tmp &= ~(EXYNOS4_CLKDIV_DMC0_ACP_MASK |
+ EXYNOS4_CLKDIV_DMC0_ACPPCLK_MASK |
+ EXYNOS4_CLKDIV_DMC0_DPHY_MASK |
+ EXYNOS4_CLKDIV_DMC0_DMC_MASK |
+ EXYNOS4_CLKDIV_DMC0_DMCD_MASK |
+ EXYNOS4_CLKDIV_DMC0_DMCP_MASK);
tmp |= ((exynos4x12_clkdiv_dmc0[i][0] <<
- S5P_CLKDIV_DMC0_ACP_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_ACP_SHIFT) |
(exynos4x12_clkdiv_dmc0[i][1] <<
- S5P_CLKDIV_DMC0_ACPPCLK_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_ACPPCLK_SHIFT) |
(exynos4x12_clkdiv_dmc0[i][2] <<
- S5P_CLKDIV_DMC0_DPHY_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_DPHY_SHIFT) |
(exynos4x12_clkdiv_dmc0[i][3] <<
- S5P_CLKDIV_DMC0_DMC_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_DMC_SHIFT) |
(exynos4x12_clkdiv_dmc0[i][4] <<
- S5P_CLKDIV_DMC0_DMCD_SHIFT) |
+ EXYNOS4_CLKDIV_DMC0_DMCD_SHIFT) |
(exynos4x12_clkdiv_dmc0[i][5] <<
- S5P_CLKDIV_DMC0_DMCP_SHIFT));
+ EXYNOS4_CLKDIV_DMC0_DMCP_SHIFT));
data->dmc_divtable[i] = tmp;
}
static int exynos4_busfreq_resume(struct device *dev)
{
- struct platform_device *pdev = container_of(dev, struct platform_device,
- dev);
- struct busfreq_data *data = platform_get_drvdata(pdev);
+ struct busfreq_data *data = dev_get_drvdata(dev);
busfreq_mon_reset(data);
return 0;
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("EXYNOS4 busfreq driver with devfreq framework");
-MODULE_ALIAS("exynos4-busfreq");
tristate "cy8ctmg110 touchscreen"
depends on I2C
depends on GPIOLIB
-
help
Say Y here if you have a cy8ctmg110 capacitive touchscreen on
an AAVA device.
To compile this driver as a module, choose M here: the
module will be called cy8ctmg110_ts.
+config TOUCHSCREEN_CYTTSP_CORE
+ tristate "Cypress TTSP touchscreen"
+ help
+ Say Y here if you have a touchscreen using controller from
+ the Cypress TrueTouch(tm) Standard Product family connected
+ to your system. You will also need to select appropriate
+ bus connection below.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called cyttsp_core.
+
+config TOUCHSCREEN_CYTTSP_I2C
+ tristate "support I2C bus connection"
+ depends on TOUCHSCREEN_CYTTSP_CORE && I2C
+ help
+ Say Y here if the touchscreen is connected via I2C bus.
+
+ To compile this driver as a module, choose M here: the
+ module will be called cyttsp_i2c.
+
+config TOUCHSCREEN_CYTTSP_SPI
+ tristate "support SPI bus connection"
+ depends on TOUCHSCREEN_CYTTSP_CORE && SPI_MASTER
+ help
+ Say Y here if the touchscreen is connected via SPI bus.
+
+ To compile this driver as a module, choose M here: the
+ module will be called cyttsp_spi.
+
config TOUCHSCREEN_DA9034
tristate "Touchscreen support for Dialog Semiconductor DA9034"
depends on PMIC_DA903X
To compile this driver as a module, choose M here: the
module will be called fujitsu-ts.
+config TOUCHSCREEN_ILI210X
+ tristate "Ilitek ILI210X based touchscreen"
+ depends on I2C
+ help
+ Say Y here if you have a ILI210X based touchscreen
+ controller. This driver supports models ILI2102,
+ ILI2102s, ILI2103, ILI2103s and ILI2105.
+ Such kind of chipsets can be found in Amazon Kindle Fire
+ touchscreens.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called ili210x.
+
config TOUCHSCREEN_S3C2410
tristate "Samsung S3C2410/generic touchscreen input driver"
- depends on ARCH_S3C2410 || SAMSUNG_DEV_TS
+ depends on ARCH_S3C24XX || SAMSUNG_DEV_TS
select S3C_ADC
help
Say Y here if you have the s3c2410 touchscreen.
To compile this driver as a module, choose M here: the
module will be called touchwin.
+config TOUCHSCREEN_TI_TSCADC
+ tristate "TI Touchscreen Interface"
+ depends on ARCH_OMAP2PLUS
+ help
+ Say Y here if you have 4/5/8 wire touchscreen controller
+ to be connected to the ADC controller on your TI AM335x SoC.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called ti_tscadc.
+
config TOUCHSCREEN_ATMEL_TSADCC
tristate "Atmel Touchscreen Interface"
depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
- JASTEC USB Touch Controller/DigiTech DTR-02U
- Zytronic controllers
- Elo TouchSystems 2700 IntelliTouch
+ - EasyTouch USB Touch Controller from Data Modul
Have a look at <http://linux.chapter7.ch/touchkit/> for
a usage description and the required user-space stuff.
bool "NEXIO/iNexio device support" if EXPERT
depends on TOUCHSCREEN_USB_COMPOSITE
+config TOUCHSCREEN_USB_EASYTOUCH
+ default y
+ bool "EasyTouch USB Touch controller device support" if EMBEDDED
+ depends on TOUCHSCREEN_USB_COMPOSITE
+ help
+ Say Y here if you have a EasyTouch USB Touch controller device support.
+ If unsure, say N.
+
config TOUCHSCREEN_TOUCHIT213
tristate "Sahara TouchIT-213 touchscreen"
select SERIO
if NEW_LEDS
config LEDS_CLASS
- bool "LED Class Support"
+ tristate "LED Class Support"
help
This option enables the led sysfs class in /sys/class/leds. You'll
need this to do anything useful with LEDs. If unsure, say N.
config LEDS_S3C24XX
tristate "LED Support for Samsung S3C24XX GPIO LEDs"
depends on LEDS_CLASS
- depends on ARCH_S3C2410
+ depends on ARCH_S3C24XX
help
This option enables support for LEDs connected to GPIO lines
on Samsung S3C24XX series CPUs, such as the S3C2410 and S3C2440.
This option enables support for the Soekris net4801 and net4826 error
LED.
-config LEDS_NET5501
- tristate "LED Support for Soekris net5501 series Error LED"
- depends on LEDS_TRIGGERS
- depends on X86 && GPIO_CS5535
- select LEDS_TRIGGER_DEFAULT_ON
- default n
- help
- Add support for the Soekris net5501 board (detection, error led
- and GPIO).
-
config LEDS_FSG
tristate "LED Support for the Freecom FSG-3"
depends on LEDS_CLASS
LED driver chips accessed via the I2C bus. Supported
devices include PCA9550, PCA9551, PCA9552, and PCA9553.
+config LEDS_PCA9633
+ tristate "LED support for PCA9633 I2C chip"
+ depends on LEDS_CLASS
+ depends on I2C
+ help
+ This option enables support for LEDs connected to the PCA9633
+ LED driver chip accessed via the I2C bus.
+
config LEDS_WM831X_STATUS
tristate "LED support for status LEDs on WM831x PMICs"
depends on LEDS_CLASS
config MTD_NAND_S3C2410
tristate "NAND Flash support for Samsung S3C SoCs"
- depends on ARCH_S3C2410 || ARCH_S3C64XX
+ depends on ARCH_S3C24XX || ARCH_S3C64XX
help
This enables the NAND flash controller on the S3C24xx and S3C64xx
SoCs
Enabling this option will enable you to use this to control
external NAND devices.
+config MTD_NAND_FSL_IFC
+ tristate "NAND support for Freescale IFC controller"
+ depends on MTD_NAND && FSL_SOC
+ select FSL_IFC
+ help
+ Various Freescale chips e.g P1010, include a NAND Flash machine
+ with built-in hardware ECC capabilities.
+ Enabling this option will enable you to use this to control
+ external NAND devices.
+
config MTD_NAND_FSL_UPM
tristate "Support for NAND on Freescale UPM"
depends on PPC_83xx || PPC_85xx
This driver can also be built as a module. If so, the module
will be called rtc-ds1742.
+config RTC_DRV_DA9052
+ tristate "Dialog DA9052/DA9053 RTC"
+ depends on PMIC_DA9052
+ help
+ Say y here to support the RTC driver for Dialog Semiconductor
+ DA9052-BC and DA9053-AA/Bx PMICs.
+
config RTC_DRV_EFI
tristate "EFI RTC"
depends on IA64
config RTC_DRV_S3C
tristate "Samsung S3C series SoC RTC"
- depends on ARCH_S3C2410 || ARCH_S3C64XX || HAVE_S3C_RTC
+ depends on ARCH_S3C64XX || HAVE_S3C_RTC
help
RTC (Realtime Clock) driver for the clock inbuilt into the
Samsung S3C24XX series of SoCs. This can provide periodic
This drive can also be built as a module. If so, the module
will be called rtc-puv3.
+config RTC_DRV_LOONGSON1
+ tristate "loongson1 RTC support"
+ depends on MACH_LOONGSON1
+ help
+ This is a driver for the loongson1 on-chip Counter0 (Time-Of-Year
+ counter) to be used as a RTC.
+
+ This driver can also be built as a module. If so, the module
+ will be called rtc-ls1x.
+
endif # RTC_CLASS
#define RTC_DEF_TRIM 0
static const unsigned long RTC_FREQ = 1024;
- static struct rtc_time rtc_alarm;
static DEFINE_SPINLOCK(sa1100_rtc_lock);
- static inline int rtc_periodic_alarm(struct rtc_time *tm)
- {
- return (tm->tm_year == -1) ||
- ((unsigned)tm->tm_mon >= 12) ||
- ((unsigned)(tm->tm_mday - 1) >= 31) ||
- ((unsigned)tm->tm_hour > 23) ||
- ((unsigned)tm->tm_min > 59) ||
- ((unsigned)tm->tm_sec > 59);
- }
-
- /*
- * Calculate the next alarm time given the requested alarm time mask
- * and the current time.
- */
- static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
- struct rtc_time *alrm)
- {
- unsigned long next_time;
- unsigned long now_time;
-
- next->tm_year = now->tm_year;
- next->tm_mon = now->tm_mon;
- next->tm_mday = now->tm_mday;
- next->tm_hour = alrm->tm_hour;
- next->tm_min = alrm->tm_min;
- next->tm_sec = alrm->tm_sec;
-
- rtc_tm_to_time(now, &now_time);
- rtc_tm_to_time(next, &next_time);
-
- if (next_time < now_time) {
- /* Advance one day */
- next_time += 60 * 60 * 24;
- rtc_time_to_tm(next_time, next);
- }
- }
-
- static int rtc_update_alarm(struct rtc_time *alrm)
- {
- struct rtc_time alarm_tm, now_tm;
- unsigned long now, time;
- int ret;
-
- do {
- now = RCNR;
- rtc_time_to_tm(now, &now_tm);
- rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
- ret = rtc_tm_to_time(&alarm_tm, &time);
- if (ret != 0)
- break;
-
- RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
- RTAR = time;
- } while (now != RCNR);
-
- return ret;
- }
-
static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
{
struct platform_device *pdev = to_platform_device(dev_id);
rtc_update_irq(rtc, 1, events);
- if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
- rtc_update_alarm(&rtc_alarm);
-
spin_unlock(&sa1100_rtc_lock);
return IRQ_HANDLED;
struct platform_device *plat_dev = to_platform_device(dev);
struct rtc_device *rtc = platform_get_drvdata(plat_dev);
- ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
- "rtc 1Hz", dev);
+ ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, 0, "rtc 1Hz", dev);
if (ret) {
dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
goto fail_ui;
}
- ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
- "rtc Alrm", dev);
+ ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, 0,
+ "rtc Alrm", dev);
if (ret) {
dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
goto fail_ai;
{
u32 rtsr;
- memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
rtsr = RTSR;
alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
+ unsigned long time;
int ret;
spin_lock_irq(&sa1100_rtc_lock);
- ret = rtc_update_alarm(&alrm->time);
- if (ret == 0) {
- if (alrm->enabled)
- RTSR |= RTSR_ALE;
- else
- RTSR &= ~RTSR_ALE;
- }
+ ret = rtc_tm_to_time(&alrm->time, &time);
+ if (ret != 0)
+ goto out;
+ RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
+ RTAR = time;
+ if (alrm->enabled)
+ RTSR |= RTSR_ALE;
+ else
+ RTSR &= ~RTSR_ALE;
+ out:
spin_unlock_irq(&sa1100_rtc_lock);
return ret;
If you say yes to this option, support will be included for the
PSC SPI controller found on Au1550, Au1200 and Au1300 series.
+config SPI_BCM63XX
+ tristate "Broadcom BCM63xx SPI controller"
+ depends on BCM63XX
+ help
+ Enable support for the SPI controller on the Broadcom BCM63xx SoCs.
+
config SPI_BITBANG
tristate "Utilities for Bitbanging SPI masters"
help
config SPI_DAVINCI
tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"
- depends on SPI_MASTER && ARCH_DAVINCI
+ depends on ARCH_DAVINCI
select SPI_BITBANG
help
SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.
config SPI_MPC512x_PSC
tristate "Freescale MPC512x PSC SPI controller"
- depends on SPI_MASTER && PPC_MPC512x
+ depends on PPC_MPC512x
help
This enables using the Freescale MPC5121 Programmable Serial
Controller in SPI master mode.
config SPI_OMAP_100K
tristate "OMAP SPI 100K"
- depends on SPI_MASTER && (ARCH_OMAP850 || ARCH_OMAP730)
+ depends on ARCH_OMAP850 || ARCH_OMAP730
help
OMAP SPI 100K master controller for omap7xx boards.
config SPI_PPC4xx
tristate "PPC4xx SPI Controller"
- depends on PPC32 && 4xx && SPI_MASTER
+ depends on PPC32 && 4xx
select SPI_BITBANG
help
This selects a driver for the PPC4xx SPI Controller.
config SPI_PXA2XX_PCI
def_bool SPI_PXA2XX && X86_32 && PCI
+config SPI_RSPI
+ tristate "Renesas RSPI controller"
+ depends on SUPERH
+ help
+ SPI driver for Renesas RSPI blocks.
+
config SPI_S3C24XX
tristate "Samsung S3C24XX series SPI"
- depends on ARCH_S3C2410 && EXPERIMENTAL
+ depends on ARCH_S3C24XX && EXPERIMENTAL
select SPI_BITBANG
help
SPI driver for Samsung S3C24XX series ARM SoCs
help
SPI driver for SuperH SCI blocks.
+config SPI_SH_HSPI
+ tristate "SuperH HSPI controller"
+ depends on ARCH_SHMOBILE
+ help
+ SPI driver for SuperH HSPI blocks.
+
+config SPI_SIRF
+ tristate "CSR SiRFprimaII SPI controller"
+ depends on ARCH_PRIMA2
+ select SPI_BITBANG
+ help
+ SPI driver for CSR SiRFprimaII SoCs
+
config SPI_STMP3XXX
tristate "Freescale STMP37xx/378x SPI/SSP controller"
- depends on ARCH_STMP3XXX && SPI_MASTER
+ depends on ARCH_STMP3XXX
help
SPI driver for Freescale STMP37xx/378x SoC SSP interface
config SPI_DESIGNWARE
tristate "DesignWare SPI controller core support"
- depends on SPI_MASTER
help
general driver for SPI controller core from DesignWare
This option adds core support for Universal Serial Bus (USB).
You will also need drivers from the following menu to make use of it.
-if USB_SUPPORT
-
-config USB_COMMON
- tristate
- default y
- depends on USB || USB_GADGET
-
-# Host-side USB depends on having a host controller
-# NOTE: dummy_hcd is always an option, but it's ignored here ...
-# NOTE: SL-811 option should be board-specific ...
-config USB_ARCH_HAS_HCD
- boolean
- default y if USB_ARCH_HAS_OHCI
- default y if USB_ARCH_HAS_EHCI
- default y if USB_ARCH_HAS_XHCI
- default y if PCMCIA && !M32R # sl811_cs
- default y if ARM # SL-811
- default y if BLACKFIN # SL-811
- default y if SUPERH # r8a66597-hcd
- default PCI
-
# many non-PCI SOC chips embed OHCI
config USB_ARCH_HAS_OHCI
boolean
# ARM:
default y if SA1111
default y if ARCH_OMAP
- default y if ARCH_S3C2410
+ default y if ARCH_S3C24XX
default y if PXA27x
default y if PXA3xx
default y if ARCH_EP93XX
default y if MICROBLAZE
default y if SPARC_LEON
default y if ARCH_MMP
+ default y if MACH_LOONGSON1
default PCI
# some non-PCI HCDs implement xHCI
boolean
default PCI
+if USB_SUPPORT
+
+config USB_COMMON
+ tristate
+ default y
+ depends on USB || USB_GADGET
+
+# Host-side USB depends on having a host controller
+# NOTE: dummy_hcd is always an option, but it's ignored here ...
+# NOTE: SL-811 option should be board-specific ...
+config USB_ARCH_HAS_HCD
+ boolean
+ default y if USB_ARCH_HAS_OHCI
+ default y if USB_ARCH_HAS_EHCI
+ default y if USB_ARCH_HAS_XHCI
+ default y if PCMCIA && !M32R # sl811_cs
+ default y if ARM # SL-811
+ default y if BLACKFIN # SL-811
+ default y if SUPERH # r8a66597-hcd
+ default PCI
+
# ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface.
config USB
tristate "Support for Host-side USB"
config USB_AT91
tristate "Atmel AT91 USB Device Port"
- depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91CAP9 && !ARCH_AT91SAM9G45
+ depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91SAM9G45
help
Many Atmel AT91 processors (such as the AT91RM2000) have a
full speed USB Device Port with support for five configurable
config USB_ATMEL_USBA
tristate "Atmel USBA"
select USB_GADGET_DUALSPEED
- depends on AVR32 || ARCH_AT91CAP9 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
+ depends on AVR32 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
help
USBA is the integrated high-speed USB Device controller on
the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel.
config USB_S3C2410
tristate "S3C2410 USB Device Controller"
- depends on ARCH_S3C2410
+ depends on ARCH_S3C24XX
help
Samsung's S3C2410 is an ARM-4 processor with an integrated
full speed USB 1.1 device controller. It has 4 configurable
config USB_S3C_HSUDC
tristate "S3C2416, S3C2443 and S3C2450 USB Device Controller"
- depends on ARCH_S3C2410
+ depends on ARCH_S3C24XX
select USB_GADGET_DUALSPEED
help
Samsung's S3C2416, S3C2443 and S3C2450 is an ARM9 based SoC
depends on SND
select SND_PCM
help
- Gadget Audio is compatible with USB Audio Class specification 1.0.
- It will include at least one AudioControl interface, zero or more
- AudioStream interface and zero or more MIDIStream interface.
-
- Gadget Audio will use on-board ALSA (CONFIG_SND) audio card to
- playback or capture audio stream.
+ This Gadget Audio driver is compatible with USB Audio Class
+ specification 2.0. It implements 1 AudioControl interface,
+ 1 AudioStreaming Interface each for USB-OUT and USB-IN.
+ Number of channels, sample rate and sample size can be
+ specified as module parameters.
+ This driver doesn't expect any real Audio codec to be present
+ on the device - the audio streams are simply sinked to and
+ sourced from a virtual ALSA sound card created. The user-space
+ application may choose to do whatever it wants with the data
+ received from the USB Host and choose to provide whatever it
+ wants as audio data to the USB Host.
Say "y" to link the driver statically, or "m" to build a
dynamically linked module called "g_audio".
+config GADGET_UAC1
+ bool "UAC 1.0 (Legacy)"
+ depends on USB_AUDIO
+ help
+ If you instead want older UAC Spec-1.0 driver that also has audio
+ paths hardwired to the Audio codec chip on-board and doesn't work
+ without one.
+
config USB_ETH
tristate "Ethernet Gadget (with CDC Ethernet support)"
depends on NET
help
This driver implements USB CDC NCM subclass standard. NCM is
an advanced protocol for Ethernet encapsulation, allows grouping
- of several ethernet frames into one USB transfer and diffferent
+ of several ethernet frames into one USB transfer and different
alignment possibilities.
Say "y" to link the driver statically, or "m" to build a
ohci_usb_reset (ohci);
ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
free_irq(hcd->irq, hcd);
- hcd->irq = -1;
+ hcd->irq = 0;
if (quirk_zfmicro(ohci))
del_timer(&ohci->unlink_watchdog);
#define SA1111_DRIVER ohci_hcd_sa1111_driver
#endif
- #if defined(CONFIG_ARCH_S3C2410) || defined(CONFIG_ARCH_S3C64XX)
+ #if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S3C64XX)
#include "ohci-s3c2410.c"
#define PLATFORM_DRIVER ohci_hcd_s3c2410_driver
#endif
#define PLATFORM_DRIVER ohci_hcd_at91_driver
#endif
-#ifdef CONFIG_ARCH_PNX4008
-#include "ohci-pnx4008.c"
-#define PLATFORM_DRIVER usb_hcd_pnx4008_driver
+#if defined(CONFIG_ARCH_PNX4008) || defined(CONFIG_ARCH_LPC32XX)
+#include "ohci-nxp.c"
+#define PLATFORM_DRIVER usb_hcd_nxp_driver
#endif
#ifdef CONFIG_ARCH_DAVINCI_DA8XX
#define PLATFORM_DRIVER ohci_hcd_cns3xxx_driver
#endif
-#ifdef CONFIG_USB_OHCI_ATH79
-#include "ohci-ath79.c"
-#define PLATFORM_DRIVER ohci_hcd_ath79_driver
-#endif
-
#ifdef CONFIG_CPU_XLR
#include "ohci-xls.c"
#define PLATFORM_DRIVER ohci_xls_driver
#endif
+#ifdef CONFIG_USB_OHCI_HCD_PLATFORM
+#include "ohci-platform.c"
+#define PLATFORM_DRIVER ohci_platform_driver
+#endif
+
#if !defined(PCI_DRIVER) && \
!defined(PLATFORM_DRIVER) && \
!defined(OMAP1_PLATFORM_DRIVER) && \
help
Say Y here if you want to control the backlight of your display.
+config FB_I740
+ tristate "Intel740 support (EXPERIMENTAL)"
+ depends on EXPERIMENTAL && FB && PCI
+ select FB_MODE_HELPERS
+ select FB_CFB_FILLRECT
+ select FB_CFB_COPYAREA
+ select FB_CFB_IMAGEBLIT
+ select VGASTATE
+ select FB_DDC
+ help
+ This driver supports graphics cards based on Intel740 chip.
+
config FB_I810
tristate "Intel 810/815 support (EXPERIMENTAL)"
depends on EXPERIMENTAL && FB && PCI && X86_32 && AGP_INTEL
---help---
Driver for the on-chip SH-Mobile HDMI controller.
-config FB_SH_MOBILE_MERAM
- tristate "SuperH Mobile MERAM read ahead support for LCDC"
- depends on FB_SH_MOBILE_LCDC
- default y
- ---help---
- Enable MERAM support for the SH-Mobile LCD controller.
-
- This will allow for caching of the framebuffer to provide more
- reliable access under heavy main memory bus traffic situations.
- Up to 4 memory channels can be configured, allowing 4 RGB or
- 2 YCbCr framebuffers to be configured.
-
config FB_TMIO
tristate "Toshiba Mobile IO FrameBuffer support"
depends on FB && MFD_CORE
config FB_S3C2410
tristate "S3C2410 LCD framebuffer support"
- depends on FB && ARCH_S3C2410
+ depends on FB && ARCH_S3C24XX
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
+ select FB_CFB_REV_PIXELS_IN_BYTE
---help---
This is the frame buffer device driver for the TI LCD controller
found on DA8xx/OMAP-L1xx SoCs.
select FB_SYS_IMAGEBLIT
select FB_SYS_FOPS
select FB_DEFERRED_IO
+ select INPUT_XEN_KBDDEV_FRONTEND
select XEN_XENBUS_FRONTEND
default y
help
source "drivers/video/omap/Kconfig"
source "drivers/video/omap2/Kconfig"
-
+source "drivers/video/exynos/Kconfig"
source "drivers/video/backlight/Kconfig"
if VT
source "drivers/video/logo/Kconfig"
endif
+config FB_SH_MOBILE_MERAM
+ tristate "SuperH Mobile MERAM read ahead support"
+ depends on (SUPERH || ARCH_SHMOBILE)
+ select GENERIC_ALLOCATOR
+ ---help---
+ Enable MERAM support for the SuperH controller.
+
+ This will allow for caching of the framebuffer to provide more
+ reliable access under heavy main memory bus traffic situations.
+ Up to 4 memory channels can be configured, allowing 4 RGB or
+ 2 YCbCr framebuffers to be configured.
+
endmenu
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
-#include <plat/sram.h>
#include <plat/clock.h>
#include <video/omapdss.h>
switch (color_mode) {
case OMAP_DSS_COLOR_NV12:
m = 0x0; break;
- case OMAP_DSS_COLOR_RGB12U:
+ case OMAP_DSS_COLOR_RGBX16:
m = 0x1; break;
case OMAP_DSS_COLOR_RGBA16:
m = 0x2; break;
- case OMAP_DSS_COLOR_RGBX16:
+ case OMAP_DSS_COLOR_RGB12U:
m = 0x4; break;
case OMAP_DSS_COLOR_ARGB16:
m = 0x5; break;
m = 0x8; break;
case OMAP_DSS_COLOR_RGB24P:
m = 0x9; break;
- case OMAP_DSS_COLOR_YUV2:
+ case OMAP_DSS_COLOR_RGBX16:
m = 0xa; break;
- case OMAP_DSS_COLOR_UYVY:
+ case OMAP_DSS_COLOR_RGBA16:
m = 0xb; break;
case OMAP_DSS_COLOR_ARGB32:
m = 0xc; break;
dispc_ovl_set_burst_size(i, burst_size);
}
-u32 dispc_ovl_get_burst_size(enum omap_plane plane)
+static u32 dispc_ovl_get_burst_size(enum omap_plane plane)
{
unsigned unit = dss_feat_get_burst_size_unit();
/* burst multiplier is always x8 (see dispc_configure_burst_sizes()) */
}
}
-u32 dispc_ovl_get_fifo_size(enum omap_plane plane)
+static u32 dispc_ovl_get_fifo_size(enum omap_plane plane)
{
return dispc.fifo_size[plane];
}
dss_feat_get_reg_field(FEAT_REG_FIFOHIGHTHRESHOLD, &hi_start, &hi_end);
dss_feat_get_reg_field(FEAT_REG_FIFOLOWTHRESHOLD, &lo_start, &lo_end);
- DSSDBG("fifo(%d) low/high old %u/%u, new %u/%u\n",
+ DSSDBG("fifo(%d) threshold (bytes), old %u/%u, new %u/%u\n",
plane,
REG_GET(DISPC_OVL_FIFO_THRESHOLD(plane),
- lo_start, lo_end),
+ lo_start, lo_end) * unit,
REG_GET(DISPC_OVL_FIFO_THRESHOLD(plane),
- hi_start, hi_end),
- low, high);
+ hi_start, hi_end) * unit,
+ low * unit, high * unit);
dispc_write_reg(DISPC_OVL_FIFO_THRESHOLD(plane),
FLD_VAL(high, hi_start, hi_end) |
void dispc_enable_fifomerge(bool enable)
{
+ if (!dss_has_feature(FEAT_FIFO_MERGE)) {
+ WARN_ON(enable);
+ return;
+ }
+
DSSDBG("FIFO merge %s\n", enable ? "enabled" : "disabled");
REG_FLD_MOD(DISPC_CONFIG, enable ? 1 : 0, 14, 14);
}
+void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
+ u32 *fifo_low, u32 *fifo_high, bool use_fifomerge)
+{
+ /*
+ * All sizes are in bytes. Both the buffer and burst are made of
+ * buffer_units, and the fifo thresholds must be buffer_unit aligned.
+ */
+
+ unsigned buf_unit = dss_feat_get_buffer_size_unit();
+ unsigned ovl_fifo_size, total_fifo_size, burst_size;
+ int i;
+
+ burst_size = dispc_ovl_get_burst_size(plane);
+ ovl_fifo_size = dispc_ovl_get_fifo_size(plane);
+
+ if (use_fifomerge) {
+ total_fifo_size = 0;
+ for (i = 0; i < omap_dss_get_num_overlays(); ++i)
+ total_fifo_size += dispc_ovl_get_fifo_size(i);
+ } else {
+ total_fifo_size = ovl_fifo_size;
+ }
+
+ /*
+ * We use the same low threshold for both fifomerge and non-fifomerge
+ * cases, but for fifomerge we calculate the high threshold using the
+ * combined fifo size
+ */
+
+ if (dss_has_feature(FEAT_OMAP3_DSI_FIFO_BUG)) {
+ *fifo_low = ovl_fifo_size - burst_size * 2;
+ *fifo_high = total_fifo_size - burst_size;
+ } else {
+ *fifo_low = ovl_fifo_size - burst_size;
+ *fifo_high = total_fifo_size - buf_unit;
+ }
+}
+
static void dispc_ovl_set_fir(enum omap_plane plane,
int hinc, int vinc,
enum omap_color_component color_comp)
u16 height, u16 out_width, u16 out_height)
{
unsigned int hf, vf;
+ unsigned long pclk = dispc_mgr_pclk_rate(channel);
/*
* FIXME how to determine the 'A' factor
if (cpu_is_omap24xx()) {
if (vf > 1 && hf > 1)
- return dispc_mgr_pclk_rate(channel) * 4;
+ return pclk * 4;
else
- return dispc_mgr_pclk_rate(channel) * 2;
+ return pclk * 2;
} else if (cpu_is_omap34xx()) {
- return dispc_mgr_pclk_rate(channel) * vf * hf;
+ return pclk * vf * hf;
} else {
- return dispc_mgr_pclk_rate(channel) * hf;
+ if (hf > 1)
+ return DIV_ROUND_UP(pclk, out_width) * width;
+ else
+ return pclk;
}
}
if (dss_has_feature(FEAT_FUNCGATED))
REG_FLD_MOD(DISPC_CONFIG, 1, 9, 9);
- /* L3 firewall setting: enable access to OCM RAM */
- /* XXX this should be somewhere in plat-omap */
- if (cpu_is_omap24xx())
- __raw_writel(0x402000b0, OMAP2_L3_IO_ADDRESS(0x680050a0));
-
_dispc_setup_color_conv_coef();
dispc_set_loadmode(OMAP_DSS_LOAD_FRAME_ONLY);
dispc.pdev = pdev;
- clk = clk_get(&pdev->dev, "fck");
- if (IS_ERR(clk)) {
- DSSERR("can't get fck\n");
- r = PTR_ERR(clk);
- goto err_get_clk;
- }
-
- dispc.dss_clk = clk;
-
spin_lock_init(&dispc.irq_lock);
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
dispc_mem = platform_get_resource(dispc.pdev, IORESOURCE_MEM, 0);
if (!dispc_mem) {
DSSERR("can't get IORESOURCE_MEM DISPC\n");
- r = -EINVAL;
- goto err_ioremap;
+ return -EINVAL;
}
- dispc.base = ioremap(dispc_mem->start, resource_size(dispc_mem));
+
+ dispc.base = devm_ioremap(&pdev->dev, dispc_mem->start,
+ resource_size(dispc_mem));
if (!dispc.base) {
DSSERR("can't ioremap DISPC\n");
- r = -ENOMEM;
- goto err_ioremap;
+ return -ENOMEM;
}
+
dispc.irq = platform_get_irq(dispc.pdev, 0);
if (dispc.irq < 0) {
DSSERR("platform_get_irq failed\n");
- r = -ENODEV;
- goto err_irq;
+ return -ENODEV;
}
- r = request_irq(dispc.irq, omap_dispc_irq_handler, IRQF_SHARED,
- "OMAP DISPC", dispc.pdev);
+ r = devm_request_irq(&pdev->dev, dispc.irq, omap_dispc_irq_handler,
+ IRQF_SHARED, "OMAP DISPC", dispc.pdev);
if (r < 0) {
DSSERR("request_irq failed\n");
- goto err_irq;
+ return r;
+ }
+
+ clk = clk_get(&pdev->dev, "fck");
+ if (IS_ERR(clk)) {
+ DSSERR("can't get fck\n");
+ r = PTR_ERR(clk);
+ return r;
}
+ dispc.dss_clk = clk;
+
pm_runtime_enable(&pdev->dev);
r = dispc_runtime_get();
err_runtime_get:
pm_runtime_disable(&pdev->dev);
- free_irq(dispc.irq, dispc.pdev);
-err_irq:
- iounmap(dispc.base);
-err_ioremap:
clk_put(dispc.dss_clk);
-err_get_clk:
return r;
}
clk_put(dispc.dss_clk);
- free_irq(dispc.irq, dispc.pdev);
- iounmap(dispc.base);
return 0;
}
#include <linux/pm_runtime.h>
#include <video/omapdss.h>
+
+ #include <plat/cpu.h>
#include <plat/clock.h>
+
#include "dss.h"
#include "dss_features.h"
dss_mem = platform_get_resource(dss.pdev, IORESOURCE_MEM, 0);
if (!dss_mem) {
DSSERR("can't get IORESOURCE_MEM DSS\n");
- r = -EINVAL;
- goto err_ioremap;
+ return -EINVAL;
}
- dss.base = ioremap(dss_mem->start, resource_size(dss_mem));
+
+ dss.base = devm_ioremap(&pdev->dev, dss_mem->start,
+ resource_size(dss_mem));
if (!dss.base) {
DSSERR("can't ioremap DSS\n");
- r = -ENOMEM;
- goto err_ioremap;
+ return -ENOMEM;
}
r = dss_get_clocks();
if (r)
- goto err_clocks;
+ return r;
pm_runtime_enable(&pdev->dev);
err_runtime_get:
pm_runtime_disable(&pdev->dev);
dss_put_clocks();
-err_clocks:
- iounmap(dss.base);
-err_ioremap:
return r;
}
dpi_exit();
sdi_exit();
- iounmap(dss.base);
-
pm_runtime_disable(&pdev->dev);
dss_put_clocks();
config S3C2410_WATCHDOG
tristate "S3C2410 Watchdog"
- depends on ARCH_S3C2410 || HAVE_S3C2410_WATCHDOG
+ depends on HAVE_S3C2410_WATCHDOG
select WATCHDOG_CORE
help
Watchdog timer block in the Samsung SoCs. This will reboot
config GEF_WDT
tristate "GE Watchdog Timer"
- depends on GEF_SBC610 || GEF_SBC310 || GEF_PPC9A
+ depends on GE_FPGA
---help---
Watchdog timer found in a number of GE single board computers.
projects / linux.git / commitdiff