Merge tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "The devicetree changes overall are again dominated by the Qualcomm
  Snapdragon platform that weighs in at over 300 changesets, but there
  are many updates across other platforms as well, notably Mediatek,
  NXP, Rockchips, Renesas, TI, Samsung and ST Microelectronics. These
  all add new features for existing machines, as well as new machines
  and SoCs.

  The newly added SoCs are:

   - Allwinner T113-s, an Cortex-A7 based variant of the RISC-V based D1
     chip.

   - StarFive JH7110, a RISC-V SoC based on the Sifive U74 core like its
     JH7100 predecessor, but with additional CPU cores and a GPU.

   - Apple M2 as used in current Macbook Air/Pro and Mac Mini gets
     added, with comparable support as its M1 predecessor.

   - Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC

   - Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs, based on
     the Cortex-A53 and Cortex-A73 cores, respectively.

   - Qualcomm sa8775p is an automotive SoC derived from the Snapdragon
     family.

  Including the initial board support for the added SoC platforms, there
  are 52 new machines. The largest group are 19 boards industrial
  embedded boards based on the NXP i.MX6 (32-bit) and i.MX8 (64-bit)
  families.

  Others include:

   - Two boards based on the Allwinner f1c200s ultra-low-cost chip

   - Three 'Banana Pi' variants based on the Amlogic g12b (A311D, S922X)
     SoC.

   - The Gl.Inet mv1000 router based on Marvell Armada 3720

   - A Wifi/LTE Dongle based on Qualcomm msm8916

   - Two robotics boards based on Qualcomm QRB chips

   - Three Snapdragon based phones made by Xiaomi

   - Five developments boards based on various Rockchip SoCs, including
     the rk3588s-khadas-edge2 and a few NanoPi models

   - The AM625 Beagleplay industrial SBC

  Another 14 machines get removed: both boards for the obsolete 'oxnas'
  platform, three boards for the Renesas r8a77950 SoC that were only for
  pre-production chips, and various chromebook models based on the
  Qualcomm Sc7180 'trogdor' design that were never part of products"

* tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (836 commits)
  arm64: dts: rockchip: Add support for volume keys to rk3399-pinephone-pro
  arm64: dts: rockchip: Add vdd_cpu_big regulators to rk3588-rock-5b
  arm64: dts: rockchip: Use generic name for es8316 on Pinebook Pro and Rock 5B
  arm64: dts: rockchip: Drop RTC clock-frequency on rk3588-rock-5b
  arm64: dts: apple: t8112: Add PWM controller
  arm64: dts: apple: t600x: Add PWM controller
  arm64: dts: apple: t8103: Add PWM controller
  arm64: dts: rockchip: Add pinctrl gpio-ranges for rk356x
  ARM: dts: nomadik: Replace deprecated spi-gpio properties
  ARM: dts: aspeed-g6: Add UDMA node
  ARM: dts: aspeed: greatlakes: add mctp device
  ARM: dts: aspeed: greatlakes: Add gpio names
  ARM: dts: aspeed: p10bmc: Change power supply info
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMM050 Magnetometer
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMA255 Accelerometer
  arm64: dts: mediatek: mt6795: Add tertiary PWM node
  arm64: dts: rockchip: add panel to Anbernic RG353 series
  dt-bindings: arm: Add Data Modul i.MX8M Plus eDM SBC
  dt-bindings: arm: fsl: Add chargebyte Tarragon
  dt-bindings: vendor-prefixes: add chargebyte
  ...

diff --cc Documentation/arm/index.rst
Simple merge

diff --cc MAINTAINERS
Simple merge

diff --cc arch/arm/boot/dts/imx7d-remarkable2.dts
Simple merge

diff --cc arch/arm/boot/dts/rk3288.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
Simple merge

diff --cc arch/arm64/boot/dts/freescale/imx8mn.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/freescale/imx8mp.dtsi
index a237275ee017963d26bce4bbad9fb88ef4dcb6de,7879bbedd01b370e24d59b3284bb1f978a06c55e..f81391993354f484aa60380a4b23545b3cfb724e
--- 1/arch/arm64/boot/dts/freescale/imx8mp.dtsi
--- 2/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@@ -1126,13 -1174,68 +1174,68 @@@
                        #size-cells = <1>;
                        ranges;
  
+                       mipi_dsi: dsi@32e60000 {
+                               compatible = "fsl,imx8mp-mipi-dsim";
+                               reg = <0x32e60000 0x400>;
+                               clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
+                                        <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
+                               clock-names = "bus_clk", "sclk_mipi";
+                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_APB>,
+                                                 <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
+                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
+                                                        <&clk IMX8MP_CLK_24M>;
+                               assigned-clock-rates = <200000000>, <24000000>;
+                               samsung,pll-clock-frequency = <24000000>;
+                               interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_DSI_1>;
+                               status = "disabled";
+ 
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+ 
+                                       port@0 {
+                                               reg = <0>;
+ 
+                                               dsim_from_lcdif1: endpoint {
+                                                       remote-endpoint = <&lcdif1_to_dsim>;
+                                               };
+                                       };
+                               };
+                       };
+ 
+                       lcdif1: display-controller@32e80000 {
+                               compatible = "fsl,imx8mp-lcdif";
+                               reg = <0x32e80000 0x10000>;
+                               clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>,
+                                        <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
+                                        <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
+                               clock-names = "pix", "axi", "disp_axi";
+                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>,
+                                                 <&clk IMX8MP_CLK_MEDIA_AXI>,
+                                                 <&clk IMX8MP_CLK_MEDIA_APB>;
+                               assigned-clock-parents = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
+                                                        <&clk IMX8MP_SYS_PLL2_1000M>,
+                                                        <&clk IMX8MP_SYS_PLL1_800M>;
+                               assigned-clock-rates = <594000000>, <500000000>, <200000000>;
+                               interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_LCDIF_1>;
+                               status = "disabled";
+ 
+                               port {
+                                       lcdif1_to_dsim: endpoint {
+                                               remote-endpoint = <&dsim_from_lcdif1>;
+                                       };
+                               };
+                       };
+ 
                        lcdif2: display-controller@32e90000 {
                                compatible = "fsl,imx8mp-lcdif";
 -                              reg = <0x32e90000 0x238>;
 +                              reg = <0x32e90000 0x10000>;
                                interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>,
 -                                       <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
 -                                       <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
 +                                       <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
 +                                       <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
                                clock-names = "pix", "axi", "disp_axi";
                                assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
                                                  <&clk IMX8MP_VIDEO_PLL1>;

diff --cc arch/arm64/boot/dts/freescale/imx93.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/nvidia/tegra194.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/nvidia/tegra234.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
Simple merge

diff --cc arch/arm64/boot/dts/rockchip/rk3399.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
index 9a0e217f069ff1a8ecdb75c5903f6407a1dfc708,17450aa283b97dc7efe4636c252abf5590b2bc78..2a2821f4c580b0afe219394e0de64072e924482f
--- 1/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
--- 2/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
@@@ -16,12 -16,52 +16,54 @@@
  };
  
  &cru {
 -      assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
 -      assigned-clock-rates = <1200000000>, <200000000>, <241500000>;
 +      assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
 +                        <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
 +      assigned-clock-rates = <32768>, <1200000000>,
 +                             <200000000>, <241500000>;
  };
  
+ &dsi_dphy0 {
+       status = "okay";
+ };
+ 
+ &dsi0 {
+       status = "okay";
+       #address-cells = <1>;
+       #size-cells = <0>;
+ 
+       ports {
+               dsi0_in: port@0 {
+                       reg = <0>;
+                       dsi0_in_vp1: endpoint {
+                               remote-endpoint = <&vp1_out_dsi0>;
+                       };
+               };
+ 
+               dsi0_out: port@1 {
+                       reg = <1>;
+                       mipi_out_panel: endpoint {
+                               remote-endpoint = <&mipi_in_panel>;
+                       };
+               };
+       };
+ 
+       panel: panel@0 {
+               compatible = "anbernic,rg353p-panel", "newvision,nv3051d";
+               reg = <0>;
+               backlight = <&backlight>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&lcd_rst>;
+               reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
+               vdd-supply = <&vcc3v3_lcd0_n>;
+ 
+               port {
+                       mipi_in_panel: endpoint {
+                               remote-endpoint = <&mipi_out_panel>;
+                       };
+               };
+       };
+ };
+ 
  &gpio_keys_control {
        button-a {
                gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;

diff --cc arch/arm64/boot/dts/rockchip/rk3588s.dtsi
Simple merge