Merge tag 'phy-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy updates from Vinod Koul:
 "New Support
   - Samsung Exynos gs101 drd combo phy
   - Qualcomm SC8180x USB uniphy, IPQ9574 QMP PCIe phy
   - Airoha EN7581 PCIe phy
   - Freescale i.MX8Q HSIO SerDes phy
   - Starfive jh7110 dphy tx

  Updates:
   - Resume support for j721e-wiz driver
   - Updates to Exynos usbdrd driver
   - Support for optional power domains in g12a usb2-phy driver
   - Debugfs support and updates to zynqmp driver"

* tag 'phy-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (56 commits)
  phy: airoha: Add dtime and Rx AEQ IO registers
  dt-bindings: phy: airoha: Add dtime and Rx AEQ IO registers
  dt-bindings: phy: rockchip-emmc-phy: Convert to dtschema
  dt-bindings: phy: qcom,qmp-usb: fix spelling error
  phy: exynos5-usbdrd: support Exynos USBDRD 3.1 combo phy (HS & SS)
  phy: exynos5-usbdrd: convert Vbus supplies to regulator_bulk
  phy: exynos5-usbdrd: convert (phy) register access clock to clk_bulk
  phy: exynos5-usbdrd: convert core clocks to clk_bulk
  phy: exynos5-usbdrd: support isolating HS and SS ports independently
  dt-bindings: phy: samsung,usb3-drd-phy: add gs101 compatible
  phy: core: Fix documentation of of_phy_get
  phy: starfive: Correct the dphy configure process
  phy: zynqmp: Add debugfs support
  phy: zynqmp: Take the phy mutex in xlate
  phy: zynqmp: Only wait for PLL lock "primary" instances
  phy: zynqmp: Store instance instead of type
  phy: zynqmp: Enable reference clock correctly
  phy: cadence-torrent: Check return value on register read
  phy: Fix the cacography in phy-exynos5250-usb2.c
  phy: phy-rockchip-samsung-hdptx: Select CONFIG_MFD_SYSCON
  ...

diff --cc MAINTAINERS
index 90083e17856c61c1a09cc46d65f36dc63150fe84,269c2144bedbbe3062c43ab30e62a2cc0c9985f7..9e47256fb067f18558211905f53e6a16edb7a400
--- 1/MAINTAINERS
--- 2/MAINTAINERS
+++ b/MAINTAINERS
@@@ -693,15 -682,14 +693,23 @@@ S:      Supporte
  F:    fs/aio.c
  F:    include/linux/*aio*.h
  
 +AIROHA ETHERNET DRIVER
 +M:    Lorenzo Bianconi <[email protected]>
 +L:    [email protected] (moderated for non-subscribers)
 +L:    [email protected] (moderated for non-subscribers)
 +L:    [email protected]
 +S:    Maintained
 +F:    Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml
 +F:    drivers/net/ethernet/mediatek/airoha_eth.c
 +
+ AIROHA PCIE PHY DRIVER
+ M:    Lorenzo Bianconi <[email protected]>
+ L:    [email protected] (moderated for non-subscribers)
+ S:    Maintained
+ F:    Documentation/devicetree/bindings/phy/airoha,en7581-pcie-phy.yaml
+ F:    drivers/phy/phy-airoha-pcie-regs.h
+ F:    drivers/phy/phy-airoha-pcie.c
+ 
  AIROHA SPI SNFI DRIVER
  M:    Lorenzo Bianconi <[email protected]>
  M:    Ray Liu <[email protected]>

diff --cc include/linux/soc/samsung/exynos-regs-pmu.h
index f411c176536d2d19abdc4e3911d84f34bb71d656,6765160eaab20b85d789c4567543d42b78b3a8ba..ce1a3790d6fb0400021f5cc22394afedfb742152
--- 1/include/linux/soc/samsung/exynos-regs-pmu.h
--- 2/include/linux/soc/samsung/exynos-regs-pmu.h
+++ b/include/linux/soc/samsung/exynos-regs-pmu.h
@@@ -657,8 -657,8 +657,10 @@@
  #define EXYNOS5433_PAD_RETENTION_UFS_OPTION                   (0x3268)
  #define EXYNOS5433_PAD_RETENTION_FSYSGENIO_OPTION             (0x32A8)
  
 -/* For GS101 */
 -#define GS101_PHY_CTRL_USB20                                  0x3eb0
 -#define GS101_PHY_CTRL_USBDP                                  0x3eb4
 +/* For Tensor GS101 */
 +#define GS101_SYSIP_DAT0                                      (0x810)
 +#define GS101_SYSTEM_CONFIGURATION                            (0x3A00)
++#define GS101_PHY_CTRL_USB20                                  (0x3EB0)
++#define GS101_PHY_CTRL_USBDP                                  (0x3EB4)
  
  #endif /* __LINUX_SOC_EXYNOS_REGS_PMU_H */