+++ /dev/null
-/*
- * Enhanced CPU type detection by Mike Jagdis, Patrick St. Jean
- * and Martin Mares, November 1997.
- *
- * Force Cyrix 6x86(MX) and M II processors to report MTRR capability
- * and Cyrix "coma bug" recognition by
- *
- * Force Centaur C6 processors to report MTRR capability.
- *
- * Intel Mobile Pentium II detection fix. Sean Gilley, June 1999.
- *
- * IDT Winchip tweaks, misc clean ups.
- *
- * Better detection of Centaur/IDT WinChip models.
- *
- * Cleaned up cache-detection code
- *
- * Added proper L2 cache detection for Coppermine
- *
- * Added the original array for capability flags but forgot to credit
- * myself :) (~1998) Fixed/cleaned up some cpu_model_info and other stuff
- *
- * Detection for Celeron coppermine, identify_cpu() overhauled,
- * and a few other clean ups.
- *
- * Pentium III FXSR, SSE support
- * General FPU state handling cleanups
- *
- * Added proper Cascades CPU and L2 cache detection for Cascades
- * and 8-way type cache happy bunch from Intel:^)
- *
- * Forward port AMD Duron errata T13 from 2.2.17pre
- *
- * Forward port lots of fixes/improvements from 2.2.18pre
- * Cyrix III, Pentium IV support.
- *
- * Massive cleanup of CPU detection and bug handling;
- * Transmeta CPU detection,
- *
- * VIA C3 Support.
- *
- * AMD Athlon/Duron/Thunderbird bluesmoke support.
- *
- * CacheSize bug workaround updates for AMD, Intel & VIA Cyrix.
- *
- */
-
+++ /dev/null
- ChangeLog
-
- Initial register-setting code (from proform-1.0).
- Original version for /proc/mtrr interface, SMP-safe.
- v1.0
- Bug fix for ioctls()'s.
- Added sample code in Documentation/mtrr.txt
- v1.1
- Disallow overlapping regions.
- Register-setting fixups.
- v1.2
- Fixups for kernel 2.1.75.
- v1.3
- Register-setting fixups and conformity with Intel conventions.
- Cosmetic changes and wrote this ChangeLog ;-)
- Fixups for kernel 2.1.78.
- v1.4
- Included passive-release enable code (elsewhere in PCI setup).
- v1.5
- Replaced global kernel lock with private spinlock.
- v1.6
- Added wait for other CPUs to complete changes.
- v1.7
- Bug fix in definition of <set_mtrr> for UP.
- v1.8
- Fixups for kernel 2.1.90.
- Move SMP BIOS fixup before secondary CPUs call <calibrate_delay>
- v1.9
- Fixed test for overlapping regions: confused by adjacent regions
- Added wbinvd in <set_mtrr_prepare>.
- Bug fix for non-SMP compilation.
- Fixed-MTRR synchronisation for SMP and use atomic operations
- instead of spinlocks.
- Differentiate different MTRR register classes for BIOS fixup.
- v1.10
- Bug fix in variable MTRR synchronisation.
- v1.11
- Fixups for kernel 2.1.97.
- v1.12
- Safer synchronisation across CPUs when changing MTRRs.
- v1.13
- Bugfix for SMP systems without MTRR support.
- v1.14
- Trap calls to <mtrr_add> and <mtrr_del> on non-MTRR machines.
- v1.15
- Use atomic bitops for setting SMP change mask.
- v1.16
- Removed spurious diagnostic message.
- v1.17
- Moved register-setting macros into this file.
- Moved setup code from init/main.c to i386-specific areas.
- v1.18
- Moved MTRR detection outside conditionals in <mtrr_init>.
- v1.19
- Documentation improvement: mention Pentium II and AGP.
- v1.20
- Only manipulate interrupt enable flag on local CPU.
- Allow enclosed uncachable regions.
- v1.21
- Always define <main_lock>.
- v1.22
- Removed module support in order to tidy up code.
- Added sanity check for <mtrr_add>/<mtrr_del> before <mtrr_init>.
- Created addition queue for prior to SMP commence.
- v1.23
- Ported patch to kernel 2.1.120-pre3.
- v1.24
- Removed sanity checks and addition queue: Linus prefers an OOPS.
- v1.25
- Fixed harmless compiler warning in include/asm-i386/mtrr.h
- Fixed version numbering and history for v1.23 -> v1.24.
- v1.26
- Added devfs support.
- v1.27
- Changed locking to spin with reschedule.
- Made use of new <smp_call_function>.
- v1.28
- Extended the driver to be able to use Cyrix style ARRs.
- Restructured Cyrix support.
- v1.29
- Refined ARR support: enable MAPEN in set_mtrr_prepare()
- and disable MAPEN in set_mtrr_done().
- Minor cleanups.
- v1.30
- Protect plain 6x86s (and other processors without the
- Page Global Enable feature) against accessing CR4 in
- set_mtrr_prepare() and set_mtrr_done().
- Turned <set_mtrr_up> and <get_mtrr> into function pointers.
- v1.31
- Major rewrite of cyrix_arr_init(): do not touch ARRs,
- leave them as the BIOS have set them up.
- Enable usage of all 8 ARRs.
- Avoid multiplications by 3 everywhere and other
- code clean ups/speed ups.
- Set up other Cyrix processors identical to the boot cpu.
- Since Cyrix don't support Intel APIC, this is l'art pour l'art.
- Weigh ARRs by size:
- If size <= 32M is given, set up ARR# we were given.
- If size > 32M is given, set up ARR7 only if it is free,
- fail otherwise.
- Also check for size >= 256K if we are to set up ARR7,
- mtrr_add() returns the value it gets from set_mtrr()
- Remove Cyrix "coma bug" workaround from here.
- Moved to linux/arch/i386/kernel/setup.c and
- linux/include/asm-i386/bugs.h
- Added MTRRIOC_KILL_ENTRY ioctl(2)
- Trap for counter underflow in <mtrr_file_del>.
- Trap for 4 MiB aligned regions for PPro, stepping <= 7.
- Created <get_free_region> hook.
- Temporarily disable AMD support now MTRR capability flag is set.
- v1.32
- Adjust my changes (19990212-19990218) to Richard Gooch's
- latest changes. (19990228-19990305)
- v1.33
- Fixed typo in <printk> message.
- v1.34
- Support Centaur C6 MCR's.
- Minor cleanups.
- v1.35
- Check whether ARR3 is protected in cyrix_get_free_region()
- and mtrr_del(). The code won't attempt to delete or change it
- from now on if the BIOS protected ARR3. It silently skips ARR3
- in cyrix_get_free_region() or returns with an error code from
- mtrr_del().
- Reset some bits in the CCRs in cyrix_arr_init() to disable SMM
- if ARR3 isn't protected. This is needed because if SMM is active
- and ARR3 isn't protected then deleting and setting ARR3 again
- may lock up the processor. With SMM entirely disabled, it does
- not happen.
- Rearrange switch() statements so the driver accomodates to
- the fact that the AMD Athlon handles its MTRRs the same way
- as Intel does.
- Double check for Intel in mtrr_add()'s big switch() because
- that revision check is only valid for Intel CPUs.
- Tested Zoltan's changes on a pre production Athlon - 100%
- success.
- replaced spin_lock_reschedule() with a normal semaphore.
- v1.36
- Compile fix if procfs and devfs not enabled.
- Formatting changes.
- v1.37
- Use the new centralized CPU feature detects.
-
- v1.38
- Add support for Cyrix III.
-
- v1.39
- Ugh, I broke AMD support.
-
- v1.40
- Adapted Cyrix III support to include VIA C3.
-
- v2.0
- Split mtrr.c -> mtrr/*.c
- Converted to Linux Kernel Coding Style
- Fixed several minor nits in form
- Moved some SMP-only functions out, so they can be used
- for power management in the future.
- TODO: Fix user interface cruft.