cpufreq: exynos: Fix the compile error

Commit 7da83a80 ("ARM: EXYNOS: Migrate Exynos specific macros from
plat to mach") which lands in samsung tree causes build breakage
for cpufreq-exynos like following:

drivers/cpufreq/exynos-cpufreq.c: In function 'exynos_cpufreq_probe':
drivers/cpufreq/exynos-cpufreq.c:166:2: error: implicit declaration of function 'soc_is_exynos4210'
[-Werror=implicit-function-declaration]
drivers/cpufreq/exynos-cpufreq.c:168:2: error: implicit declaration of function 'soc_is_exynos4212'
[-Werror=implicit-function-declaration]
drivers/cpufreq/exynos-cpufreq.c:168:2: error: implicit declaration of function 'soc_is_exynos4412'
[-Werror=implicit-function-declaration]
drivers/cpufreq/exynos-cpufreq.c:170:2: error: implicit declaration of function 'soc_is_exynos5250'
[-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
make[2]: *** [drivers/cpufreq/exynos-cpufreq.o] Error 1
make[2]: *** Waiting for unfinished jobs....
drivers/cpufreq/exynos4x12-cpufreq.c: In function 'exynos4x12_set_clkdiv':
drivers/cpufreq/exynos4x12-cpufreq.c:118:2: error: implicit declaration of function 'soc_is_exynos4212'
[-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
make[2]: *** [drivers/cpufreq/exynos4x12-cpufreq.o] Error 1
make[1]: *** [drivers/cpufreq] Error 2

This fixes above error with getting SoC information via
of_machine_is_compatible() instead of soc_is_exynosXXXX().

Suggested-by: Tomasz Figa <[email protected]>
Signed-off-by: Jonghwan Choi <[email protected]>
[[email protected]: fixed typo and modified as per Viresh's suggestion]
[[email protected]: Rafael agreed]
Signed-off-by: Kukjin Kim <[email protected]>

diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index f99cfe24e7bca6489dcbf592372a38d1d019f4f1..e8a4a7ed38c165f7a785f6539c6f1b06d39fa7dd 100644 (file)
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -17,6 +17,7 @@
 #include <linux/regulator/consumer.h>
 #include <linux/cpufreq.h>
 #include <linux/platform_device.h>
 #include <linux/regulator/consumer.h>
 #include <linux/cpufreq.h>
 #include <linux/platform_device.h>

+#include <linux/of.h>

 
 #include <plat/cpu.h>
 
 
 #include <plat/cpu.h>
 


@@ -163,14 +164,22 @@ static int exynos_cpufreq_probe(struct platform_device *pdev)
        if (!exynos_info)
                return -ENOMEM;
 
        if (!exynos_info)
                return -ENOMEM;
 

-       if (soc_is_exynos4210())
+       if (of_machine_is_compatible("samsung,exynos4210")) {
+               exynos_info->type = EXYNOS_SOC_4210;

                ret = exynos4210_cpufreq_init(exynos_info);
                ret = exynos4210_cpufreq_init(exynos_info);

-       else if (soc_is_exynos4212() || soc_is_exynos4412())
+       } else if (of_machine_is_compatible("samsung,exynos4212")) {
+               exynos_info->type = EXYNOS_SOC_4212;

                ret = exynos4x12_cpufreq_init(exynos_info);
                ret = exynos4x12_cpufreq_init(exynos_info);

-       else if (soc_is_exynos5250())
+       } else if (of_machine_is_compatible("samsung,exynos4412")) {
+               exynos_info->type = EXYNOS_SOC_4412;
+               ret = exynos4x12_cpufreq_init(exynos_info);
+       } else if (of_machine_is_compatible("samsung,exynos5250")) {
+               exynos_info->type = EXYNOS_SOC_5250;

                ret = exynos5250_cpufreq_init(exynos_info);
                ret = exynos5250_cpufreq_init(exynos_info);

-       else
-               return 0;
+       } else {
+               pr_err("%s: Unknown SoC type\n", __func__);
+               return -ENODEV;
+       }

 
        if (ret)
                goto err_vdd_arm;
 
        if (ret)
                goto err_vdd_arm;

diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
index 3ddade8a51251e31a2091642aa9e6c4d76e3f398..f189547bb4479f53717d209466768f76a7cbfc26 100644 (file)
--- a/drivers/cpufreq/exynos-cpufreq.h
+++ b/drivers/cpufreq/exynos-cpufreq.h
@@ -17,6 +17,13 @@ enum cpufreq_level_index {
        L20,
 };
 
        L20,
 };
 

+enum exynos_soc_type {
+       EXYNOS_SOC_4210,
+       EXYNOS_SOC_4212,
+       EXYNOS_SOC_4412,
+       EXYNOS_SOC_5250,
+};
+

 #define APLL_FREQ(f, a0, a1, a2, a3, a4, a5, a6, a7, b0, b1, b2, m, p, s) \
        { \
                .freq = (f) * 1000, \
 #define APLL_FREQ(f, a0, a1, a2, a3, a4, a5, a6, a7, b0, b1, b2, m, p, s) \
        { \
                .freq = (f) * 1000, \


@@ -34,6 +41,7 @@ struct apll_freq {
 };
 
 struct exynos_dvfs_info {
 };
 
 struct exynos_dvfs_info {

+       enum exynos_soc_type type;

        unsigned long   mpll_freq_khz;
        unsigned int    pll_safe_idx;
        struct clk      *cpu_clk;
        unsigned long   mpll_freq_khz;
        unsigned int    pll_safe_idx;
        struct clk      *cpu_clk;

diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
index 466c76ad335bf54cb85038776e30f0c5d597f639..63a3907ce5782d45860fff01fb35cb14f837ffba 100644 (file)
--- a/drivers/cpufreq/exynos4x12-cpufreq.c
+++ b/drivers/cpufreq/exynos4x12-cpufreq.c
@@ -100,7 +100,6 @@ static struct apll_freq apll_freq_4412[] = {
 static void exynos4x12_set_clkdiv(unsigned int div_index)
 {
        unsigned int tmp;
 static void exynos4x12_set_clkdiv(unsigned int div_index)
 {
        unsigned int tmp;

-       unsigned int stat_cpu1;

 
        /* Change Divider - CPU0 */
 
 
        /* Change Divider - CPU0 */
 


@@ -115,13 +114,11 @@ static void exynos4x12_set_clkdiv(unsigned int div_index)
        tmp = apll_freq_4x12[div_index].clk_div_cpu1;
 
        __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
        tmp = apll_freq_4x12[div_index].clk_div_cpu1;
 
        __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);

-       if (soc_is_exynos4212())
-               stat_cpu1 = 0x11;
-       else
-               stat_cpu1 = 0x111;

 
 

-       while (__raw_readl(EXYNOS4_CLKDIV_STATCPU1) & stat_cpu1)
+       do {

                cpu_relax();
                cpu_relax();

+               tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
+       } while (tmp != 0x0);

 }
 
 static void exynos4x12_set_apll(unsigned int index)
 }
 
 static void exynos4x12_set_apll(unsigned int index)


@@ -184,7 +181,7 @@ int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
        if (IS_ERR(mout_apll))
                goto err_mout_apll;
 
        if (IS_ERR(mout_apll))
                goto err_mout_apll;
 

-       if (soc_is_exynos4212())
+       if (info->type == EXYNOS_SOC_4212)

                apll_freq_4x12 = apll_freq_4212;
        else
                apll_freq_4x12 = apll_freq_4412;
                apll_freq_4x12 = apll_freq_4212;
        else
                apll_freq_4x12 = apll_freq_4412;