Merge drm/drm-next into drm-intel-next

Syncing drm-intel-next and drm-intel-gt-next to unblock ADL enabling.

Signed-off-by: Rodrigo Vivi <[email protected]>

diff --combined drivers/gpu/drm/i915/Makefile
index ca545b39814b6a09edd5c30bea3d48a530b9374f,d6ac946d040702793fe5bf13413a1b394ce59ffc..e245a036613e66174d525b356e353045c2525ed3
--- 1/drivers/gpu/drm/i915/Makefile
--- 2/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@@ -38,6 -38,7 +38,7 @@@ i915-y += i915_drv.o 
          i915_config.o \
          i915_irq.o \
          i915_getparam.o \
+         i915_mitigations.o \
          i915_params.o \
          i915_pci.o \
          i915_scatterlist.o \
@@@ -58,6 -59,7 +59,7 @@@
  
  # core library code
  i915-y += \
+       dma_resv_utils.o \
        i915_memcpy.o \
        i915_mm.o \
        i915_sw_fence.o \
@@@ -82,6 -84,7 +84,7 @@@ gt-y += 
        gt/gen6_engine_cs.o \
        gt/gen6_ppgtt.o \
        gt/gen7_renderclear.o \
+       gt/gen8_engine_cs.o \
        gt/gen8_ppgtt.o \
        gt/intel_breadcrumbs.o \
        gt/intel_context.o \
@@@ -91,6 -94,7 +94,7 @@@
        gt/intel_engine_heartbeat.o \
        gt/intel_engine_pm.o \
        gt/intel_engine_user.o \
+       gt/intel_execlists_submission.o \
        gt/intel_ggtt.o \
        gt/intel_ggtt_fencing.o \
        gt/intel_gt.o \
@@@ -106,6 -110,7 +110,7 @@@
        gt/intel_mocs.o \
        gt/intel_ppgtt.o \
        gt/intel_rc6.o \
+       gt/intel_region_lmem.o \
        gt/intel_renderstate.o \
        gt/intel_reset.o \
        gt/intel_ring.o \
@@@ -166,7 -171,6 +171,6 @@@ i915-y += 
          i915_scheduler.o \
          i915_trace_points.o \
          i915_vma.o \
-         intel_region_lmem.o \
          intel_wopcm.o
  
  # general-purpose microcontroller (GuC) support
@@@ -196,17 -200,14 +200,17 @@@ i915-y += 
        display/intel_color.o \
        display/intel_combo_phy.o \
        display/intel_connector.o \
 +      display/intel_crtc.o \
        display/intel_csr.o \
        display/intel_cursor.o \
        display/intel_display.o \
        display/intel_display_power.o \
        display/intel_dpio_phy.o \
 +      display/intel_dpll.o \
        display/intel_dpll_mgr.o \
        display/intel_dsb.o \
        display/intel_fbc.o \
 +      display/intel_fdi.o \
        display/intel_fifo_underrun.o \
        display/intel_frontbuffer.o \
        display/intel_global_state.o \
@@@ -251,7 -252,6 +255,7 @@@ i915-y += 
        display/intel_lspcon.o \
        display/intel_lvds.o \
        display/intel_panel.o \
 +      display/intel_pps.o \
        display/intel_sdvo.o \
        display/intel_tv.o \
        display/intel_vdsc.o \

diff --combined drivers/gpu/drm/i915/i915_drv.h
index 266dec627fa255b865bf615614cebb8abd1007f3,e3d58299b323f2d325b748e9a0a4c09b66c5d54f..8376cff5ba86f7c340a49ee03027049592f5a42a
--- 1/drivers/gpu/drm/i915/i915_drv.h
--- 2/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@@ -79,9 -79,9 +79,9 @@@
  #include "gem/i915_gem_shrinker.h"
  #include "gem/i915_gem_stolen.h"
  
- #include "gt/intel_lrc.h"
  #include "gt/intel_engine.h"
  #include "gt/intel_gt_types.h"
+ #include "gt/intel_region_lmem.h"
  #include "gt/intel_workarounds.h"
  #include "gt/uc/intel_uc.h"
  
@@@ -103,7 -103,6 +103,6 @@@
  #include "i915_vma.h"
  #include "i915_irq.h"
  
- #include "intel_region_lmem.h"
  
  /* General customization:
   */
@@@ -1170,9 -1169,6 +1169,6 @@@ struct drm_i915_private 
                struct i915_gem_contexts {
                        spinlock_t lock; /* locks list */
                        struct list_head list;
- 
-                       struct llist_head free_list;
-                       struct work_struct free_work;
                } contexts;
  
                /*
@@@ -1570,16 -1566,30 +1566,30 @@@ enum 
        TGL_REVID_D0,
  };
  
- extern const struct i915_rev_steppings tgl_uy_revids[];
- extern const struct i915_rev_steppings tgl_revids[];
+ #define TGL_UY_REVIDS_SIZE    4
+ #define TGL_REVIDS_SIZE               2
+ 
+ extern const struct i915_rev_steppings tgl_uy_revids[TGL_UY_REVIDS_SIZE];
+ extern const struct i915_rev_steppings tgl_revids[TGL_REVIDS_SIZE];
  
  static inline const struct i915_rev_steppings *
  tgl_revids_get(struct drm_i915_private *dev_priv)
  {
-       if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
-               return &tgl_uy_revids[INTEL_REVID(dev_priv)];
-       else
-               return &tgl_revids[INTEL_REVID(dev_priv)];
+       u8 revid = INTEL_REVID(dev_priv);
+       u8 size;
+       const struct i915_rev_steppings *tgl_revid_tbl;
+ 
+       if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
+               tgl_revid_tbl = tgl_uy_revids;
+               size = ARRAY_SIZE(tgl_uy_revids);
+       } else {
+               tgl_revid_tbl = tgl_revids;
+               size = ARRAY_SIZE(tgl_revids);
+       }
+ 
+       revid = min_t(u8, revid, size - 1);
+ 
+       return &tgl_revid_tbl[revid];
  }
  
  #define IS_TGL_DISP_REVID(p, since, until) \
@@@ -1589,14 -1599,14 +1599,14 @@@
  
  #define IS_TGL_UY_GT_REVID(p, since, until) \
        ((IS_TGL_U(p) || IS_TGL_Y(p)) && \
-        tgl_uy_revids[INTEL_REVID(p)].gt_stepping >= (since) && \
-        tgl_uy_revids[INTEL_REVID(p)].gt_stepping <= (until))
+        tgl_revids_get(p)->gt_stepping >= (since) && \
+        tgl_revids_get(p)->gt_stepping <= (until))
  
  #define IS_TGL_GT_REVID(p, since, until) \
        (IS_TIGERLAKE(p) && \
         !(IS_TGL_U(p) || IS_TGL_Y(p)) && \
-        tgl_revids[INTEL_REVID(p)].gt_stepping >= (since) && \
-        tgl_revids[INTEL_REVID(p)].gt_stepping <= (until))
+        tgl_revids_get(p)->gt_stepping >= (since) && \
+        tgl_revids_get(p)->gt_stepping <= (until))
  
  #define RKL_REVID_A0          0x0
  #define RKL_REVID_B0          0x1
@@@ -1647,8 -1657,6 +1657,6 @@@
                (INTEL_INFO(dev_priv)->has_logical_ring_contexts)
  #define HAS_LOGICAL_RING_ELSQ(dev_priv) \
                (INTEL_INFO(dev_priv)->has_logical_ring_elsq)
- #define HAS_LOGICAL_RING_PREEMPTION(dev_priv) \
-               (INTEL_INFO(dev_priv)->has_logical_ring_preemption)
  
  #define HAS_MASTER_UNIT_IRQ(dev_priv) (INTEL_INFO(dev_priv)->has_master_unit_irq)
  
@@@ -1754,11 -1762,6 +1762,11 @@@
  #define INTEL_DISPLAY_ENABLED(dev_priv) \
        (drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)), !(dev_priv)->params.disable_display)
  
 +static inline bool run_as_guest(void)
 +{
 +      return !hypervisor_is_type(X86_HYPER_NATIVE);
 +}
 +
  static inline bool intel_vtd_active(void)
  {
  #ifdef CONFIG_INTEL_IOMMU
@@@ -1767,7 -1770,7 +1775,7 @@@
  #endif
  
        /* Running as a guest, we assume the host is enforcing VT'd */
 -      return !hypervisor_is_type(X86_HYPER_NATIVE);
 +      return run_as_guest();
  }
  
  static inline bool intel_scanout_needs_vtd_wa(struct drm_i915_private *dev_priv)
@@@ -1995,16 -1998,4 +2003,4 @@@ i915_coherent_map_type(struct drm_i915_
        return HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC;
  }
  
- static inline u64 i915_cs_timestamp_ns_to_ticks(struct drm_i915_private *i915, u64 val)
- {
-       return DIV_ROUND_UP_ULL(val * RUNTIME_INFO(i915)->cs_timestamp_frequency_hz,
-                               1000000000);
- }
- 
- static inline u64 i915_cs_timestamp_ticks_to_ns(struct drm_i915_private *i915, u64 val)
- {
-       return div_u64(val * 1000000000,
-                      RUNTIME_INFO(i915)->cs_timestamp_frequency_hz);
- }
- 
  #endif