mmc: sdhci-tegra: Use actual clock rate for SW tuning correction

Ensure tegra_host member "curr_clk_rate" holds the actual clock rate
instead of requested clock rate for proper use during tuning correction
algorithm. Actual clk rate may not be the same as the requested clk
frequency depending on the parent clock source set. Tuning correction
algorithm depends on certain parameters which are sensitive to current
clk rate. If the host clk is selected instead of the actual clock rate,
tuning correction algorithm may end up applying invalid correction,
which could result in errors

Fixes: ea8fc5953e8b ("mmc: tegra: update hw tuning process")
Signed-off-by: Aniruddha TVS Rao <[email protected]>
Signed-off-by: Prathamesh Shete <[email protected]>
Acked-by: Adrian Hunter <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Cc: [email protected]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Ulf Hansson <[email protected]>

diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 2d2d8260c6814d666879cb0b95eb3ec0760d11a6..413925bce0ca8c6587b28afcaee44f5ef332eb3f 100644 (file)
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -773,7 +773,7 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
                dev_err(dev, "failed to set clk rate to %luHz: %d\n",
                        host_clk, err);
 
-       tegra_host->curr_clk_rate = host_clk;
+       tegra_host->curr_clk_rate = clk_get_rate(pltfm_host->clk);
        if (tegra_host->ddr_signaling)
                host->max_clk = host_clk;
        else