Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull second set of KVM updates from Paolo Bonzini:
 "ARM:
   - Support for Group0 interrupts in guests
   - Cache management optimizations for ARMv8.4 systems
   - Userspace interface for RAS
   - Fault path optimization
   - Emulated physical timer fixes
   - Random cleanups

  x86:
   - fixes for L1TF
   - a new test case
   - non-support for SGX (inject the right exception in the guest)
   - fix lockdep false positive"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (49 commits)
  KVM: VMX: fixes for vmentry_l1d_flush module parameter
  kvm: selftest: add dirty logging test
  kvm: selftest: pass in extra memory when create vm
  kvm: selftest: include the tools headers
  kvm: selftest: unify the guest port macros
  tools: introduce test_and_clear_bit
  KVM: x86: SVM: Call x86_spec_ctrl_set_guest/host() with interrupts disabled
  KVM: vmx: Inject #UD for SGX ENCLS instruction in guest
  KVM: vmx: Add defines for SGX ENCLS exiting
  x86/kvm/vmx: Fix coding style in vmx_setup_l1d_flush()
  x86: kvm: avoid unused variable warning
  KVM: Documentation: rename the capability of KVM_CAP_ARM_SET_SERROR_ESR
  KVM: arm/arm64: Skip updating PTE entry if no change
  KVM: arm/arm64: Skip updating PMD entry if no change
  KVM: arm: Use true and false for boolean values
  KVM: arm/arm64: vgic: Do not use spin_lock_irqsave/restore with irq disabled
  KVM: arm/arm64: vgic: Move DEBUG_SPINLOCK_BUG_ON to vgic.h
  KVM: arm: vgic-v3: Add support for ICC_SGI0R and ICC_ASGI1R accesses
  KVM: arm64: vgic-v3: Add support for ICC_SGI0R_EL1 and ICC_ASGI1R_EL1 accesses
  KVM: arm/arm64: vgic-v3: Add core support for Group0 SGIs
  ...

diff --combined arch/x86/kvm/x86.c
index 4a74a7cf0a8bf835800c0cb23d72b17bcb931efa,14ee9a814888e54ea44e8da5c35fc43415689bb5..506bd2b4b8bb76e21a959310d33f6de6180719f8
--- 1/arch/x86/kvm/x86.c
--- 2/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@@ -6576,14 -6576,12 +6576,12 @@@ static void kvm_set_mmio_spte_mask(void
        /* Set the present bit. */
        mask |= 1ull;
  
- #ifdef CONFIG_X86_64
        /*
         * If reserved bit is not supported, clear the present bit to disable
         * mmio page fault.
         */
-       if (maxphyaddr == 52)
+       if (IS_ENABLED(CONFIG_X86_64) && maxphyaddr == 52)
                mask &= ~1ull;
- #endif
  
        kvm_mmu_set_mmio_spte_mask(mask, mask);
  }
@@@ -7305,9 -7303,8 +7303,9 @@@ static void vcpu_load_eoi_exitmap(struc
        kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
  }
  
 -void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
 -              unsigned long start, unsigned long end)
 +int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
 +              unsigned long start, unsigned long end,
 +              bool blockable)
  {
        unsigned long apic_address;
  
@@@ -7318,8 -7315,6 +7316,8 @@@
        apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
        if (start <= apic_address && apic_address < end)
                kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
 +
 +      return 0;
  }
  
  void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)