Merge tag 'timers-v5.18-rc1' of https://git.linaro.org/people/daniel.lezcano/linux...

Pull clocksource/events updates from Daniel Lezcano:

  - Fix return error code check for the timer-of layer when getting
    the base address (Guillaume Ranquet)

  - Remove MMIO dependency, add notrace annotation for sched_clock
    and increase the timer resolution for the Microchip
    PIT64b (Claudiu Beznea)

  - Convert DT bindings to yaml for the Tegra timer (David Heidelberg)

  - Fix compilation error on architecture other than ARM for the
    i.MX TPM (Nathan Chancellor)

  - Add support for the event stream scaling for 1GHz counter on
    the arch ARM timer (Marc Zyngier)

  - Support a higher number of interrupts by the Exynos MCT timer
    driver (Alim Akhtar)

  - Detect and prevent memory corruption when the specified number
    of interrupts in the DTS is greater than the array size in the
    code for the Exynos MCT timer (Krzysztof Kozlowski)

  - Fix regression from a previous errata fix on the TI DM
    timer (Drew Fustini)

  - Several fixes and code improvements for the i.MX TPM
    driver (Peng Fan)

Link: https://lore.kernel.org/all/[email protected]

diff --combined arch/arm/boot/dts/dra7.dtsi
index 42bff117656cf2fd4d795e9c8cd724d2aea4a55d,8f7ffe2f66e90f4f059051e22986714319b83602..97ce0c4f1df7e2874a3a4b1df279cbc4a414a741
--- 1/arch/arm/boot/dts/dra7.dtsi
--- 2/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@@ -160,7 -160,7 +160,7 @@@
                target-module@48210000 {
                        compatible = "ti,sysc-omap4-simple", "ti,sysc";
                        power-domains = <&prm_mpu>;
 -                      clocks = <&mpu_clkctrl DRA7_MPU_CLKCTRL 0>;
 +                      clocks = <&mpu_clkctrl DRA7_MPU_MPU_CLKCTRL 0>;
                        clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
@@@ -875,10 -875,10 +875,10 @@@
                              <0x58000014 4>;
                        reg-names = "rev", "syss";
                        ti,syss-mask = <1>;
 -                      clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 0>,
 -                               <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 9>,
 -                               <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 10>,
 -                               <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 11>;
 +                      clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 0>,
 +                               <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 9>,
 +                               <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 10>,
 +                               <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 11>;
                        clock-names = "fck", "hdmi_clk", "sys_clk", "tv_clk";
                        #address-cells = <1>;
                        #size-cells = <1>;
@@@ -912,7 -912,7 +912,7 @@@
                                                         SYSC_OMAP2_SOFTRESET |
                                                         SYSC_OMAP2_AUTOIDLE)>;
                                        ti,syss-mask = <1>;
 -                                      clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 8>;
 +                                      clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>;
                                        clock-names = "fck";
                                        #address-cells = <1>;
                                        #size-cells = <1>;
@@@ -939,8 -939,8 +939,8 @@@
                                                        <SYSC_IDLE_SMART>,
                                                        <SYSC_IDLE_SMART_WKUP>;
                                        ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET)>;
 -                                      clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 9>,
 -                                               <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 8>;
 +                                      clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 9>,
 +                                               <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>;
                                        clock-names = "fck", "dss_clk";
                                        #address-cells = <1>;
                                        #size-cells = <1>;
@@@ -979,7 -979,7 +979,7 @@@
                                compatible = "vivante,gc";
                                reg = <0x0 0x700>;
                                interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 -                              clocks = <&dss_clkctrl DRA7_BB2D_CLKCTRL 0>;
 +                              clocks = <&dss_clkctrl DRA7_DSS_BB2D_CLKCTRL 0>;
                                clock-names = "core";
                        };
                };
@@@ -1333,26 -1333,26 +1333,26 @@@
        ti,no-reset-on-init;
        ti,no-idle;
        timer@0 {
 -              assigned-clocks = <&wkupaon_clkctrl DRA7_TIMER1_CLKCTRL 24>;
 +              assigned-clocks = <&wkupaon_clkctrl DRA7_WKUPAON_TIMER1_CLKCTRL 24>;
                assigned-clock-parents = <&sys_32k_ck>;
        };
  };
  
  /* Local timers, see ARM architected timer wrap erratum i940 */
- &timer3_target {
+ &timer15_target {
        ti,no-reset-on-init;
        ti,no-idle;
        timer@0 {
-               assigned-clocks = <&l4per_clkctrl DRA7_L4PER_TIMER3_CLKCTRL 24>;
+               assigned-clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>;
                assigned-clock-parents = <&timer_sys_clk_div>;
        };
  };
  
- &timer4_target {
+ &timer16_target {
        ti,no-reset-on-init;
        ti,no-idle;
        timer@0 {
-               assigned-clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 24>;
+               assigned-clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>;
                assigned-clock-parents = <&timer_sys_clk_div>;
        };
  };

diff --combined drivers/clocksource/timer-ti-dm-systimer.c
index 5c40ca1d4740e7f67f4a674dd08a433f78488ffc,f52bf81dc1dd077c4f950e1bdbb002fb54d8dc5d..f19a1f0bb4326772ec9d86c0d759be079382f43d
--- 1/drivers/clocksource/timer-ti-dm-systimer.c
--- 2/drivers/clocksource/timer-ti-dm-systimer.c
+++ b/drivers/clocksource/timer-ti-dm-systimer.c
@@@ -241,7 -241,7 +241,7 @@@ static void __init dmtimer_systimer_ass
        bool quirk_unreliable_oscillator = false;
  
        /* Quirk unreliable 32 KiHz oscillator with incomplete dts */
 -      if (of_machine_is_compatible("ti,omap3-beagle") ||
 +      if (of_machine_is_compatible("ti,omap3-beagle-ab4") ||
            of_machine_is_compatible("timll,omap3-devkit8000")) {
                quirk_unreliable_oscillator = true;
                counter_32k = -ENODEV;
@@@ -695,9 -695,9 +695,9 @@@ static int __init dmtimer_percpu_quirk_
                return 0;
        }
  
-       if (pa == 0x48034000)           /* dra7 dmtimer3 */
+       if (pa == 0x4882c000)           /* dra7 dmtimer15 */
                return dmtimer_percpu_timer_init(np, 0);
-       else if (pa == 0x48036000)      /* dra7 dmtimer4 */
+       else if (pa == 0x4882e000)      /* dra7 dmtimer16 */
                return dmtimer_percpu_timer_init(np, 1);
  
        return 0;